2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #include <nvif/push006c.h>
26 #include <nvif/class.h>
27 #include <nvif/cl0002.h>
28 #include <nvif/if0020.h>
30 #include "nouveau_drv.h"
31 #include "nouveau_dma.h"
32 #include "nouveau_bo.h"
33 #include "nouveau_chan.h"
34 #include "nouveau_fence.h"
35 #include "nouveau_abi16.h"
36 #include "nouveau_vmm.h"
37 #include "nouveau_svm.h"
39 MODULE_PARM_DESC(vram_pushbuf
, "Create DMA push buffers in VRAM");
40 int nouveau_vram_pushbuf
;
41 module_param_named(vram_pushbuf
, nouveau_vram_pushbuf
, int, 0400);
44 nouveau_channel_kill(struct nouveau_channel
*chan
)
46 atomic_set(&chan
->killed
, 1);
48 nouveau_fence_context_kill(chan
->fence
, -ENODEV
);
52 nouveau_channel_killed(struct nvif_event
*event
, void *repv
, u32 repc
)
54 struct nouveau_channel
*chan
= container_of(event
, typeof(*chan
), kill
);
55 struct nouveau_cli
*cli
= (void *)chan
->user
.client
;
57 NV_PRINTK(warn
, cli
, "channel %d killed!\n", chan
->chid
);
59 if (unlikely(!atomic_read(&chan
->killed
)))
60 nouveau_channel_kill(chan
);
62 return NVIF_EVENT_DROP
;
66 nouveau_channel_idle(struct nouveau_channel
*chan
)
68 if (likely(chan
&& chan
->fence
&& !atomic_read(&chan
->killed
))) {
69 struct nouveau_cli
*cli
= (void *)chan
->user
.client
;
70 struct nouveau_fence
*fence
= NULL
;
73 ret
= nouveau_fence_new(&fence
, chan
);
75 ret
= nouveau_fence_wait(fence
, false, false);
76 nouveau_fence_unref(&fence
);
80 NV_PRINTK(err
, cli
, "failed to idle channel %d [%s]\n",
81 chan
->chid
, nvxx_client(&cli
->base
)->name
);
89 nouveau_channel_del(struct nouveau_channel
**pchan
)
91 struct nouveau_channel
*chan
= *pchan
;
93 struct nouveau_cli
*cli
= (void *)chan
->user
.client
;
96 nouveau_fence(chan
->drm
)->context_del(chan
);
99 nouveau_svmm_part(chan
->vmm
->svmm
, chan
->inst
);
101 nvif_object_dtor(&chan
->blit
);
102 nvif_object_dtor(&chan
->nvsw
);
103 nvif_object_dtor(&chan
->gart
);
104 nvif_object_dtor(&chan
->vram
);
105 nvif_event_dtor(&chan
->kill
);
106 nvif_object_dtor(&chan
->user
);
107 nvif_mem_dtor(&chan
->mem_userd
);
108 nvif_object_dtor(&chan
->push
.ctxdma
);
109 nouveau_vma_del(&chan
->push
.vma
);
110 nouveau_bo_unmap(chan
->push
.buffer
);
111 if (chan
->push
.buffer
&& chan
->push
.buffer
->bo
.pin_count
)
112 nouveau_bo_unpin(chan
->push
.buffer
);
113 nouveau_bo_ref(NULL
, &chan
->push
.buffer
);
120 nouveau_channel_kick(struct nvif_push
*push
)
122 struct nouveau_channel
*chan
= container_of(push
, typeof(*chan
), chan
._push
);
123 chan
->dma
.cur
= chan
->dma
.cur
+ (chan
->chan
._push
.cur
- chan
->chan
._push
.bgn
);
125 chan
->chan
._push
.bgn
= chan
->chan
._push
.cur
;
129 nouveau_channel_wait(struct nvif_push
*push
, u32 size
)
131 struct nouveau_channel
*chan
= container_of(push
, typeof(*chan
), chan
._push
);
133 chan
->dma
.cur
= chan
->dma
.cur
+ (chan
->chan
._push
.cur
- chan
->chan
._push
.bgn
);
134 ret
= RING_SPACE(chan
, size
);
136 chan
->chan
._push
.bgn
= chan
->chan
._push
.mem
.object
.map
.ptr
;
137 chan
->chan
._push
.bgn
= chan
->chan
._push
.bgn
+ chan
->dma
.cur
;
138 chan
->chan
._push
.cur
= chan
->chan
._push
.bgn
;
139 chan
->chan
._push
.end
= chan
->chan
._push
.bgn
+ size
;
145 nouveau_channel_prep(struct nouveau_drm
*drm
, struct nvif_device
*device
,
146 u32 size
, struct nouveau_channel
**pchan
)
148 struct nouveau_cli
*cli
= (void *)device
->object
.client
;
149 struct nv_dma_v0 args
= {};
150 struct nouveau_channel
*chan
;
154 chan
= *pchan
= kzalloc(sizeof(*chan
), GFP_KERNEL
);
158 chan
->device
= device
;
160 chan
->vmm
= nouveau_cli_vmm(cli
);
161 atomic_set(&chan
->killed
, 0);
163 /* allocate memory for dma push buffer */
164 target
= NOUVEAU_GEM_DOMAIN_GART
| NOUVEAU_GEM_DOMAIN_COHERENT
;
165 if (nouveau_vram_pushbuf
)
166 target
= NOUVEAU_GEM_DOMAIN_VRAM
;
168 ret
= nouveau_bo_new(cli
, size
, 0, target
, 0, 0, NULL
, NULL
,
171 ret
= nouveau_bo_pin(chan
->push
.buffer
, target
, false);
173 ret
= nouveau_bo_map(chan
->push
.buffer
);
177 nouveau_channel_del(pchan
);
181 chan
->chan
._push
.mem
.object
.parent
= cli
->base
.object
.parent
;
182 chan
->chan
._push
.mem
.object
.client
= &cli
->base
;
183 chan
->chan
._push
.mem
.object
.name
= "chanPush";
184 chan
->chan
._push
.mem
.object
.map
.ptr
= chan
->push
.buffer
->kmap
.virtual;
185 chan
->chan
._push
.wait
= nouveau_channel_wait
;
186 chan
->chan
._push
.kick
= nouveau_channel_kick
;
187 chan
->chan
.push
= &chan
->chan
._push
;
189 /* create dma object covering the *entire* memory space that the
190 * pushbuf lives in, this is because the GEM code requires that
191 * we be able to call out to other (indirect) push buffers
193 chan
->push
.addr
= chan
->push
.buffer
->offset
;
195 if (device
->info
.family
>= NV_DEVICE_INFO_V0_TESLA
) {
196 ret
= nouveau_vma_new(chan
->push
.buffer
, chan
->vmm
,
199 nouveau_channel_del(pchan
);
203 chan
->push
.addr
= chan
->push
.vma
->addr
;
205 if (device
->info
.family
>= NV_DEVICE_INFO_V0_FERMI
)
208 args
.target
= NV_DMA_V0_TARGET_VM
;
209 args
.access
= NV_DMA_V0_ACCESS_VM
;
211 args
.limit
= chan
->vmm
->vmm
.limit
- 1;
213 if (chan
->push
.buffer
->bo
.resource
->mem_type
== TTM_PL_VRAM
) {
214 if (device
->info
.family
== NV_DEVICE_INFO_V0_TNT
) {
215 /* nv04 vram pushbuf hack, retarget to its location in
216 * the framebuffer bar rather than direct vram access..
217 * nfi why this exists, it came from the -nv ddx.
219 args
.target
= NV_DMA_V0_TARGET_PCI
;
220 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
221 args
.start
= nvxx_device(device
)->func
->
222 resource_addr(nvxx_device(device
), 1);
223 args
.limit
= args
.start
+ device
->info
.ram_user
- 1;
225 args
.target
= NV_DMA_V0_TARGET_VRAM
;
226 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
228 args
.limit
= device
->info
.ram_user
- 1;
231 if (chan
->drm
->agp
.bridge
) {
232 args
.target
= NV_DMA_V0_TARGET_AGP
;
233 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
234 args
.start
= chan
->drm
->agp
.base
;
235 args
.limit
= chan
->drm
->agp
.base
+
236 chan
->drm
->agp
.size
- 1;
238 args
.target
= NV_DMA_V0_TARGET_VM
;
239 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
241 args
.limit
= chan
->vmm
->vmm
.limit
- 1;
245 ret
= nvif_object_ctor(&device
->object
, "abi16PushCtxDma", 0,
246 NV_DMA_FROM_MEMORY
, &args
, sizeof(args
),
249 nouveau_channel_del(pchan
);
257 nouveau_channel_ctor(struct nouveau_drm
*drm
, struct nvif_device
*device
, bool priv
, u64 runm
,
258 struct nouveau_channel
**pchan
)
260 const struct nvif_mclass hosts
[] = {
261 { AMPERE_CHANNEL_GPFIFO_B
, 0 },
262 { AMPERE_CHANNEL_GPFIFO_A
, 0 },
263 { TURING_CHANNEL_GPFIFO_A
, 0 },
264 { VOLTA_CHANNEL_GPFIFO_A
, 0 },
265 { PASCAL_CHANNEL_GPFIFO_A
, 0 },
266 { MAXWELL_CHANNEL_GPFIFO_A
, 0 },
267 { KEPLER_CHANNEL_GPFIFO_B
, 0 },
268 { KEPLER_CHANNEL_GPFIFO_A
, 0 },
269 { FERMI_CHANNEL_GPFIFO
, 0 },
270 { G82_CHANNEL_GPFIFO
, 0 },
271 { NV50_CHANNEL_GPFIFO
, 0 },
272 { NV40_CHANNEL_DMA
, 0 },
273 { NV17_CHANNEL_DMA
, 0 },
274 { NV10_CHANNEL_DMA
, 0 },
275 { NV03_CHANNEL_DMA
, 0 },
279 struct nvif_chan_v0 chan
;
280 char name
[TASK_COMM_LEN
+16];
282 struct nouveau_cli
*cli
= (void *)device
->object
.client
;
283 struct nouveau_channel
*chan
;
284 const u64 plength
= 0x10000;
285 const u64 ioffset
= plength
;
286 const u64 ilength
= 0x02000;
287 char name
[TASK_COMM_LEN
];
291 cid
= nvif_mclass(&device
->object
, hosts
);
295 if (hosts
[cid
].oclass
< NV50_CHANNEL_GPFIFO
)
298 size
= ioffset
+ ilength
;
300 /* allocate dma push buffer */
301 ret
= nouveau_channel_prep(drm
, device
, size
, &chan
);
306 /* create channel object */
307 args
.chan
.version
= 0;
308 args
.chan
.namelen
= sizeof(args
.name
);
309 args
.chan
.runlist
= __ffs64(runm
);
311 args
.chan
.priv
= priv
;
312 args
.chan
.devm
= BIT(0);
313 if (hosts
[cid
].oclass
< NV50_CHANNEL_GPFIFO
) {
315 args
.chan
.ctxdma
= nvif_handle(&chan
->push
.ctxdma
);
316 args
.chan
.offset
= chan
->push
.addr
;
317 args
.chan
.length
= 0;
319 args
.chan
.vmm
= nvif_handle(&chan
->vmm
->vmm
.object
);
320 if (hosts
[cid
].oclass
< FERMI_CHANNEL_GPFIFO
)
321 args
.chan
.ctxdma
= nvif_handle(&chan
->push
.ctxdma
);
323 args
.chan
.ctxdma
= 0;
324 args
.chan
.offset
= ioffset
+ chan
->push
.addr
;
325 args
.chan
.length
= ilength
;
327 args
.chan
.huserd
= 0;
328 args
.chan
.ouserd
= 0;
331 if (hosts
[cid
].oclass
>= VOLTA_CHANNEL_GPFIFO_A
) {
332 ret
= nvif_mem_ctor(&cli
->mmu
, "abi16ChanUSERD", NVIF_CLASS_MEM_GF100
,
333 NVIF_MEM_VRAM
| NVIF_MEM_COHERENT
| NVIF_MEM_MAPPABLE
,
334 0, PAGE_SIZE
, NULL
, 0, &chan
->mem_userd
);
338 args
.chan
.huserd
= nvif_handle(&chan
->mem_userd
.object
);
339 args
.chan
.ouserd
= 0;
341 chan
->userd
= &chan
->mem_userd
.object
;
343 chan
->userd
= &chan
->user
;
346 get_task_comm(name
, current
);
347 snprintf(args
.name
, sizeof(args
.name
), "%s[%d]", name
, task_pid_nr(current
));
349 ret
= nvif_object_ctor(&device
->object
, "abi16ChanUser", 0, hosts
[cid
].oclass
,
350 &args
, sizeof(args
), &chan
->user
);
352 nouveau_channel_del(pchan
);
356 chan
->runlist
= args
.chan
.runlist
;
357 chan
->chid
= args
.chan
.chid
;
358 chan
->inst
= args
.chan
.inst
;
359 chan
->token
= args
.chan
.token
;
364 nouveau_channel_init(struct nouveau_channel
*chan
, u32 vram
, u32 gart
)
366 struct nvif_device
*device
= chan
->device
;
367 struct nouveau_drm
*drm
= chan
->drm
;
368 struct nv_dma_v0 args
= {};
371 ret
= nvif_object_map(chan
->userd
, NULL
, 0);
375 if (chan
->user
.oclass
>= FERMI_CHANNEL_GPFIFO
) {
377 struct nvif_event_v0 base
;
378 struct nvif_chan_event_v0 host
;
381 args
.host
.version
= 0;
382 args
.host
.type
= NVIF_CHAN_EVENT_V0_KILLED
;
384 ret
= nvif_event_ctor(&chan
->user
, "abi16ChanKilled", chan
->chid
,
385 nouveau_channel_killed
, false,
386 &args
.base
, sizeof(args
), &chan
->kill
);
388 ret
= nvif_event_allow(&chan
->kill
);
390 NV_ERROR(drm
, "Failed to request channel kill "
391 "notification: %d\n", ret
);
396 /* allocate dma objects to cover all allowed vram, and gart */
397 if (device
->info
.family
< NV_DEVICE_INFO_V0_FERMI
) {
398 if (device
->info
.family
>= NV_DEVICE_INFO_V0_TESLA
) {
399 args
.target
= NV_DMA_V0_TARGET_VM
;
400 args
.access
= NV_DMA_V0_ACCESS_VM
;
402 args
.limit
= chan
->vmm
->vmm
.limit
- 1;
404 args
.target
= NV_DMA_V0_TARGET_VRAM
;
405 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
407 args
.limit
= device
->info
.ram_user
- 1;
410 ret
= nvif_object_ctor(&chan
->user
, "abi16ChanVramCtxDma", vram
,
411 NV_DMA_IN_MEMORY
, &args
, sizeof(args
),
416 if (device
->info
.family
>= NV_DEVICE_INFO_V0_TESLA
) {
417 args
.target
= NV_DMA_V0_TARGET_VM
;
418 args
.access
= NV_DMA_V0_ACCESS_VM
;
420 args
.limit
= chan
->vmm
->vmm
.limit
- 1;
422 if (chan
->drm
->agp
.bridge
) {
423 args
.target
= NV_DMA_V0_TARGET_AGP
;
424 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
425 args
.start
= chan
->drm
->agp
.base
;
426 args
.limit
= chan
->drm
->agp
.base
+
427 chan
->drm
->agp
.size
- 1;
429 args
.target
= NV_DMA_V0_TARGET_VM
;
430 args
.access
= NV_DMA_V0_ACCESS_RDWR
;
432 args
.limit
= chan
->vmm
->vmm
.limit
- 1;
435 ret
= nvif_object_ctor(&chan
->user
, "abi16ChanGartCtxDma", gart
,
436 NV_DMA_IN_MEMORY
, &args
, sizeof(args
),
442 /* initialise dma tracking parameters */
443 switch (chan
->user
.oclass
) {
444 case NV03_CHANNEL_DMA
:
445 case NV10_CHANNEL_DMA
:
446 case NV17_CHANNEL_DMA
:
447 case NV40_CHANNEL_DMA
:
448 chan
->user_put
= 0x40;
449 chan
->user_get
= 0x44;
450 chan
->dma
.max
= (0x10000 / 4) - 2;
453 chan
->user_put
= 0x40;
454 chan
->user_get
= 0x44;
455 chan
->user_get_hi
= 0x60;
456 chan
->dma
.ib_base
= 0x10000 / 4;
457 chan
->dma
.ib_max
= NV50_DMA_IB_MAX
;
458 chan
->dma
.ib_put
= 0;
459 chan
->dma
.ib_free
= chan
->dma
.ib_max
- chan
->dma
.ib_put
;
460 chan
->dma
.max
= chan
->dma
.ib_base
;
465 chan
->dma
.cur
= chan
->dma
.put
;
466 chan
->dma
.free
= chan
->dma
.max
- chan
->dma
.cur
;
468 ret
= PUSH_WAIT(chan
->chan
.push
, NOUVEAU_DMA_SKIPS
);
472 for (i
= 0; i
< NOUVEAU_DMA_SKIPS
; i
++)
473 PUSH_DATA(chan
->chan
.push
, 0x00000000);
475 /* allocate software object class (used for fences on <= nv05) */
476 if (device
->info
.family
< NV_DEVICE_INFO_V0_CELSIUS
) {
477 ret
= nvif_object_ctor(&chan
->user
, "abi16NvswFence", 0x006e,
479 NULL
, 0, &chan
->nvsw
);
483 ret
= PUSH_WAIT(chan
->chan
.push
, 2);
487 PUSH_NVSQ(chan
->chan
.push
, NV_SW
, 0x0000, chan
->nvsw
.handle
);
488 PUSH_KICK(chan
->chan
.push
);
491 /* initialise synchronisation */
492 return nouveau_fence(chan
->drm
)->context_new(chan
);
496 nouveau_channel_new(struct nouveau_drm
*drm
, struct nvif_device
*device
,
497 bool priv
, u64 runm
, u32 vram
, u32 gart
, struct nouveau_channel
**pchan
)
499 struct nouveau_cli
*cli
= (void *)device
->object
.client
;
502 ret
= nouveau_channel_ctor(drm
, device
, priv
, runm
, pchan
);
504 NV_PRINTK(dbg
, cli
, "channel create, %d\n", ret
);
508 ret
= nouveau_channel_init(*pchan
, vram
, gart
);
510 NV_PRINTK(err
, cli
, "channel failed to initialise, %d\n", ret
);
511 nouveau_channel_del(pchan
);
515 ret
= nouveau_svmm_join((*pchan
)->vmm
->svmm
, (*pchan
)->inst
);
517 nouveau_channel_del(pchan
);
523 nouveau_channels_fini(struct nouveau_drm
*drm
)
529 nouveau_channels_init(struct nouveau_drm
*drm
)
532 struct nv_device_info_v1 m
;
534 struct nv_device_info_v1_data channels
;
535 struct nv_device_info_v1_data runlists
;
539 .m
.count
= sizeof(args
.v
) / sizeof(args
.v
.channels
),
540 .v
.channels
.mthd
= NV_DEVICE_HOST_CHANNELS
,
541 .v
.runlists
.mthd
= NV_DEVICE_HOST_RUNLISTS
,
543 struct nvif_object
*device
= &drm
->client
.device
.object
;
546 ret
= nvif_object_mthd(device
, NV_DEVICE_V0_INFO
, &args
, sizeof(args
));
548 args
.v
.runlists
.mthd
== NV_DEVICE_INFO_INVALID
|| !args
.v
.runlists
.data
||
549 args
.v
.channels
.mthd
== NV_DEVICE_INFO_INVALID
)
552 drm
->chan_nr
= drm
->chan_total
= args
.v
.channels
.data
;
553 drm
->runl_nr
= fls64(args
.v
.runlists
.data
);
554 drm
->runl
= kcalloc(drm
->runl_nr
, sizeof(*drm
->runl
), GFP_KERNEL
);
558 if (drm
->chan_nr
== 0) {
559 for (i
= 0; i
< drm
->runl_nr
; i
++) {
560 if (!(args
.v
.runlists
.data
& BIT(i
)))
563 args
.v
.channels
.mthd
= NV_DEVICE_HOST_RUNLIST_CHANNELS
;
564 args
.v
.channels
.data
= i
;
566 ret
= nvif_object_mthd(device
, NV_DEVICE_V0_INFO
, &args
, sizeof(args
));
567 if (ret
|| args
.v
.channels
.mthd
== NV_DEVICE_INFO_INVALID
)
570 drm
->runl
[i
].chan_nr
= args
.v
.channels
.data
;
571 drm
->runl
[i
].chan_id_base
= drm
->chan_total
;
572 drm
->runl
[i
].context_base
= dma_fence_context_alloc(drm
->runl
[i
].chan_nr
);
574 drm
->chan_total
+= drm
->runl
[i
].chan_nr
;
577 drm
->runl
[0].context_base
= dma_fence_context_alloc(drm
->chan_nr
);
578 for (i
= 1; i
< drm
->runl_nr
; i
++)
579 drm
->runl
[i
].context_base
= drm
->runl
[0].context_base
;