2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/delay.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/vga_switcheroo.h>
30 #include <linux/mmu_notifier.h>
31 #include <linux/dynamic_debug.h>
33 #include <drm/drm_aperture.h>
34 #include <drm/drm_drv.h>
35 #include <drm/drm_fbdev_generic.h>
36 #include <drm/drm_gem_ttm_helper.h>
37 #include <drm/drm_ioctl.h>
38 #include <drm/drm_vblank.h>
40 #include <core/gpuobj.h>
41 #include <core/option.h>
43 #include <core/tegra.h>
45 #include <nvif/driver.h>
46 #include <nvif/fifo.h>
47 #include <nvif/push006c.h>
48 #include <nvif/user.h>
50 #include <nvif/class.h>
51 #include <nvif/cl0002.h>
53 #include "nouveau_drv.h"
54 #include "nouveau_dma.h"
55 #include "nouveau_ttm.h"
56 #include "nouveau_gem.h"
57 #include "nouveau_vga.h"
58 #include "nouveau_led.h"
59 #include "nouveau_hwmon.h"
60 #include "nouveau_acpi.h"
61 #include "nouveau_bios.h"
62 #include "nouveau_ioctl.h"
63 #include "nouveau_abi16.h"
64 #include "nouveau_fence.h"
65 #include "nouveau_debugfs.h"
66 #include "nouveau_usif.h"
67 #include "nouveau_connector.h"
68 #include "nouveau_platform.h"
69 #include "nouveau_svm.h"
70 #include "nouveau_dmem.h"
71 #include "nouveau_exec.h"
72 #include "nouveau_uvmm.h"
73 #include "nouveau_sched.h"
75 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes
, DD_CLASS_TYPE_DISJOINT_BITS
, 0,
87 MODULE_PARM_DESC(config
, "option string to pass to driver core");
88 static char *nouveau_config
;
89 module_param_named(config
, nouveau_config
, charp
, 0400);
91 MODULE_PARM_DESC(debug
, "debug string to pass to driver core");
92 static char *nouveau_debug
;
93 module_param_named(debug
, nouveau_debug
, charp
, 0400);
95 MODULE_PARM_DESC(noaccel
, "disable kernel/abi16 acceleration");
96 static int nouveau_noaccel
= 0;
97 module_param_named(noaccel
, nouveau_noaccel
, int, 0400);
99 MODULE_PARM_DESC(modeset
, "enable driver (default: auto, "
100 "0 = disabled, 1 = enabled, 2 = headless)");
101 int nouveau_modeset
= -1;
102 module_param_named(modeset
, nouveau_modeset
, int, 0400);
104 MODULE_PARM_DESC(atomic
, "Expose atomic ioctl (default: disabled)");
105 static int nouveau_atomic
= 0;
106 module_param_named(atomic
, nouveau_atomic
, int, 0400);
108 MODULE_PARM_DESC(runpm
, "disable (0), force enable (1), optimus only default (-1)");
109 static int nouveau_runtime_pm
= -1;
110 module_param_named(runpm
, nouveau_runtime_pm
, int, 0400);
112 static struct drm_driver driver_stub
;
113 static struct drm_driver driver_pci
;
114 static struct drm_driver driver_platform
;
117 nouveau_pci_name(struct pci_dev
*pdev
)
119 u64 name
= (u64
)pci_domain_nr(pdev
->bus
) << 32;
120 name
|= pdev
->bus
->number
<< 16;
121 name
|= PCI_SLOT(pdev
->devfn
) << 8;
122 return name
| PCI_FUNC(pdev
->devfn
);
126 nouveau_platform_name(struct platform_device
*platformdev
)
128 return platformdev
->id
;
132 nouveau_name(struct drm_device
*dev
)
134 if (dev_is_pci(dev
->dev
))
135 return nouveau_pci_name(to_pci_dev(dev
->dev
));
137 return nouveau_platform_name(to_platform_device(dev
->dev
));
141 nouveau_cli_work_ready(struct dma_fence
*fence
)
145 spin_lock_irq(fence
->lock
);
146 if (!dma_fence_is_signaled_locked(fence
))
148 spin_unlock_irq(fence
->lock
);
151 dma_fence_put(fence
);
156 nouveau_cli_work(struct work_struct
*w
)
158 struct nouveau_cli
*cli
= container_of(w
, typeof(*cli
), work
);
159 struct nouveau_cli_work
*work
, *wtmp
;
160 mutex_lock(&cli
->lock
);
161 list_for_each_entry_safe(work
, wtmp
, &cli
->worker
, head
) {
162 if (!work
->fence
|| nouveau_cli_work_ready(work
->fence
)) {
163 list_del(&work
->head
);
167 mutex_unlock(&cli
->lock
);
171 nouveau_cli_work_fence(struct dma_fence
*fence
, struct dma_fence_cb
*cb
)
173 struct nouveau_cli_work
*work
= container_of(cb
, typeof(*work
), cb
);
174 schedule_work(&work
->cli
->work
);
178 nouveau_cli_work_queue(struct nouveau_cli
*cli
, struct dma_fence
*fence
,
179 struct nouveau_cli_work
*work
)
181 work
->fence
= dma_fence_get(fence
);
183 mutex_lock(&cli
->lock
);
184 list_add_tail(&work
->head
, &cli
->worker
);
185 if (dma_fence_add_callback(fence
, &work
->cb
, nouveau_cli_work_fence
))
186 nouveau_cli_work_fence(fence
, &work
->cb
);
187 mutex_unlock(&cli
->lock
);
191 nouveau_cli_fini(struct nouveau_cli
*cli
)
193 /* All our channels are dead now, which means all the fences they
194 * own are signalled, and all callback functions have been called.
196 * So, after flushing the workqueue, there should be nothing left.
198 flush_work(&cli
->work
);
199 WARN_ON(!list_empty(&cli
->worker
));
201 usif_client_fini(cli
);
202 nouveau_uvmm_fini(&cli
->uvmm
);
203 nouveau_sched_entity_fini(&cli
->sched_entity
);
204 nouveau_vmm_fini(&cli
->svm
);
205 nouveau_vmm_fini(&cli
->vmm
);
206 nvif_mmu_dtor(&cli
->mmu
);
207 nvif_device_dtor(&cli
->device
);
208 mutex_lock(&cli
->drm
->master
.lock
);
209 nvif_client_dtor(&cli
->base
);
210 mutex_unlock(&cli
->drm
->master
.lock
);
214 nouveau_cli_init(struct nouveau_drm
*drm
, const char *sname
,
215 struct nouveau_cli
*cli
)
217 static const struct nvif_mclass
219 { NVIF_CLASS_MEM_GF100
, -1 },
220 { NVIF_CLASS_MEM_NV50
, -1 },
221 { NVIF_CLASS_MEM_NV04
, -1 },
224 static const struct nvif_mclass
226 { NVIF_CLASS_MMU_GF100
, -1 },
227 { NVIF_CLASS_MMU_NV50
, -1 },
228 { NVIF_CLASS_MMU_NV04
, -1 },
231 static const struct nvif_mclass
233 { NVIF_CLASS_VMM_GP100
, -1 },
234 { NVIF_CLASS_VMM_GM200
, -1 },
235 { NVIF_CLASS_VMM_GF100
, -1 },
236 { NVIF_CLASS_VMM_NV50
, -1 },
237 { NVIF_CLASS_VMM_NV04
, -1 },
240 u64 device
= nouveau_name(drm
->dev
);
243 snprintf(cli
->name
, sizeof(cli
->name
), "%s", sname
);
245 mutex_init(&cli
->mutex
);
246 usif_client_init(cli
);
248 INIT_WORK(&cli
->work
, nouveau_cli_work
);
249 INIT_LIST_HEAD(&cli
->worker
);
250 mutex_init(&cli
->lock
);
252 if (cli
== &drm
->master
) {
253 ret
= nvif_driver_init(NULL
, nouveau_config
, nouveau_debug
,
254 cli
->name
, device
, &cli
->base
);
256 mutex_lock(&drm
->master
.lock
);
257 ret
= nvif_client_ctor(&drm
->master
.base
, cli
->name
, device
,
259 mutex_unlock(&drm
->master
.lock
);
262 NV_PRINTK(err
, cli
, "Client allocation failed: %d\n", ret
);
266 ret
= nvif_device_ctor(&cli
->base
.object
, "drmDevice", 0, NV_DEVICE
,
267 &(struct nv_device_v0
) {
270 }, sizeof(struct nv_device_v0
),
273 NV_PRINTK(err
, cli
, "Device allocation failed: %d\n", ret
);
277 ret
= nvif_mclass(&cli
->device
.object
, mmus
);
279 NV_PRINTK(err
, cli
, "No supported MMU class\n");
283 ret
= nvif_mmu_ctor(&cli
->device
.object
, "drmMmu", mmus
[ret
].oclass
,
286 NV_PRINTK(err
, cli
, "MMU allocation failed: %d\n", ret
);
290 ret
= nvif_mclass(&cli
->mmu
.object
, vmms
);
292 NV_PRINTK(err
, cli
, "No supported VMM class\n");
296 ret
= nouveau_vmm_init(cli
, vmms
[ret
].oclass
, &cli
->vmm
);
298 NV_PRINTK(err
, cli
, "VMM allocation failed: %d\n", ret
);
302 ret
= nvif_mclass(&cli
->mmu
.object
, mems
);
304 NV_PRINTK(err
, cli
, "No supported MEM class\n");
308 cli
->mem
= &mems
[ret
];
310 ret
= nouveau_sched_entity_init(&cli
->sched_entity
, &drm
->sched
,
318 nouveau_cli_fini(cli
);
323 nouveau_accel_ce_fini(struct nouveau_drm
*drm
)
325 nouveau_channel_idle(drm
->cechan
);
326 nvif_object_dtor(&drm
->ttm
.copy
);
327 nouveau_channel_del(&drm
->cechan
);
331 nouveau_accel_ce_init(struct nouveau_drm
*drm
)
333 struct nvif_device
*device
= &drm
->client
.device
;
337 /* Allocate channel that has access to a (preferably async) copy
338 * engine, to use for TTM buffer moves.
340 runm
= nvif_fifo_runlist_ce(device
);
342 NV_DEBUG(drm
, "no ce runlist\n");
346 ret
= nouveau_channel_new(drm
, device
, false, runm
, NvDmaFB
, NvDmaTT
, &drm
->cechan
);
348 NV_ERROR(drm
, "failed to create ce channel, %d\n", ret
);
352 nouveau_accel_gr_fini(struct nouveau_drm
*drm
)
354 nouveau_channel_idle(drm
->channel
);
355 nvif_object_dtor(&drm
->ntfy
);
356 nvkm_gpuobj_del(&drm
->notify
);
357 nouveau_channel_del(&drm
->channel
);
361 nouveau_accel_gr_init(struct nouveau_drm
*drm
)
363 struct nvif_device
*device
= &drm
->client
.device
;
367 /* Allocate channel that has access to the graphics engine. */
368 runm
= nvif_fifo_runlist(device
, NV_DEVICE_HOST_RUNLIST_ENGINES_GR
);
370 NV_DEBUG(drm
, "no gr runlist\n");
374 ret
= nouveau_channel_new(drm
, device
, false, runm
, NvDmaFB
, NvDmaTT
, &drm
->channel
);
376 NV_ERROR(drm
, "failed to create kernel channel, %d\n", ret
);
377 nouveau_accel_gr_fini(drm
);
381 /* A SW class is used on pre-NV50 HW to assist with handling the
382 * synchronisation of page flips, as well as to implement fences
383 * on TNT/TNT2 HW that lacks any kind of support in host.
385 if (!drm
->channel
->nvsw
.client
&& device
->info
.family
< NV_DEVICE_INFO_V0_TESLA
) {
386 ret
= nvif_object_ctor(&drm
->channel
->user
, "drmNvsw",
387 NVDRM_NVSW
, nouveau_abi16_swclass(drm
),
388 NULL
, 0, &drm
->channel
->nvsw
);
390 if (ret
== 0 && device
->info
.chipset
>= 0x11) {
391 ret
= nvif_object_ctor(&drm
->channel
->user
, "drmBlit",
393 NULL
, 0, &drm
->channel
->blit
);
397 struct nvif_push
*push
= drm
->channel
->chan
.push
;
398 ret
= PUSH_WAIT(push
, 8);
400 if (device
->info
.chipset
>= 0x11) {
401 PUSH_NVSQ(push
, NV05F
, 0x0000, drm
->channel
->blit
.handle
);
402 PUSH_NVSQ(push
, NV09F
, 0x0120, 0,
406 PUSH_NVSQ(push
, NV_SW
, 0x0000, drm
->channel
->nvsw
.handle
);
411 NV_ERROR(drm
, "failed to allocate sw or blit class, %d\n", ret
);
412 nouveau_accel_gr_fini(drm
);
417 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
418 * even if notification is never requested, so, allocate a ctxdma on
419 * any GPU where it's possible we'll end up using M2MF for BO moves.
421 if (device
->info
.family
< NV_DEVICE_INFO_V0_FERMI
) {
422 ret
= nvkm_gpuobj_new(nvxx_device(device
), 32, 0, false, NULL
,
425 NV_ERROR(drm
, "failed to allocate notifier, %d\n", ret
);
426 nouveau_accel_gr_fini(drm
);
430 ret
= nvif_object_ctor(&drm
->channel
->user
, "drmM2mfNtfy",
431 NvNotify0
, NV_DMA_IN_MEMORY
,
432 &(struct nv_dma_v0
) {
433 .target
= NV_DMA_V0_TARGET_VRAM
,
434 .access
= NV_DMA_V0_ACCESS_RDWR
,
435 .start
= drm
->notify
->addr
,
436 .limit
= drm
->notify
->addr
+ 31
437 }, sizeof(struct nv_dma_v0
),
440 nouveau_accel_gr_fini(drm
);
447 nouveau_accel_fini(struct nouveau_drm
*drm
)
449 nouveau_accel_ce_fini(drm
);
450 nouveau_accel_gr_fini(drm
);
452 nouveau_fence(drm
)->dtor(drm
);
453 nouveau_channels_fini(drm
);
457 nouveau_accel_init(struct nouveau_drm
*drm
)
459 struct nvif_device
*device
= &drm
->client
.device
;
460 struct nvif_sclass
*sclass
;
466 /* Initialise global support for channels, and synchronisation. */
467 ret
= nouveau_channels_init(drm
);
471 /*XXX: this is crap, but the fence/channel stuff is a little
472 * backwards in some places. this will be fixed.
474 ret
= n
= nvif_object_sclass_get(&device
->object
, &sclass
);
478 for (ret
= -ENOSYS
, i
= 0; i
< n
; i
++) {
479 switch (sclass
[i
].oclass
) {
480 case NV03_CHANNEL_DMA
:
481 ret
= nv04_fence_create(drm
);
483 case NV10_CHANNEL_DMA
:
484 ret
= nv10_fence_create(drm
);
486 case NV17_CHANNEL_DMA
:
487 case NV40_CHANNEL_DMA
:
488 ret
= nv17_fence_create(drm
);
490 case NV50_CHANNEL_GPFIFO
:
491 ret
= nv50_fence_create(drm
);
493 case G82_CHANNEL_GPFIFO
:
494 ret
= nv84_fence_create(drm
);
496 case FERMI_CHANNEL_GPFIFO
:
497 case KEPLER_CHANNEL_GPFIFO_A
:
498 case KEPLER_CHANNEL_GPFIFO_B
:
499 case MAXWELL_CHANNEL_GPFIFO_A
:
500 case PASCAL_CHANNEL_GPFIFO_A
:
501 case VOLTA_CHANNEL_GPFIFO_A
:
502 case TURING_CHANNEL_GPFIFO_A
:
503 case AMPERE_CHANNEL_GPFIFO_A
:
504 case AMPERE_CHANNEL_GPFIFO_B
:
505 ret
= nvc0_fence_create(drm
);
512 nvif_object_sclass_put(&sclass
);
514 NV_ERROR(drm
, "failed to initialise sync subsystem, %d\n", ret
);
515 nouveau_accel_fini(drm
);
519 /* Volta requires access to a doorbell register for kickoff. */
520 if (drm
->client
.device
.info
.family
>= NV_DEVICE_INFO_V0_VOLTA
) {
521 ret
= nvif_user_ctor(device
, "drmUsermode");
526 /* Allocate channels we need to support various functions. */
527 nouveau_accel_gr_init(drm
);
528 nouveau_accel_ce_init(drm
);
530 /* Initialise accelerated TTM buffer moves. */
531 nouveau_bo_move_init(drm
);
534 static void __printf(2, 3)
535 nouveau_drm_errorf(struct nvif_object
*object
, const char *fmt
, ...)
537 struct nouveau_drm
*drm
= container_of(object
->parent
, typeof(*drm
), parent
);
538 struct va_format vaf
;
544 NV_ERROR(drm
, "%pV", &vaf
);
548 static void __printf(2, 3)
549 nouveau_drm_debugf(struct nvif_object
*object
, const char *fmt
, ...)
551 struct nouveau_drm
*drm
= container_of(object
->parent
, typeof(*drm
), parent
);
552 struct va_format vaf
;
558 NV_DEBUG(drm
, "%pV", &vaf
);
562 static const struct nvif_parent_func
564 .debugf
= nouveau_drm_debugf
,
565 .errorf
= nouveau_drm_errorf
,
569 nouveau_drm_device_init(struct drm_device
*dev
)
571 struct nouveau_drm
*drm
;
574 if (!(drm
= kzalloc(sizeof(*drm
), GFP_KERNEL
)))
576 dev
->dev_private
= drm
;
579 nvif_parent_ctor(&nouveau_parent
, &drm
->parent
);
580 drm
->master
.base
.object
.parent
= &drm
->parent
;
582 ret
= nouveau_sched_init(drm
);
586 ret
= nouveau_cli_init(drm
, "DRM-master", &drm
->master
);
590 ret
= nouveau_cli_init(drm
, "DRM", &drm
->client
);
594 nvxx_client(&drm
->client
.base
)->debug
=
595 nvkm_dbgopt(nouveau_debug
, "DRM");
597 INIT_LIST_HEAD(&drm
->clients
);
598 mutex_init(&drm
->clients_lock
);
599 spin_lock_init(&drm
->tile
.lock
);
601 /* workaround an odd issue on nvc1 by disabling the device's
602 * nosnoop capability. hopefully won't cause issues until a
603 * better fix is found - assuming there is one...
605 if (drm
->client
.device
.info
.chipset
== 0xc1)
606 nvif_mask(&drm
->client
.device
.object
, 0x00088080, 0x00000800, 0x00000000);
608 nouveau_vga_init(drm
);
610 ret
= nouveau_ttm_init(drm
);
614 ret
= nouveau_bios_init(dev
);
618 nouveau_accel_init(drm
);
620 ret
= nouveau_display_create(dev
);
624 if (dev
->mode_config
.num_crtc
) {
625 ret
= nouveau_display_init(dev
, false, false);
630 nouveau_debugfs_init(drm
);
631 nouveau_hwmon_init(dev
);
632 nouveau_svm_init(drm
);
633 nouveau_dmem_init(drm
);
634 nouveau_led_init(dev
);
636 if (nouveau_pmops_runtime()) {
637 pm_runtime_use_autosuspend(dev
->dev
);
638 pm_runtime_set_autosuspend_delay(dev
->dev
, 5000);
639 pm_runtime_set_active(dev
->dev
);
640 pm_runtime_allow(dev
->dev
);
641 pm_runtime_mark_last_busy(dev
->dev
);
642 pm_runtime_put(dev
->dev
);
647 nouveau_display_destroy(dev
);
649 nouveau_accel_fini(drm
);
650 nouveau_bios_takedown(dev
);
652 nouveau_ttm_fini(drm
);
654 nouveau_vga_fini(drm
);
655 nouveau_cli_fini(&drm
->client
);
657 nouveau_cli_fini(&drm
->master
);
659 nouveau_sched_fini(drm
);
661 nvif_parent_dtor(&drm
->parent
);
667 nouveau_drm_device_fini(struct drm_device
*dev
)
669 struct nouveau_cli
*cli
, *temp_cli
;
670 struct nouveau_drm
*drm
= nouveau_drm(dev
);
672 if (nouveau_pmops_runtime()) {
673 pm_runtime_get_sync(dev
->dev
);
674 pm_runtime_forbid(dev
->dev
);
677 nouveau_led_fini(dev
);
678 nouveau_dmem_fini(drm
);
679 nouveau_svm_fini(drm
);
680 nouveau_hwmon_fini(dev
);
681 nouveau_debugfs_fini(drm
);
683 if (dev
->mode_config
.num_crtc
)
684 nouveau_display_fini(dev
, false, false);
685 nouveau_display_destroy(dev
);
687 nouveau_accel_fini(drm
);
688 nouveau_bios_takedown(dev
);
690 nouveau_ttm_fini(drm
);
691 nouveau_vga_fini(drm
);
694 * There may be existing clients from as-yet unclosed files. For now,
695 * clean them up here rather than deferring until the file is closed,
696 * but this likely not correct if we want to support hot-unplugging
699 mutex_lock(&drm
->clients_lock
);
700 list_for_each_entry_safe(cli
, temp_cli
, &drm
->clients
, head
) {
701 list_del(&cli
->head
);
702 mutex_lock(&cli
->mutex
);
704 nouveau_abi16_fini(cli
->abi16
);
705 mutex_unlock(&cli
->mutex
);
706 nouveau_cli_fini(cli
);
709 mutex_unlock(&drm
->clients_lock
);
711 nouveau_sched_fini(drm
);
713 nouveau_cli_fini(&drm
->client
);
714 nouveau_cli_fini(&drm
->master
);
715 nvif_parent_dtor(&drm
->parent
);
716 mutex_destroy(&drm
->clients_lock
);
721 * On some Intel PCIe bridge controllers doing a
722 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
723 * Skipping the intermediate D3hot step seems to make it work again. This is
724 * probably caused by not meeting the expectation the involved AML code has
725 * when the GPU is put into D3hot state before invoking it.
727 * This leads to various manifestations of this issue:
728 * - AML code execution to power on the GPU hits an infinite loop (as the
729 * code waits on device memory to change).
730 * - kernel crashes, as all PCI reads return -1, which most code isn't able
731 * to handle well enough.
733 * In all cases dmesg will contain at least one line like this:
734 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
735 * followed by a lot of nouveau timeouts.
737 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
738 * documented PCI config space register 0x248 of the Intel PCIe bridge
739 * controller (0x1901) in order to change the state of the PCIe link between
740 * the PCIe port and the GPU. There are alternative code paths using other
741 * registers, which seem to work fine (executed pre Windows 8):
742 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
743 * - 0xb0 bit 0x10 (link disable)
744 * Changing the conditions inside the firmware by poking into the relevant
745 * addresses does resolve the issue, but it seemed to be ACPI private memory
746 * and not any device accessible memory at all, so there is no portable way of
747 * changing the conditions.
748 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
750 * The only systems where this behavior can be seen are hybrid graphics laptops
751 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
752 * this issue only occurs in combination with listed Intel PCIe bridge
753 * controllers and the mentioned GPUs or other devices as well.
755 * documentation on the PCIe bridge controller can be found in the
756 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
757 * Section "12 PCI Express* Controller (x16) Registers"
760 static void quirk_broken_nv_runpm(struct pci_dev
*pdev
)
762 struct drm_device
*dev
= pci_get_drvdata(pdev
);
763 struct nouveau_drm
*drm
= nouveau_drm(dev
);
764 struct pci_dev
*bridge
= pci_upstream_bridge(pdev
);
766 if (!bridge
|| bridge
->vendor
!= PCI_VENDOR_ID_INTEL
)
769 switch (bridge
->device
) {
771 drm
->old_pm_cap
= pdev
->pm_cap
;
773 NV_INFO(drm
, "Disabling PCI power management to avoid bug\n");
778 static int nouveau_drm_probe(struct pci_dev
*pdev
,
779 const struct pci_device_id
*pent
)
781 struct nvkm_device
*device
;
782 struct drm_device
*drm_dev
;
785 if (vga_switcheroo_client_probe_defer(pdev
))
786 return -EPROBE_DEFER
;
788 /* We need to check that the chipset is supported before booting
789 * fbdev off the hardware, as there's no way to put it back.
791 ret
= nvkm_device_pci_new(pdev
, nouveau_config
, "error",
792 true, false, 0, &device
);
796 nvkm_device_del(&device
);
798 /* Remove conflicting drivers (vesafb, efifb etc). */
799 ret
= drm_aperture_remove_conflicting_pci_framebuffers(pdev
, &driver_pci
);
803 ret
= nvkm_device_pci_new(pdev
, nouveau_config
, nouveau_debug
,
804 true, true, ~0ULL, &device
);
808 pci_set_master(pdev
);
811 driver_pci
.driver_features
|= DRIVER_ATOMIC
;
813 drm_dev
= drm_dev_alloc(&driver_pci
, &pdev
->dev
);
814 if (IS_ERR(drm_dev
)) {
815 ret
= PTR_ERR(drm_dev
);
819 ret
= pci_enable_device(pdev
);
823 pci_set_drvdata(pdev
, drm_dev
);
825 ret
= nouveau_drm_device_init(drm_dev
);
829 ret
= drm_dev_register(drm_dev
, pent
->driver_data
);
831 goto fail_drm_dev_init
;
833 if (nouveau_drm(drm_dev
)->client
.device
.info
.ram_size
<= 32 * 1024 * 1024)
834 drm_fbdev_generic_setup(drm_dev
, 8);
836 drm_fbdev_generic_setup(drm_dev
, 32);
838 quirk_broken_nv_runpm(pdev
);
842 nouveau_drm_device_fini(drm_dev
);
844 pci_disable_device(pdev
);
846 drm_dev_put(drm_dev
);
848 nvkm_device_del(&device
);
853 nouveau_drm_device_remove(struct drm_device
*dev
)
855 struct nouveau_drm
*drm
= nouveau_drm(dev
);
856 struct nvkm_client
*client
;
857 struct nvkm_device
*device
;
861 client
= nvxx_client(&drm
->client
.base
);
862 device
= nvkm_device_find(client
->device
);
864 nouveau_drm_device_fini(dev
);
866 nvkm_device_del(&device
);
870 nouveau_drm_remove(struct pci_dev
*pdev
)
872 struct drm_device
*dev
= pci_get_drvdata(pdev
);
873 struct nouveau_drm
*drm
= nouveau_drm(dev
);
875 /* revert our workaround */
877 pdev
->pm_cap
= drm
->old_pm_cap
;
878 nouveau_drm_device_remove(dev
);
879 pci_disable_device(pdev
);
883 nouveau_do_suspend(struct drm_device
*dev
, bool runtime
)
885 struct nouveau_drm
*drm
= nouveau_drm(dev
);
886 struct ttm_resource_manager
*man
;
889 nouveau_svm_suspend(drm
);
890 nouveau_dmem_suspend(drm
);
891 nouveau_led_suspend(dev
);
893 if (dev
->mode_config
.num_crtc
) {
894 NV_DEBUG(drm
, "suspending display...\n");
895 ret
= nouveau_display_suspend(dev
, runtime
);
900 NV_DEBUG(drm
, "evicting buffers...\n");
902 man
= ttm_manager_type(&drm
->ttm
.bdev
, TTM_PL_VRAM
);
903 ttm_resource_manager_evict_all(&drm
->ttm
.bdev
, man
);
905 NV_DEBUG(drm
, "waiting for kernel channels to go idle...\n");
907 ret
= nouveau_channel_idle(drm
->cechan
);
913 ret
= nouveau_channel_idle(drm
->channel
);
918 NV_DEBUG(drm
, "suspending fence...\n");
919 if (drm
->fence
&& nouveau_fence(drm
)->suspend
) {
920 if (!nouveau_fence(drm
)->suspend(drm
)) {
926 NV_DEBUG(drm
, "suspending object tree...\n");
927 ret
= nvif_client_suspend(&drm
->master
.base
);
934 if (drm
->fence
&& nouveau_fence(drm
)->resume
)
935 nouveau_fence(drm
)->resume(drm
);
938 if (dev
->mode_config
.num_crtc
) {
939 NV_DEBUG(drm
, "resuming display...\n");
940 nouveau_display_resume(dev
, runtime
);
946 nouveau_do_resume(struct drm_device
*dev
, bool runtime
)
949 struct nouveau_drm
*drm
= nouveau_drm(dev
);
951 NV_DEBUG(drm
, "resuming object tree...\n");
952 ret
= nvif_client_resume(&drm
->master
.base
);
954 NV_ERROR(drm
, "Client resume failed with error: %d\n", ret
);
958 NV_DEBUG(drm
, "resuming fence...\n");
959 if (drm
->fence
&& nouveau_fence(drm
)->resume
)
960 nouveau_fence(drm
)->resume(drm
);
962 nouveau_run_vbios_init(dev
);
964 if (dev
->mode_config
.num_crtc
) {
965 NV_DEBUG(drm
, "resuming display...\n");
966 nouveau_display_resume(dev
, runtime
);
969 nouveau_led_resume(dev
);
970 nouveau_dmem_resume(drm
);
971 nouveau_svm_resume(drm
);
976 nouveau_pmops_suspend(struct device
*dev
)
978 struct pci_dev
*pdev
= to_pci_dev(dev
);
979 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
982 if (drm_dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
||
983 drm_dev
->switch_power_state
== DRM_SWITCH_POWER_DYNAMIC_OFF
)
986 ret
= nouveau_do_suspend(drm_dev
, false);
990 pci_save_state(pdev
);
991 pci_disable_device(pdev
);
992 pci_set_power_state(pdev
, PCI_D3hot
);
998 nouveau_pmops_resume(struct device
*dev
)
1000 struct pci_dev
*pdev
= to_pci_dev(dev
);
1001 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
1004 if (drm_dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
||
1005 drm_dev
->switch_power_state
== DRM_SWITCH_POWER_DYNAMIC_OFF
)
1008 pci_set_power_state(pdev
, PCI_D0
);
1009 pci_restore_state(pdev
);
1010 ret
= pci_enable_device(pdev
);
1013 pci_set_master(pdev
);
1015 ret
= nouveau_do_resume(drm_dev
, false);
1017 /* Monitors may have been connected / disconnected during suspend */
1018 nouveau_display_hpd_resume(drm_dev
);
1024 nouveau_pmops_freeze(struct device
*dev
)
1026 struct pci_dev
*pdev
= to_pci_dev(dev
);
1027 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
1028 return nouveau_do_suspend(drm_dev
, false);
1032 nouveau_pmops_thaw(struct device
*dev
)
1034 struct pci_dev
*pdev
= to_pci_dev(dev
);
1035 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
1036 return nouveau_do_resume(drm_dev
, false);
1040 nouveau_pmops_runtime(void)
1042 if (nouveau_runtime_pm
== -1)
1043 return nouveau_is_optimus() || nouveau_is_v1_dsm();
1044 return nouveau_runtime_pm
== 1;
1048 nouveau_pmops_runtime_suspend(struct device
*dev
)
1050 struct pci_dev
*pdev
= to_pci_dev(dev
);
1051 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
1054 if (!nouveau_pmops_runtime()) {
1055 pm_runtime_forbid(dev
);
1059 nouveau_switcheroo_optimus_dsm();
1060 ret
= nouveau_do_suspend(drm_dev
, true);
1061 pci_save_state(pdev
);
1062 pci_disable_device(pdev
);
1063 pci_ignore_hotplug(pdev
);
1064 pci_set_power_state(pdev
, PCI_D3cold
);
1065 drm_dev
->switch_power_state
= DRM_SWITCH_POWER_DYNAMIC_OFF
;
1070 nouveau_pmops_runtime_resume(struct device
*dev
)
1072 struct pci_dev
*pdev
= to_pci_dev(dev
);
1073 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
1074 struct nouveau_drm
*drm
= nouveau_drm(drm_dev
);
1075 struct nvif_device
*device
= &nouveau_drm(drm_dev
)->client
.device
;
1078 if (!nouveau_pmops_runtime()) {
1079 pm_runtime_forbid(dev
);
1083 pci_set_power_state(pdev
, PCI_D0
);
1084 pci_restore_state(pdev
);
1085 ret
= pci_enable_device(pdev
);
1088 pci_set_master(pdev
);
1090 ret
= nouveau_do_resume(drm_dev
, true);
1092 NV_ERROR(drm
, "resume failed with: %d\n", ret
);
1097 nvif_mask(&device
->object
, 0x088488, (1 << 25), (1 << 25));
1098 drm_dev
->switch_power_state
= DRM_SWITCH_POWER_ON
;
1100 /* Monitors may have been connected / disconnected during suspend */
1101 nouveau_display_hpd_resume(drm_dev
);
1107 nouveau_pmops_runtime_idle(struct device
*dev
)
1109 if (!nouveau_pmops_runtime()) {
1110 pm_runtime_forbid(dev
);
1114 pm_runtime_mark_last_busy(dev
);
1115 pm_runtime_autosuspend(dev
);
1116 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1121 nouveau_drm_open(struct drm_device
*dev
, struct drm_file
*fpriv
)
1123 struct nouveau_drm
*drm
= nouveau_drm(dev
);
1124 struct nouveau_cli
*cli
;
1125 char name
[32], tmpname
[TASK_COMM_LEN
];
1128 /* need to bring up power immediately if opening device */
1129 ret
= pm_runtime_get_sync(dev
->dev
);
1130 if (ret
< 0 && ret
!= -EACCES
) {
1131 pm_runtime_put_autosuspend(dev
->dev
);
1135 get_task_comm(tmpname
, current
);
1137 snprintf(name
, sizeof(name
), "%s[%d]",
1138 tmpname
, pid_nr(rcu_dereference(fpriv
->pid
)));
1141 if (!(cli
= kzalloc(sizeof(*cli
), GFP_KERNEL
))) {
1146 ret
= nouveau_cli_init(drm
, name
, cli
);
1150 fpriv
->driver_priv
= cli
;
1152 mutex_lock(&drm
->clients_lock
);
1153 list_add(&cli
->head
, &drm
->clients
);
1154 mutex_unlock(&drm
->clients_lock
);
1158 nouveau_cli_fini(cli
);
1162 pm_runtime_mark_last_busy(dev
->dev
);
1163 pm_runtime_put_autosuspend(dev
->dev
);
1168 nouveau_drm_postclose(struct drm_device
*dev
, struct drm_file
*fpriv
)
1170 struct nouveau_cli
*cli
= nouveau_cli(fpriv
);
1171 struct nouveau_drm
*drm
= nouveau_drm(dev
);
1175 * The device is gone, and as it currently stands all clients are
1176 * cleaned up in the removal codepath. In the future this may change
1177 * so that we can support hot-unplugging, but for now we immediately
1178 * return to avoid a double-free situation.
1180 if (!drm_dev_enter(dev
, &dev_index
))
1183 pm_runtime_get_sync(dev
->dev
);
1185 mutex_lock(&cli
->mutex
);
1187 nouveau_abi16_fini(cli
->abi16
);
1188 mutex_unlock(&cli
->mutex
);
1190 mutex_lock(&drm
->clients_lock
);
1191 list_del(&cli
->head
);
1192 mutex_unlock(&drm
->clients_lock
);
1194 nouveau_cli_fini(cli
);
1196 pm_runtime_mark_last_busy(dev
->dev
);
1197 pm_runtime_put_autosuspend(dev
->dev
);
1198 drm_dev_exit(dev_index
);
1201 static const struct drm_ioctl_desc
1202 nouveau_ioctls
[] = {
1203 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM
, nouveau_abi16_ioctl_getparam
, DRM_RENDER_ALLOW
),
1204 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM
, drm_invalid_op
, DRM_AUTH
|DRM_MASTER
|DRM_ROOT_ONLY
),
1205 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC
, nouveau_abi16_ioctl_channel_alloc
, DRM_RENDER_ALLOW
),
1206 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE
, nouveau_abi16_ioctl_channel_free
, DRM_RENDER_ALLOW
),
1207 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC
, nouveau_abi16_ioctl_grobj_alloc
, DRM_RENDER_ALLOW
),
1208 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC
, nouveau_abi16_ioctl_notifierobj_alloc
, DRM_RENDER_ALLOW
),
1209 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE
, nouveau_abi16_ioctl_gpuobj_free
, DRM_RENDER_ALLOW
),
1210 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT
, nouveau_svmm_init
, DRM_RENDER_ALLOW
),
1211 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND
, nouveau_svmm_bind
, DRM_RENDER_ALLOW
),
1212 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW
, nouveau_gem_ioctl_new
, DRM_RENDER_ALLOW
),
1213 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF
, nouveau_gem_ioctl_pushbuf
, DRM_RENDER_ALLOW
),
1214 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP
, nouveau_gem_ioctl_cpu_prep
, DRM_RENDER_ALLOW
),
1215 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI
, nouveau_gem_ioctl_cpu_fini
, DRM_RENDER_ALLOW
),
1216 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO
, nouveau_gem_ioctl_info
, DRM_RENDER_ALLOW
),
1217 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT
, nouveau_uvmm_ioctl_vm_init
, DRM_RENDER_ALLOW
),
1218 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND
, nouveau_uvmm_ioctl_vm_bind
, DRM_RENDER_ALLOW
),
1219 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC
, nouveau_exec_ioctl_exec
, DRM_RENDER_ALLOW
),
1223 nouveau_drm_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
1225 struct drm_file
*filp
= file
->private_data
;
1226 struct drm_device
*dev
= filp
->minor
->dev
;
1229 ret
= pm_runtime_get_sync(dev
->dev
);
1230 if (ret
< 0 && ret
!= -EACCES
) {
1231 pm_runtime_put_autosuspend(dev
->dev
);
1235 switch (_IOC_NR(cmd
) - DRM_COMMAND_BASE
) {
1236 case DRM_NOUVEAU_NVIF
:
1237 ret
= usif_ioctl(filp
, (void __user
*)arg
, _IOC_SIZE(cmd
));
1240 ret
= drm_ioctl(file
, cmd
, arg
);
1244 pm_runtime_mark_last_busy(dev
->dev
);
1245 pm_runtime_put_autosuspend(dev
->dev
);
1249 static const struct file_operations
1250 nouveau_driver_fops
= {
1251 .owner
= THIS_MODULE
,
1253 .release
= drm_release
,
1254 .unlocked_ioctl
= nouveau_drm_ioctl
,
1255 .mmap
= drm_gem_mmap
,
1258 #if defined(CONFIG_COMPAT)
1259 .compat_ioctl
= nouveau_compat_ioctl
,
1261 .llseek
= noop_llseek
,
1264 static struct drm_driver
1266 .driver_features
= DRIVER_GEM
|
1267 DRIVER_SYNCOBJ
| DRIVER_SYNCOBJ_TIMELINE
|
1271 .open
= nouveau_drm_open
,
1272 .postclose
= nouveau_drm_postclose
,
1273 .lastclose
= nouveau_vga_lastclose
,
1275 #if defined(CONFIG_DEBUG_FS)
1276 .debugfs_init
= nouveau_drm_debugfs_init
,
1279 .ioctls
= nouveau_ioctls
,
1280 .num_ioctls
= ARRAY_SIZE(nouveau_ioctls
),
1281 .fops
= &nouveau_driver_fops
,
1283 .gem_prime_import_sg_table
= nouveau_gem_prime_import_sg_table
,
1285 .dumb_create
= nouveau_display_dumb_create
,
1286 .dumb_map_offset
= drm_gem_ttm_dumb_map_offset
,
1288 .name
= DRIVER_NAME
,
1289 .desc
= DRIVER_DESC
,
1291 .date
= GIT_REVISION
,
1293 .date
= DRIVER_DATE
,
1295 .major
= DRIVER_MAJOR
,
1296 .minor
= DRIVER_MINOR
,
1297 .patchlevel
= DRIVER_PATCHLEVEL
,
1300 static struct pci_device_id
1301 nouveau_drm_pci_table
[] = {
1303 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
),
1304 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
1305 .class_mask
= 0xff << 16,
1308 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS
, PCI_ANY_ID
),
1309 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
1310 .class_mask
= 0xff << 16,
1315 static void nouveau_display_options(void)
1317 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1319 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable
);
1320 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid
);
1321 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink
);
1322 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config
);
1323 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug
);
1324 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel
);
1325 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset
);
1326 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm
);
1327 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf
);
1328 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz
);
1331 static const struct dev_pm_ops nouveau_pm_ops
= {
1332 .suspend
= nouveau_pmops_suspend
,
1333 .resume
= nouveau_pmops_resume
,
1334 .freeze
= nouveau_pmops_freeze
,
1335 .thaw
= nouveau_pmops_thaw
,
1336 .poweroff
= nouveau_pmops_freeze
,
1337 .restore
= nouveau_pmops_resume
,
1338 .runtime_suspend
= nouveau_pmops_runtime_suspend
,
1339 .runtime_resume
= nouveau_pmops_runtime_resume
,
1340 .runtime_idle
= nouveau_pmops_runtime_idle
,
1343 static struct pci_driver
1344 nouveau_drm_pci_driver
= {
1346 .id_table
= nouveau_drm_pci_table
,
1347 .probe
= nouveau_drm_probe
,
1348 .remove
= nouveau_drm_remove
,
1349 .driver
.pm
= &nouveau_pm_ops
,
1353 nouveau_platform_device_create(const struct nvkm_device_tegra_func
*func
,
1354 struct platform_device
*pdev
,
1355 struct nvkm_device
**pdevice
)
1357 struct drm_device
*drm
;
1360 err
= nvkm_device_tegra_new(func
, pdev
, nouveau_config
, nouveau_debug
,
1361 true, true, ~0ULL, pdevice
);
1365 drm
= drm_dev_alloc(&driver_platform
, &pdev
->dev
);
1371 err
= nouveau_drm_device_init(drm
);
1375 platform_set_drvdata(pdev
, drm
);
1382 nvkm_device_del(pdevice
);
1384 return ERR_PTR(err
);
1388 nouveau_drm_init(void)
1390 driver_pci
= driver_stub
;
1391 driver_platform
= driver_stub
;
1393 nouveau_display_options();
1395 if (nouveau_modeset
== -1) {
1396 if (drm_firmware_drivers_only())
1397 nouveau_modeset
= 0;
1400 if (!nouveau_modeset
)
1403 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1404 platform_driver_register(&nouveau_platform_driver
);
1407 nouveau_register_dsm_handler();
1408 nouveau_backlight_ctor();
1411 return pci_register_driver(&nouveau_drm_pci_driver
);
1418 nouveau_drm_exit(void)
1420 if (!nouveau_modeset
)
1424 pci_unregister_driver(&nouveau_drm_pci_driver
);
1426 nouveau_backlight_dtor();
1427 nouveau_unregister_dsm_handler();
1429 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1430 platform_driver_unregister(&nouveau_platform_driver
);
1432 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM
))
1433 mmu_notifier_synchronize();
1436 module_init(nouveau_drm_init
);
1437 module_exit(nouveau_drm_exit
);
1439 MODULE_DEVICE_TABLE(pci
, nouveau_drm_pci_table
);
1440 MODULE_AUTHOR(DRIVER_AUTHOR
);
1441 MODULE_DESCRIPTION(DRIVER_DESC
);
1442 MODULE_LICENSE("GPL and additional rights");