drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/os.h

   1 #ifndef __NVKM_PWR_OS_H__
   2 #define __NVKM_PWR_OS_H__
   3
   4 /* Process names */
   5 #define PROC_KERN 0x52544e49
   6 #define PROC_IDLE 0x454c4449
   7 #define PROC_HOST 0x54534f48
   8 #define PROC_MEMX 0x584d454d
   9 #define PROC_PERF 0x46524550
  10 #define PROC_I2C_ 0x5f433249
  11 #define PROC_TEST 0x54534554
  12
  13 /* KERN: message identifiers */
  14 #define KMSG_FIFO   0x00000000
  15 #define KMSG_ALARM  0x00000001
  16
  17 /* MEMX: message identifiers */
  18 #define MEMX_MSG_INFO 0
  19 #define MEMX_MSG_EXEC 1
  20
  21 /* MEMX: info types */
  22 #define MEMX_INFO_DATA  0
  23 #define MEMX_INFO_TRAIN 1
  24
  25 /* MEMX: script opcode definitions */
  26 #define MEMX_ENTER  1
  27 #define MEMX_LEAVE  2
  28 #define MEMX_WR32   3
  29 #define MEMX_WAIT   4
  30 #define MEMX_DELAY  5
  31 #define MEMX_VBLANK 6
  32 #define MEMX_TRAIN  7
  33
  34 /* I2C_: message identifiers */
  35 #define I2C__MSG_RD08 0
  36 #define I2C__MSG_WR08 1
  37
  38 #define I2C__MSG_DATA0_PORT 24:31
  39 #define I2C__MSG_DATA0_ADDR 14:23
  40
  41 #define I2C__MSG_DATA0_RD08_PORT I2C__MSG_DATA0_PORT
  42 #define I2C__MSG_DATA0_RD08_ADDR I2C__MSG_DATA0_ADDR
  43 #define I2C__MSG_DATA0_RD08_REG 0:7
  44 #define I2C__MSG_DATA1_RD08_VAL 0:7
  45
  46 #define I2C__MSG_DATA0_WR08_PORT I2C__MSG_DATA0_PORT
  47 #define I2C__MSG_DATA0_WR08_ADDR I2C__MSG_DATA0_ADDR
  48 #define I2C__MSG_DATA0_WR08_SYNC 8:8
  49 #define I2C__MSG_DATA0_WR08_REG 0:7
  50 #define I2C__MSG_DATA1_WR08_VAL 0:7
  51
  52 #endif