2 * Copyright 2008 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Author: Stanislaw Skowronek
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <asm/unaligned.h>
33 #include "atom-names.h"
34 #include "atom-bits.h"
37 #define ATOM_COND_ABOVE 0
38 #define ATOM_COND_ABOVEOREQUAL 1
39 #define ATOM_COND_ALWAYS 2
40 #define ATOM_COND_BELOW 3
41 #define ATOM_COND_BELOWOREQUAL 4
42 #define ATOM_COND_EQUAL 5
43 #define ATOM_COND_NOTEQUAL 6
45 #define ATOM_PORT_ATI 0
46 #define ATOM_PORT_PCI 1
47 #define ATOM_PORT_SYSIO 2
49 #define ATOM_UNIT_MICROSEC 0
50 #define ATOM_UNIT_MILLISEC 1
56 struct atom_context
*ctx
;
61 unsigned long last_jump_jiffies
;
66 static int atom_execute_table_locked(struct atom_context
*ctx
, int index
, uint32_t * params
);
67 int atom_execute_table(struct atom_context
*ctx
, int index
, uint32_t * params
);
69 static uint32_t atom_arg_mask
[8] = {
70 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
71 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
73 static int atom_arg_shift
[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
75 static int atom_dst_to_src
[8][4] = {
76 /* translate destination alignment field to the source alignment encoding */
86 static int atom_def_dst
[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
88 static int debug_depth
= 0;
90 static void debug_print_spaces(int n
)
96 #define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
97 #define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
99 #define DEBUG(...) do { } while (0)
100 #define SDEBUG(...) do { } while (0)
103 static uint32_t atom_iio_execute(struct atom_context
*ctx
, int base
,
104 uint32_t index
, uint32_t data
)
106 struct radeon_device
*rdev
= ctx
->card
->dev
->dev_private
;
107 uint32_t temp
= 0xCDCDCDCD;
115 temp
= ctx
->card
->ioreg_read(ctx
->card
, CU16(base
+ 1));
119 if (rdev
->family
== CHIP_RV515
)
120 (void)ctx
->card
->ioreg_read(ctx
->card
, CU16(base
+ 1));
121 ctx
->card
->ioreg_write(ctx
->card
, CU16(base
+ 1), temp
);
126 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
132 (0xFFFFFFFF >> (32 - CU8(base
+ 1))) << CU8(base
+
136 case ATOM_IIO_MOVE_INDEX
:
138 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
141 ((index
>> CU8(base
+ 2)) &
142 (0xFFFFFFFF >> (32 - CU8(base
+ 1)))) << CU8(base
+
146 case ATOM_IIO_MOVE_DATA
:
148 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
151 ((data
>> CU8(base
+ 2)) &
152 (0xFFFFFFFF >> (32 - CU8(base
+ 1)))) << CU8(base
+
156 case ATOM_IIO_MOVE_ATTR
:
158 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
162 io_attr
>> CU8(base
+ 2)) & (0xFFFFFFFF >> (32 -
173 pr_info("Unknown IIO opcode\n");
178 static uint32_t atom_get_src_int(atom_exec_context
*ctx
, uint8_t attr
,
179 int *ptr
, uint32_t *saved
, int print
)
181 uint32_t idx
, val
= 0xCDCDCDCD, align
, arg
;
182 struct atom_context
*gctx
= ctx
->ctx
;
184 align
= (attr
>> 3) & 7;
190 DEBUG("REG[0x%04X]", idx
);
191 idx
+= gctx
->reg_block
;
192 switch (gctx
->io_mode
) {
194 val
= gctx
->card
->reg_read(gctx
->card
, idx
);
197 pr_info("PCI registers are not implemented\n");
200 pr_info("SYSIO registers are not implemented\n");
203 if (!(gctx
->io_mode
& 0x80)) {
204 pr_info("Bad IO mode\n");
207 if (!gctx
->iio
[gctx
->io_mode
& 0x7F]) {
208 pr_info("Undefined indirect IO read method %d\n",
209 gctx
->io_mode
& 0x7F);
213 atom_iio_execute(gctx
,
214 gctx
->iio
[gctx
->io_mode
& 0x7F],
221 /* get_unaligned_le32 avoids unaligned accesses from atombios
222 * tables, noticed on a DEC Alpha. */
223 val
= get_unaligned_le32((u32
*)&ctx
->ps
[idx
]);
225 DEBUG("PS[0x%02X,0x%04X]", idx
, val
);
231 DEBUG("WS[0x%02X]", idx
);
233 case ATOM_WS_QUOTIENT
:
234 val
= gctx
->divmul
[0];
236 case ATOM_WS_REMAINDER
:
237 val
= gctx
->divmul
[1];
239 case ATOM_WS_DATAPTR
:
240 val
= gctx
->data_block
;
245 case ATOM_WS_OR_MASK
:
246 val
= 1 << gctx
->shift
;
248 case ATOM_WS_AND_MASK
:
249 val
= ~(1 << gctx
->shift
);
251 case ATOM_WS_FB_WINDOW
:
254 case ATOM_WS_ATTRIBUTES
:
258 val
= gctx
->reg_block
;
268 if (gctx
->data_block
)
269 DEBUG("ID[0x%04X+%04X]", idx
, gctx
->data_block
);
271 DEBUG("ID[0x%04X]", idx
);
273 val
= U32(idx
+ gctx
->data_block
);
278 if ((gctx
->fb_base
+ (idx
* 4)) > gctx
->scratch_size_bytes
) {
279 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
280 gctx
->fb_base
+ (idx
* 4), gctx
->scratch_size_bytes
);
283 val
= gctx
->scratch
[(gctx
->fb_base
/ 4) + idx
];
285 DEBUG("FB[0x%02X]", idx
);
293 DEBUG("IMM 0x%08X\n", val
);
297 case ATOM_SRC_WORD16
:
301 DEBUG("IMM 0x%04X\n", val
);
305 case ATOM_SRC_BYTE16
:
306 case ATOM_SRC_BYTE24
:
310 DEBUG("IMM 0x%02X\n", val
);
318 DEBUG("PLL[0x%02X]", idx
);
319 val
= gctx
->card
->pll_read(gctx
->card
, idx
);
325 DEBUG("MC[0x%02X]", idx
);
326 val
= gctx
->card
->mc_read(gctx
->card
, idx
);
331 val
&= atom_arg_mask
[align
];
332 val
>>= atom_arg_shift
[align
];
336 DEBUG(".[31:0] -> 0x%08X\n", val
);
339 DEBUG(".[15:0] -> 0x%04X\n", val
);
342 DEBUG(".[23:8] -> 0x%04X\n", val
);
344 case ATOM_SRC_WORD16
:
345 DEBUG(".[31:16] -> 0x%04X\n", val
);
348 DEBUG(".[7:0] -> 0x%02X\n", val
);
351 DEBUG(".[15:8] -> 0x%02X\n", val
);
353 case ATOM_SRC_BYTE16
:
354 DEBUG(".[23:16] -> 0x%02X\n", val
);
356 case ATOM_SRC_BYTE24
:
357 DEBUG(".[31:24] -> 0x%02X\n", val
);
363 static void atom_skip_src_int(atom_exec_context
*ctx
, uint8_t attr
, int *ptr
)
365 uint32_t align
= (attr
>> 3) & 7, arg
= attr
& 7;
385 case ATOM_SRC_WORD16
:
390 case ATOM_SRC_BYTE16
:
391 case ATOM_SRC_BYTE24
:
399 static uint32_t atom_get_src(atom_exec_context
*ctx
, uint8_t attr
, int *ptr
)
401 return atom_get_src_int(ctx
, attr
, ptr
, NULL
, 1);
404 static uint32_t atom_get_src_direct(atom_exec_context
*ctx
, uint8_t align
, int *ptr
)
406 uint32_t val
= 0xCDCDCDCD;
415 case ATOM_SRC_WORD16
:
421 case ATOM_SRC_BYTE16
:
422 case ATOM_SRC_BYTE24
:
430 static uint32_t atom_get_dst(atom_exec_context
*ctx
, int arg
, uint8_t attr
,
431 int *ptr
, uint32_t *saved
, int print
)
433 return atom_get_src_int(ctx
,
434 arg
| atom_dst_to_src
[(attr
>> 3) &
435 7][(attr
>> 6) & 3] << 3,
439 static void atom_skip_dst(atom_exec_context
*ctx
, int arg
, uint8_t attr
, int *ptr
)
441 atom_skip_src_int(ctx
,
442 arg
| atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) &
446 static void atom_put_dst(atom_exec_context
*ctx
, int arg
, uint8_t attr
,
447 int *ptr
, uint32_t val
, uint32_t saved
)
450 atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) & 3], old_val
=
452 struct atom_context
*gctx
= ctx
->ctx
;
453 old_val
&= atom_arg_mask
[align
] >> atom_arg_shift
[align
];
454 val
<<= atom_arg_shift
[align
];
455 val
&= atom_arg_mask
[align
];
456 saved
&= ~atom_arg_mask
[align
];
462 DEBUG("REG[0x%04X]", idx
);
463 idx
+= gctx
->reg_block
;
464 switch (gctx
->io_mode
) {
467 gctx
->card
->reg_write(gctx
->card
, idx
,
470 gctx
->card
->reg_write(gctx
->card
, idx
, val
);
473 pr_info("PCI registers are not implemented\n");
476 pr_info("SYSIO registers are not implemented\n");
479 if (!(gctx
->io_mode
& 0x80)) {
480 pr_info("Bad IO mode\n");
483 if (!gctx
->iio
[gctx
->io_mode
& 0xFF]) {
484 pr_info("Undefined indirect IO write method %d\n",
485 gctx
->io_mode
& 0x7F);
488 atom_iio_execute(gctx
, gctx
->iio
[gctx
->io_mode
& 0xFF],
495 DEBUG("PS[0x%02X]", idx
);
496 ctx
->ps
[idx
] = cpu_to_le32(val
);
501 DEBUG("WS[0x%02X]", idx
);
503 case ATOM_WS_QUOTIENT
:
504 gctx
->divmul
[0] = val
;
506 case ATOM_WS_REMAINDER
:
507 gctx
->divmul
[1] = val
;
509 case ATOM_WS_DATAPTR
:
510 gctx
->data_block
= val
;
515 case ATOM_WS_OR_MASK
:
516 case ATOM_WS_AND_MASK
:
518 case ATOM_WS_FB_WINDOW
:
521 case ATOM_WS_ATTRIBUTES
:
525 gctx
->reg_block
= val
;
534 if ((gctx
->fb_base
+ (idx
* 4)) > gctx
->scratch_size_bytes
) {
535 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
536 gctx
->fb_base
+ (idx
* 4), gctx
->scratch_size_bytes
);
538 gctx
->scratch
[(gctx
->fb_base
/ 4) + idx
] = val
;
539 DEBUG("FB[0x%02X]", idx
);
544 DEBUG("PLL[0x%02X]", idx
);
545 gctx
->card
->pll_write(gctx
->card
, idx
, val
);
550 DEBUG("MC[0x%02X]", idx
);
551 gctx
->card
->mc_write(gctx
->card
, idx
, val
);
556 DEBUG(".[31:0] <- 0x%08X\n", old_val
);
559 DEBUG(".[15:0] <- 0x%04X\n", old_val
);
562 DEBUG(".[23:8] <- 0x%04X\n", old_val
);
564 case ATOM_SRC_WORD16
:
565 DEBUG(".[31:16] <- 0x%04X\n", old_val
);
568 DEBUG(".[7:0] <- 0x%02X\n", old_val
);
571 DEBUG(".[15:8] <- 0x%02X\n", old_val
);
573 case ATOM_SRC_BYTE16
:
574 DEBUG(".[23:16] <- 0x%02X\n", old_val
);
576 case ATOM_SRC_BYTE24
:
577 DEBUG(".[31:24] <- 0x%02X\n", old_val
);
582 static void atom_op_add(atom_exec_context
*ctx
, int *ptr
, int arg
)
584 uint8_t attr
= U8((*ptr
)++);
585 uint32_t dst
, src
, saved
;
588 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
590 src
= atom_get_src(ctx
, attr
, ptr
);
593 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
596 static void atom_op_and(atom_exec_context
*ctx
, int *ptr
, int arg
)
598 uint8_t attr
= U8((*ptr
)++);
599 uint32_t dst
, src
, saved
;
602 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
604 src
= atom_get_src(ctx
, attr
, ptr
);
607 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
610 static void atom_op_beep(atom_exec_context
*ctx
, int *ptr
, int arg
)
612 printk("ATOM BIOS beeped!\n");
615 static void atom_op_calltable(atom_exec_context
*ctx
, int *ptr
, int arg
)
617 int idx
= U8((*ptr
)++);
620 if (idx
< ATOM_TABLE_NAMES_CNT
)
621 SDEBUG(" table: %d (%s)\n", idx
, atom_table_names
[idx
]);
623 SDEBUG(" table: %d\n", idx
);
624 if (U16(ctx
->ctx
->cmd_table
+ 4 + 2 * idx
))
625 r
= atom_execute_table_locked(ctx
->ctx
, idx
, ctx
->ps
+ ctx
->ps_shift
);
631 static void atom_op_clear(atom_exec_context
*ctx
, int *ptr
, int arg
)
633 uint8_t attr
= U8((*ptr
)++);
637 attr
|= atom_def_dst
[attr
>> 3] << 6;
638 atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 0);
640 atom_put_dst(ctx
, arg
, attr
, &dptr
, 0, saved
);
643 static void atom_op_compare(atom_exec_context
*ctx
, int *ptr
, int arg
)
645 uint8_t attr
= U8((*ptr
)++);
648 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
650 src
= atom_get_src(ctx
, attr
, ptr
);
651 ctx
->ctx
->cs_equal
= (dst
== src
);
652 ctx
->ctx
->cs_above
= (dst
> src
);
653 SDEBUG(" result: %s %s\n", ctx
->ctx
->cs_equal
? "EQ" : "NE",
654 ctx
->ctx
->cs_above
? "GT" : "LE");
657 static void atom_op_delay(atom_exec_context
*ctx
, int *ptr
, int arg
)
659 unsigned count
= U8((*ptr
)++);
660 SDEBUG(" count: %d\n", count
);
661 if (arg
== ATOM_UNIT_MICROSEC
)
663 else if (!drm_can_sleep())
669 static void atom_op_div(atom_exec_context
*ctx
, int *ptr
, int arg
)
671 uint8_t attr
= U8((*ptr
)++);
674 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
676 src
= atom_get_src(ctx
, attr
, ptr
);
678 ctx
->ctx
->divmul
[0] = dst
/ src
;
679 ctx
->ctx
->divmul
[1] = dst
% src
;
681 ctx
->ctx
->divmul
[0] = 0;
682 ctx
->ctx
->divmul
[1] = 0;
686 static void atom_op_eot(atom_exec_context
*ctx
, int *ptr
, int arg
)
688 /* functionally, a nop */
691 static void atom_op_jump(atom_exec_context
*ctx
, int *ptr
, int arg
)
693 int execute
= 0, target
= U16(*ptr
);
694 unsigned long cjiffies
;
698 case ATOM_COND_ABOVE
:
699 execute
= ctx
->ctx
->cs_above
;
701 case ATOM_COND_ABOVEOREQUAL
:
702 execute
= ctx
->ctx
->cs_above
|| ctx
->ctx
->cs_equal
;
704 case ATOM_COND_ALWAYS
:
707 case ATOM_COND_BELOW
:
708 execute
= !(ctx
->ctx
->cs_above
|| ctx
->ctx
->cs_equal
);
710 case ATOM_COND_BELOWOREQUAL
:
711 execute
= !ctx
->ctx
->cs_above
;
713 case ATOM_COND_EQUAL
:
714 execute
= ctx
->ctx
->cs_equal
;
716 case ATOM_COND_NOTEQUAL
:
717 execute
= !ctx
->ctx
->cs_equal
;
720 if (arg
!= ATOM_COND_ALWAYS
)
721 SDEBUG(" taken: %s\n", execute
? "yes" : "no");
722 SDEBUG(" target: 0x%04X\n", target
);
724 if (ctx
->last_jump
== (ctx
->start
+ target
)) {
726 if (time_after(cjiffies
, ctx
->last_jump_jiffies
)) {
727 cjiffies
-= ctx
->last_jump_jiffies
;
728 if ((jiffies_to_msecs(cjiffies
) > 5000)) {
729 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
733 /* jiffies wrap around we will just wait a little longer */
734 ctx
->last_jump_jiffies
= jiffies
;
737 ctx
->last_jump
= ctx
->start
+ target
;
738 ctx
->last_jump_jiffies
= jiffies
;
740 *ptr
= ctx
->start
+ target
;
744 static void atom_op_mask(atom_exec_context
*ctx
, int *ptr
, int arg
)
746 uint8_t attr
= U8((*ptr
)++);
747 uint32_t dst
, mask
, src
, saved
;
750 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
751 mask
= atom_get_src_direct(ctx
, ((attr
>> 3) & 7), ptr
);
752 SDEBUG(" mask: 0x%08x", mask
);
754 src
= atom_get_src(ctx
, attr
, ptr
);
758 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
761 static void atom_op_move(atom_exec_context
*ctx
, int *ptr
, int arg
)
763 uint8_t attr
= U8((*ptr
)++);
766 if (((attr
>> 3) & 7) != ATOM_SRC_DWORD
)
767 atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 0);
769 atom_skip_dst(ctx
, arg
, attr
, ptr
);
773 src
= atom_get_src(ctx
, attr
, ptr
);
775 atom_put_dst(ctx
, arg
, attr
, &dptr
, src
, saved
);
778 static void atom_op_mul(atom_exec_context
*ctx
, int *ptr
, int arg
)
780 uint8_t attr
= U8((*ptr
)++);
783 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
785 src
= atom_get_src(ctx
, attr
, ptr
);
786 ctx
->ctx
->divmul
[0] = dst
* src
;
789 static void atom_op_nop(atom_exec_context
*ctx
, int *ptr
, int arg
)
794 static void atom_op_or(atom_exec_context
*ctx
, int *ptr
, int arg
)
796 uint8_t attr
= U8((*ptr
)++);
797 uint32_t dst
, src
, saved
;
800 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
802 src
= atom_get_src(ctx
, attr
, ptr
);
805 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
808 static void atom_op_postcard(atom_exec_context
*ctx
, int *ptr
, int arg
)
810 uint8_t val
= U8((*ptr
)++);
811 SDEBUG("POST card output: 0x%02X\n", val
);
814 static void atom_op_repeat(atom_exec_context
*ctx
, int *ptr
, int arg
)
816 pr_info("unimplemented!\n");
819 static void atom_op_restorereg(atom_exec_context
*ctx
, int *ptr
, int arg
)
821 pr_info("unimplemented!\n");
824 static void atom_op_savereg(atom_exec_context
*ctx
, int *ptr
, int arg
)
826 pr_info("unimplemented!\n");
829 static void atom_op_setdatablock(atom_exec_context
*ctx
, int *ptr
, int arg
)
833 SDEBUG(" block: %d\n", idx
);
835 ctx
->ctx
->data_block
= 0;
837 ctx
->ctx
->data_block
= ctx
->start
;
839 ctx
->ctx
->data_block
= U16(ctx
->ctx
->data_table
+ 4 + 2 * idx
);
840 SDEBUG(" base: 0x%04X\n", ctx
->ctx
->data_block
);
843 static void atom_op_setfbbase(atom_exec_context
*ctx
, int *ptr
, int arg
)
845 uint8_t attr
= U8((*ptr
)++);
846 SDEBUG(" fb_base: ");
847 ctx
->ctx
->fb_base
= atom_get_src(ctx
, attr
, ptr
);
850 static void atom_op_setport(atom_exec_context
*ctx
, int *ptr
, int arg
)
856 if (port
< ATOM_IO_NAMES_CNT
)
857 SDEBUG(" port: %d (%s)\n", port
, atom_io_names
[port
]);
859 SDEBUG(" port: %d\n", port
);
861 ctx
->ctx
->io_mode
= ATOM_IO_MM
;
863 ctx
->ctx
->io_mode
= ATOM_IO_IIO
| port
;
867 ctx
->ctx
->io_mode
= ATOM_IO_PCI
;
870 case ATOM_PORT_SYSIO
:
871 ctx
->ctx
->io_mode
= ATOM_IO_SYSIO
;
877 static void atom_op_setregblock(atom_exec_context
*ctx
, int *ptr
, int arg
)
879 ctx
->ctx
->reg_block
= U16(*ptr
);
881 SDEBUG(" base: 0x%04X\n", ctx
->ctx
->reg_block
);
884 static void atom_op_shift_left(atom_exec_context
*ctx
, int *ptr
, int arg
)
886 uint8_t attr
= U8((*ptr
)++), shift
;
890 attr
|= atom_def_dst
[attr
>> 3] << 6;
892 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
893 shift
= atom_get_src_direct(ctx
, ATOM_SRC_BYTE0
, ptr
);
894 SDEBUG(" shift: %d\n", shift
);
897 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
900 static void atom_op_shift_right(atom_exec_context
*ctx
, int *ptr
, int arg
)
902 uint8_t attr
= U8((*ptr
)++), shift
;
906 attr
|= atom_def_dst
[attr
>> 3] << 6;
908 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
909 shift
= atom_get_src_direct(ctx
, ATOM_SRC_BYTE0
, ptr
);
910 SDEBUG(" shift: %d\n", shift
);
913 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
916 static void atom_op_shl(atom_exec_context
*ctx
, int *ptr
, int arg
)
918 uint8_t attr
= U8((*ptr
)++), shift
;
921 uint32_t dst_align
= atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) & 3];
923 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
924 /* op needs to full dst value */
926 shift
= atom_get_src(ctx
, attr
, ptr
);
927 SDEBUG(" shift: %d\n", shift
);
929 dst
&= atom_arg_mask
[dst_align
];
930 dst
>>= atom_arg_shift
[dst_align
];
932 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
935 static void atom_op_shr(atom_exec_context
*ctx
, int *ptr
, int arg
)
937 uint8_t attr
= U8((*ptr
)++), shift
;
940 uint32_t dst_align
= atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) & 3];
942 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
943 /* op needs to full dst value */
945 shift
= atom_get_src(ctx
, attr
, ptr
);
946 SDEBUG(" shift: %d\n", shift
);
948 dst
&= atom_arg_mask
[dst_align
];
949 dst
>>= atom_arg_shift
[dst_align
];
951 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
954 static void atom_op_sub(atom_exec_context
*ctx
, int *ptr
, int arg
)
956 uint8_t attr
= U8((*ptr
)++);
957 uint32_t dst
, src
, saved
;
960 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
962 src
= atom_get_src(ctx
, attr
, ptr
);
965 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
968 static void atom_op_switch(atom_exec_context
*ctx
, int *ptr
, int arg
)
970 uint8_t attr
= U8((*ptr
)++);
971 uint32_t src
, val
, target
;
973 src
= atom_get_src(ctx
, attr
, ptr
);
974 while (U16(*ptr
) != ATOM_CASE_END
)
975 if (U8(*ptr
) == ATOM_CASE_MAGIC
) {
979 atom_get_src(ctx
, (attr
& 0x38) | ATOM_ARG_IMM
,
983 SDEBUG(" target: %04X\n", target
);
984 *ptr
= ctx
->start
+ target
;
989 pr_info("Bad case\n");
995 static void atom_op_test(atom_exec_context
*ctx
, int *ptr
, int arg
)
997 uint8_t attr
= U8((*ptr
)++);
1000 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
1002 src
= atom_get_src(ctx
, attr
, ptr
);
1003 ctx
->ctx
->cs_equal
= ((dst
& src
) == 0);
1004 SDEBUG(" result: %s\n", ctx
->ctx
->cs_equal
? "EQ" : "NE");
1007 static void atom_op_xor(atom_exec_context
*ctx
, int *ptr
, int arg
)
1009 uint8_t attr
= U8((*ptr
)++);
1010 uint32_t dst
, src
, saved
;
1013 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
1015 src
= atom_get_src(ctx
, attr
, ptr
);
1018 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
1021 static void atom_op_debug(atom_exec_context
*ctx
, int *ptr
, int arg
)
1023 pr_info("unimplemented!\n");
1027 void (*func
) (atom_exec_context
*, int *, int);
1029 } opcode_table
[ATOM_OP_CNT
] = {
1032 atom_op_move
, ATOM_ARG_REG
}, {
1033 atom_op_move
, ATOM_ARG_PS
}, {
1034 atom_op_move
, ATOM_ARG_WS
}, {
1035 atom_op_move
, ATOM_ARG_FB
}, {
1036 atom_op_move
, ATOM_ARG_PLL
}, {
1037 atom_op_move
, ATOM_ARG_MC
}, {
1038 atom_op_and
, ATOM_ARG_REG
}, {
1039 atom_op_and
, ATOM_ARG_PS
}, {
1040 atom_op_and
, ATOM_ARG_WS
}, {
1041 atom_op_and
, ATOM_ARG_FB
}, {
1042 atom_op_and
, ATOM_ARG_PLL
}, {
1043 atom_op_and
, ATOM_ARG_MC
}, {
1044 atom_op_or
, ATOM_ARG_REG
}, {
1045 atom_op_or
, ATOM_ARG_PS
}, {
1046 atom_op_or
, ATOM_ARG_WS
}, {
1047 atom_op_or
, ATOM_ARG_FB
}, {
1048 atom_op_or
, ATOM_ARG_PLL
}, {
1049 atom_op_or
, ATOM_ARG_MC
}, {
1050 atom_op_shift_left
, ATOM_ARG_REG
}, {
1051 atom_op_shift_left
, ATOM_ARG_PS
}, {
1052 atom_op_shift_left
, ATOM_ARG_WS
}, {
1053 atom_op_shift_left
, ATOM_ARG_FB
}, {
1054 atom_op_shift_left
, ATOM_ARG_PLL
}, {
1055 atom_op_shift_left
, ATOM_ARG_MC
}, {
1056 atom_op_shift_right
, ATOM_ARG_REG
}, {
1057 atom_op_shift_right
, ATOM_ARG_PS
}, {
1058 atom_op_shift_right
, ATOM_ARG_WS
}, {
1059 atom_op_shift_right
, ATOM_ARG_FB
}, {
1060 atom_op_shift_right
, ATOM_ARG_PLL
}, {
1061 atom_op_shift_right
, ATOM_ARG_MC
}, {
1062 atom_op_mul
, ATOM_ARG_REG
}, {
1063 atom_op_mul
, ATOM_ARG_PS
}, {
1064 atom_op_mul
, ATOM_ARG_WS
}, {
1065 atom_op_mul
, ATOM_ARG_FB
}, {
1066 atom_op_mul
, ATOM_ARG_PLL
}, {
1067 atom_op_mul
, ATOM_ARG_MC
}, {
1068 atom_op_div
, ATOM_ARG_REG
}, {
1069 atom_op_div
, ATOM_ARG_PS
}, {
1070 atom_op_div
, ATOM_ARG_WS
}, {
1071 atom_op_div
, ATOM_ARG_FB
}, {
1072 atom_op_div
, ATOM_ARG_PLL
}, {
1073 atom_op_div
, ATOM_ARG_MC
}, {
1074 atom_op_add
, ATOM_ARG_REG
}, {
1075 atom_op_add
, ATOM_ARG_PS
}, {
1076 atom_op_add
, ATOM_ARG_WS
}, {
1077 atom_op_add
, ATOM_ARG_FB
}, {
1078 atom_op_add
, ATOM_ARG_PLL
}, {
1079 atom_op_add
, ATOM_ARG_MC
}, {
1080 atom_op_sub
, ATOM_ARG_REG
}, {
1081 atom_op_sub
, ATOM_ARG_PS
}, {
1082 atom_op_sub
, ATOM_ARG_WS
}, {
1083 atom_op_sub
, ATOM_ARG_FB
}, {
1084 atom_op_sub
, ATOM_ARG_PLL
}, {
1085 atom_op_sub
, ATOM_ARG_MC
}, {
1086 atom_op_setport
, ATOM_PORT_ATI
}, {
1087 atom_op_setport
, ATOM_PORT_PCI
}, {
1088 atom_op_setport
, ATOM_PORT_SYSIO
}, {
1089 atom_op_setregblock
, 0}, {
1090 atom_op_setfbbase
, 0}, {
1091 atom_op_compare
, ATOM_ARG_REG
}, {
1092 atom_op_compare
, ATOM_ARG_PS
}, {
1093 atom_op_compare
, ATOM_ARG_WS
}, {
1094 atom_op_compare
, ATOM_ARG_FB
}, {
1095 atom_op_compare
, ATOM_ARG_PLL
}, {
1096 atom_op_compare
, ATOM_ARG_MC
}, {
1097 atom_op_switch
, 0}, {
1098 atom_op_jump
, ATOM_COND_ALWAYS
}, {
1099 atom_op_jump
, ATOM_COND_EQUAL
}, {
1100 atom_op_jump
, ATOM_COND_BELOW
}, {
1101 atom_op_jump
, ATOM_COND_ABOVE
}, {
1102 atom_op_jump
, ATOM_COND_BELOWOREQUAL
}, {
1103 atom_op_jump
, ATOM_COND_ABOVEOREQUAL
}, {
1104 atom_op_jump
, ATOM_COND_NOTEQUAL
}, {
1105 atom_op_test
, ATOM_ARG_REG
}, {
1106 atom_op_test
, ATOM_ARG_PS
}, {
1107 atom_op_test
, ATOM_ARG_WS
}, {
1108 atom_op_test
, ATOM_ARG_FB
}, {
1109 atom_op_test
, ATOM_ARG_PLL
}, {
1110 atom_op_test
, ATOM_ARG_MC
}, {
1111 atom_op_delay
, ATOM_UNIT_MILLISEC
}, {
1112 atom_op_delay
, ATOM_UNIT_MICROSEC
}, {
1113 atom_op_calltable
, 0}, {
1114 atom_op_repeat
, 0}, {
1115 atom_op_clear
, ATOM_ARG_REG
}, {
1116 atom_op_clear
, ATOM_ARG_PS
}, {
1117 atom_op_clear
, ATOM_ARG_WS
}, {
1118 atom_op_clear
, ATOM_ARG_FB
}, {
1119 atom_op_clear
, ATOM_ARG_PLL
}, {
1120 atom_op_clear
, ATOM_ARG_MC
}, {
1123 atom_op_mask
, ATOM_ARG_REG
}, {
1124 atom_op_mask
, ATOM_ARG_PS
}, {
1125 atom_op_mask
, ATOM_ARG_WS
}, {
1126 atom_op_mask
, ATOM_ARG_FB
}, {
1127 atom_op_mask
, ATOM_ARG_PLL
}, {
1128 atom_op_mask
, ATOM_ARG_MC
}, {
1129 atom_op_postcard
, 0}, {
1131 atom_op_savereg
, 0}, {
1132 atom_op_restorereg
, 0}, {
1133 atom_op_setdatablock
, 0}, {
1134 atom_op_xor
, ATOM_ARG_REG
}, {
1135 atom_op_xor
, ATOM_ARG_PS
}, {
1136 atom_op_xor
, ATOM_ARG_WS
}, {
1137 atom_op_xor
, ATOM_ARG_FB
}, {
1138 atom_op_xor
, ATOM_ARG_PLL
}, {
1139 atom_op_xor
, ATOM_ARG_MC
}, {
1140 atom_op_shl
, ATOM_ARG_REG
}, {
1141 atom_op_shl
, ATOM_ARG_PS
}, {
1142 atom_op_shl
, ATOM_ARG_WS
}, {
1143 atom_op_shl
, ATOM_ARG_FB
}, {
1144 atom_op_shl
, ATOM_ARG_PLL
}, {
1145 atom_op_shl
, ATOM_ARG_MC
}, {
1146 atom_op_shr
, ATOM_ARG_REG
}, {
1147 atom_op_shr
, ATOM_ARG_PS
}, {
1148 atom_op_shr
, ATOM_ARG_WS
}, {
1149 atom_op_shr
, ATOM_ARG_FB
}, {
1150 atom_op_shr
, ATOM_ARG_PLL
}, {
1151 atom_op_shr
, ATOM_ARG_MC
}, {
1152 atom_op_debug
, 0},};
1154 static int atom_execute_table_locked(struct atom_context
*ctx
, int index
, uint32_t * params
)
1156 int base
= CU16(ctx
->cmd_table
+ 4 + 2 * index
);
1157 int len
, ws
, ps
, ptr
;
1159 atom_exec_context ectx
;
1165 len
= CU16(base
+ ATOM_CT_SIZE_PTR
);
1166 ws
= CU8(base
+ ATOM_CT_WS_PTR
);
1167 ps
= CU8(base
+ ATOM_CT_PS_PTR
) & ATOM_CT_PS_MASK
;
1168 ptr
= base
+ ATOM_CT_CODE_PTR
;
1170 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base
, len
, ws
, ps
);
1173 ectx
.ps_shift
= ps
/ 4;
1179 ectx
.ws
= kcalloc(4, ws
, GFP_KERNEL
);
1186 if (op
< ATOM_OP_NAMES_CNT
)
1187 SDEBUG("%s @ 0x%04X\n", atom_op_names
[op
], ptr
- 1);
1189 SDEBUG("[%d] @ 0x%04X\n", op
, ptr
- 1);
1191 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1192 base
, len
, ws
, ps
, ptr
- 1);
1197 if (op
< ATOM_OP_CNT
&& op
> 0)
1198 opcode_table
[op
].func(&ectx
, &ptr
,
1199 opcode_table
[op
].arg
);
1203 if (op
== ATOM_OP_EOT
)
1215 int atom_execute_table_scratch_unlocked(struct atom_context
*ctx
, int index
, uint32_t * params
)
1219 mutex_lock(&ctx
->mutex
);
1220 /* reset data block */
1221 ctx
->data_block
= 0;
1222 /* reset reg block */
1224 /* reset fb window */
1227 ctx
->io_mode
= ATOM_IO_MM
;
1231 r
= atom_execute_table_locked(ctx
, index
, params
);
1232 mutex_unlock(&ctx
->mutex
);
1236 int atom_execute_table(struct atom_context
*ctx
, int index
, uint32_t * params
)
1239 mutex_lock(&ctx
->scratch_mutex
);
1240 r
= atom_execute_table_scratch_unlocked(ctx
, index
, params
);
1241 mutex_unlock(&ctx
->scratch_mutex
);
1245 static int atom_iio_len
[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1247 static void atom_index_iio(struct atom_context
*ctx
, int base
)
1249 ctx
->iio
= kzalloc(2 * 256, GFP_KERNEL
);
1252 while (CU8(base
) == ATOM_IIO_START
) {
1253 ctx
->iio
[CU8(base
+ 1)] = base
+ 2;
1255 while (CU8(base
) != ATOM_IIO_END
)
1256 base
+= atom_iio_len
[CU8(base
)];
1261 struct atom_context
*atom_parse(struct card_info
*card
, void *bios
)
1264 struct atom_context
*ctx
=
1265 kzalloc(sizeof(struct atom_context
), GFP_KERNEL
);
1276 if (CU16(0) != ATOM_BIOS_MAGIC
) {
1277 pr_info("Invalid BIOS magic\n");
1282 (CSTR(ATOM_ATI_MAGIC_PTR
), ATOM_ATI_MAGIC
,
1283 strlen(ATOM_ATI_MAGIC
))) {
1284 pr_info("Invalid ATI magic\n");
1289 base
= CU16(ATOM_ROM_TABLE_PTR
);
1291 (CSTR(base
+ ATOM_ROM_MAGIC_PTR
), ATOM_ROM_MAGIC
,
1292 strlen(ATOM_ROM_MAGIC
))) {
1293 pr_info("Invalid ATOM magic\n");
1298 ctx
->cmd_table
= CU16(base
+ ATOM_ROM_CMD_PTR
);
1299 ctx
->data_table
= CU16(base
+ ATOM_ROM_DATA_PTR
);
1300 atom_index_iio(ctx
, CU16(ctx
->data_table
+ ATOM_DATA_IIO_PTR
) + 4);
1306 str
= CSTR(CU16(base
+ ATOM_ROM_MSG_PTR
));
1307 while (*str
&& ((*str
== '\n') || (*str
== '\r')))
1309 /* name string isn't always 0 terminated */
1310 for (i
= 0; i
< 511; i
++) {
1312 if (name
[i
] < '.' || name
[i
] > 'z') {
1317 pr_info("ATOM BIOS: %s\n", name
);
1322 int atom_asic_init(struct atom_context
*ctx
)
1324 struct radeon_device
*rdev
= ctx
->card
->dev
->dev_private
;
1325 int hwi
= CU16(ctx
->data_table
+ ATOM_DATA_FWI_PTR
);
1331 ps
[0] = cpu_to_le32(CU32(hwi
+ ATOM_FWI_DEFSCLK_PTR
));
1332 ps
[1] = cpu_to_le32(CU32(hwi
+ ATOM_FWI_DEFMCLK_PTR
));
1333 if (!ps
[0] || !ps
[1])
1336 if (!CU16(ctx
->cmd_table
+ 4 + 2 * ATOM_CMD_INIT
))
1338 ret
= atom_execute_table(ctx
, ATOM_CMD_INIT
, ps
);
1344 if (rdev
->family
< CHIP_R600
) {
1345 if (CU16(ctx
->cmd_table
+ 4 + 2 * ATOM_CMD_SPDFANCNTL
))
1346 atom_execute_table(ctx
, ATOM_CMD_SPDFANCNTL
, ps
);
1351 void atom_destroy(struct atom_context
*ctx
)
1357 bool atom_parse_data_header(struct atom_context
*ctx
, int index
,
1358 uint16_t * size
, uint8_t * frev
, uint8_t * crev
,
1359 uint16_t * data_start
)
1361 int offset
= index
* 2 + 4;
1362 int idx
= CU16(ctx
->data_table
+ offset
);
1363 u16
*mdt
= (u16
*)(ctx
->bios
+ ctx
->data_table
+ 4);
1371 *frev
= CU8(idx
+ 2);
1373 *crev
= CU8(idx
+ 3);
1378 bool atom_parse_cmd_header(struct atom_context
*ctx
, int index
, uint8_t * frev
,
1381 int offset
= index
* 2 + 4;
1382 int idx
= CU16(ctx
->cmd_table
+ offset
);
1383 u16
*mct
= (u16
*)(ctx
->bios
+ ctx
->cmd_table
+ 4);
1389 *frev
= CU8(idx
+ 2);
1391 *crev
= CU8(idx
+ 3);
1395 int atom_allocate_fb_scratch(struct atom_context
*ctx
)
1397 int index
= GetIndexIntoMasterTable(DATA
, VRAM_UsageByFirmware
);
1398 uint16_t data_offset
;
1399 int usage_bytes
= 0;
1400 struct _ATOM_VRAM_USAGE_BY_FIRMWARE
*firmware_usage
;
1402 if (atom_parse_data_header(ctx
, index
, NULL
, NULL
, NULL
, &data_offset
)) {
1403 firmware_usage
= (struct _ATOM_VRAM_USAGE_BY_FIRMWARE
*)(ctx
->bios
+ data_offset
);
1405 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1406 le32_to_cpu(firmware_usage
->asFirmwareVramReserveInfo
[0].ulStartAddrUsedByFirmware
),
1407 le16_to_cpu(firmware_usage
->asFirmwareVramReserveInfo
[0].usFirmwareUseInKb
));
1409 usage_bytes
= le16_to_cpu(firmware_usage
->asFirmwareVramReserveInfo
[0].usFirmwareUseInKb
) * 1024;
1411 ctx
->scratch_size_bytes
= 0;
1412 if (usage_bytes
== 0)
1413 usage_bytes
= 20 * 1024;
1414 /* allocate some scratch memory */
1415 ctx
->scratch
= kzalloc(usage_bytes
, GFP_KERNEL
);
1418 ctx
->scratch_size_bytes
= usage_bytes
;