2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include <linux/component.h>
21 #include <linux/pinctrl/consumer.h>
22 #include <linux/suspend.h>
23 #include <drm/drm_atomic.h>
24 #include <drm/drm_atomic_helper.h>
25 #include <drm/drm_fb_helper.h>
26 #include <drm/drm_gem_framebuffer_helper.h>
27 #include <drm/drm_probe_helper.h>
29 #include "tilcdc_drv.h"
30 #include "tilcdc_regs.h"
31 #include "tilcdc_tfp410.h"
32 #include "tilcdc_panel.h"
33 #include "tilcdc_external.h"
35 static LIST_HEAD(module_list
);
37 static const u32 tilcdc_rev1_formats
[] = { DRM_FORMAT_RGB565
};
39 static const u32 tilcdc_straight_formats
[] = { DRM_FORMAT_RGB565
,
41 DRM_FORMAT_XBGR8888
};
43 static const u32 tilcdc_crossed_formats
[] = { DRM_FORMAT_BGR565
,
45 DRM_FORMAT_XRGB8888
};
47 static const u32 tilcdc_legacy_formats
[] = { DRM_FORMAT_RGB565
,
49 DRM_FORMAT_XRGB8888
};
51 void tilcdc_module_init(struct tilcdc_module
*mod
, const char *name
,
52 const struct tilcdc_module_ops
*funcs
)
56 INIT_LIST_HEAD(&mod
->list
);
57 list_add(&mod
->list
, &module_list
);
60 void tilcdc_module_cleanup(struct tilcdc_module
*mod
)
65 static struct of_device_id tilcdc_of_match
[];
67 static struct drm_framebuffer
*tilcdc_fb_create(struct drm_device
*dev
,
68 struct drm_file
*file_priv
, const struct drm_mode_fb_cmd2
*mode_cmd
)
70 return drm_gem_fb_create(dev
, file_priv
, mode_cmd
);
73 static int tilcdc_atomic_check(struct drm_device
*dev
,
74 struct drm_atomic_state
*state
)
78 ret
= drm_atomic_helper_check_modeset(dev
, state
);
82 ret
= drm_atomic_helper_check_planes(dev
, state
);
87 * tilcdc ->atomic_check can update ->mode_changed if pixel format
88 * changes, hence will we check modeset changes again.
90 ret
= drm_atomic_helper_check_modeset(dev
, state
);
97 static int tilcdc_commit(struct drm_device
*dev
,
98 struct drm_atomic_state
*state
,
103 ret
= drm_atomic_helper_prepare_planes(dev
, state
);
107 ret
= drm_atomic_helper_swap_state(state
, true);
109 drm_atomic_helper_cleanup_planes(dev
, state
);
114 * Everything below can be run asynchronously without the need to grab
115 * any modeset locks at all under one condition: It must be guaranteed
116 * that the asynchronous work has either been cancelled (if the driver
117 * supports it, which at least requires that the framebuffers get
118 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
119 * before the new state gets committed on the software side with
120 * drm_atomic_helper_swap_state().
122 * This scheme allows new atomic state updates to be prepared and
123 * checked in parallel to the asynchronous completion of the previous
124 * update. Which is important since compositors need to figure out the
125 * composition of the next frame right after having submitted the
129 drm_atomic_helper_commit_modeset_disables(dev
, state
);
131 drm_atomic_helper_commit_planes(dev
, state
, 0);
133 drm_atomic_helper_commit_modeset_enables(dev
, state
);
135 drm_atomic_helper_wait_for_vblanks(dev
, state
);
137 drm_atomic_helper_cleanup_planes(dev
, state
);
142 static const struct drm_mode_config_funcs mode_config_funcs
= {
143 .fb_create
= tilcdc_fb_create
,
144 .atomic_check
= tilcdc_atomic_check
,
145 .atomic_commit
= tilcdc_commit
,
148 static void modeset_init(struct drm_device
*dev
)
150 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
151 struct tilcdc_module
*mod
;
153 list_for_each_entry(mod
, &module_list
, list
) {
154 DBG("loading module: %s", mod
->name
);
155 mod
->funcs
->modeset_init(mod
, dev
);
158 dev
->mode_config
.min_width
= 0;
159 dev
->mode_config
.min_height
= 0;
160 dev
->mode_config
.max_width
= tilcdc_crtc_max_width(priv
->crtc
);
161 dev
->mode_config
.max_height
= 2048;
162 dev
->mode_config
.funcs
= &mode_config_funcs
;
165 #ifdef CONFIG_CPU_FREQ
166 static int cpufreq_transition(struct notifier_block
*nb
,
167 unsigned long val
, void *data
)
169 struct tilcdc_drm_private
*priv
= container_of(nb
,
170 struct tilcdc_drm_private
, freq_transition
);
172 if (val
== CPUFREQ_POSTCHANGE
)
173 tilcdc_crtc_update_clk(priv
->crtc
);
183 static void tilcdc_fini(struct drm_device
*dev
)
185 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
187 #ifdef CONFIG_CPU_FREQ
188 if (priv
->freq_transition
.notifier_call
)
189 cpufreq_unregister_notifier(&priv
->freq_transition
,
190 CPUFREQ_TRANSITION_NOTIFIER
);
194 tilcdc_crtc_shutdown(priv
->crtc
);
196 if (priv
->is_registered
)
197 drm_dev_unregister(dev
);
199 drm_kms_helper_poll_fini(dev
);
200 drm_irq_uninstall(dev
);
201 drm_mode_config_cleanup(dev
);
202 tilcdc_remove_external_device(dev
);
211 flush_workqueue(priv
->wq
);
212 destroy_workqueue(priv
->wq
);
215 dev
->dev_private
= NULL
;
217 pm_runtime_disable(dev
->dev
);
222 static int tilcdc_init(struct drm_driver
*ddrv
, struct device
*dev
)
224 struct drm_device
*ddev
;
225 struct platform_device
*pdev
= to_platform_device(dev
);
226 struct device_node
*node
= dev
->of_node
;
227 struct tilcdc_drm_private
*priv
;
228 struct resource
*res
;
232 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
236 ddev
= drm_dev_alloc(ddrv
, dev
);
238 return PTR_ERR(ddev
);
240 ddev
->dev_private
= priv
;
241 platform_set_drvdata(pdev
, ddev
);
242 drm_mode_config_init(ddev
);
244 priv
->is_componentized
=
245 tilcdc_get_external_components(dev
, NULL
) > 0;
247 priv
->wq
= alloc_ordered_workqueue("tilcdc", 0);
253 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
255 dev_err(dev
, "failed to get memory resource\n");
260 priv
->mmio
= ioremap_nocache(res
->start
, resource_size(res
));
262 dev_err(dev
, "failed to ioremap\n");
267 priv
->clk
= clk_get(dev
, "fck");
268 if (IS_ERR(priv
->clk
)) {
269 dev_err(dev
, "failed to get functional clock\n");
274 if (of_property_read_u32(node
, "max-bandwidth", &priv
->max_bandwidth
))
275 priv
->max_bandwidth
= TILCDC_DEFAULT_MAX_BANDWIDTH
;
277 DBG("Maximum Bandwidth Value %d", priv
->max_bandwidth
);
279 if (of_property_read_u32(node
, "max-width", &priv
->max_width
))
280 priv
->max_width
= TILCDC_DEFAULT_MAX_WIDTH
;
282 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv
->max_width
);
284 if (of_property_read_u32(node
, "max-pixelclock",
285 &priv
->max_pixelclock
))
286 priv
->max_pixelclock
= TILCDC_DEFAULT_MAX_PIXELCLOCK
;
288 DBG("Maximum Pixel Clock Value %dKHz", priv
->max_pixelclock
);
290 pm_runtime_enable(dev
);
292 /* Determine LCD IP Version */
293 pm_runtime_get_sync(dev
);
294 switch (tilcdc_read(ddev
, LCDC_PID_REG
)) {
303 dev_warn(dev
, "Unknown PID Reg value 0x%08x, "
304 "defaulting to LCD revision 1\n",
305 tilcdc_read(ddev
, LCDC_PID_REG
));
310 pm_runtime_put_sync(dev
);
312 if (priv
->rev
== 1) {
313 DBG("Revision 1 LCDC supports only RGB565 format");
314 priv
->pixelformats
= tilcdc_rev1_formats
;
315 priv
->num_pixelformats
= ARRAY_SIZE(tilcdc_rev1_formats
);
318 const char *str
= "\0";
320 of_property_read_string(node
, "blue-and-red-wiring", &str
);
321 if (0 == strcmp(str
, "crossed")) {
322 DBG("Configured for crossed blue and red wires");
323 priv
->pixelformats
= tilcdc_crossed_formats
;
324 priv
->num_pixelformats
=
325 ARRAY_SIZE(tilcdc_crossed_formats
);
326 bpp
= 32; /* Choose bpp with RGB support for fbdef */
327 } else if (0 == strcmp(str
, "straight")) {
328 DBG("Configured for straight blue and red wires");
329 priv
->pixelformats
= tilcdc_straight_formats
;
330 priv
->num_pixelformats
=
331 ARRAY_SIZE(tilcdc_straight_formats
);
332 bpp
= 16; /* Choose bpp with RGB support for fbdef */
334 DBG("Blue and red wiring '%s' unknown, use legacy mode",
336 priv
->pixelformats
= tilcdc_legacy_formats
;
337 priv
->num_pixelformats
=
338 ARRAY_SIZE(tilcdc_legacy_formats
);
339 bpp
= 16; /* This is just a guess */
343 ret
= tilcdc_crtc_create(ddev
);
345 dev_err(dev
, "failed to create crtc\n");
350 #ifdef CONFIG_CPU_FREQ
351 priv
->freq_transition
.notifier_call
= cpufreq_transition
;
352 ret
= cpufreq_register_notifier(&priv
->freq_transition
,
353 CPUFREQ_TRANSITION_NOTIFIER
);
355 dev_err(dev
, "failed to register cpufreq notifier\n");
356 priv
->freq_transition
.notifier_call
= NULL
;
361 if (priv
->is_componentized
) {
362 ret
= component_bind_all(dev
, ddev
);
366 ret
= tilcdc_add_component_encoder(ddev
);
370 ret
= tilcdc_attach_external_device(ddev
);
375 if (!priv
->external_connector
&&
376 ((priv
->num_encoders
== 0) || (priv
->num_connectors
== 0))) {
377 dev_err(dev
, "no encoders/connectors found\n");
382 ret
= drm_vblank_init(ddev
, 1);
384 dev_err(dev
, "failed to initialize vblank\n");
388 ret
= drm_irq_install(ddev
, platform_get_irq(pdev
, 0));
390 dev_err(dev
, "failed to install IRQ handler\n");
394 drm_mode_config_reset(ddev
);
396 drm_kms_helper_poll_init(ddev
);
398 ret
= drm_dev_register(ddev
, 0);
402 drm_fbdev_generic_setup(ddev
, bpp
);
404 priv
->is_registered
= true;
413 static irqreturn_t
tilcdc_irq(int irq
, void *arg
)
415 struct drm_device
*dev
= arg
;
416 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
417 return tilcdc_crtc_irq(priv
->crtc
);
420 #if defined(CONFIG_DEBUG_FS)
421 static const struct {
427 #define REG(rev, save, reg) { #reg, rev, save, reg }
428 /* exists in revision 1: */
429 REG(1, false, LCDC_PID_REG
),
430 REG(1, true, LCDC_CTRL_REG
),
431 REG(1, false, LCDC_STAT_REG
),
432 REG(1, true, LCDC_RASTER_CTRL_REG
),
433 REG(1, true, LCDC_RASTER_TIMING_0_REG
),
434 REG(1, true, LCDC_RASTER_TIMING_1_REG
),
435 REG(1, true, LCDC_RASTER_TIMING_2_REG
),
436 REG(1, true, LCDC_DMA_CTRL_REG
),
437 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG
),
438 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG
),
439 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG
),
440 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG
),
441 /* new in revision 2: */
442 REG(2, false, LCDC_RAW_STAT_REG
),
443 REG(2, false, LCDC_MASKED_STAT_REG
),
444 REG(2, true, LCDC_INT_ENABLE_SET_REG
),
445 REG(2, false, LCDC_INT_ENABLE_CLR_REG
),
446 REG(2, false, LCDC_END_OF_INT_IND_REG
),
447 REG(2, true, LCDC_CLK_ENABLE_REG
),
453 #ifdef CONFIG_DEBUG_FS
454 static int tilcdc_regs_show(struct seq_file
*m
, void *arg
)
456 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
457 struct drm_device
*dev
= node
->minor
->dev
;
458 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
461 pm_runtime_get_sync(dev
->dev
);
463 seq_printf(m
, "revision: %d\n", priv
->rev
);
465 for (i
= 0; i
< ARRAY_SIZE(registers
); i
++)
466 if (priv
->rev
>= registers
[i
].rev
)
467 seq_printf(m
, "%s:\t %08x\n", registers
[i
].name
,
468 tilcdc_read(dev
, registers
[i
].reg
));
470 pm_runtime_put_sync(dev
->dev
);
475 static int tilcdc_mm_show(struct seq_file
*m
, void *arg
)
477 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
478 struct drm_device
*dev
= node
->minor
->dev
;
479 struct drm_printer p
= drm_seq_file_printer(m
);
480 drm_mm_print(&dev
->vma_offset_manager
->vm_addr_space_mm
, &p
);
484 static struct drm_info_list tilcdc_debugfs_list
[] = {
485 { "regs", tilcdc_regs_show
, 0 },
486 { "mm", tilcdc_mm_show
, 0 },
489 static int tilcdc_debugfs_init(struct drm_minor
*minor
)
491 struct drm_device
*dev
= minor
->dev
;
492 struct tilcdc_module
*mod
;
495 ret
= drm_debugfs_create_files(tilcdc_debugfs_list
,
496 ARRAY_SIZE(tilcdc_debugfs_list
),
497 minor
->debugfs_root
, minor
);
499 list_for_each_entry(mod
, &module_list
, list
)
500 if (mod
->funcs
->debugfs_init
)
501 mod
->funcs
->debugfs_init(mod
, minor
);
504 dev_err(dev
->dev
, "could not install tilcdc_debugfs_list\n");
512 DEFINE_DRM_GEM_CMA_FOPS(fops
);
514 static struct drm_driver tilcdc_driver
= {
515 .driver_features
= (DRIVER_GEM
| DRIVER_MODESET
|
516 DRIVER_PRIME
| DRIVER_ATOMIC
),
517 .irq_handler
= tilcdc_irq
,
518 .gem_free_object_unlocked
= drm_gem_cma_free_object
,
519 .gem_print_info
= drm_gem_cma_print_info
,
520 .gem_vm_ops
= &drm_gem_cma_vm_ops
,
521 .dumb_create
= drm_gem_cma_dumb_create
,
523 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
524 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
525 .gem_prime_import
= drm_gem_prime_import
,
526 .gem_prime_export
= drm_gem_prime_export
,
527 .gem_prime_get_sg_table
= drm_gem_cma_prime_get_sg_table
,
528 .gem_prime_import_sg_table
= drm_gem_cma_prime_import_sg_table
,
529 .gem_prime_vmap
= drm_gem_cma_prime_vmap
,
530 .gem_prime_vunmap
= drm_gem_cma_prime_vunmap
,
531 .gem_prime_mmap
= drm_gem_cma_prime_mmap
,
532 #ifdef CONFIG_DEBUG_FS
533 .debugfs_init
= tilcdc_debugfs_init
,
537 .desc
= "TI LCD Controller DRM",
547 #ifdef CONFIG_PM_SLEEP
548 static int tilcdc_pm_suspend(struct device
*dev
)
550 struct drm_device
*ddev
= dev_get_drvdata(dev
);
553 ret
= drm_mode_config_helper_suspend(ddev
);
555 /* Select sleep pin state */
556 pinctrl_pm_select_sleep_state(dev
);
561 static int tilcdc_pm_resume(struct device
*dev
)
563 struct drm_device
*ddev
= dev_get_drvdata(dev
);
565 /* Select default pin state */
566 pinctrl_pm_select_default_state(dev
);
567 return drm_mode_config_helper_resume(ddev
);
571 static const struct dev_pm_ops tilcdc_pm_ops
= {
572 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend
, tilcdc_pm_resume
)
578 static int tilcdc_bind(struct device
*dev
)
580 return tilcdc_init(&tilcdc_driver
, dev
);
583 static void tilcdc_unbind(struct device
*dev
)
585 struct drm_device
*ddev
= dev_get_drvdata(dev
);
587 /* Check if a subcomponent has already triggered the unloading. */
588 if (!ddev
->dev_private
)
591 tilcdc_fini(dev_get_drvdata(dev
));
594 static const struct component_master_ops tilcdc_comp_ops
= {
596 .unbind
= tilcdc_unbind
,
599 static int tilcdc_pdev_probe(struct platform_device
*pdev
)
601 struct component_match
*match
= NULL
;
604 /* bail out early if no DT data: */
605 if (!pdev
->dev
.of_node
) {
606 dev_err(&pdev
->dev
, "device-tree data is missing\n");
610 ret
= tilcdc_get_external_components(&pdev
->dev
, &match
);
614 return tilcdc_init(&tilcdc_driver
, &pdev
->dev
);
616 return component_master_add_with_match(&pdev
->dev
,
621 static int tilcdc_pdev_remove(struct platform_device
*pdev
)
625 ret
= tilcdc_get_external_components(&pdev
->dev
, NULL
);
629 tilcdc_fini(platform_get_drvdata(pdev
));
631 component_master_del(&pdev
->dev
, &tilcdc_comp_ops
);
636 static struct of_device_id tilcdc_of_match
[] = {
637 { .compatible
= "ti,am33xx-tilcdc", },
638 { .compatible
= "ti,da850-tilcdc", },
641 MODULE_DEVICE_TABLE(of
, tilcdc_of_match
);
643 static struct platform_driver tilcdc_platform_driver
= {
644 .probe
= tilcdc_pdev_probe
,
645 .remove
= tilcdc_pdev_remove
,
648 .pm
= &tilcdc_pm_ops
,
649 .of_match_table
= tilcdc_of_match
,
653 static int __init
tilcdc_drm_init(void)
656 tilcdc_tfp410_init();
658 return platform_driver_register(&tilcdc_platform_driver
);
661 static void __exit
tilcdc_drm_fini(void)
664 platform_driver_unregister(&tilcdc_platform_driver
);
666 tilcdc_tfp410_fini();
669 module_init(tilcdc_drm_init
);
670 module_exit(tilcdc_drm_fini
);
672 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
673 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
674 MODULE_LICENSE("GPL");