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1 /*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33
34 #include <drm/drm_atomic.h>
35 #include <drm/drm_drv.h>
36 #include <drm/drm_encoder.h>
37 #include <drm/drm_fb_helper.h>
38 #include <drm/drm_gem.h>
39 #include <drm/drm_gem_shmem_helper.h>
40 #include <drm/drm_ioctl.h>
41 #include <drm/drm_probe_helper.h>
42 #include <drm/virtgpu_drm.h>
43
44 #define DRIVER_NAME "virtio_gpu"
45 #define DRIVER_DESC "virtio GPU"
46 #define DRIVER_DATE "0"
47
48 #define DRIVER_MAJOR 0
49 #define DRIVER_MINOR 1
50 #define DRIVER_PATCHLEVEL 0
51
52 struct virtio_gpu_object_params {
53 uint32_t format;
54 uint32_t width;
55 uint32_t height;
56 unsigned long size;
57 bool dumb;
58 /* 3d */
59 bool virgl;
60 uint32_t target;
61 uint32_t bind;
62 uint32_t depth;
63 uint32_t array_size;
64 uint32_t last_level;
65 uint32_t nr_samples;
66 uint32_t flags;
67 };
68
69 struct virtio_gpu_object {
70 struct drm_gem_shmem_object base;
71 uint32_t hw_res_handle;
72 bool dumb;
73 bool created;
74 };
75 #define gem_to_virtio_gpu_obj(gobj) \
76 container_of((gobj), struct virtio_gpu_object, base.base)
77
78 struct virtio_gpu_object_shmem {
79 struct virtio_gpu_object base;
80 struct sg_table *pages;
81 uint32_t mapped;
82 };
83
84 #define to_virtio_gpu_shmem(virtio_gpu_object) \
85 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
86
87 struct virtio_gpu_object_array {
88 struct ww_acquire_ctx ticket;
89 struct list_head next;
90 u32 nents, total;
91 struct drm_gem_object *objs[];
92 };
93
94 struct virtio_gpu_vbuffer;
95 struct virtio_gpu_device;
96
97 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
98 struct virtio_gpu_vbuffer *vbuf);
99
100 struct virtio_gpu_fence_driver {
101 atomic64_t last_seq;
102 uint64_t sync_seq;
103 uint64_t context;
104 struct list_head fences;
105 spinlock_t lock;
106 };
107
108 struct virtio_gpu_fence {
109 struct dma_fence f;
110 struct virtio_gpu_fence_driver *drv;
111 struct list_head node;
112 };
113
114 struct virtio_gpu_vbuffer {
115 char *buf;
116 int size;
117
118 void *data_buf;
119 uint32_t data_size;
120
121 char *resp_buf;
122 int resp_size;
123 virtio_gpu_resp_cb resp_cb;
124 void *resp_cb_data;
125
126 struct virtio_gpu_object_array *objs;
127 struct list_head list;
128 };
129
130 struct virtio_gpu_output {
131 int index;
132 struct drm_crtc crtc;
133 struct drm_connector conn;
134 struct drm_encoder enc;
135 struct virtio_gpu_display_one info;
136 struct virtio_gpu_update_cursor cursor;
137 struct edid *edid;
138 int cur_x;
139 int cur_y;
140 bool enabled;
141 };
142 #define drm_crtc_to_virtio_gpu_output(x) \
143 container_of(x, struct virtio_gpu_output, crtc)
144
145 struct virtio_gpu_framebuffer {
146 struct drm_framebuffer base;
147 struct virtio_gpu_fence *fence;
148 };
149 #define to_virtio_gpu_framebuffer(x) \
150 container_of(x, struct virtio_gpu_framebuffer, base)
151
152 struct virtio_gpu_queue {
153 struct virtqueue *vq;
154 spinlock_t qlock;
155 wait_queue_head_t ack_queue;
156 struct work_struct dequeue_work;
157 };
158
159 struct virtio_gpu_drv_capset {
160 uint32_t id;
161 uint32_t max_version;
162 uint32_t max_size;
163 };
164
165 struct virtio_gpu_drv_cap_cache {
166 struct list_head head;
167 void *caps_cache;
168 uint32_t id;
169 uint32_t version;
170 uint32_t size;
171 atomic_t is_valid;
172 };
173
174 struct virtio_gpu_device {
175 struct device *dev;
176 struct drm_device *ddev;
177
178 struct virtio_device *vdev;
179
180 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
181 uint32_t num_scanouts;
182
183 struct virtio_gpu_queue ctrlq;
184 struct virtio_gpu_queue cursorq;
185 struct kmem_cache *vbufs;
186
187 atomic_t pending_commands;
188
189 struct ida resource_ida;
190
191 wait_queue_head_t resp_wq;
192 /* current display info */
193 spinlock_t display_info_lock;
194 bool display_info_pending;
195
196 struct virtio_gpu_fence_driver fence_drv;
197
198 struct ida ctx_id_ida;
199
200 bool has_virgl_3d;
201 bool has_edid;
202 bool has_indirect;
203
204 struct work_struct config_changed_work;
205
206 struct work_struct obj_free_work;
207 spinlock_t obj_free_lock;
208 struct list_head obj_free_list;
209
210 struct virtio_gpu_drv_capset *capsets;
211 uint32_t num_capsets;
212 struct list_head cap_cache;
213 };
214
215 struct virtio_gpu_fpriv {
216 uint32_t ctx_id;
217 bool context_created;
218 struct mutex context_lock;
219 };
220
221 /* virtio_ioctl.c */
222 #define DRM_VIRTIO_NUM_IOCTLS 10
223 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
224
225 /* virtio_kms.c */
226 int virtio_gpu_init(struct drm_device *dev);
227 void virtio_gpu_deinit(struct drm_device *dev);
228 void virtio_gpu_release(struct drm_device *dev);
229 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
230 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
231
232 /* virtio_gem.c */
233 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
234 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
235 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
236 int virtio_gpu_gem_create(struct drm_file *file,
237 struct drm_device *dev,
238 struct virtio_gpu_object_params *params,
239 struct drm_gem_object **obj_p,
240 uint32_t *handle_p);
241 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
242 struct drm_file *file);
243 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
244 struct drm_file *file);
245 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
246 struct drm_device *dev,
247 struct drm_mode_create_dumb *args);
248 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
249 struct drm_device *dev,
250 uint32_t handle, uint64_t *offset_p);
251
252 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
253 struct virtio_gpu_object_array*
254 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
255 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
256 struct drm_gem_object *obj);
257 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
258 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
259 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
260 struct dma_fence *fence);
261 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
262 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
263 struct virtio_gpu_object_array *objs);
264 void virtio_gpu_array_put_free_work(struct work_struct *work);
265
266 /* virtio vg */
267 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
268 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
269 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
270 struct virtio_gpu_object *bo,
271 struct virtio_gpu_object_params *params,
272 struct virtio_gpu_object_array *objs,
273 struct virtio_gpu_fence *fence);
274 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
275 struct virtio_gpu_object *bo);
276 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
277 uint64_t offset,
278 uint32_t width, uint32_t height,
279 uint32_t x, uint32_t y,
280 struct virtio_gpu_object_array *objs,
281 struct virtio_gpu_fence *fence);
282 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
283 uint32_t resource_id,
284 uint32_t x, uint32_t y,
285 uint32_t width, uint32_t height);
286 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
287 uint32_t scanout_id, uint32_t resource_id,
288 uint32_t width, uint32_t height,
289 uint32_t x, uint32_t y);
290 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
291 struct virtio_gpu_object *obj,
292 struct virtio_gpu_mem_entry *ents,
293 unsigned int nents);
294 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
295 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
296 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
297 struct virtio_gpu_output *output);
298 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
299 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
300 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
301 int idx, int version,
302 struct virtio_gpu_drv_cap_cache **cache_p);
303 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
304 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
305 uint32_t nlen, const char *name);
306 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
307 uint32_t id);
308 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
309 uint32_t ctx_id,
310 struct virtio_gpu_object_array *objs);
311 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
312 uint32_t ctx_id,
313 struct virtio_gpu_object_array *objs);
314 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
315 void *data, uint32_t data_size,
316 uint32_t ctx_id,
317 struct virtio_gpu_object_array *objs,
318 struct virtio_gpu_fence *fence);
319 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
320 uint32_t ctx_id,
321 uint64_t offset, uint32_t level,
322 struct drm_virtgpu_3d_box *box,
323 struct virtio_gpu_object_array *objs,
324 struct virtio_gpu_fence *fence);
325 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
326 uint32_t ctx_id,
327 uint64_t offset, uint32_t level,
328 struct drm_virtgpu_3d_box *box,
329 struct virtio_gpu_object_array *objs,
330 struct virtio_gpu_fence *fence);
331 void
332 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
333 struct virtio_gpu_object *bo,
334 struct virtio_gpu_object_params *params,
335 struct virtio_gpu_object_array *objs,
336 struct virtio_gpu_fence *fence);
337 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
338 void virtio_gpu_cursor_ack(struct virtqueue *vq);
339 void virtio_gpu_fence_ack(struct virtqueue *vq);
340 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
341 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
342 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
343
344 void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
345
346 /* virtio_gpu_display.c */
347 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
348 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
349
350 /* virtio_gpu_plane.c */
351 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
352 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
353 enum drm_plane_type type,
354 int index);
355
356 /* virtio_gpu_fence.c */
357 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
358 struct virtio_gpu_device *vgdev);
359 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
360 struct virtio_gpu_ctrl_hdr *cmd_hdr,
361 struct virtio_gpu_fence *fence);
362 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
363 u64 last_seq);
364
365 /* virtio_gpu_object */
366 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
367 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
368 size_t size);
369 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
370 struct virtio_gpu_object_params *params,
371 struct virtio_gpu_object **bo_ptr,
372 struct virtio_gpu_fence *fence);
373
374 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
375
376 /* virtgpu_prime.c */
377 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
378 struct drm_device *dev, struct dma_buf_attachment *attach,
379 struct sg_table *sgt);
380
381 /* virgl debugfs */
382 int virtio_gpu_debugfs_init(struct drm_minor *minor);
383
384 #endif