drivers/i2c/adi_i2c.c

   1 /*
   2  * i2c.c - driver for ADI TWI/I2C
   3  *
   4  * Copyright (c) 2006-2013 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <i2c.h>
  11
  12 #include <asm/clock.h>
  13 #include <asm/twi.h>
  14 #include <asm/io.h>
  15
  16 /* Every register is 32bit aligned, but only 16bits in size */
  17 #define ureg(name) u16 name; u16 __pad_##name;
  18 struct twi_regs {
  19         ureg(clkdiv);
  20         ureg(control);
  21         ureg(slave_ctl);
  22         ureg(slave_stat);
  23         ureg(slave_addr);
  24         ureg(master_ctl);
  25         ureg(master_stat);
  26         ureg(master_addr);
  27         ureg(int_stat);
  28         ureg(int_mask);
  29         ureg(fifo_ctl);
  30         ureg(fifo_stat);
  31         char __pad[0x50];
  32         ureg(xmt_data8);
  33         ureg(xmt_data16);
  34         ureg(rcv_data8);
  35         ureg(rcv_data16);
  36 };
  37 #undef ureg
  38
  39 /* U-Boot I2C framework allows only one active device at a time.  */
  40 #ifdef TWI_CLKDIV
  41 #define TWI0_CLKDIV TWI_CLKDIV
  42 #endif
  43 static struct twi_regs *twi = (void *)TWI0_CLKDIV;
  44
  45 #ifdef DEBUG
  46 # define dmemset(s, c, n) memset(s, c, n)
  47 #else
  48 # define dmemset(s, c, n)
  49 #endif
  50 #define debugi(fmt, args...) \
  51         debug( \
  52                 "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
  53                 twi->master_stat, twi->fifo_stat, twi->int_stat, \
  54                 __func__, __LINE__, ## args)
  55
  56 #ifdef CONFIG_TWICLK_KHZ
  57 # error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
  58 #endif
  59
  60 /*
  61  * The way speed is changed into duty often results in integer truncation
  62  * with 50% duty, so we'll force rounding up to the next duty by adding 1
  63  * to the max.  In practice this will get us a speed of something like
  64  * 385 KHz.  The other limit is easy to handle as it is only 8 bits.
  65  */
  66 #define I2C_SPEED_MAX             400000
  67 #define I2C_SPEED_TO_DUTY(speed)  (5000000 / (speed))
  68 #define I2C_DUTY_MAX              (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1)
  69 #define I2C_DUTY_MIN              0xff  /* 8 bit limited */
  70 #define SYS_I2C_DUTY              I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
  71 /* Note: duty is inverse of speed, so the comparisons below are correct */
  72 #if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
  73 # error "The Blackfin I2C hardware can only operate 20KHz - 400KHz"
  74 #endif
  75
  76 /* All transfers are described by this data structure */
  77 struct i2c_msg {
  78         u8 flags;
  79 #define I2C_M_COMBO             0x4
  80 #define I2C_M_STOP              0x2
  81 #define I2C_M_READ              0x1
  82         int len;                /* msg length */
  83         u8 *buf;                /* pointer to msg data */
  84         int alen;               /* addr length */
  85         u8 *abuf;               /* addr buffer */
  86 };
  87
  88 /* Allow msec timeout per ~byte transfer */
  89 #define I2C_TIMEOUT 10
  90
  91 /**
  92  * wait_for_completion - manage the actual i2c transfer
  93  *      @msg: the i2c msg
  94  */
  95 static int wait_for_completion(struct i2c_msg *msg)
  96 {
  97         u16 int_stat, ctl;
  98         ulong timebase = get_timer(0);
  99
 100         do {
 101                 int_stat = readw(&twi->int_stat);
 102
 103                 if (int_stat & XMTSERV) {
 104                         debugi("processing XMTSERV");
 105                         writew(XMTSERV, &twi->int_stat);
 106                         if (msg->alen) {
 107                                 writew(*(msg->abuf++), &twi->xmt_data8);
 108                                 --msg->alen;
 109                         } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
 110                                 writew(*(msg->buf++), &twi->xmt_data8);
 111                                 --msg->len;
 112                         } else {
 113                                 ctl = readw(&twi->master_ctl);
 114                                 if (msg->flags & I2C_M_COMBO)
 115                                         writew(ctl | RSTART | MDIR,
 116                                                         &twi->master_ctl);
 117                                 else
 118                                         writew(ctl | STOP, &twi->master_ctl);
 119                         }
 120                 }
 121                 if (int_stat & RCVSERV) {
 122                         debugi("processing RCVSERV");
 123                         writew(RCVSERV, &twi->int_stat);
 124                         if (msg->len) {
 125                                 *(msg->buf++) = readw(&twi->rcv_data8);
 126                                 --msg->len;
 127                         } else if (msg->flags & I2C_M_STOP) {
 128                                 ctl = readw(&twi->master_ctl);
 129                                 writew(ctl | STOP, &twi->master_ctl);
 130                         }
 131                 }
 132                 if (int_stat & MERR) {
 133                         debugi("processing MERR");
 134                         writew(MERR, &twi->int_stat);
 135                         return msg->len;
 136                 }
 137                 if (int_stat & MCOMP) {
 138                         debugi("processing MCOMP");
 139                         writew(MCOMP, &twi->int_stat);
 140                         if (msg->flags & I2C_M_COMBO && msg->len) {
 141                                 ctl = readw(&twi->master_ctl);
 142                                 ctl = (ctl & ~RSTART) |
 143                                         (min(msg->len, 0xff) << 6) | MEN | MDIR;
 144                                 writew(ctl, &twi->master_ctl);
 145                         } else
 146                                 break;
 147                 }
 148
 149                 /* If we were able to do something, reset timeout */
 150                 if (int_stat)
 151                         timebase = get_timer(0);
 152
 153         } while (get_timer(timebase) < I2C_TIMEOUT);
 154
 155         return msg->len;
 156 }
 157
 158 /**
 159  * i2c_transfer - setup an i2c transfer
 160  *      @return: 0 if things worked, non-0 if things failed
 161  *
 162  *      Here we just get the i2c stuff all prepped and ready, and then tail off
 163  *      into wait_for_completion() for all the bits to go.
 164  */
 165 static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
 166                         int len, u8 flags)
 167 {
 168         int ret;
 169         u16 ctl;
 170         uchar addr_buffer[] = {
 171                 (addr >>  0),
 172                 (addr >>  8),
 173                 (addr >> 16),
 174         };
 175         struct i2c_msg msg = {
 176                 .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
 177                 .buf   = buffer,
 178                 .len   = len,
 179                 .abuf  = addr_buffer,
 180                 .alen  = alen,
 181         };
 182
 183         dmemset(buffer, 0xff, len);
 184         debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
 185                 chip, addr, alen, buffer[0], len);
 186         debugi("flags=0x%02x[%s] ", flags,
 187                 (flags & I2C_M_READ ? "rd" : "wr"));
 188
 189         /* wait for things to settle */
 190         while (readw(&twi->master_stat) & BUSBUSY)
 191                 if (ctrlc())
 192                         return 1;
 193
 194         /* Set Transmit device address */
 195         writew(chip, &twi->master_addr);
 196
 197         /* Clear the FIFO before starting things */
 198         writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
 199         writew(0, &twi->fifo_ctl);
 200
 201         /* prime the pump */
 202         if (msg.alen) {
 203                 len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
 204                 debugi("first byte=0x%02x", *msg.abuf);
 205                 writew(*(msg.abuf++), &twi->xmt_data8);
 206                 --msg.alen;
 207         } else if (!(msg.flags & I2C_M_READ) && msg.len) {
 208                 debugi("first byte=0x%02x", *msg.buf);
 209                 writew(*(msg.buf++), &twi->xmt_data8);
 210                 --msg.len;
 211         }
 212
 213         /* clear int stat */
 214         writew(-1, &twi->master_stat);
 215         writew(-1, &twi->int_stat);
 216         writew(0, &twi->int_mask);
 217
 218         /* Master enable */
 219         ctl = readw(&twi->master_ctl);
 220         ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
 221                 ((msg.flags & I2C_M_READ) ? MDIR : 0);
 222         writew(ctl, &twi->master_ctl);
 223
 224         /* process the rest */
 225         ret = wait_for_completion(&msg);
 226         debugi("ret=%d", ret);
 227
 228         if (ret) {
 229                 ctl = readw(&twi->master_ctl) & ~MEN;
 230                 writew(ctl, &twi->master_ctl);
 231                 ctl = readw(&twi->control) & ~TWI_ENA;
 232                 writew(ctl, &twi->control);
 233                 ctl = readw(&twi->control) | TWI_ENA;
 234                 writew(ctl, &twi->control);
 235         }
 236
 237         return ret;
 238 }
 239
 240 /**
 241  * i2c_set_bus_speed - set i2c bus speed
 242  *      @speed: bus speed (in HZ)
 243  */
 244 int i2c_set_bus_speed(unsigned int speed)
 245 {
 246         u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
 247
 248         /* Set TWI interface clock */
 249         if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
 250                 return -1;
 251         clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
 252         writew(clkdiv, &twi->clkdiv);
 253
 254         /* Don't turn it on */
 255         writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
 256
 257         return 0;
 258 }
 259
 260 /**
 261  * i2c_get_bus_speed - get i2c bus speed
 262  *      @speed: bus speed (in HZ)
 263  */
 264 unsigned int i2c_get_bus_speed(void)
 265 {
 266         u16 clkdiv = readw(&twi->clkdiv) & 0xff;
 267         /* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
 268         return 5000000 / clkdiv;
 269 }
 270
 271 /**
 272  * i2c_init - initialize the i2c bus
 273  *      @speed: bus speed (in HZ)
 274  *      @slaveaddr: address of device in slave mode (0 - not slave)
 275  *
 276  *      Slave mode isn't actually implemented.  It'll stay that way until
 277  *      we get a real request for it.
 278  */
 279 void i2c_init(int speed, int slaveaddr)
 280 {
 281         u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
 282
 283         /* Set TWI internal clock as 10MHz */
 284         writew(prescale, &twi->control);
 285
 286         /* Set TWI interface clock as specified */
 287         i2c_set_bus_speed(speed);
 288
 289         /* Enable it */
 290         writew(TWI_ENA | prescale, &twi->control);
 291
 292         debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
 293                 readw(&twi->clkdiv));
 294
 295 #if CONFIG_SYS_I2C_SLAVE
 296 # error I2C slave support not tested/supported
 297 #endif
 298 }
 299
 300 /**
 301  * i2c_probe - test if a chip exists at a given i2c address
 302  *      @chip: i2c chip addr to search for
 303  *      @return: 0 if found, non-0 if not found
 304  */
 305 int i2c_probe(uchar chip)
 306 {
 307         u8 byte;
 308         return i2c_read(chip, 0, 0, &byte, 1);
 309 }
 310
 311 /**
 312  * i2c_read - read data from an i2c device
 313  *      @chip: i2c chip addr
 314  *      @addr: memory (register) address in the chip
 315  *      @alen: byte size of address
 316  *      @buffer: buffer to store data read from chip
 317  *      @len: how many bytes to read
 318  *      @return: 0 on success, non-0 on failure
 319  */
 320 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 321 {
 322         return i2c_transfer(chip, addr, alen, buffer,
 323                         len, (alen ? I2C_M_COMBO : I2C_M_READ));
 324 }
 325
 326 /**
 327  * i2c_write - write data to an i2c device
 328  *      @chip: i2c chip addr
 329  *      @addr: memory (register) address in the chip
 330  *      @alen: byte size of address
 331  *      @buffer: buffer holding data to write to chip
 332  *      @len: how many bytes to write
 333  *      @return: 0 on success, non-0 on failure
 334  */
 335 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 336 {
 337         return i2c_transfer(chip, addr, alen, buffer, len, 0);
 338 }
 339
 340 /**
 341  * i2c_set_bus_num - change active I2C bus
 342  *      @bus: bus index, zero based
 343  *      @returns: 0 on success, non-0 on failure
 344  */
 345 int i2c_set_bus_num(unsigned int bus)
 346 {
 347         switch (bus) {
 348 #if CONFIG_SYS_MAX_I2C_BUS > 0
 349         case 0:
 350                 twi = (void *)TWI0_CLKDIV;
 351                 return 0;
 352 #endif
 353 #if CONFIG_SYS_MAX_I2C_BUS > 1
 354         case 1:
 355                 twi = (void *)TWI1_CLKDIV;
 356                 return 0;
 357 #endif
 358 #if CONFIG_SYS_MAX_I2C_BUS > 2
 359         case 2:
 360                 twi = (void *)TWI2_CLKDIV;
 361                 return 0;
 362 #endif
 363         default: return -1;
 364         }
 365 }
 366
 367 /**
 368  * i2c_get_bus_num - returns index of active I2C bus
 369  */
 370 unsigned int i2c_get_bus_num(void)
 371 {
 372         switch ((unsigned long)twi) {
 373 #if CONFIG_SYS_MAX_I2C_BUS > 0
 374         case TWI0_CLKDIV:
 375                 return 0;
 376 #endif
 377 #if CONFIG_SYS_MAX_I2C_BUS > 1
 378         case TWI1_CLKDIV:
 379                 return 1;
 380 #endif
 381 #if CONFIG_SYS_MAX_I2C_BUS > 2
 382         case TWI2_CLKDIV:
 383                 return 2;
 384 #endif
 385         default: return -1;
 386         }
 387 }