drivers/i2c/bfin-twi_i2c.c

   1 /*
   2  * i2c.c - driver for Blackfin on-chip TWI/I2C
   3  *
   4  * Copyright (c) 2006-2008 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <i2c.h>
  11
  12 #include <asm/blackfin.h>
  13 #include <asm/mach-common/bits/twi.h>
  14
  15 #ifdef DEBUG
  16 # define dmemset(s, c, n) memset(s, c, n)
  17 #else
  18 # define dmemset(s, c, n)
  19 #endif
  20 #define debugi(fmt, args...) \
  21         debug( \
  22                 "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t" \
  23                 "%-20s:%-3i: " fmt "\n", \
  24                 bfin_read_TWI_MASTER_STAT(), bfin_read_TWI_FIFO_STAT(), bfin_read_TWI_INT_STAT(), \
  25                 __func__, __LINE__, ## args)
  26
  27 #ifdef TWI0_CLKDIV
  28 #define bfin_write_TWI_CLKDIV(val)           bfin_write_TWI0_CLKDIV(val)
  29 #define bfin_write_TWI_CONTROL(val)          bfin_write_TWI0_CONTROL(val)
  30 #define bfin_read_TWI_CONTROL(val)           bfin_read_TWI0_CONTROL(val)
  31 #define bfin_write_TWI_MASTER_ADDR(val)      bfin_write_TWI0_MASTER_ADDR(val)
  32 #define bfin_write_TWI_XMT_DATA8(val)        bfin_write_TWI0_XMT_DATA8(val)
  33 #define bfin_read_TWI_RCV_DATA8()            bfin_read_TWI0_RCV_DATA8()
  34 #define bfin_read_TWI_INT_STAT()             bfin_read_TWI0_INT_STAT()
  35 #define bfin_write_TWI_INT_STAT(val)         bfin_write_TWI0_INT_STAT(val)
  36 #define bfin_read_TWI_MASTER_STAT()          bfin_read_TWI0_MASTER_STAT()
  37 #define bfin_write_TWI_MASTER_STAT(val)      bfin_write_TWI0_MASTER_STAT(val)
  38 #define bfin_read_TWI_MASTER_CTL()           bfin_read_TWI0_MASTER_CTL()
  39 #define bfin_write_TWI_MASTER_CTL(val)       bfin_write_TWI0_MASTER_CTL(val)
  40 #define bfin_write_TWI_INT_MASK(val)         bfin_write_TWI0_INT_MASK(val)
  41 #define bfin_write_TWI_FIFO_CTL(val)         bfin_write_TWI0_FIFO_CTL(val)
  42 #endif
  43
  44 #ifdef CONFIG_TWICLK_KHZ
  45 # error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
  46 #endif
  47 #if CONFIG_SYS_I2C_SPEED > 400000
  48 # error The Blackfin I2C hardware can only operate at 400KHz max
  49 #endif
  50
  51 /* All transfers are described by this data structure */
  52 struct i2c_msg {
  53         u8 flags;
  54 #define I2C_M_COMBO             0x4
  55 #define I2C_M_STOP              0x2
  56 #define I2C_M_READ              0x1
  57         int len;                /* msg length */
  58         u8 *buf;                /* pointer to msg data */
  59         int alen;               /* addr length */
  60         u8 *abuf;               /* addr buffer */
  61 };
  62
  63 /**
  64  * wait_for_completion - manage the actual i2c transfer
  65  *      @msg: the i2c msg
  66  */
  67 static int wait_for_completion(struct i2c_msg *msg)
  68 {
  69         uint16_t int_stat;
  70
  71         while (!ctrlc()) {
  72                 int_stat = bfin_read_TWI_INT_STAT();
  73
  74                 if (int_stat & XMTSERV) {
  75                         debugi("processing XMTSERV");
  76                         bfin_write_TWI_INT_STAT(XMTSERV);
  77                         SSYNC();
  78                         if (msg->alen) {
  79                                 bfin_write_TWI_XMT_DATA8(*(msg->abuf++));
  80                                 --msg->alen;
  81                         } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
  82                                 bfin_write_TWI_XMT_DATA8(*(msg->buf++));
  83                                 --msg->len;
  84                         } else {
  85                                 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() |
  86                                         (msg->flags & I2C_M_COMBO ? RSTART | MDIR : STOP));
  87                                 SSYNC();
  88                         }
  89                 }
  90                 if (int_stat & RCVSERV) {
  91                         debugi("processing RCVSERV");
  92                         bfin_write_TWI_INT_STAT(RCVSERV);
  93                         SSYNC();
  94                         if (msg->len) {
  95                                 *(msg->buf++) = bfin_read_TWI_RCV_DATA8();
  96                                 --msg->len;
  97                         } else if (msg->flags & I2C_M_STOP) {
  98                                 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | STOP);
  99                                 SSYNC();
 100                         }
 101                 }
 102                 if (int_stat & MERR) {
 103                         debugi("processing MERR");
 104                         bfin_write_TWI_INT_STAT(MERR);
 105                         SSYNC();
 106                         break;
 107                 }
 108                 if (int_stat & MCOMP) {
 109                         debugi("processing MCOMP");
 110                         bfin_write_TWI_INT_STAT(MCOMP);
 111                         SSYNC();
 112                         if (msg->flags & I2C_M_COMBO && msg->len) {
 113                                 bfin_write_TWI_MASTER_CTL((bfin_read_TWI_MASTER_CTL() & ~RSTART) |
 114                                         (min(msg->len, 0xff) << 6) | MEN | MDIR);
 115                                 SSYNC();
 116                         } else
 117                                 break;
 118                 }
 119         }
 120
 121         return msg->len;
 122 }
 123
 124 /**
 125  * i2c_transfer - setup an i2c transfer
 126  *      @return: 0 if things worked, non-0 if things failed
 127  *
 128  *      Here we just get the i2c stuff all prepped and ready, and then tail off
 129  *      into wait_for_completion() for all the bits to go.
 130  */
 131 static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len, u8 flags)
 132 {
 133         uchar addr_buffer[] = {
 134                 (addr >>  0),
 135                 (addr >>  8),
 136                 (addr >> 16),
 137         };
 138         struct i2c_msg msg = {
 139                 .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
 140                 .buf   = buffer,
 141                 .len   = len,
 142                 .abuf  = addr_buffer,
 143                 .alen  = alen,
 144         };
 145         int ret;
 146
 147         dmemset(buffer, 0xff, len);
 148         debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i flags=0x%02x[%s] ",
 149                 chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
 150
 151         /* wait for things to settle */
 152         while (bfin_read_TWI_MASTER_STAT() & BUSBUSY)
 153                 if (ctrlc())
 154                         return 1;
 155
 156         /* Set Transmit device address */
 157         bfin_write_TWI_MASTER_ADDR(chip);
 158
 159         /* Clear the FIFO before starting things */
 160         bfin_write_TWI_FIFO_CTL(XMTFLUSH | RCVFLUSH);
 161         SSYNC();
 162         bfin_write_TWI_FIFO_CTL(0);
 163         SSYNC();
 164
 165         /* prime the pump */
 166         if (msg.alen) {
 167                 len = msg.alen;
 168                 debugi("first byte=0x%02x", *msg.abuf);
 169                 bfin_write_TWI_XMT_DATA8(*(msg.abuf++));
 170                 --msg.alen;
 171         } else if (!(msg.flags & I2C_M_READ) && msg.len) {
 172                 debugi("first byte=0x%02x", *msg.buf);
 173                 bfin_write_TWI_XMT_DATA8(*(msg.buf++));
 174                 --msg.len;
 175         }
 176
 177         /* clear int stat */
 178         bfin_write_TWI_MASTER_STAT(-1);
 179         bfin_write_TWI_INT_STAT(-1);
 180         bfin_write_TWI_INT_MASK(0);
 181         SSYNC();
 182
 183         /* Master enable */
 184         bfin_write_TWI_MASTER_CTL(
 185                         (bfin_read_TWI_MASTER_CTL() & FAST) |
 186                         (min(len, 0xff) << 6) | MEN |
 187                         ((msg.flags & I2C_M_READ) ? MDIR : 0)
 188         );
 189         SSYNC();
 190         debugi("CTL=0x%04x", bfin_read_TWI_MASTER_CTL());
 191
 192         /* process the rest */
 193         ret = wait_for_completion(&msg);
 194         debugi("ret=%d", ret);
 195
 196         if (ret) {
 197                 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() & ~MEN);
 198                 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() & ~TWI_ENA);
 199                 SSYNC();
 200                 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
 201                 SSYNC();
 202         }
 203
 204         return ret;
 205 }
 206
 207 /*
 208  * i2c_init - initialize the i2c bus
 209  *      @speed: bus speed (in HZ)
 210  *      @slaveaddr: address of device in slave mode (0 - not slave)
 211  *
 212  *      Slave mode isn't actually implemented.  It'll stay that way until
 213  *      we get a real request for it.
 214  */
 215 void i2c_init(int speed, int slaveaddr)
 216 {
 217         uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
 218
 219         /* Set TWI internal clock as 10MHz */
 220         bfin_write_TWI_CONTROL(prescale);
 221
 222         /* Set TWI interface clock as specified */
 223         bfin_write_TWI_CLKDIV(
 224                 ((5 * 1024 / (speed / 1000)) << 8) |
 225                 ((5 * 1024 / (speed / 1000)) & 0xFF)
 226         );
 227
 228         /* Don't turn it on */
 229         bfin_write_TWI_MASTER_CTL(speed > 100000 ? FAST : 0);
 230
 231         /* But enable it */
 232         bfin_write_TWI_CONTROL(TWI_ENA | prescale);
 233         SSYNC();
 234
 235         debugi("CONTROL:0x%04x CLKDIV:0x%04x",
 236                 bfin_read_TWI_CONTROL(), bfin_read_TWI_CLKDIV());
 237
 238 #if CONFIG_SYS_I2C_SLAVE
 239 # error I2C slave support not tested/supported
 240         /* If they want us as a slave, do it */
 241         if (slaveaddr) {
 242                 bfin_write_TWI_SLAVE_ADDR(slaveaddr);
 243                 bfin_write_TWI_SLAVE_CTL(SEN);
 244         }
 245 #endif
 246 }
 247
 248 /**
 249  * i2c_probe - test if a chip exists at a given i2c address
 250  *      @chip: i2c chip addr to search for
 251  *      @return: 0 if found, non-0 if not found
 252  */
 253 int i2c_probe(uchar chip)
 254 {
 255         u8 byte;
 256         return i2c_read(chip, 0, 0, &byte, 1);
 257 }
 258
 259 /**
 260  * i2c_read - read data from an i2c device
 261  *      @chip: i2c chip addr
 262  *      @addr: memory (register) address in the chip
 263  *      @alen: byte size of address
 264  *      @buffer: buffer to store data read from chip
 265  *      @len: how many bytes to read
 266  *      @return: 0 on success, non-0 on failure
 267  */
 268 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 269 {
 270         return i2c_transfer(chip, addr, alen, buffer, len, (alen ? I2C_M_COMBO : I2C_M_READ));
 271 }
 272
 273 /**
 274  * i2c_write - write data to an i2c device
 275  *      @chip: i2c chip addr
 276  *      @addr: memory (register) address in the chip
 277  *      @alen: byte size of address
 278  *      @buffer: buffer to store data read from chip
 279  *      @len: how many bytes to write
 280  *      @return: 0 on success, non-0 on failure
 281  */
 282 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 283 {
 284         return i2c_transfer(chip, addr, alen, buffer, len, 0);
 285 }