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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/i2c/designware_i2c.c
3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/hardware.h>
27 #include "designware_i2c.h"
29 #ifdef CONFIG_I2C_MULTI_BUS
30 static unsigned int bus_initialized
[CONFIG_SYS_I2C_BUS_MAX
];
31 static unsigned int current_bus
= 0;
34 static struct i2c_regs
*i2c_regs_p
=
35 (struct i2c_regs
*)CONFIG_SYS_I2C_BASE
;
38 * set_speed - Set the i2c speed mode (standard, high, fast)
39 * @i2c_spd: required i2c speed mode
41 * Set the i2c speed mode (standard, high, fast)
43 static void set_speed(int i2c_spd
)
46 unsigned int hcnt
, lcnt
;
47 unsigned int high
, low
;
50 /* to set speed cltr must be disabled */
51 enbl
= readl(&i2c_regs_p
->ic_enable
);
52 enbl
&= ~IC_ENABLE_0B
;
53 writel(enbl
, &i2c_regs_p
->ic_enable
);
56 cntl
= (readl(&i2c_regs_p
->ic_con
) & (~IC_CON_SPD_MSK
));
59 case IC_SPEED_MODE_MAX
:
60 cntl
|= IC_CON_SPD_HS
;
61 high
= MIN_HS_SCL_HIGHTIME
;
62 low
= MIN_HS_SCL_LOWTIME
;
65 case IC_SPEED_MODE_STANDARD
:
66 cntl
|= IC_CON_SPD_SS
;
67 high
= MIN_SS_SCL_HIGHTIME
;
68 low
= MIN_SS_SCL_LOWTIME
;
71 case IC_SPEED_MODE_FAST
:
73 cntl
|= IC_CON_SPD_FS
;
74 high
= MIN_FS_SCL_HIGHTIME
;
75 low
= MIN_FS_SCL_LOWTIME
;
79 writel(cntl
, &i2c_regs_p
->ic_con
);
81 hcnt
= (IC_CLK
* high
) / NANO_TO_MICRO
;
82 writel(hcnt
, &i2c_regs_p
->ic_fs_scl_hcnt
);
84 lcnt
= (IC_CLK
* low
) / NANO_TO_MICRO
;
85 writel(lcnt
, &i2c_regs_p
->ic_fs_scl_lcnt
);
87 /* re-enable i2c ctrl back now that speed is set */
89 writel(enbl
, &i2c_regs_p
->ic_enable
);
93 * i2c_set_bus_speed - Set the i2c speed
94 * @speed: required i2c speed
98 int i2c_set_bus_speed(int speed
)
100 if (speed
>= I2C_MAX_SPEED
)
101 set_speed(IC_SPEED_MODE_MAX
);
102 else if (speed
>= I2C_FAST_SPEED
)
103 set_speed(IC_SPEED_MODE_FAST
);
105 set_speed(IC_SPEED_MODE_STANDARD
);
111 * i2c_get_bus_speed - Gets the i2c speed
113 * Gets the i2c speed.
115 int i2c_get_bus_speed(void)
119 cntl
= (readl(&i2c_regs_p
->ic_con
) & IC_CON_SPD_MSK
);
121 if (cntl
== IC_CON_SPD_HS
)
122 return I2C_MAX_SPEED
;
123 else if (cntl
== IC_CON_SPD_FS
)
124 return I2C_FAST_SPEED
;
125 else if (cntl
== IC_CON_SPD_SS
)
126 return I2C_STANDARD_SPEED
;
132 * i2c_init - Init function
133 * @speed: required i2c speed
134 * @slaveadd: slave address for the device
136 * Initialization function.
138 void i2c_init(int speed
, int slaveadd
)
143 enbl
= readl(&i2c_regs_p
->ic_enable
);
144 enbl
&= ~IC_ENABLE_0B
;
145 writel(enbl
, &i2c_regs_p
->ic_enable
);
147 writel((IC_CON_SD
| IC_CON_SPD_FS
| IC_CON_MM
), &i2c_regs_p
->ic_con
);
148 writel(IC_RX_TL
, &i2c_regs_p
->ic_rx_tl
);
149 writel(IC_TX_TL
, &i2c_regs_p
->ic_tx_tl
);
150 i2c_set_bus_speed(speed
);
151 writel(IC_STOP_DET
, &i2c_regs_p
->ic_intr_mask
);
152 writel(slaveadd
, &i2c_regs_p
->ic_sar
);
155 enbl
= readl(&i2c_regs_p
->ic_enable
);
156 enbl
|= IC_ENABLE_0B
;
157 writel(enbl
, &i2c_regs_p
->ic_enable
);
159 #ifdef CONFIG_I2C_MULTI_BUS
160 bus_initialized
[current_bus
] = 1;
165 * i2c_setaddress - Sets the target slave address
166 * @i2c_addr: target i2c address
168 * Sets the target slave address.
170 static void i2c_setaddress(unsigned int i2c_addr
)
172 writel(i2c_addr
, &i2c_regs_p
->ic_tar
);
176 * i2c_flush_rxfifo - Flushes the i2c RX FIFO
178 * Flushes the i2c RX FIFO
180 static void i2c_flush_rxfifo(void)
182 while (readl(&i2c_regs_p
->ic_status
) & IC_STATUS_RFNE
)
183 readl(&i2c_regs_p
->ic_cmd_data
);
187 * i2c_wait_for_bb - Waits for bus busy
191 static int i2c_wait_for_bb(void)
193 unsigned long start_time_bb
= get_timer(0);
195 while ((readl(&i2c_regs_p
->ic_status
) & IC_STATUS_MA
) ||
196 !(readl(&i2c_regs_p
->ic_status
) & IC_STATUS_TFE
)) {
198 /* Evaluate timeout */
199 if (get_timer(start_time_bb
) > (unsigned long)(I2C_BYTE_TO_BB
))
206 /* check parameters for i2c_read and i2c_write */
207 static int check_params(uint addr
, int alen
, uchar
*buffer
, int len
)
209 if (buffer
== NULL
) {
210 printf("Buffer is invalid\n");
215 printf("addr len %d not supported\n", alen
);
219 if (addr
+ len
> 256) {
220 printf("address out of range\n");
227 static int i2c_xfer_init(uchar chip
, uint addr
)
229 if (i2c_wait_for_bb())
232 i2c_setaddress(chip
);
233 writel(addr
, &i2c_regs_p
->ic_cmd_data
);
238 static int i2c_xfer_finish(void)
240 ulong start_stop_det
= get_timer(0);
243 if ((readl(&i2c_regs_p
->ic_raw_intr_stat
) & IC_STOP_DET
)) {
244 readl(&i2c_regs_p
->ic_clr_stop_det
);
246 } else if (get_timer(start_stop_det
) > I2C_STOPDET_TO
) {
251 if (i2c_wait_for_bb()) {
252 printf("Timed out waiting for bus\n");
258 /* Wait for read/write operation to complete on actual memory */
265 * i2c_read - Read from i2c memory
266 * @chip: target i2c address
267 * @addr: address to read from
269 * @buffer: buffer for read data
270 * @len: no of bytes to be read
272 * Read from i2c memory.
274 int i2c_read(uchar chip
, uint addr
, int alen
, uchar
*buffer
, int len
)
276 unsigned long start_time_rx
;
278 if (check_params(addr
, alen
, buffer
, len
))
281 if (i2c_xfer_init(chip
, addr
))
284 start_time_rx
= get_timer(0);
286 writel(IC_CMD
, &i2c_regs_p
->ic_cmd_data
);
288 if (readl(&i2c_regs_p
->ic_status
) & IC_STATUS_RFNE
) {
289 *buffer
++ = (uchar
)readl(&i2c_regs_p
->ic_cmd_data
);
291 start_time_rx
= get_timer(0);
293 } else if (get_timer(start_time_rx
) > I2C_BYTE_TO
) {
298 return i2c_xfer_finish();
302 * i2c_write - Write to i2c memory
303 * @chip: target i2c address
304 * @addr: address to read from
306 * @buffer: buffer for read data
307 * @len: no of bytes to be read
309 * Write to i2c memory.
311 int i2c_write(uchar chip
, uint addr
, int alen
, uchar
*buffer
, int len
)
314 unsigned long start_time_tx
;
316 if (check_params(addr
, alen
, buffer
, len
))
319 if (i2c_xfer_init(chip
, addr
))
322 start_time_tx
= get_timer(0);
324 if (readl(&i2c_regs_p
->ic_status
) & IC_STATUS_TFNF
) {
325 writel(*buffer
, &i2c_regs_p
->ic_cmd_data
);
328 start_time_tx
= get_timer(0);
330 } else if (get_timer(start_time_tx
) > (nb
* I2C_BYTE_TO
)) {
331 printf("Timed out. i2c write Failed\n");
336 return i2c_xfer_finish();
340 * i2c_probe - Probe the i2c chip
342 int i2c_probe(uchar chip
)
348 * Try to read the first location of the chip.
350 ret
= i2c_read(chip
, 0, 1, (uchar
*)&tmp
, 1);
352 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
357 #ifdef CONFIG_I2C_MULTI_BUS
358 int i2c_set_bus_num(unsigned int bus
)
362 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE
;
364 #ifdef CONFIG_SYS_I2C_BASE1
366 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE1
;
369 #ifdef CONFIG_SYS_I2C_BASE2
371 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE2
;
374 #ifdef CONFIG_SYS_I2C_BASE3
376 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE3
;
379 #ifdef CONFIG_SYS_I2C_BASE4
381 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE4
;
384 #ifdef CONFIG_SYS_I2C_BASE5
386 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE5
;
389 #ifdef CONFIG_SYS_I2C_BASE6
391 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE6
;
394 #ifdef CONFIG_SYS_I2C_BASE7
396 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE7
;
399 #ifdef CONFIG_SYS_I2C_BASE8
401 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE8
;
404 #ifdef CONFIG_SYS_I2C_BASE9
406 i2c_regs_p
= (void *)CONFIG_SYS_I2C_BASE9
;
410 printf("Bad bus: %d\n", bus
);
416 if (!bus_initialized
[current_bus
])
417 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
422 int i2c_get_bus_num(void)