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designware_i2c.c: Added the support for MULTI_BUS
[people/ms/u-boot.git] / drivers / i2c / designware_i2c.c
1 /*
2 * (C) Copyright 2009
3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include <common.h>
25 #include <asm/io.h>
26 #include <asm/arch/hardware.h>
27 #include "designware_i2c.h"
28
29 #ifdef CONFIG_I2C_MULTI_BUS
30 static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
31 static unsigned int current_bus = 0;
32 #endif
33
34 static struct i2c_regs *i2c_regs_p =
35 (struct i2c_regs *)CONFIG_SYS_I2C_BASE;
36
37 /*
38 * set_speed - Set the i2c speed mode (standard, high, fast)
39 * @i2c_spd: required i2c speed mode
40 *
41 * Set the i2c speed mode (standard, high, fast)
42 */
43 static void set_speed(int i2c_spd)
44 {
45 unsigned int cntl;
46 unsigned int hcnt, lcnt;
47 unsigned int high, low;
48 unsigned int enbl;
49
50 /* to set speed cltr must be disabled */
51 enbl = readl(&i2c_regs_p->ic_enable);
52 enbl &= ~IC_ENABLE_0B;
53 writel(enbl, &i2c_regs_p->ic_enable);
54
55
56 cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK));
57
58 switch (i2c_spd) {
59 case IC_SPEED_MODE_MAX:
60 cntl |= IC_CON_SPD_HS;
61 high = MIN_HS_SCL_HIGHTIME;
62 low = MIN_HS_SCL_LOWTIME;
63 break;
64
65 case IC_SPEED_MODE_STANDARD:
66 cntl |= IC_CON_SPD_SS;
67 high = MIN_SS_SCL_HIGHTIME;
68 low = MIN_SS_SCL_LOWTIME;
69 break;
70
71 case IC_SPEED_MODE_FAST:
72 default:
73 cntl |= IC_CON_SPD_FS;
74 high = MIN_FS_SCL_HIGHTIME;
75 low = MIN_FS_SCL_LOWTIME;
76 break;
77 }
78
79 writel(cntl, &i2c_regs_p->ic_con);
80
81 hcnt = (IC_CLK * high) / NANO_TO_MICRO;
82 writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt);
83
84 lcnt = (IC_CLK * low) / NANO_TO_MICRO;
85 writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt);
86
87 /* re-enable i2c ctrl back now that speed is set */
88 enbl |= IC_ENABLE_0B;
89 writel(enbl, &i2c_regs_p->ic_enable);
90 }
91
92 /*
93 * i2c_set_bus_speed - Set the i2c speed
94 * @speed: required i2c speed
95 *
96 * Set the i2c speed.
97 */
98 int i2c_set_bus_speed(int speed)
99 {
100 if (speed >= I2C_MAX_SPEED)
101 set_speed(IC_SPEED_MODE_MAX);
102 else if (speed >= I2C_FAST_SPEED)
103 set_speed(IC_SPEED_MODE_FAST);
104 else
105 set_speed(IC_SPEED_MODE_STANDARD);
106
107 return 0;
108 }
109
110 /*
111 * i2c_get_bus_speed - Gets the i2c speed
112 *
113 * Gets the i2c speed.
114 */
115 int i2c_get_bus_speed(void)
116 {
117 u32 cntl;
118
119 cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK);
120
121 if (cntl == IC_CON_SPD_HS)
122 return I2C_MAX_SPEED;
123 else if (cntl == IC_CON_SPD_FS)
124 return I2C_FAST_SPEED;
125 else if (cntl == IC_CON_SPD_SS)
126 return I2C_STANDARD_SPEED;
127
128 return 0;
129 }
130
131 /*
132 * i2c_init - Init function
133 * @speed: required i2c speed
134 * @slaveadd: slave address for the device
135 *
136 * Initialization function.
137 */
138 void i2c_init(int speed, int slaveadd)
139 {
140 unsigned int enbl;
141
142 /* Disable i2c */
143 enbl = readl(&i2c_regs_p->ic_enable);
144 enbl &= ~IC_ENABLE_0B;
145 writel(enbl, &i2c_regs_p->ic_enable);
146
147 writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con);
148 writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl);
149 writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl);
150 i2c_set_bus_speed(speed);
151 writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask);
152 writel(slaveadd, &i2c_regs_p->ic_sar);
153
154 /* Enable i2c */
155 enbl = readl(&i2c_regs_p->ic_enable);
156 enbl |= IC_ENABLE_0B;
157 writel(enbl, &i2c_regs_p->ic_enable);
158
159 #ifdef CONFIG_I2C_MULTI_BUS
160 bus_initialized[current_bus] = 1;
161 #endif
162 }
163
164 /*
165 * i2c_setaddress - Sets the target slave address
166 * @i2c_addr: target i2c address
167 *
168 * Sets the target slave address.
169 */
170 static void i2c_setaddress(unsigned int i2c_addr)
171 {
172 writel(i2c_addr, &i2c_regs_p->ic_tar);
173 }
174
175 /*
176 * i2c_flush_rxfifo - Flushes the i2c RX FIFO
177 *
178 * Flushes the i2c RX FIFO
179 */
180 static void i2c_flush_rxfifo(void)
181 {
182 while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE)
183 readl(&i2c_regs_p->ic_cmd_data);
184 }
185
186 /*
187 * i2c_wait_for_bb - Waits for bus busy
188 *
189 * Waits for bus busy
190 */
191 static int i2c_wait_for_bb(void)
192 {
193 unsigned long start_time_bb = get_timer(0);
194
195 while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) ||
196 !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) {
197
198 /* Evaluate timeout */
199 if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
200 return 1;
201 }
202
203 return 0;
204 }
205
206 /* check parameters for i2c_read and i2c_write */
207 static int check_params(uint addr, int alen, uchar *buffer, int len)
208 {
209 if (buffer == NULL) {
210 printf("Buffer is invalid\n");
211 return 1;
212 }
213
214 if (alen > 1) {
215 printf("addr len %d not supported\n", alen);
216 return 1;
217 }
218
219 if (addr + len > 256) {
220 printf("address out of range\n");
221 return 1;
222 }
223
224 return 0;
225 }
226
227 static int i2c_xfer_init(uchar chip, uint addr)
228 {
229 if (i2c_wait_for_bb())
230 return 1;
231
232 i2c_setaddress(chip);
233 writel(addr, &i2c_regs_p->ic_cmd_data);
234
235 return 0;
236 }
237
238 static int i2c_xfer_finish(void)
239 {
240 ulong start_stop_det = get_timer(0);
241
242 while (1) {
243 if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) {
244 readl(&i2c_regs_p->ic_clr_stop_det);
245 break;
246 } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
247 break;
248 }
249 }
250
251 if (i2c_wait_for_bb()) {
252 printf("Timed out waiting for bus\n");
253 return 1;
254 }
255
256 i2c_flush_rxfifo();
257
258 /* Wait for read/write operation to complete on actual memory */
259 udelay(10000);
260
261 return 0;
262 }
263
264 /*
265 * i2c_read - Read from i2c memory
266 * @chip: target i2c address
267 * @addr: address to read from
268 * @alen:
269 * @buffer: buffer for read data
270 * @len: no of bytes to be read
271 *
272 * Read from i2c memory.
273 */
274 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
275 {
276 unsigned long start_time_rx;
277
278 if (check_params(addr, alen, buffer, len))
279 return 1;
280
281 if (i2c_xfer_init(chip, addr))
282 return 1;
283
284 start_time_rx = get_timer(0);
285 while (len) {
286 writel(IC_CMD, &i2c_regs_p->ic_cmd_data);
287
288 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) {
289 *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data);
290 len--;
291 start_time_rx = get_timer(0);
292
293 } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
294 return 1;
295 }
296 }
297
298 return i2c_xfer_finish();
299 }
300
301 /*
302 * i2c_write - Write to i2c memory
303 * @chip: target i2c address
304 * @addr: address to read from
305 * @alen:
306 * @buffer: buffer for read data
307 * @len: no of bytes to be read
308 *
309 * Write to i2c memory.
310 */
311 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
312 {
313 int nb = len;
314 unsigned long start_time_tx;
315
316 if (check_params(addr, alen, buffer, len))
317 return 1;
318
319 if (i2c_xfer_init(chip, addr))
320 return 1;
321
322 start_time_tx = get_timer(0);
323 while (len) {
324 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) {
325 writel(*buffer, &i2c_regs_p->ic_cmd_data);
326 buffer++;
327 len--;
328 start_time_tx = get_timer(0);
329
330 } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
331 printf("Timed out. i2c write Failed\n");
332 return 1;
333 }
334 }
335
336 return i2c_xfer_finish();
337 }
338
339 /*
340 * i2c_probe - Probe the i2c chip
341 */
342 int i2c_probe(uchar chip)
343 {
344 u32 tmp;
345 int ret;
346
347 /*
348 * Try to read the first location of the chip.
349 */
350 ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
351 if (ret)
352 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
353
354 return ret;
355 }
356
357 #ifdef CONFIG_I2C_MULTI_BUS
358 int i2c_set_bus_num(unsigned int bus)
359 {
360 switch (bus) {
361 case 0:
362 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
363 break;
364 #ifdef CONFIG_SYS_I2C_BASE1
365 case 1:
366 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
367 break;
368 #endif
369 #ifdef CONFIG_SYS_I2C_BASE2
370 case 2:
371 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
372 break;
373 #endif
374 #ifdef CONFIG_SYS_I2C_BASE3
375 case 3:
376 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
377 break;
378 #endif
379 #ifdef CONFIG_SYS_I2C_BASE4
380 case 4:
381 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
382 break;
383 #endif
384 #ifdef CONFIG_SYS_I2C_BASE5
385 case 5:
386 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
387 break;
388 #endif
389 #ifdef CONFIG_SYS_I2C_BASE6
390 case 6:
391 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
392 break;
393 #endif
394 #ifdef CONFIG_SYS_I2C_BASE7
395 case 7:
396 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
397 break;
398 #endif
399 #ifdef CONFIG_SYS_I2C_BASE8
400 case 8:
401 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
402 break;
403 #endif
404 #ifdef CONFIG_SYS_I2C_BASE9
405 case 9:
406 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
407 break;
408 #endif
409 default:
410 printf("Bad bus: %d\n", bus);
411 return -1;
412 }
413
414 current_bus = bus;
415
416 if (!bus_initialized[current_bus])
417 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
418
419 return 0;
420 }
421
422 int i2c_get_bus_num(void)
423 {
424 return current_bus;
425 }
426 #endif