2 * Copyright (C) 2014 Panasonic Corporation
3 * Copyright (C) 2015 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/types.h>
12 #include <asm/errno.h>
13 #include <dm/device.h>
19 DECLARE_GLOBAL_DATA_PTR
;
21 struct uniphier_i2c_regs
{
22 u32 dtrm
; /* data transmission */
23 #define I2C_DTRM_STA (1 << 10)
24 #define I2C_DTRM_STO (1 << 9)
25 #define I2C_DTRM_NACK (1 << 8)
26 #define I2C_DTRM_RD (1 << 0)
27 u32 drec
; /* data reception */
28 #define I2C_DREC_STS (1 << 12)
29 #define I2C_DREC_LRB (1 << 11)
30 #define I2C_DREC_LAB (1 << 9)
31 u32 myad
; /* slave address */
32 u32 clk
; /* clock frequency control */
33 u32 brst
; /* bus reset */
34 #define I2C_BRST_FOEN (1 << 1)
35 #define I2C_BRST_BRST (1 << 0)
36 u32 hold
; /* hold time control */
37 u32 bsts
; /* bus status monitor */
38 u32 noise
; /* noise filter control */
39 u32 setup
; /* setup time control */
42 #define IOBUS_FREQ 100000000
44 struct uniphier_i2c_dev
{
45 struct uniphier_i2c_regs __iomem
*regs
; /* register base */
46 unsigned long input_clk
; /* master clock (Hz) */
47 unsigned long wait_us
; /* wait for every byte transfer (us) */
50 static int uniphier_i2c_probe(struct udevice
*dev
)
54 struct uniphier_i2c_dev
*priv
= dev_get_priv(dev
);
56 addr
= fdtdec_get_addr_size(gd
->fdt_blob
, dev
->of_offset
, "reg", &size
);
58 priv
->regs
= map_sysmem(addr
, size
);
63 priv
->input_clk
= IOBUS_FREQ
;
66 writel(0x3, &priv
->regs
->brst
);
71 static int uniphier_i2c_remove(struct udevice
*dev
)
73 struct uniphier_i2c_dev
*priv
= dev_get_priv(dev
);
75 unmap_sysmem(priv
->regs
);
80 static int send_and_recv_byte(struct uniphier_i2c_dev
*dev
, u32 dtrm
)
82 writel(dtrm
, &dev
->regs
->dtrm
);
85 * This controller only provides interruption to inform the completion
86 * of each byte transfer. (No status register to poll it.)
87 * Unfortunately, U-Boot does not have a good support of interrupt.
92 return readl(&dev
->regs
->drec
);
95 static int send_byte(struct uniphier_i2c_dev
*dev
, u32 dtrm
, bool *stop
)
100 drec
= send_and_recv_byte(dev
, dtrm
);
102 if (drec
& I2C_DREC_LAB
) {
103 debug("uniphier_i2c: bus arbitration failed\n");
107 if (drec
& I2C_DREC_LRB
) {
108 debug("uniphier_i2c: slave did not return ACK\n");
114 static int uniphier_i2c_transmit(struct uniphier_i2c_dev
*dev
, uint addr
,
115 uint len
, const u8
*buf
, bool *stop
)
119 debug("%s: addr = %x, len = %d\n", __func__
, addr
, len
);
121 ret
= send_byte(dev
, I2C_DTRM_STA
| I2C_DTRM_NACK
| addr
<< 1, stop
);
126 ret
= send_byte(dev
, I2C_DTRM_NACK
| *buf
++, stop
);
133 writel(I2C_DTRM_STO
| I2C_DTRM_NACK
, &dev
->regs
->dtrm
);
138 static int uniphier_i2c_receive(struct uniphier_i2c_dev
*dev
, uint addr
,
139 uint len
, u8
*buf
, bool *stop
)
143 debug("%s: addr = %x, len = %d\n", __func__
, addr
, len
);
145 ret
= send_byte(dev
, I2C_DTRM_STA
| I2C_DTRM_NACK
|
146 I2C_DTRM_RD
| addr
<< 1, stop
);
151 *buf
++ = send_and_recv_byte(dev
, len
? 0 : I2C_DTRM_NACK
);
155 writel(I2C_DTRM_STO
| I2C_DTRM_NACK
, &dev
->regs
->dtrm
);
160 static int uniphier_i2c_xfer(struct udevice
*bus
, struct i2c_msg
*msg
,
164 struct uniphier_i2c_dev
*dev
= dev_get_priv(bus
);
167 for (; nmsgs
> 0; nmsgs
--, msg
++) {
168 /* If next message is read, skip the stop condition */
169 stop
= nmsgs
> 1 && msg
[1].flags
& I2C_M_RD
? false : true;
171 if (msg
->flags
& I2C_M_RD
)
172 ret
= uniphier_i2c_receive(dev
, msg
->addr
, msg
->len
,
175 ret
= uniphier_i2c_transmit(dev
, msg
->addr
, msg
->len
,
185 static int uniphier_i2c_set_bus_speed(struct udevice
*bus
, unsigned int speed
)
187 struct uniphier_i2c_dev
*priv
= dev_get_priv(bus
);
189 /* max supported frequency is 400 kHz */
193 /* bus reset: make sure the bus is idle when change the frequency */
194 writel(0x1, &priv
->regs
->brst
);
196 writel((priv
->input_clk
/ speed
/ 2 << 16) | (priv
->input_clk
/ speed
),
199 writel(0x3, &priv
->regs
->brst
);
202 * Theoretically, each byte can be transferred in
203 * 1000000 * 9 / speed usec. For safety, wait more than double.
205 priv
->wait_us
= 20000000 / speed
;
211 static const struct dm_i2c_ops uniphier_i2c_ops
= {
212 .xfer
= uniphier_i2c_xfer
,
213 .set_bus_speed
= uniphier_i2c_set_bus_speed
,
216 static const struct udevice_id uniphier_i2c_of_match
[] = {
217 { .compatible
= "socionext,uniphier-i2c" },
221 U_BOOT_DRIVER(uniphier_i2c
) = {
222 .name
= "uniphier-i2c",
224 .of_match
= uniphier_i2c_of_match
,
225 .probe
= uniphier_i2c_probe
,
226 .remove
= uniphier_i2c_remove
,
227 .priv_auto_alloc_size
= sizeof(struct uniphier_i2c_dev
),
228 .ops
= &uniphier_i2c_ops
,