2 * Copyright (c) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
5 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/pch.h>
14 int intel_i2c_xfer(struct udevice
*bus
, struct i2c_msg
*msg
, int nmsgs
)
19 int intel_i2c_probe_chip(struct udevice
*bus
, uint chip_addr
, uint chip_flags
)
24 int intel_i2c_set_bus_speed(struct udevice
*bus
, unsigned int speed
)
29 static int intel_i2c_probe(struct udevice
*dev
)
32 * So far this is just setup code for ivybridge SMbus. When we have
33 * a full I2C driver this may need to be moved, generalised or made
34 * dependant on a particular compatible string.
38 dm_pci_write_config32(dev
, SMB_BASE
,
39 SMBUS_IO_BASE
| PCI_BASE_ADDRESS_SPACE_IO
);
41 /* Set SMBus enable. */
42 dm_pci_write_config8(dev
, HOSTC
, HST_EN
);
44 /* Set SMBus I/O space enable. */
45 dm_pci_write_config16(dev
, PCI_COMMAND
, PCI_COMMAND_IO
);
47 /* Disable interrupt generation. */
48 outb(0, SMBUS_IO_BASE
+ SMBHSTCTL
);
50 /* Clear any lingering errors, so transactions can run. */
51 outb(inb(SMBUS_IO_BASE
+ SMBHSTSTAT
), SMBUS_IO_BASE
+ SMBHSTSTAT
);
52 debug("SMBus controller enabled\n");
57 static const struct dm_i2c_ops intel_i2c_ops
= {
58 .xfer
= intel_i2c_xfer
,
59 .probe_chip
= intel_i2c_probe_chip
,
60 .set_bus_speed
= intel_i2c_set_bus_speed
,
63 static const struct udevice_id intel_i2c_ids
[] = {
64 { .compatible
= "intel,ich-i2c" },
68 U_BOOT_DRIVER(intel_i2c
) = {
71 .of_match
= intel_i2c_ids
,
72 .per_child_auto_alloc_size
= sizeof(struct dm_i2c_chip
),
73 .ops
= &intel_i2c_ops
,
74 .probe
= intel_i2c_probe
,