3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
8 * (C) Copyright 2003 Pengutronix e.K.
9 * Robert Schwebel <r.schwebel@pengutronix.de>
11 * (C) Copyright 2011 Marvell Inc.
12 * Lei Wen <leiwen@marvell.com>
14 * SPDX-License-Identifier: GPL-2.0+
16 * Back ported to the 8xx platform (from the 8260 platform) by
17 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
26 /* All transfers are described by this data structure */
34 #ifdef CONFIG_ARMADA_3700
35 /* Armada 3700 has no padding between the registers */
58 * Dummy implementation that can be overwritten by a board
61 __weak
void i2c_clk_enable(void)
66 * i2c_reset: - reset the host controller
69 static void i2c_reset(struct mv_i2c
*base
)
73 /* Save bus mode (standard or fast speed) for later use */
74 icr_mode
= readl(&base
->icr
) & ICR_MODE_MASK
;
75 writel(readl(&base
->icr
) & ~ICR_IUE
, &base
->icr
); /* disable unit */
76 writel(readl(&base
->icr
) | ICR_UR
, &base
->icr
); /* reset the unit */
78 writel(readl(&base
->icr
) & ~ICR_IUE
, &base
->icr
); /* disable unit */
82 writel(CONFIG_SYS_I2C_SLAVE
, &base
->isar
); /* set our slave address */
83 /* set control reg values */
84 writel(I2C_ICR_INIT
| icr_mode
, &base
->icr
);
85 writel(I2C_ISR_INIT
, &base
->isr
); /* set clear interrupt bits */
86 writel(readl(&base
->icr
) | ICR_IUE
, &base
->icr
); /* enable unit */
91 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
94 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
96 static int i2c_isr_set_cleared(struct mv_i2c
*base
, unsigned long set_mask
,
97 unsigned long cleared_mask
)
99 int timeout
= 1000, isr
;
102 isr
= readl(&base
->isr
);
106 } while (((isr
& set_mask
) != set_mask
)
107 || ((isr
& cleared_mask
) != 0));
113 * i2c_transfer: - Transfer one byte over the i2c bus
115 * This function can tranfer a byte over the i2c bus in both directions.
116 * It is used by the public API functions.
118 * @return: 0: transfer successful
119 * -1: message is empty
120 * -2: transmit timeout
122 * -4: receive timeout
123 * -5: illegal parameters
124 * -6: bus is busy and couldn't be aquired
126 static int i2c_transfer(struct mv_i2c
*base
, struct mv_i2c_msg
*msg
)
131 goto transfer_error_msg_empty
;
133 switch (msg
->direction
) {
135 /* check if bus is not busy */
136 if (!i2c_isr_set_cleared(base
, 0, ISR_IBB
))
137 goto transfer_error_bus_busy
;
139 /* start transmission */
140 writel(readl(&base
->icr
) & ~ICR_START
, &base
->icr
);
141 writel(readl(&base
->icr
) & ~ICR_STOP
, &base
->icr
);
142 writel(msg
->data
, &base
->idbr
);
143 if (msg
->condition
== I2C_COND_START
)
144 writel(readl(&base
->icr
) | ICR_START
, &base
->icr
);
145 if (msg
->condition
== I2C_COND_STOP
)
146 writel(readl(&base
->icr
) | ICR_STOP
, &base
->icr
);
147 if (msg
->acknack
== I2C_ACKNAK_SENDNAK
)
148 writel(readl(&base
->icr
) | ICR_ACKNAK
, &base
->icr
);
149 if (msg
->acknack
== I2C_ACKNAK_SENDACK
)
150 writel(readl(&base
->icr
) & ~ICR_ACKNAK
, &base
->icr
);
151 writel(readl(&base
->icr
) & ~ICR_ALDIE
, &base
->icr
);
152 writel(readl(&base
->icr
) | ICR_TB
, &base
->icr
);
154 /* transmit register empty? */
155 if (!i2c_isr_set_cleared(base
, ISR_ITE
, 0))
156 goto transfer_error_transmit_timeout
;
158 /* clear 'transmit empty' state */
159 writel(readl(&base
->isr
) | ISR_ITE
, &base
->isr
);
161 /* wait for ACK from slave */
162 if (msg
->acknack
== I2C_ACKNAK_WAITACK
)
163 if (!i2c_isr_set_cleared(base
, 0, ISR_ACKNAK
))
164 goto transfer_error_ack_missing
;
169 /* check if bus is not busy */
170 if (!i2c_isr_set_cleared(base
, 0, ISR_IBB
))
171 goto transfer_error_bus_busy
;
174 writel(readl(&base
->icr
) & ~ICR_START
, &base
->icr
);
175 writel(readl(&base
->icr
) & ~ICR_STOP
, &base
->icr
);
176 if (msg
->condition
== I2C_COND_START
)
177 writel(readl(&base
->icr
) | ICR_START
, &base
->icr
);
178 if (msg
->condition
== I2C_COND_STOP
)
179 writel(readl(&base
->icr
) | ICR_STOP
, &base
->icr
);
180 if (msg
->acknack
== I2C_ACKNAK_SENDNAK
)
181 writel(readl(&base
->icr
) | ICR_ACKNAK
, &base
->icr
);
182 if (msg
->acknack
== I2C_ACKNAK_SENDACK
)
183 writel(readl(&base
->icr
) & ~ICR_ACKNAK
, &base
->icr
);
184 writel(readl(&base
->icr
) & ~ICR_ALDIE
, &base
->icr
);
185 writel(readl(&base
->icr
) | ICR_TB
, &base
->icr
);
187 /* receive register full? */
188 if (!i2c_isr_set_cleared(base
, ISR_IRF
, 0))
189 goto transfer_error_receive_timeout
;
191 msg
->data
= readl(&base
->idbr
);
193 /* clear 'receive empty' state */
194 writel(readl(&base
->isr
) | ISR_IRF
, &base
->isr
);
197 goto transfer_error_illegal_param
;
202 transfer_error_msg_empty
:
203 debug("i2c_transfer: error: 'msg' is empty\n");
205 goto i2c_transfer_finish
;
207 transfer_error_transmit_timeout
:
208 debug("i2c_transfer: error: transmit timeout\n");
210 goto i2c_transfer_finish
;
212 transfer_error_ack_missing
:
213 debug("i2c_transfer: error: ACK missing\n");
215 goto i2c_transfer_finish
;
217 transfer_error_receive_timeout
:
218 debug("i2c_transfer: error: receive timeout\n");
220 goto i2c_transfer_finish
;
222 transfer_error_illegal_param
:
223 debug("i2c_transfer: error: illegal parameters\n");
225 goto i2c_transfer_finish
;
227 transfer_error_bus_busy
:
228 debug("i2c_transfer: error: bus is busy\n");
230 goto i2c_transfer_finish
;
233 debug("i2c_transfer: ISR: 0x%04x\n", readl(&base
->isr
));
238 static int __i2c_read(struct mv_i2c
*base
, uchar chip
, u8
*addr
, int alen
,
239 uchar
*buffer
, int len
)
241 struct mv_i2c_msg msg
;
243 debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
244 "len=0x%02x)\n", chip
, *addr
, alen
, len
);
247 printf("reading zero byte is invalid\n");
253 /* dummy chip address write */
254 debug("i2c_read: dummy chip address write\n");
255 msg
.condition
= I2C_COND_START
;
256 msg
.acknack
= I2C_ACKNAK_WAITACK
;
257 msg
.direction
= I2C_WRITE
;
258 msg
.data
= (chip
<< 1);
260 if (i2c_transfer(base
, &msg
))
264 * send memory address bytes;
265 * alen defines how much bytes we have to send.
267 while (--alen
>= 0) {
268 debug("i2c_read: send address byte %02x (alen=%d)\n",
270 msg
.condition
= I2C_COND_NORMAL
;
271 msg
.acknack
= I2C_ACKNAK_WAITACK
;
272 msg
.direction
= I2C_WRITE
;
273 msg
.data
= addr
[alen
];
274 if (i2c_transfer(base
, &msg
))
278 /* start read sequence */
279 debug("i2c_read: start read sequence\n");
280 msg
.condition
= I2C_COND_START
;
281 msg
.acknack
= I2C_ACKNAK_WAITACK
;
282 msg
.direction
= I2C_WRITE
;
283 msg
.data
= (chip
<< 1);
285 if (i2c_transfer(base
, &msg
))
288 /* read bytes; send NACK at last byte */
291 msg
.condition
= I2C_COND_STOP
;
292 msg
.acknack
= I2C_ACKNAK_SENDNAK
;
294 msg
.condition
= I2C_COND_NORMAL
;
295 msg
.acknack
= I2C_ACKNAK_SENDACK
;
298 msg
.direction
= I2C_READ
;
300 if (i2c_transfer(base
, &msg
))
304 debug("i2c_read: reading byte (%p)=0x%02x\n",
314 static int __i2c_write(struct mv_i2c
*base
, uchar chip
, u8
*addr
, int alen
,
315 uchar
*buffer
, int len
)
317 struct mv_i2c_msg msg
;
319 debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
320 "len=0x%02x)\n", chip
, *addr
, alen
, len
);
324 /* chip address write */
325 debug("i2c_write: chip address write\n");
326 msg
.condition
= I2C_COND_START
;
327 msg
.acknack
= I2C_ACKNAK_WAITACK
;
328 msg
.direction
= I2C_WRITE
;
329 msg
.data
= (chip
<< 1);
331 if (i2c_transfer(base
, &msg
))
335 * send memory address bytes;
336 * alen defines how much bytes we have to send.
338 while (--alen
>= 0) {
339 debug("i2c_read: send address byte %02x (alen=%d)\n",
341 msg
.condition
= I2C_COND_NORMAL
;
342 msg
.acknack
= I2C_ACKNAK_WAITACK
;
343 msg
.direction
= I2C_WRITE
;
344 msg
.data
= addr
[alen
];
345 if (i2c_transfer(base
, &msg
))
349 /* write bytes; send NACK at last byte */
351 debug("i2c_write: writing byte (%p)=0x%02x\n",
355 msg
.condition
= I2C_COND_STOP
;
357 msg
.condition
= I2C_COND_NORMAL
;
359 msg
.acknack
= I2C_ACKNAK_WAITACK
;
360 msg
.direction
= I2C_WRITE
;
361 msg
.data
= *(buffer
++);
363 if (i2c_transfer(base
, &msg
))
372 #ifndef CONFIG_DM_I2C
374 static struct mv_i2c
*base_glob
;
376 static void i2c_board_init(struct mv_i2c
*base
)
378 #ifdef CONFIG_SYS_I2C_INIT_BOARD
381 * call board specific i2c bus reset routine before accessing the
382 * environment, which might be in a chip on that bus. For details
383 * about this problem see doc/I2C_Edge_Conditions.
385 * disable I2C controller first, otherwhise it thinks we want to
386 * talk to the slave port...
388 icr
= readl(&base
->icr
);
389 writel(readl(&base
->icr
) & ~(ICR_SCLE
| ICR_IUE
), &base
->icr
);
393 writel(icr
, &base
->icr
);
397 #ifdef CONFIG_I2C_MULTI_BUS
398 static unsigned long i2c_regs
[CONFIG_MV_I2C_NUM
] = CONFIG_MV_I2C_REG
;
399 static unsigned int bus_initialized
[CONFIG_MV_I2C_NUM
];
400 static unsigned int current_bus
;
402 int i2c_set_bus_num(unsigned int bus
)
404 if ((bus
< 0) || (bus
>= CONFIG_MV_I2C_NUM
)) {
405 printf("Bad bus: %d\n", bus
);
409 base_glob
= (struct mv_i2c
*)i2c_regs
[bus
];
412 if (!bus_initialized
[current_bus
]) {
413 i2c_board_init(base_glob
);
414 bus_initialized
[current_bus
] = 1;
420 unsigned int i2c_get_bus_num(void)
427 void i2c_init(int speed
, int slaveaddr
)
431 #ifdef CONFIG_I2C_MULTI_BUS
433 base_glob
= (struct mv_i2c
*)i2c_regs
[current_bus
];
435 base_glob
= (struct mv_i2c
*)CONFIG_MV_I2C_REG
;
442 clrsetbits_le32(&base_glob
->icr
, ICR_MODE_MASK
, val
);
444 i2c_board_init(base_glob
);
447 static int __i2c_probe_chip(struct mv_i2c
*base
, uchar chip
)
449 struct mv_i2c_msg msg
;
453 msg
.condition
= I2C_COND_START
;
454 msg
.acknack
= I2C_ACKNAK_WAITACK
;
455 msg
.direction
= I2C_WRITE
;
456 msg
.data
= (chip
<< 1) + 1;
457 if (i2c_transfer(base
, &msg
))
460 msg
.condition
= I2C_COND_STOP
;
461 msg
.acknack
= I2C_ACKNAK_SENDNAK
;
462 msg
.direction
= I2C_READ
;
464 if (i2c_transfer(base
, &msg
))
471 * i2c_probe: - Test if a chip answers for a given i2c address
473 * @chip: address of the chip which is searched for
474 * @return: 0 if a chip was found, -1 otherwhise
476 int i2c_probe(uchar chip
)
478 return __i2c_probe_chip(base_glob
, chip
);
482 * i2c_read: - Read multiple bytes from an i2c device
484 * The higher level routines take into account that this function is only
485 * called with len < page length of the device (see configuration file)
487 * @chip: address of the chip which is to be read
488 * @addr: i2c data address within the chip
489 * @alen: length of the i2c data address (1..2 bytes)
490 * @buffer: where to write the data
491 * @len: how much byte do we want to read
492 * @return: 0 in case of success
494 int i2c_read(uchar chip
, uint addr
, int alen
, uchar
*buffer
, int len
)
498 addr_bytes
[0] = (addr
>> 0) & 0xFF;
499 addr_bytes
[1] = (addr
>> 8) & 0xFF;
500 addr_bytes
[2] = (addr
>> 16) & 0xFF;
501 addr_bytes
[3] = (addr
>> 24) & 0xFF;
503 return __i2c_read(base_glob
, chip
, addr_bytes
, alen
, buffer
, len
);
507 * i2c_write: - Write multiple bytes to an i2c device
509 * The higher level routines take into account that this function is only
510 * called with len < page length of the device (see configuration file)
512 * @chip: address of the chip which is to be written
513 * @addr: i2c data address within the chip
514 * @alen: length of the i2c data address (1..2 bytes)
515 * @buffer: where to find the data to be written
516 * @len: how much byte do we want to read
517 * @return: 0 in case of success
519 int i2c_write(uchar chip
, uint addr
, int alen
, uchar
*buffer
, int len
)
523 addr_bytes
[0] = (addr
>> 0) & 0xFF;
524 addr_bytes
[1] = (addr
>> 8) & 0xFF;
525 addr_bytes
[2] = (addr
>> 16) & 0xFF;
526 addr_bytes
[3] = (addr
>> 24) & 0xFF;
528 return __i2c_write(base_glob
, chip
, addr_bytes
, alen
, buffer
, len
);
531 #else /* CONFIG_DM_I2C */
537 static int mv_i2c_xfer(struct udevice
*bus
, struct i2c_msg
*msg
, int nmsgs
)
539 struct mv_i2c_priv
*i2c
= dev_get_priv(bus
);
540 struct i2c_msg
*dmsg
, *omsg
, dummy
;
542 memset(&dummy
, 0, sizeof(struct i2c_msg
));
545 * We expect either two messages (one with an offset and one with the
546 * actual data) or one message (just data or offset/data combined)
548 if (nmsgs
> 2 || nmsgs
== 0) {
549 debug("%s: Only one or two messages are supported.", __func__
);
553 omsg
= nmsgs
== 1 ? &dummy
: msg
;
554 dmsg
= nmsgs
== 1 ? msg
: msg
+ 1;
556 if (dmsg
->flags
& I2C_M_RD
)
557 return __i2c_read(i2c
->base
, dmsg
->addr
, omsg
->buf
,
558 omsg
->len
, dmsg
->buf
, dmsg
->len
);
560 return __i2c_write(i2c
->base
, dmsg
->addr
, omsg
->buf
,
561 omsg
->len
, dmsg
->buf
, dmsg
->len
);
564 static int mv_i2c_set_bus_speed(struct udevice
*bus
, unsigned int speed
)
566 struct mv_i2c_priv
*priv
= dev_get_priv(bus
);
573 clrsetbits_le32(&priv
->base
->icr
, ICR_MODE_MASK
, val
);
578 static int mv_i2c_probe(struct udevice
*bus
)
580 struct mv_i2c_priv
*priv
= dev_get_priv(bus
);
582 priv
->base
= (void *)devfdt_get_addr_ptr(bus
);
587 static const struct dm_i2c_ops mv_i2c_ops
= {
589 .set_bus_speed
= mv_i2c_set_bus_speed
,
592 static const struct udevice_id mv_i2c_ids
[] = {
593 { .compatible
= "marvell,armada-3700-i2c" },
597 U_BOOT_DRIVER(i2c_mv
) = {
600 .of_match
= mv_i2c_ids
,
601 .probe
= mv_i2c_probe
,
602 .priv_auto_alloc_size
= sizeof(struct mv_i2c_priv
),
605 #endif /* CONFIG_DM_I2C */