drivers/i2c/mvtwsi.c

   1 /*
   2  * Driver for the TWSI (i2c) controller found on the Marvell
   3  * orion5x and kirkwood SoC families.
   4  *
   5  * Author: Albert Aribaud <albert.u.boot@aribaud.net>
   6  * Copyright (c) 2010 Albert Aribaud.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <i2c.h>
  13 #include <asm/errno.h>
  14 #include <asm/io.h>
  15
  16 /*
  17  * include a file that will provide CONFIG_I2C_MVTWSI_BASE
  18  * and possibly other settings
  19  */
  20
  21 #if defined(CONFIG_ORION5X)
  22 #include <asm/arch/orion5x.h>
  23 #elif defined(CONFIG_KIRKWOOD)
  24 #include <asm/arch/kirkwood.h>
  25 #else
  26 #error Driver mvtwsi not supported by SoC or board
  27 #endif
  28
  29 /*
  30  * TWSI register structure
  31  */
  32
  33 struct  mvtwsi_registers {
  34         u32 slave_address;
  35         u32 data;
  36         u32 control;
  37         union {
  38                 u32 status;     /* when reading */
  39                 u32 baudrate;   /* when writing */
  40         };
  41         u32 xtnd_slave_addr;
  42         u32 reserved[2];
  43         u32 soft_reset;
  44 };
  45
  46 /*
  47  * Control register fields
  48  */
  49
  50 #define MVTWSI_CONTROL_ACK      0x00000004
  51 #define MVTWSI_CONTROL_IFLG     0x00000008
  52 #define MVTWSI_CONTROL_STOP     0x00000010
  53 #define MVTWSI_CONTROL_START    0x00000020
  54 #define MVTWSI_CONTROL_TWSIEN   0x00000040
  55 #define MVTWSI_CONTROL_INTEN    0x00000080
  56
  57 /*
  58  * Status register values -- only those expected in normal master
  59  * operation on non-10-bit-address devices; whatever status we don't
  60  * expect in nominal conditions (bus errors, arbitration losses,
  61  * missing ACKs...) we just pass back to the caller as an error
  62  * code.
  63  */
  64
  65 #define MVTWSI_STATUS_START             0x08
  66 #define MVTWSI_STATUS_REPEATED_START    0x10
  67 #define MVTWSI_STATUS_ADDR_W_ACK        0x18
  68 #define MVTWSI_STATUS_DATA_W_ACK        0x28
  69 #define MVTWSI_STATUS_ADDR_R_ACK        0x40
  70 #define MVTWSI_STATUS_ADDR_R_NAK        0x48
  71 #define MVTWSI_STATUS_DATA_R_ACK        0x50
  72 #define MVTWSI_STATUS_DATA_R_NAK        0x58
  73 #define MVTWSI_STATUS_IDLE              0xF8
  74
  75 /*
  76  * The single instance of the controller we'll be dealing with
  77  */
  78
  79 static struct  mvtwsi_registers *twsi =
  80         (struct  mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE;
  81
  82 /*
  83  * Returned statuses are 0 for success and nonzero otherwise.
  84  * Currently, cmd_i2c and cmd_eeprom do not interpret an error status.
  85  * Thus to ease debugging, the return status contains some debug info:
  86  * - bits 31..24 are error class: 1 is timeout, 2 is 'status mismatch'.
  87  * - bits 23..16 are the last value of the control register.
  88  * - bits 15..8 are the last value of the status register.
  89  * - bits 7..0 are the expected value of the status register.
  90  */
  91
  92 #define MVTWSI_ERROR_WRONG_STATUS       0x01
  93 #define MVTWSI_ERROR_TIMEOUT            0x02
  94
  95 #define MVTWSI_ERROR(ec, lc, ls, es) (((ec << 24) & 0xFF000000) | \
  96         ((lc << 16) & 0x00FF0000) | ((ls<<8) & 0x0000FF00) | (es & 0xFF))
  97
  98 /*
  99  * Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
 100  * return 0 (ok) or return 'wrong status'.
 101  */
 102 static int twsi_wait(int expected_status)
 103 {
 104         int control, status;
 105         int timeout = 1000;
 106
 107         do {
 108                 control = readl(&twsi->control);
 109                 if (control & MVTWSI_CONTROL_IFLG) {
 110                         status = readl(&twsi->status);
 111                         if (status == expected_status)
 112                                 return 0;
 113                         else
 114                                 return MVTWSI_ERROR(
 115                                         MVTWSI_ERROR_WRONG_STATUS,
 116                                         control, status, expected_status);
 117                 }
 118                 udelay(10); /* one clock cycle at 100 kHz */
 119         } while (timeout--);
 120         status = readl(&twsi->status);
 121         return MVTWSI_ERROR(
 122                 MVTWSI_ERROR_TIMEOUT, control, status, expected_status);
 123 }
 124
 125 /*
 126  * These flags are ORed to any write to the control register
 127  * They allow global setting of TWSIEN and ACK.
 128  * By default none are set.
 129  * twsi_start() sets TWSIEN (in case the controller was disabled)
 130  * twsi_recv() sets ACK or resets it depending on expected status.
 131  */
 132 static u8 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
 133
 134 /*
 135  * Assert the START condition, either in a single I2C transaction
 136  * or inside back-to-back ones (repeated starts).
 137  */
 138 static int twsi_start(int expected_status)
 139 {
 140         /* globally set TWSIEN in case it was not */
 141         twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
 142         /* assert START */
 143         writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
 144         /* wait for controller to process START */
 145         return twsi_wait(expected_status);
 146 }
 147
 148 /*
 149  * Send a byte (i2c address or data).
 150  */
 151 static int twsi_send(u8 byte, int expected_status)
 152 {
 153         /* put byte in data register for sending */
 154         writel(byte, &twsi->data);
 155         /* clear any pending interrupt -- that'll cause sending */
 156         writel(twsi_control_flags, &twsi->control);
 157         /* wait for controller to receive byte and check ACK */
 158         return twsi_wait(expected_status);
 159 }
 160
 161 /*
 162  * Receive a byte.
 163  * Global mvtwsi_control_flags variable says if we should ack or nak.
 164  */
 165 static int twsi_recv(u8 *byte)
 166 {
 167         int expected_status, status;
 168
 169         /* compute expected status based on ACK bit in global control flags */
 170         if (twsi_control_flags & MVTWSI_CONTROL_ACK)
 171                 expected_status = MVTWSI_STATUS_DATA_R_ACK;
 172         else
 173                 expected_status = MVTWSI_STATUS_DATA_R_NAK;
 174         /* acknowledge *previous state* and launch receive */
 175         writel(twsi_control_flags, &twsi->control);
 176         /* wait for controller to receive byte and assert ACK or NAK */
 177         status = twsi_wait(expected_status);
 178         /* if we did receive expected byte then store it */
 179         if (status == 0)
 180                 *byte = readl(&twsi->data);
 181         /* return status */
 182         return status;
 183 }
 184
 185 /*
 186  * Assert the STOP condition.
 187  * This is also used to force the bus back in idle (SDA=SCL=1).
 188  */
 189 static int twsi_stop(int status)
 190 {
 191         int control, stop_status;
 192         int timeout = 1000;
 193
 194         /* assert STOP */
 195         control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
 196         writel(control, &twsi->control);
 197         /* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
 198         do {
 199                 stop_status = readl(&twsi->status);
 200                 if (stop_status == MVTWSI_STATUS_IDLE)
 201                         break;
 202                 udelay(10); /* one clock cycle at 100 kHz */
 203         } while (timeout--);
 204         control = readl(&twsi->control);
 205         if (stop_status != MVTWSI_STATUS_IDLE)
 206                 if (status == 0)
 207                         status = MVTWSI_ERROR(
 208                                 MVTWSI_ERROR_TIMEOUT,
 209                                 control, status, MVTWSI_STATUS_IDLE);
 210         return status;
 211 }
 212
 213 /*
 214  * Ugly formula to convert m and n values to a frequency comes from
 215  * TWSI specifications
 216  */
 217
 218 #define TWSI_FREQUENCY(m, n) \
 219         (CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n)))
 220
 221 /*
 222  * These are required to be reprogrammed before enabling the controller
 223  * because a reset loses them.
 224  * Default values come from the spec, but a twsi_reset will change them.
 225  * twsi_slave_address left uninitialized lest checkpatch.pl complains.
 226  */
 227
 228 /* Baudrate generator: m (bits 6..3) = 8, n (bits 2..0) = 4 */
 229 static u8 twsi_baud_rate = 0x44; /* baudrate at controller reset */
 230 /* Default slave address is 0 (so is an uninitialized static) */
 231 static u8 twsi_slave_address;
 232
 233 /*
 234  * Reset controller.
 235  * Called at end of i2c_init unsuccessful i2c transactions.
 236  * Controller reset also resets the baud rate and slave address, so
 237  * re-establish them.
 238  */
 239 static void twsi_reset(void)
 240 {
 241         /* ensure controller will be enabled by any twsi*() function */
 242         twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
 243         /* reset controller */
 244         writel(0, &twsi->soft_reset);
 245         /* wait 2 ms -- this is what the Marvell LSP does */
 246         udelay(20000);
 247         /* set baud rate */
 248         writel(twsi_baud_rate, &twsi->baudrate);
 249         /* set slave address even though we don't use it */
 250         writel(twsi_slave_address, &twsi->slave_address);
 251         writel(0, &twsi->xtnd_slave_addr);
 252         /* assert STOP but don't care for the result */
 253         (void) twsi_stop(0);
 254 }
 255
 256 /*
 257  * I2C init called by cmd_i2c when doing 'i2c reset'.
 258  * Sets baud to the highest possible value not exceeding requested one.
 259  */
 260 void i2c_init(int requested_speed, int slaveadd)
 261 {
 262         int     tmp_speed, highest_speed, n, m;
 263         int     baud = 0x44; /* baudrate at controller reset */
 264
 265         /* use actual speed to collect progressively higher values */
 266         highest_speed = 0;
 267         /* compute m, n setting for highest speed not above requested speed */
 268         for (n = 0; n < 8; n++) {
 269                 for (m = 0; m < 16; m++) {
 270                         tmp_speed = TWSI_FREQUENCY(m, n);
 271                         if ((tmp_speed <= requested_speed)
 272                          && (tmp_speed > highest_speed)) {
 273                                 highest_speed = tmp_speed;
 274                                 baud = (m << 3) | n;
 275                         }
 276                 }
 277         }
 278         /* save baud rate and slave for later calls to twsi_reset */
 279         twsi_baud_rate = baud;
 280         twsi_slave_address = slaveadd;
 281         /* reset controller */
 282         twsi_reset();
 283 }
 284
 285 /*
 286  * Begin I2C transaction with expected start status, at given address.
 287  * Common to i2c_probe, i2c_read and i2c_write.
 288  * Expected address status will derive from direction bit (bit 0) in addr.
 289  */
 290 static int i2c_begin(int expected_start_status, u8 addr)
 291 {
 292         int status, expected_addr_status;
 293
 294         /* compute expected address status from direction bit in addr */
 295         if (addr & 1) /* reading */
 296                 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
 297         else /* writing */
 298                 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
 299         /* assert START */
 300         status = twsi_start(expected_start_status);
 301         /* send out the address if the start went well */
 302         if (status == 0)
 303                 status = twsi_send(addr, expected_addr_status);
 304         /* return ok or status of first failure to caller */
 305         return status;
 306 }
 307
 308 /*
 309  * I2C probe called by cmd_i2c when doing 'i2c probe'.
 310  * Begin read, nak data byte, end.
 311  */
 312 int i2c_probe(uchar chip)
 313 {
 314         u8 dummy_byte;
 315         int status;
 316
 317         /* begin i2c read */
 318         status = i2c_begin(MVTWSI_STATUS_START, (chip << 1) | 1);
 319         /* dummy read was accepted: receive byte but NAK it. */
 320         if (status == 0)
 321                 status = twsi_recv(&dummy_byte);
 322         /* Stop transaction */
 323         twsi_stop(0);
 324         /* return 0 or status of first failure */
 325         return status;
 326 }
 327
 328 /*
 329  * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
 330  * Begin write, send address byte(s), begin read, receive data bytes, end.
 331  *
 332  * NOTE: some EEPROMS want a stop right before the second start, while
 333  * some will choke if it is there. Deciding which we should do is eeprom
 334  * stuff, not i2c, but at the moment the APIs won't let us put it in
 335  * cmd_eeprom, so we have to choose here, and for the moment that'll be
 336  * a repeated start without a preceding stop.
 337  */
 338 int i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
 339 {
 340         int status;
 341
 342         /* begin i2c write to send the address bytes */
 343         status = i2c_begin(MVTWSI_STATUS_START, (dev << 1));
 344         /* send addr bytes */
 345         while ((status == 0) && alen--)
 346                 status = twsi_send(addr >> (8*alen),
 347                         MVTWSI_STATUS_DATA_W_ACK);
 348         /* begin i2c read to receive eeprom data bytes */
 349         if (status == 0)
 350                 status = i2c_begin(
 351                         MVTWSI_STATUS_REPEATED_START, (dev << 1) | 1);
 352         /* prepare ACK if at least one byte must be received */
 353         if (length > 0)
 354                 twsi_control_flags |= MVTWSI_CONTROL_ACK;
 355         /* now receive actual bytes */
 356         while ((status == 0) && length--) {
 357                 /* reset NAK if we if no more to read now */
 358                 if (length == 0)
 359                         twsi_control_flags &= ~MVTWSI_CONTROL_ACK;
 360                 /* read current byte */
 361                 status = twsi_recv(data++);
 362         }
 363         /* Stop transaction */
 364         status = twsi_stop(status);
 365         /* return 0 or status of first failure */
 366         return status;
 367 }
 368
 369 /*
 370  * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
 371  * Begin write, send address byte(s), send data bytes, end.
 372  */
 373 int i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
 374 {
 375         int status;
 376
 377         /* begin i2c write to send the eeprom adress bytes then data bytes */
 378         status = i2c_begin(MVTWSI_STATUS_START, (dev << 1));
 379         /* send addr bytes */
 380         while ((status == 0) && alen--)
 381                 status = twsi_send(addr >> (8*alen),
 382                         MVTWSI_STATUS_DATA_W_ACK);
 383         /* send data bytes */
 384         while ((status == 0) && (length-- > 0))
 385                 status = twsi_send(*(data++), MVTWSI_STATUS_DATA_W_ACK);
 386         /* Stop transaction */
 387         status = twsi_stop(status);
 388         /* return 0 or status of first failure */
 389         return status;
 390 }
 391
 392 /*
 393  * Bus set routine: we only support bus 0.
 394  */
 395 int i2c_set_bus_num(unsigned int bus)
 396 {
 397         if (bus > 0) {
 398                 return -1;
 399         }
 400         return 0;
 401 }
 402
 403 /*
 404  * Bus get routine: hard-return bus 0.
 405  */
 406 unsigned int i2c_get_bus_num(void)
 407 {
 408         return 0;
 409 }