drivers/i2c/mxs_i2c.c

   1 /*
   2  * Freescale i.MX28 I2C Driver
   3  *
   4  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
   5  * on behalf of DENX Software Engineering GmbH
   6  *
   7  * Partly based on Linux kernel i2c-mxs.c driver:
   8  * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
   9  *
  10  * Which was based on a (non-working) driver which was:
  11  * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26  *
  27  */
  28
  29 #include <common.h>
  30 #include <malloc.h>
  31 #include <i2c.h>
  32 #include <asm/errno.h>
  33 #include <asm/io.h>
  34 #include <asm/arch/clock.h>
  35 #include <asm/arch/imx-regs.h>
  36 #include <asm/arch/sys_proto.h>
  37
  38 #define MXS_I2C_MAX_TIMEOUT     1000000
  39
  40 static void mxs_i2c_reset(void)
  41 {
  42         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
  43         int ret;
  44         int speed = i2c_get_bus_speed();
  45
  46         ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
  47         if (ret) {
  48                 debug("MXS I2C: Block reset timeout\n");
  49                 return;
  50         }
  51
  52         writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ |
  53                 I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
  54                 I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ,
  55                 &i2c_regs->hw_i2c_ctrl1_clr);
  56
  57         writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set);
  58
  59         i2c_set_bus_speed(speed);
  60 }
  61
  62 static void mxs_i2c_setup_read(uint8_t chip, int len)
  63 {
  64         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
  65
  66         writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
  67                 I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
  68                 (1 << I2C_QUEUECMD_XFER_COUNT_OFFSET),
  69                 &i2c_regs->hw_i2c_queuecmd);
  70
  71         writel((chip << 1) | 1, &i2c_regs->hw_i2c_data);
  72
  73         writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE |
  74                 (len << I2C_QUEUECMD_XFER_COUNT_OFFSET) |
  75                 I2C_QUEUECMD_POST_SEND_STOP, &i2c_regs->hw_i2c_queuecmd);
  76
  77         writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
  78 }
  79
  80 static void mxs_i2c_write(uchar chip, uint addr, int alen,
  81                         uchar *buf, int blen, int stop)
  82 {
  83         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
  84         uint32_t data;
  85         int i, remain, off;
  86
  87         if ((alen > 4) || (alen == 0)) {
  88                 debug("MXS I2C: Invalid address length\n");
  89                 return;
  90         }
  91
  92         if (stop)
  93                 stop = I2C_QUEUECMD_POST_SEND_STOP;
  94
  95         writel(I2C_QUEUECMD_PRE_SEND_START |
  96                 I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
  97                 ((blen + alen + 1) << I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop,
  98                 &i2c_regs->hw_i2c_queuecmd);
  99
 100         data = (chip << 1) << 24;
 101
 102         for (i = 0; i < alen; i++) {
 103                 data >>= 8;
 104                 data |= ((char *)&addr)[alen - i - 1] << 24;
 105                 if ((i & 3) == 2)
 106                         writel(data, &i2c_regs->hw_i2c_data);
 107         }
 108
 109         off = i;
 110         for (; i < off + blen; i++) {
 111                 data >>= 8;
 112                 data |= buf[i - off] << 24;
 113                 if ((i & 3) == 2)
 114                         writel(data, &i2c_regs->hw_i2c_data);
 115         }
 116
 117         remain = 24 - ((i & 3) * 8);
 118         if (remain)
 119                 writel(data >> remain, &i2c_regs->hw_i2c_data);
 120
 121         writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
 122 }
 123
 124 static int mxs_i2c_wait_for_ack(void)
 125 {
 126         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
 127         uint32_t tmp;
 128         int timeout = MXS_I2C_MAX_TIMEOUT;
 129
 130         for (;;) {
 131                 tmp = readl(&i2c_regs->hw_i2c_ctrl1);
 132                 if (tmp & I2C_CTRL1_NO_SLAVE_ACK_IRQ) {
 133                         debug("MXS I2C: No slave ACK\n");
 134                         goto err;
 135                 }
 136
 137                 if (tmp & (
 138                         I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
 139                         I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ)) {
 140                         debug("MXS I2C: Error (CTRL1 = %08x)\n", tmp);
 141                         goto err;
 142                 }
 143
 144                 if (tmp & I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ)
 145                         break;
 146
 147                 if (!timeout--) {
 148                         debug("MXS I2C: Operation timed out\n");
 149                         goto err;
 150                 }
 151
 152                 udelay(1);
 153         }
 154
 155         return 0;
 156
 157 err:
 158         mxs_i2c_reset();
 159         return 1;
 160 }
 161
 162 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 163 {
 164         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
 165         uint32_t tmp = 0;
 166         int ret;
 167         int i;
 168
 169         mxs_i2c_write(chip, addr, alen, NULL, 0, 0);
 170         ret = mxs_i2c_wait_for_ack();
 171         if (ret) {
 172                 debug("MXS I2C: Failed writing address\n");
 173                 return ret;
 174         }
 175
 176         mxs_i2c_setup_read(chip, len);
 177         ret = mxs_i2c_wait_for_ack();
 178         if (ret) {
 179                 debug("MXS I2C: Failed reading address\n");
 180                 return ret;
 181         }
 182
 183         for (i = 0; i < len; i++) {
 184                 if (!(i & 3)) {
 185                         while (readl(&i2c_regs->hw_i2c_queuestat) &
 186                                 I2C_QUEUESTAT_RD_QUEUE_EMPTY)
 187                                 ;
 188                         tmp = readl(&i2c_regs->hw_i2c_queuedata);
 189                 }
 190                 buffer[i] = tmp & 0xff;
 191                 tmp >>= 8;
 192         }
 193
 194         return 0;
 195 }
 196
 197 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 198 {
 199         int ret;
 200         mxs_i2c_write(chip, addr, alen, buffer, len, 1);
 201         ret = mxs_i2c_wait_for_ack();
 202         if (ret)
 203                 debug("MXS I2C: Failed writing address\n");
 204
 205         return ret;
 206 }
 207
 208 int i2c_probe(uchar chip)
 209 {
 210         int ret;
 211         mxs_i2c_write(chip, 0, 1, NULL, 0, 1);
 212         ret = mxs_i2c_wait_for_ack();
 213         mxs_i2c_reset();
 214         return ret;
 215 }
 216
 217 int i2c_set_bus_speed(unsigned int speed)
 218 {
 219         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
 220         /*
 221          * The timing derivation algorithm. There is no documentation for this
 222          * algorithm available, it was derived by using the scope and fiddling
 223          * with constants until the result observed on the scope was good enough
 224          * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be
 225          * possible to assume the algorithm works for other frequencies as well.
 226          *
 227          * Note it was necessary to cap the frequency on both ends as it's not
 228          * possible to configure completely arbitrary frequency for the I2C bus
 229          * clock.
 230          */
 231         uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
 232         uint32_t base = ((clk / speed) - 38) / 2;
 233         uint16_t high_count = base + 3;
 234         uint16_t low_count = base - 3;
 235         uint16_t rcv_count = (high_count * 3) / 4;
 236         uint16_t xmit_count = low_count / 4;
 237
 238         if (speed > 540000) {
 239                 printf("MXS I2C: Speed too high (%d Hz)\n", speed);
 240                 return -EINVAL;
 241         }
 242
 243         if (speed < 12000) {
 244                 printf("MXS I2C: Speed too low (%d Hz)\n", speed);
 245                 return -EINVAL;
 246         }
 247
 248         writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0);
 249         writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1);
 250
 251         writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) |
 252                 (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET),
 253                 &i2c_regs->hw_i2c_timing2);
 254
 255         return 0;
 256 }
 257
 258 unsigned int i2c_get_bus_speed(void)
 259 {
 260         struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
 261         uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
 262         uint32_t timing0;
 263
 264         timing0 = readl(&i2c_regs->hw_i2c_timing0);
 265         /*
 266          * This is a reverse version of the algorithm presented in
 267          * i2c_set_bus_speed(). Please refer there for details.
 268          */
 269         return clk / ((((timing0 >> 16) - 3) * 2) + 38);
 270 }
 271
 272 void i2c_init(int speed, int slaveadd)
 273 {
 274         mxs_i2c_reset();
 275         i2c_set_bus_speed(speed);
 276
 277         return;
 278 }