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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/i2c/omap24xx_i2c.c
4 * Copyright (c) 2004 Texas Instruments
6 * This package is free software; you can redistribute it and/or
7 * modify it under the terms of the license found in the file
8 * named COPYING that should have accompanied this file.
10 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
14 * Author: Jian Zhang jzhang@ti.com, Texas Instruments
16 * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17 * Rewritten to fit into the current U-Boot framework
19 * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
25 #include <asm/arch/i2c.h>
28 #define inw(a) __raw_readw(a)
29 #define outw(a,v) __raw_writew(a,v)
31 static void wait_for_bb (void);
32 static u16
wait_for_pin (void);
33 static void flush_fifo(void);
35 void i2c_init (int speed
, int slaveadd
)
39 outw(0x2, I2C_SYSC
); /* for ES2 after soft reset */
41 outw(0x0, I2C_SYSC
); /* will probably self clear but */
43 if (inw (I2C_CON
) & I2C_CON_EN
) {
48 /* 12Mhz I2C module clock */
50 speed
= speed
/1000; /* 100 or 400 */
51 scl
= ((12000/(speed
*2)) - 7); /* use 7 when PSC = 0 */
55 outw (slaveadd
, I2C_OA
);
56 outw (I2C_CON_EN
, I2C_CON
);
58 /* have to enable intrrupts or OMAP i2c module doesn't work */
59 outw (I2C_IE_XRDY_IE
| I2C_IE_RRDY_IE
| I2C_IE_ARDY_IE
|
60 I2C_IE_NACK_IE
| I2C_IE_AL_IE
, I2C_IE
);
63 outw (0xFFFF, I2C_STAT
);
67 static int i2c_read_byte (u8 devaddr
, u8 regoffset
, u8
* value
)
72 /* wait until bus not busy */
77 /* set slave address */
78 outw (devaddr
, I2C_SA
);
79 /* no stop bit needed here */
80 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_TRX
, I2C_CON
);
82 status
= wait_for_pin ();
84 if (status
& I2C_STAT_XRDY
) {
85 /* Important: have to use byte access */
86 *(volatile u8
*) (I2C_DATA
) = regoffset
;
88 if (inw (I2C_STAT
) & I2C_STAT_NACK
) {
96 /* free bus, otherwise we can't use a combined transction */
98 while (inw (I2C_STAT
) || (inw (I2C_CON
) & I2C_CON_MST
)) {
100 /* Have to clear pending interrupt to clear I2C_STAT */
101 outw (0xFFFF, I2C_STAT
);
105 /* set slave address */
106 outw (devaddr
, I2C_SA
);
107 /* read one byte from slave */
109 /* need stop bit here */
110 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_STP
,
113 status
= wait_for_pin ();
114 if (status
& I2C_STAT_RRDY
) {
115 *value
= inw (I2C_DATA
);
122 outw (I2C_CON_EN
, I2C_CON
);
123 while (inw (I2C_STAT
)
124 || (inw (I2C_CON
) & I2C_CON_MST
)) {
126 outw (0xFFFF, I2C_STAT
);
131 outw (0xFFFF, I2C_STAT
);
136 static int i2c_write_byte (u8 devaddr
, u8 regoffset
, u8 value
)
141 /* wait until bus not busy */
146 /* set slave address */
147 outw (devaddr
, I2C_SA
);
148 /* stop bit needed here */
149 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_TRX
|
150 I2C_CON_STP
, I2C_CON
);
152 /* wait until state change */
153 status
= wait_for_pin ();
155 if (status
& I2C_STAT_XRDY
) {
156 /* send out two bytes */
157 outw ((value
<< 8) + regoffset
, I2C_DATA
);
158 /* must have enough delay to allow BB bit to go low */
160 if (inw (I2C_STAT
) & I2C_STAT_NACK
) {
170 outw (I2C_CON_EN
, I2C_CON
);
171 while ((stat
= inw (I2C_STAT
)) || (inw (I2C_CON
) & I2C_CON_MST
)) {
173 /* have to read to clear intrrupt */
174 outw (0xFFFF, I2C_STAT
);
175 if(--eout
== 0) /* better leave with error than hang */
180 outw (0xFFFF, I2C_STAT
);
185 static void flush_fifo(void)
188 /* note: if you try and read data when its not there or ready
189 * you get a bus error
192 stat
= inw(I2C_STAT
);
193 if(stat
== I2C_STAT_RRDY
){
195 outw(I2C_STAT_RRDY
,I2C_STAT
);
202 int i2c_probe (uchar chip
)
204 int res
= 1; /* default = fail */
206 if (chip
== inw (I2C_OA
)) {
210 /* wait until bus not busy */
213 /* try to read one byte */
215 /* set slave address */
217 /* stop bit needed here */
218 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_STP
, I2C_CON
);
219 /* enough delay for the NACK bit set */
222 if (!(inw (I2C_STAT
) & I2C_STAT_NACK
)) {
223 res
= 0; /* success case */
225 outw(0xFFFF, I2C_STAT
);
227 outw(0xFFFF, I2C_STAT
); /* failue, clear sources*/
228 outw (inw (I2C_CON
) | I2C_CON_STP
, I2C_CON
); /* finish up xfer */
233 outw (0, I2C_CNT
); /* don't allow any more data in...we don't want it.*/
234 outw(0xFFFF, I2C_STAT
);
238 int i2c_read (uchar chip
, uint addr
, int alen
, uchar
* buffer
, int len
)
243 printf ("I2C read: addr len %d not supported\n", alen
);
247 if (addr
+ len
> 256) {
248 printf ("I2C read: address out of range\n");
252 for (i
= 0; i
< len
; i
++) {
253 if (i2c_read_byte (chip
, addr
+ i
, &buffer
[i
])) {
254 printf ("I2C read: I/O error\n");
255 i2c_init (CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
263 int i2c_write (uchar chip
, uint addr
, int alen
, uchar
* buffer
, int len
)
268 printf ("I2C read: addr len %d not supported\n", alen
);
272 if (addr
+ len
> 256) {
273 printf ("I2C read: address out of range\n");
277 for (i
= 0; i
< len
; i
++) {
278 if (i2c_write_byte (chip
, addr
+ i
, buffer
[i
])) {
279 printf ("I2C read: I/O error\n");
280 i2c_init (CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
288 static void wait_for_bb (void)
293 outw(0xFFFF, I2C_STAT
); /* clear current interruts...*/
294 while ((stat
= inw (I2C_STAT
) & I2C_STAT_BB
) && timeout
--) {
295 outw (stat
, I2C_STAT
);
300 printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
303 outw(0xFFFF, I2C_STAT
); /* clear delayed stuff*/
306 static u16
wait_for_pin (void)
313 status
= inw (I2C_STAT
);
315 (I2C_STAT_ROVR
| I2C_STAT_XUDF
| I2C_STAT_XRDY
|
316 I2C_STAT_RRDY
| I2C_STAT_ARDY
| I2C_STAT_NACK
|
317 I2C_STAT_AL
)) && timeout
--);
320 printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
322 outw(0xFFFF, I2C_STAT
);