]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/i2c/sh_sh7734_i2c.c
2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3 * Copyright (C) 2012 Renesas Solutions Corp.
5 * SPDX-License-Identifier: GPL-2.0+
7 * NOTE: This driver should be converted to driver model before June 2017.
8 * Please see doc/driver-model/i2c-howto.txt for instructions.
29 static struct sh_i2c
*base
;
30 static u8 iccr1_cks
, nf2cyc
;
33 #define SH_I2C_ICCR1_ICE (1 << 7)
34 #define SH_I2C_ICCR1_RCVD (1 << 6)
35 #define SH_I2C_ICCR1_MST (1 << 5)
36 #define SH_I2C_ICCR1_TRS (1 << 4)
37 #define SH_I2C_ICCR1_MTRS \
38 (SH_I2C_ICCR1_MST | SH_I2C_ICCR1_TRS)
41 #define SH_I2C_ICCR2_BBSY (1 << 7)
42 #define SH_I2C_ICCR2_SCP (1 << 6)
43 #define SH_I2C_ICCR2_SDAO (1 << 5)
44 #define SH_I2C_ICCR2_SDAOP (1 << 4)
45 #define SH_I2C_ICCR2_SCLO (1 << 3)
46 #define SH_I2C_ICCR2_IICRST (1 << 1)
48 #define SH_I2C_ICIER_TIE (1 << 7)
49 #define SH_I2C_ICIER_TEIE (1 << 6)
50 #define SH_I2C_ICIER_RIE (1 << 5)
51 #define SH_I2C_ICIER_NAKIE (1 << 4)
52 #define SH_I2C_ICIER_STIE (1 << 3)
53 #define SH_I2C_ICIER_ACKE (1 << 2)
54 #define SH_I2C_ICIER_ACKBR (1 << 1)
55 #define SH_I2C_ICIER_ACKBT (1 << 0)
57 #define SH_I2C_ICSR_TDRE (1 << 7)
58 #define SH_I2C_ICSR_TEND (1 << 6)
59 #define SH_I2C_ICSR_RDRF (1 << 5)
60 #define SH_I2C_ICSR_NACKF (1 << 4)
61 #define SH_I2C_ICSR_STOP (1 << 3)
62 #define SH_I2C_ICSR_ALOVE (1 << 2)
63 #define SH_I2C_ICSR_AAS (1 << 1)
64 #define SH_I2C_ICSR_ADZ (1 << 0)
68 static void sh_i2c_send_stop(struct sh_i2c
*base
)
70 clrbits_8(&base
->iccr2
, SH_I2C_ICCR2_BBSY
| SH_I2C_ICCR2_SCP
);
73 static int check_icsr_bits(struct sh_i2c
*base
, u8 bits
)
77 for (i
= 0; i
< IRQ_WAIT
; i
++) {
78 if (bits
& readb(&base
->icsr
))
86 static int check_stop(struct sh_i2c
*base
)
88 int ret
= check_icsr_bits(base
, SH_I2C_ICSR_STOP
);
89 clrbits_8(&base
->icsr
, SH_I2C_ICSR_STOP
);
94 static int check_tend(struct sh_i2c
*base
, int stop
)
96 int ret
= check_icsr_bits(base
, SH_I2C_ICSR_TEND
);
99 clrbits_8(&base
->icsr
, SH_I2C_ICSR_STOP
);
100 sh_i2c_send_stop(base
);
103 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TEND
);
107 static int check_tdre(struct sh_i2c
*base
)
109 return check_icsr_bits(base
, SH_I2C_ICSR_TDRE
);
112 static int check_rdrf(struct sh_i2c
*base
)
114 return check_icsr_bits(base
, SH_I2C_ICSR_RDRF
);
117 static int check_bbsy(struct sh_i2c
*base
)
121 for (i
= 0 ; i
< IRQ_WAIT
; i
++) {
122 if (!(SH_I2C_ICCR2_BBSY
& readb(&base
->iccr2
)))
129 static int check_ackbr(struct sh_i2c
*base
)
133 for (i
= 0 ; i
< IRQ_WAIT
; i
++) {
134 if (!(SH_I2C_ICIER_ACKBR
& readb(&base
->icier
)))
142 static void sh_i2c_reset(struct sh_i2c
*base
)
144 setbits_8(&base
->iccr2
, SH_I2C_ICCR2_IICRST
);
148 clrbits_8(&base
->iccr2
, SH_I2C_ICCR2_IICRST
);
151 static int i2c_set_addr(struct sh_i2c
*base
, u8 id
, u8 reg
)
153 if (check_bbsy(base
)) {
154 puts("i2c bus busy\n");
158 setbits_8(&base
->iccr1
, SH_I2C_ICCR1_MTRS
);
159 clrsetbits_8(&base
->iccr2
, SH_I2C_ICCR2_SCP
, SH_I2C_ICCR2_BBSY
);
161 writeb((id
<< 1), &base
->icdrt
);
163 if (check_tend(base
, 0)) {
164 puts("TEND check fail...\n");
168 if (check_ackbr(base
)) {
170 sh_i2c_send_stop(base
);
174 writeb(reg
, &base
->icdrt
);
176 if (check_tdre(base
)) {
177 puts("TDRE check fail...\n");
181 if (check_tend(base
, 0)) {
182 puts("TEND check fail...\n");
193 i2c_raw_write(struct sh_i2c
*base
, u8 id
, u8 reg
, u8
*val
, int size
)
197 if (i2c_set_addr(base
, id
, reg
)) {
198 puts("Fail set slave address\n");
202 for (i
= 0; i
< size
; i
++) {
203 writeb(val
[i
], &base
->icdrt
);
212 clrbits_8(&base
->iccr1
, SH_I2C_ICCR1_MTRS
);
213 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TDRE
);
219 static u8
i2c_raw_read(struct sh_i2c
*base
, u8 id
, u8 reg
)
223 if (i2c_set_addr(base
, id
, reg
)) {
224 puts("Fail set slave address\n");
228 clrsetbits_8(&base
->iccr2
, SH_I2C_ICCR2_SCP
, SH_I2C_ICCR2_BBSY
);
229 writeb((id
<< 1) | 1, &base
->icdrt
);
231 if (check_tend(base
, 0))
232 puts("TDRE check fail...\n");
234 clrsetbits_8(&base
->iccr1
, SH_I2C_ICCR1_TRS
, SH_I2C_ICCR1_MST
);
235 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TDRE
);
236 setbits_8(&base
->icier
, SH_I2C_ICIER_ACKBT
);
237 setbits_8(&base
->iccr1
, SH_I2C_ICCR1_RCVD
);
239 /* read data (dummy) */
240 ret
= readb(&base
->icdrr
);
242 if (check_rdrf(base
)) {
243 puts("check RDRF error\n");
247 clrbits_8(&base
->icsr
, SH_I2C_ICSR_STOP
);
250 sh_i2c_send_stop(base
);
252 if (check_stop(base
)) {
253 puts("check STOP error\n");
257 clrbits_8(&base
->iccr1
, SH_I2C_ICCR1_MTRS
);
258 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TDRE
);
261 ret
= readb(&base
->icdrr
);
264 clrbits_8(&base
->iccr1
, SH_I2C_ICCR1_RCVD
);
269 #ifdef CONFIG_I2C_MULTI_BUS
270 static unsigned int current_bus
;
273 * i2c_set_bus_num - change active I2C bus
274 * @bus: bus index, zero based
275 * @returns: 0 on success, non-0 on failure
277 int i2c_set_bus_num(unsigned int bus
)
281 base
= (void *)CONFIG_SH_I2C_BASE0
;
284 base
= (void *)CONFIG_SH_I2C_BASE1
;
287 printf("Bad bus: %d\n", bus
);
297 * i2c_get_bus_num - returns index of active I2C bus
299 unsigned int i2c_get_bus_num(void)
305 void i2c_init(int speed
, int slaveaddr
)
307 #ifdef CONFIG_I2C_MULTI_BUS
310 base
= (struct sh_i2c
*)CONFIG_SH_I2C_BASE0
;
322 /* ICE enable and set clock */
323 writeb(SH_I2C_ICCR1_ICE
| iccr1_cks
, &base
->iccr1
);
324 writeb(nf2cyc
, &base
->nf2cyc
);
328 * i2c_read: - Read multiple bytes from an i2c device
330 * The higher level routines take into account that this function is only
331 * called with len < page length of the device (see configuration file)
333 * @chip: address of the chip which is to be read
334 * @addr: i2c data address within the chip
335 * @alen: length of the i2c data address (1..2 bytes)
336 * @buffer: where to write the data
337 * @len: how much byte do we want to read
338 * @return: 0 in case of success
340 int i2c_read(u8 chip
, u32 addr
, int alen
, u8
*buffer
, int len
)
343 for (i
= 0; i
< len
; i
++)
344 buffer
[i
] = i2c_raw_read(base
, chip
, addr
+ i
);
350 * i2c_write: - Write multiple bytes to an i2c device
352 * The higher level routines take into account that this function is only
353 * called with len < page length of the device (see configuration file)
355 * @chip: address of the chip which is to be written
356 * @addr: i2c data address within the chip
357 * @alen: length of the i2c data address (1..2 bytes)
358 * @buffer: where to find the data to be written
359 * @len: how much byte do we want to read
360 * @return: 0 in case of success
362 int i2c_write(u8 chip
, u32 addr
, int alen
, u8
*buffer
, int len
)
364 return i2c_raw_write(base
, chip
, addr
, buffer
, len
);
368 * i2c_probe: - Test if a chip answers for a given i2c address
370 * @chip: address of the chip which is searched for
371 * @return: 0 if a chip was found, -1 otherwhise
373 int i2c_probe(u8 chip
)
376 return i2c_read(chip
, 0, 0, &byte
, 1);