]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/i2c/sh_sh7734_i2c.c
2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3 * Copyright (C) 2012 Renesas Solutions Corp.
5 * SPDX-License-Identifier: GPL-2.0+
26 static struct sh_i2c
*base
;
27 static u8 iccr1_cks
, nf2cyc
;
30 #define SH_I2C_ICCR1_ICE (1 << 7)
31 #define SH_I2C_ICCR1_RCVD (1 << 6)
32 #define SH_I2C_ICCR1_MST (1 << 5)
33 #define SH_I2C_ICCR1_TRS (1 << 4)
34 #define SH_I2C_ICCR1_MTRS \
35 (SH_I2C_ICCR1_MST | SH_I2C_ICCR1_TRS)
38 #define SH_I2C_ICCR2_BBSY (1 << 7)
39 #define SH_I2C_ICCR2_SCP (1 << 6)
40 #define SH_I2C_ICCR2_SDAO (1 << 5)
41 #define SH_I2C_ICCR2_SDAOP (1 << 4)
42 #define SH_I2C_ICCR2_SCLO (1 << 3)
43 #define SH_I2C_ICCR2_IICRST (1 << 1)
45 #define SH_I2C_ICIER_TIE (1 << 7)
46 #define SH_I2C_ICIER_TEIE (1 << 6)
47 #define SH_I2C_ICIER_RIE (1 << 5)
48 #define SH_I2C_ICIER_NAKIE (1 << 4)
49 #define SH_I2C_ICIER_STIE (1 << 3)
50 #define SH_I2C_ICIER_ACKE (1 << 2)
51 #define SH_I2C_ICIER_ACKBR (1 << 1)
52 #define SH_I2C_ICIER_ACKBT (1 << 0)
54 #define SH_I2C_ICSR_TDRE (1 << 7)
55 #define SH_I2C_ICSR_TEND (1 << 6)
56 #define SH_I2C_ICSR_RDRF (1 << 5)
57 #define SH_I2C_ICSR_NACKF (1 << 4)
58 #define SH_I2C_ICSR_STOP (1 << 3)
59 #define SH_I2C_ICSR_ALOVE (1 << 2)
60 #define SH_I2C_ICSR_AAS (1 << 1)
61 #define SH_I2C_ICSR_ADZ (1 << 0)
65 static void sh_i2c_send_stop(struct sh_i2c
*base
)
67 clrbits_8(&base
->iccr2
, SH_I2C_ICCR2_BBSY
| SH_I2C_ICCR2_SCP
);
70 static int check_icsr_bits(struct sh_i2c
*base
, u8 bits
)
74 for (i
= 0; i
< IRQ_WAIT
; i
++) {
75 if (bits
& readb(&base
->icsr
))
83 static int check_stop(struct sh_i2c
*base
)
85 int ret
= check_icsr_bits(base
, SH_I2C_ICSR_STOP
);
86 clrbits_8(&base
->icsr
, SH_I2C_ICSR_STOP
);
91 static int check_tend(struct sh_i2c
*base
, int stop
)
93 int ret
= check_icsr_bits(base
, SH_I2C_ICSR_TEND
);
96 clrbits_8(&base
->icsr
, SH_I2C_ICSR_STOP
);
97 sh_i2c_send_stop(base
);
100 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TEND
);
104 static int check_tdre(struct sh_i2c
*base
)
106 return check_icsr_bits(base
, SH_I2C_ICSR_TDRE
);
109 static int check_rdrf(struct sh_i2c
*base
)
111 return check_icsr_bits(base
, SH_I2C_ICSR_RDRF
);
114 static int check_bbsy(struct sh_i2c
*base
)
118 for (i
= 0 ; i
< IRQ_WAIT
; i
++) {
119 if (!(SH_I2C_ICCR2_BBSY
& readb(&base
->iccr2
)))
126 static int check_ackbr(struct sh_i2c
*base
)
130 for (i
= 0 ; i
< IRQ_WAIT
; i
++) {
131 if (!(SH_I2C_ICIER_ACKBR
& readb(&base
->icier
)))
139 static void sh_i2c_reset(struct sh_i2c
*base
)
141 setbits_8(&base
->iccr2
, SH_I2C_ICCR2_IICRST
);
145 clrbits_8(&base
->iccr2
, SH_I2C_ICCR2_IICRST
);
148 static int i2c_set_addr(struct sh_i2c
*base
, u8 id
, u8 reg
)
150 if (check_bbsy(base
)) {
151 puts("i2c bus busy\n");
155 setbits_8(&base
->iccr1
, SH_I2C_ICCR1_MTRS
);
156 clrsetbits_8(&base
->iccr2
, SH_I2C_ICCR2_SCP
, SH_I2C_ICCR2_BBSY
);
158 writeb((id
<< 1), &base
->icdrt
);
160 if (check_tend(base
, 0)) {
161 puts("TEND check fail...\n");
165 if (check_ackbr(base
)) {
167 sh_i2c_send_stop(base
);
171 writeb(reg
, &base
->icdrt
);
173 if (check_tdre(base
)) {
174 puts("TDRE check fail...\n");
178 if (check_tend(base
, 0)) {
179 puts("TEND check fail...\n");
190 i2c_raw_write(struct sh_i2c
*base
, u8 id
, u8 reg
, u8
*val
, int size
)
194 if (i2c_set_addr(base
, id
, reg
)) {
195 puts("Fail set slave address\n");
199 for (i
= 0; i
< size
; i
++) {
200 writeb(val
[i
], &base
->icdrt
);
209 clrbits_8(&base
->iccr1
, SH_I2C_ICCR1_MTRS
);
210 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TDRE
);
216 static u8
i2c_raw_read(struct sh_i2c
*base
, u8 id
, u8 reg
)
220 if (i2c_set_addr(base
, id
, reg
)) {
221 puts("Fail set slave address\n");
225 clrsetbits_8(&base
->iccr2
, SH_I2C_ICCR2_SCP
, SH_I2C_ICCR2_BBSY
);
226 writeb((id
<< 1) | 1, &base
->icdrt
);
228 if (check_tend(base
, 0))
229 puts("TDRE check fail...\n");
231 clrsetbits_8(&base
->iccr1
, SH_I2C_ICCR1_TRS
, SH_I2C_ICCR1_MST
);
232 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TDRE
);
233 setbits_8(&base
->icier
, SH_I2C_ICIER_ACKBT
);
234 setbits_8(&base
->iccr1
, SH_I2C_ICCR1_RCVD
);
236 /* read data (dummy) */
237 ret
= readb(&base
->icdrr
);
239 if (check_rdrf(base
)) {
240 puts("check RDRF error\n");
244 clrbits_8(&base
->icsr
, SH_I2C_ICSR_STOP
);
247 sh_i2c_send_stop(base
);
249 if (check_stop(base
)) {
250 puts("check STOP error\n");
254 clrbits_8(&base
->iccr1
, SH_I2C_ICCR1_MTRS
);
255 clrbits_8(&base
->icsr
, SH_I2C_ICSR_TDRE
);
258 ret
= readb(&base
->icdrr
);
261 clrbits_8(&base
->iccr1
, SH_I2C_ICCR1_RCVD
);
266 #ifdef CONFIG_I2C_MULTI_BUS
267 static unsigned int current_bus
;
270 * i2c_set_bus_num - change active I2C bus
271 * @bus: bus index, zero based
272 * @returns: 0 on success, non-0 on failure
274 int i2c_set_bus_num(unsigned int bus
)
278 base
= (void *)CONFIG_SH_I2C_BASE0
;
281 base
= (void *)CONFIG_SH_I2C_BASE1
;
284 printf("Bad bus: %d\n", bus
);
294 * i2c_get_bus_num - returns index of active I2C bus
296 unsigned int i2c_get_bus_num(void)
302 void i2c_init(int speed
, int slaveaddr
)
304 #ifdef CONFIG_I2C_MULTI_BUS
307 base
= (struct sh_i2c
*)CONFIG_SH_I2C_BASE0
;
319 /* ICE enable and set clock */
320 writeb(SH_I2C_ICCR1_ICE
| iccr1_cks
, &base
->iccr1
);
321 writeb(nf2cyc
, &base
->nf2cyc
);
325 * i2c_read: - Read multiple bytes from an i2c device
327 * The higher level routines take into account that this function is only
328 * called with len < page length of the device (see configuration file)
330 * @chip: address of the chip which is to be read
331 * @addr: i2c data address within the chip
332 * @alen: length of the i2c data address (1..2 bytes)
333 * @buffer: where to write the data
334 * @len: how much byte do we want to read
335 * @return: 0 in case of success
337 int i2c_read(u8 chip
, u32 addr
, int alen
, u8
*buffer
, int len
)
340 for (i
= 0; i
< len
; i
++)
341 buffer
[i
] = i2c_raw_read(base
, chip
, addr
+ i
);
347 * i2c_write: - Write multiple bytes to an i2c device
349 * The higher level routines take into account that this function is only
350 * called with len < page length of the device (see configuration file)
352 * @chip: address of the chip which is to be written
353 * @addr: i2c data address within the chip
354 * @alen: length of the i2c data address (1..2 bytes)
355 * @buffer: where to find the data to be written
356 * @len: how much byte do we want to read
357 * @return: 0 in case of success
359 int i2c_write(u8 chip
, u32 addr
, int alen
, u8
*buffer
, int len
)
361 return i2c_raw_write(base
, chip
, addr
, buffer
, len
);
365 * i2c_probe: - Test if a chip answers for a given i2c address
367 * @chip: address of the chip which is searched for
368 * @return: 0 if a chip was found, -1 otherwhise
370 int i2c_probe(u8 chip
)
373 return i2c_read(chip
, 0, 0, &byte
, 1);