3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 * Changes for multibus/multiadapter I2C support.
6 * (C) Copyright 2001, 2002
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
28 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
33 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
37 #if defined(CONFIG_AVR32)
38 #include <asm/arch/portmux.h>
40 #if defined(CONFIG_AT91FAMILY)
42 #include <asm/arch/hardware.h>
43 #include <asm/arch/at91_pio.h>
44 #ifdef CONFIG_AT91_LEGACY
45 #include <asm/arch/gpio.h>
48 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
49 #include <asm/arch/ixp425.h>
51 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
56 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
57 # include <asm/gpio.h>
59 # ifndef I2C_GPIO_SYNC
60 # define I2C_GPIO_SYNC
66 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
67 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
72 # define I2C_ACTIVE do { } while (0)
76 # define I2C_TRISTATE do { } while (0)
80 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
84 # define I2C_SDA(bit) \
87 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
89 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
95 # define I2C_SCL(bit) \
97 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
103 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
108 /* #define DEBUG_I2C */
110 DECLARE_GLOBAL_DATA_PTR
;
112 #ifndef I2C_SOFT_DECLARATIONS
113 # if defined(CONFIG_MPC8260)
114 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
115 ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
116 # elif defined(CONFIG_8xx)
117 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \
118 (immap_t *)CONFIG_SYS_IMMR;
120 # define I2C_SOFT_DECLARATIONS
124 #if !defined(CONFIG_SYS_SOFT_I2C_SPEED)
125 #define CONFIG_SYS_SOFT_I2C_SPEED CONFIG_SYS_I2C_SPEED
127 #if !defined(CONFIG_SYS_SOFT_I2C_SLAVE)
128 #define CONFIG_SYS_SOFT_I2C_SLAVE CONFIG_SYS_I2C_SLAVE
131 /*-----------------------------------------------------------------------
136 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
137 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
141 #define PRINTD(fmt,args...) do { \
142 printf (fmt ,##args); \
145 #define PRINTD(fmt,args...)
148 /*-----------------------------------------------------------------------
151 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
152 static void send_reset (void);
154 static void send_start (void);
155 static void send_stop (void);
156 static void send_ack (int);
157 static int write_byte (uchar byte
);
158 static uchar
read_byte (int);
160 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
161 /*-----------------------------------------------------------------------
162 * Send a reset sequence consisting of 9 clocks with the data signal high
163 * to clock any confused device back into an idle state. Also send a
164 * <stop> at the end of the sequence for belts & suspenders.
166 static void send_reset(void)
168 I2C_SOFT_DECLARATIONS
/* intentional without ';' */
177 for(j
= 0; j
< 9; j
++) {
190 /*-----------------------------------------------------------------------
191 * START: High -> Low on SDA while SCL is High
193 static void send_start(void)
195 I2C_SOFT_DECLARATIONS
/* intentional without ';' */
207 /*-----------------------------------------------------------------------
208 * STOP: Low -> High on SDA while SCL is High
210 static void send_stop(void)
212 I2C_SOFT_DECLARATIONS
/* intentional without ';' */
226 /*-----------------------------------------------------------------------
227 * ack should be I2C_ACK or I2C_NOACK
229 static void send_ack(int ack
)
231 I2C_SOFT_DECLARATIONS
/* intentional without ';' */
245 /*-----------------------------------------------------------------------
246 * Send 8 bits and look for an acknowledgement.
248 static int write_byte(uchar data
)
250 I2C_SOFT_DECLARATIONS
/* intentional without ';' */
255 for(j
= 0; j
< 8; j
++) {
258 I2C_SDA(data
& 0x80);
268 * Look for an <ACK>(negative logic) and return it.
283 return(nack
); /* not a nack is an ack */
286 /*-----------------------------------------------------------------------
287 * if ack == I2C_ACK, ACK the byte so can continue reading, else
288 * send I2C_NOACK to end the read.
290 static uchar
read_byte(int ack
)
292 I2C_SOFT_DECLARATIONS
/* intentional without ';' */
297 * Read 8 bits, MSB first.
302 for(j
= 0; j
< 8; j
++) {
316 /*-----------------------------------------------------------------------
319 static void soft_i2c_init(struct i2c_adapter
*adap
, int speed
, int slaveaddr
)
321 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
322 /* call board specific i2c bus reset routine before accessing the */
323 /* environment, which might be in a chip on that bus. For details */
324 /* about this problem see doc/I2C_Edge_Conditions. */
328 * WARNING: Do NOT save speed in a static variable: if the
329 * I2C routines are called before RAM is initialized (to read
330 * the DIMM SPD, for instance), RAM won't be usable and your
337 /*-----------------------------------------------------------------------
338 * Probe to see if a chip is present. Also good for checking for the
339 * completion of EEPROM writes since the chip stops responding until
340 * the write completes (typically 10mSec).
342 static int soft_i2c_probe(struct i2c_adapter
*adap
, uint8_t addr
)
347 * perform 1 byte write transaction with just address byte
351 rc
= write_byte ((addr
<< 1) | 0);
357 /*-----------------------------------------------------------------------
360 static int soft_i2c_read(struct i2c_adapter
*adap
, uchar chip
, uint addr
,
361 int alen
, uchar
*buffer
, int len
)
364 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
365 chip
, addr
, alen
, buffer
, len
);
367 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
369 * EEPROM chips that implement "address overflow" are ones
370 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
371 * address and the extra bits end up in the "chip address"
372 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
373 * four 256 byte chips.
375 * Note that we consider the length of the address field to
376 * still be one byte because the extra address bits are
377 * hidden in the chip address.
379 chip
|= ((addr
>> (alen
* 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
);
381 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
386 * Do the addressing portion of a write cycle to set the
387 * chip's address pointer. If the address length is zero,
388 * don't do the normal write cycle to set the address pointer,
389 * there is no address pointer in this chip.
393 if(write_byte(chip
<< 1)) { /* write cycle */
395 PRINTD("i2c_read, no chip responded %02X\n", chip
);
398 shift
= (alen
-1) * 8;
400 if(write_byte(addr
>> shift
)) {
401 PRINTD("i2c_read, address not <ACK>ed\n");
407 /* Some I2C chips need a stop/start sequence here,
408 * other chips don't work with a full stop and need
409 * only a start. Default behaviour is to send the
410 * stop/start sequence.
412 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
420 * Send the chip address again, this time for a read cycle.
421 * Then read the data. On the last byte, we do a NACK instead
422 * of an ACK(len == 0) to terminate the read.
424 write_byte((chip
<< 1) | 1); /* read cycle */
426 *buffer
++ = read_byte(len
== 0);
432 /*-----------------------------------------------------------------------
435 static int soft_i2c_write(struct i2c_adapter
*adap
, uchar chip
, uint addr
,
436 int alen
, uchar
*buffer
, int len
)
438 int shift
, failures
= 0;
440 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
441 chip
, addr
, alen
, buffer
, len
);
444 if(write_byte(chip
<< 1)) { /* write cycle */
446 PRINTD("i2c_write, no chip responded %02X\n", chip
);
449 shift
= (alen
-1) * 8;
451 if(write_byte(addr
>> shift
)) {
452 PRINTD("i2c_write, address not <ACK>ed\n");
459 if(write_byte(*buffer
++)) {
468 * Register soft i2c adapters
470 U_BOOT_I2C_ADAP_COMPLETE(soft0
, soft_i2c_init
, soft_i2c_probe
,
471 soft_i2c_read
, soft_i2c_write
, NULL
,
472 CONFIG_SYS_I2C_SOFT_SPEED
, CONFIG_SYS_I2C_SOFT_SLAVE
,
474 #if defined(I2C_SOFT_DECLARATIONS2)
475 U_BOOT_I2C_ADAP_COMPLETE(soft1
, soft_i2c_init
, soft_i2c_probe
,
476 soft_i2c_read
, soft_i2c_write
, NULL
,
477 CONFIG_SYS_I2C_SOFT_SPEED_2
,
478 CONFIG_SYS_I2C_SOFT_SLAVE_2
,
481 #if defined(I2C_SOFT_DECLARATIONS3)
482 U_BOOT_I2C_ADAP_COMPLETE(soft2
, soft_i2c_init
, soft_i2c_probe
,
483 soft_i2c_read
, soft_i2c_write
, NULL
,
484 CONFIG_SYS_I2C_SOFT_SPEED_3
,
485 CONFIG_SYS_I2C_SOFT_SLAVE_3
,
488 #if defined(I2C_SOFT_DECLARATIONS4)
489 U_BOOT_I2C_ADAP_COMPLETE(soft3
, soft_i2c_init
, soft_i2c_probe
,
490 soft_i2c_read
, soft_i2c_write
, NULL
,
491 CONFIG_SYS_I2C_SOFT_SPEED_4
,
492 CONFIG_SYS_I2C_SOFT_SLAVE_4
,