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1 /*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28 #include <common.h>
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30 #include <ioports.h>
31 #include <asm/io.h>
32 #endif
33 #if defined(CONFIG_AT91RM9200) || \
34 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
35 defined(CONFIG_AT91SAM9263)
36 #include <asm/io.h>
37 #include <asm/arch/hardware.h>
38 #include <asm/arch/at91_pio.h>
39 #ifdef CONFIG_AT91_LEGACY
40 #include <asm/arch/gpio.h>
41 #endif
42 #endif
43 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
44 #include <asm/arch/ixp425.h>
45 #endif
46 #ifdef CONFIG_LPC2292
47 #include <asm/arch/hardware.h>
48 #endif
49 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
50 #include <asm/io.h>
51 #endif
52 #include <i2c.h>
53
54 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
55 # include <asm/gpio.h>
56
57 # ifndef I2C_GPIO_SYNC
58 # define I2C_GPIO_SYNC
59 # endif
60
61 # ifndef I2C_INIT
62 # define I2C_INIT \
63 do { \
64 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
65 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
66 } while (0)
67 # endif
68
69 # ifndef I2C_ACTIVE
70 # define I2C_ACTIVE do { } while (0)
71 # endif
72
73 # ifndef I2C_TRISTATE
74 # define I2C_TRISTATE do { } while (0)
75 # endif
76
77 # ifndef I2C_READ
78 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
79 # endif
80
81 # ifndef I2C_SDA
82 # define I2C_SDA(bit) \
83 do { \
84 if (bit) \
85 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
86 else \
87 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
88 I2C_GPIO_SYNC; \
89 } while (0)
90 # endif
91
92 # ifndef I2C_SCL
93 # define I2C_SCL(bit) \
94 do { \
95 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
96 I2C_GPIO_SYNC; \
97 } while (0)
98 # endif
99
100 # ifndef I2C_DELAY
101 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
102 # endif
103
104 #endif
105
106 /* #define DEBUG_I2C */
107
108 #ifdef DEBUG_I2C
109 DECLARE_GLOBAL_DATA_PTR;
110 #endif
111
112 /*-----------------------------------------------------------------------
113 * Definitions
114 */
115
116 #define RETRIES 0
117
118 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
119 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
120
121
122 #ifdef DEBUG_I2C
123 #define PRINTD(fmt,args...) do { \
124 if (gd->have_console) \
125 printf (fmt ,##args); \
126 } while (0)
127 #else
128 #define PRINTD(fmt,args...)
129 #endif
130
131 #if defined(CONFIG_I2C_MULTI_BUS)
132 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
133 #endif /* CONFIG_I2C_MULTI_BUS */
134
135 /*-----------------------------------------------------------------------
136 * Local functions
137 */
138 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
139 static void send_reset (void);
140 #endif
141 static void send_start (void);
142 static void send_stop (void);
143 static void send_ack (int);
144 static int write_byte (uchar byte);
145 static uchar read_byte (int);
146
147 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
148 /*-----------------------------------------------------------------------
149 * Send a reset sequence consisting of 9 clocks with the data signal high
150 * to clock any confused device back into an idle state. Also send a
151 * <stop> at the end of the sequence for belts & suspenders.
152 */
153 static void send_reset(void)
154 {
155 I2C_SOFT_DECLARATIONS /* intentional without ';' */
156 int j;
157
158 I2C_SCL(1);
159 I2C_SDA(1);
160 #ifdef I2C_INIT
161 I2C_INIT;
162 #endif
163 I2C_TRISTATE;
164 for(j = 0; j < 9; j++) {
165 I2C_SCL(0);
166 I2C_DELAY;
167 I2C_DELAY;
168 I2C_SCL(1);
169 I2C_DELAY;
170 I2C_DELAY;
171 }
172 send_stop();
173 I2C_TRISTATE;
174 }
175 #endif
176
177 /*-----------------------------------------------------------------------
178 * START: High -> Low on SDA while SCL is High
179 */
180 static void send_start(void)
181 {
182 I2C_SOFT_DECLARATIONS /* intentional without ';' */
183
184 I2C_DELAY;
185 I2C_SDA(1);
186 I2C_ACTIVE;
187 I2C_DELAY;
188 I2C_SCL(1);
189 I2C_DELAY;
190 I2C_SDA(0);
191 I2C_DELAY;
192 }
193
194 /*-----------------------------------------------------------------------
195 * STOP: Low -> High on SDA while SCL is High
196 */
197 static void send_stop(void)
198 {
199 I2C_SOFT_DECLARATIONS /* intentional without ';' */
200
201 I2C_SCL(0);
202 I2C_DELAY;
203 I2C_SDA(0);
204 I2C_ACTIVE;
205 I2C_DELAY;
206 I2C_SCL(1);
207 I2C_DELAY;
208 I2C_SDA(1);
209 I2C_DELAY;
210 I2C_TRISTATE;
211 }
212
213 /*-----------------------------------------------------------------------
214 * ack should be I2C_ACK or I2C_NOACK
215 */
216 static void send_ack(int ack)
217 {
218 I2C_SOFT_DECLARATIONS /* intentional without ';' */
219
220 I2C_SCL(0);
221 I2C_DELAY;
222 I2C_ACTIVE;
223 I2C_SDA(ack);
224 I2C_DELAY;
225 I2C_SCL(1);
226 I2C_DELAY;
227 I2C_DELAY;
228 I2C_SCL(0);
229 I2C_DELAY;
230 }
231
232 /*-----------------------------------------------------------------------
233 * Send 8 bits and look for an acknowledgement.
234 */
235 static int write_byte(uchar data)
236 {
237 I2C_SOFT_DECLARATIONS /* intentional without ';' */
238 int j;
239 int nack;
240
241 I2C_ACTIVE;
242 for(j = 0; j < 8; j++) {
243 I2C_SCL(0);
244 I2C_DELAY;
245 I2C_SDA(data & 0x80);
246 I2C_DELAY;
247 I2C_SCL(1);
248 I2C_DELAY;
249 I2C_DELAY;
250
251 data <<= 1;
252 }
253
254 /*
255 * Look for an <ACK>(negative logic) and return it.
256 */
257 I2C_SCL(0);
258 I2C_DELAY;
259 I2C_SDA(1);
260 I2C_TRISTATE;
261 I2C_DELAY;
262 I2C_SCL(1);
263 I2C_DELAY;
264 I2C_DELAY;
265 nack = I2C_READ;
266 I2C_SCL(0);
267 I2C_DELAY;
268 I2C_ACTIVE;
269
270 return(nack); /* not a nack is an ack */
271 }
272
273 #if defined(CONFIG_I2C_MULTI_BUS)
274 /*
275 * Functions for multiple I2C bus handling
276 */
277 unsigned int i2c_get_bus_num(void)
278 {
279 return i2c_bus_num;
280 }
281
282 int i2c_set_bus_num(unsigned int bus)
283 {
284 #if defined(CONFIG_I2C_MUX)
285 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
286 i2c_bus_num = bus;
287 } else {
288 int ret;
289
290 ret = i2x_mux_select_mux(bus);
291 if (ret == 0)
292 i2c_bus_num = bus;
293 else
294 return ret;
295 }
296 #else
297 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
298 return -1;
299 i2c_bus_num = bus;
300 #endif
301 return 0;
302 }
303 #endif
304
305 /*-----------------------------------------------------------------------
306 * if ack == I2C_ACK, ACK the byte so can continue reading, else
307 * send I2C_NOACK to end the read.
308 */
309 static uchar read_byte(int ack)
310 {
311 I2C_SOFT_DECLARATIONS /* intentional without ';' */
312 int data;
313 int j;
314
315 /*
316 * Read 8 bits, MSB first.
317 */
318 I2C_TRISTATE;
319 I2C_SDA(1);
320 data = 0;
321 for(j = 0; j < 8; j++) {
322 I2C_SCL(0);
323 I2C_DELAY;
324 I2C_SCL(1);
325 I2C_DELAY;
326 data <<= 1;
327 data |= I2C_READ;
328 I2C_DELAY;
329 }
330 send_ack(ack);
331
332 return(data);
333 }
334
335 /*=====================================================================*/
336 /* Public Functions */
337 /*=====================================================================*/
338
339 /*-----------------------------------------------------------------------
340 * Initialization
341 */
342 void i2c_init (int speed, int slaveaddr)
343 {
344 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
345 /* call board specific i2c bus reset routine before accessing the */
346 /* environment, which might be in a chip on that bus. For details */
347 /* about this problem see doc/I2C_Edge_Conditions. */
348 i2c_init_board();
349 #else
350 /*
351 * WARNING: Do NOT save speed in a static variable: if the
352 * I2C routines are called before RAM is initialized (to read
353 * the DIMM SPD, for instance), RAM won't be usable and your
354 * system will crash.
355 */
356 send_reset ();
357 #endif
358 }
359
360 /*-----------------------------------------------------------------------
361 * Probe to see if a chip is present. Also good for checking for the
362 * completion of EEPROM writes since the chip stops responding until
363 * the write completes (typically 10mSec).
364 */
365 int i2c_probe(uchar addr)
366 {
367 int rc;
368
369 /*
370 * perform 1 byte write transaction with just address byte
371 * (fake write)
372 */
373 send_start();
374 rc = write_byte ((addr << 1) | 0);
375 send_stop();
376
377 return (rc ? 1 : 0);
378 }
379
380 /*-----------------------------------------------------------------------
381 * Read bytes
382 */
383 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
384 {
385 int shift;
386 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
387 chip, addr, alen, buffer, len);
388
389 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
390 /*
391 * EEPROM chips that implement "address overflow" are ones
392 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
393 * address and the extra bits end up in the "chip address"
394 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
395 * four 256 byte chips.
396 *
397 * Note that we consider the length of the address field to
398 * still be one byte because the extra address bits are
399 * hidden in the chip address.
400 */
401 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
402
403 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
404 chip, addr);
405 #endif
406
407 /*
408 * Do the addressing portion of a write cycle to set the
409 * chip's address pointer. If the address length is zero,
410 * don't do the normal write cycle to set the address pointer,
411 * there is no address pointer in this chip.
412 */
413 send_start();
414 if(alen > 0) {
415 if(write_byte(chip << 1)) { /* write cycle */
416 send_stop();
417 PRINTD("i2c_read, no chip responded %02X\n", chip);
418 return(1);
419 }
420 shift = (alen-1) * 8;
421 while(alen-- > 0) {
422 if(write_byte(addr >> shift)) {
423 PRINTD("i2c_read, address not <ACK>ed\n");
424 return(1);
425 }
426 shift -= 8;
427 }
428
429 /* Some I2C chips need a stop/start sequence here,
430 * other chips don't work with a full stop and need
431 * only a start. Default behaviour is to send the
432 * stop/start sequence.
433 */
434 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
435 send_start();
436 #else
437 send_stop();
438 send_start();
439 #endif
440 }
441 /*
442 * Send the chip address again, this time for a read cycle.
443 * Then read the data. On the last byte, we do a NACK instead
444 * of an ACK(len == 0) to terminate the read.
445 */
446 write_byte((chip << 1) | 1); /* read cycle */
447 while(len-- > 0) {
448 *buffer++ = read_byte(len == 0);
449 }
450 send_stop();
451 return(0);
452 }
453
454 /*-----------------------------------------------------------------------
455 * Write bytes
456 */
457 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
458 {
459 int shift, failures = 0;
460
461 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
462 chip, addr, alen, buffer, len);
463
464 send_start();
465 if(write_byte(chip << 1)) { /* write cycle */
466 send_stop();
467 PRINTD("i2c_write, no chip responded %02X\n", chip);
468 return(1);
469 }
470 shift = (alen-1) * 8;
471 while(alen-- > 0) {
472 if(write_byte(addr >> shift)) {
473 PRINTD("i2c_write, address not <ACK>ed\n");
474 return(1);
475 }
476 shift -= 8;
477 }
478
479 while(len-- > 0) {
480 if(write_byte(*buffer++)) {
481 failures++;
482 }
483 }
484 send_stop();
485 return(failures);
486 }