]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/i82365.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 ********************************************************************
25 * Lots of code copied from:
27 * i82365.c 1.352 - Linux driver for Intel 82365 and compatible
28 * PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers.
29 * (C) 1999 David A. Hinds <dahinds@users.sourceforge.net>
39 #include <cmd_pcmcia.h>
42 #include <pcmcia/ss.h>
43 #include <pcmcia/i82365.h>
44 #include <pcmcia/ti113x.h>
45 #include <pcmcia/yenta.h>
49 static struct pci_device_id supported
[] = {
50 {PCI_VENDOR_ID_TI
, PCI_DEVICE_ID_TI_1510
},
54 #define CYCLE_TIME 120
57 static void i82365_dump_regions (pci_dev_t dev
);
60 typedef struct socket_info_t
{
63 u_char pci_lat
, cb_lat
, sub_bus
, cache
;
70 static socket_info_t socket
;
71 static socket_state_t state
;
72 static struct pccard_mem_map mem
;
73 static struct pccard_io_map io
;
75 /*====================================================================*/
77 /* Some PCI shortcuts */
79 static int pci_readb (socket_info_t
* s
, int r
, u_char
* v
)
81 return pci_read_config_byte (s
->dev
, r
, v
);
83 static int pci_writeb (socket_info_t
* s
, int r
, u_char v
)
85 return pci_write_config_byte (s
->dev
, r
, v
);
87 static int pci_readw (socket_info_t
* s
, int r
, u_short
* v
)
89 return pci_read_config_word (s
->dev
, r
, v
);
91 static int pci_writew (socket_info_t
* s
, int r
, u_short v
)
93 return pci_write_config_word (s
->dev
, r
, v
);
95 static int pci_readl (socket_info_t
* s
, int r
, u_int
* v
)
97 return pci_read_config_dword (s
->dev
, r
, v
);
99 static int pci_writel (socket_info_t
* s
, int r
, u_int v
)
101 return pci_write_config_dword (s
->dev
, r
, v
);
104 #define cb_readb(s, r) readb((s)->cb_phys + (r))
105 #define cb_readl(s, r) readl((s)->cb_phys + (r))
106 #define cb_writeb(s, r, v) writeb(v, (s)->cb_phys + (r))
107 #define cb_writel(s, r, v) writel(v, (s)->cb_phys + (r))
109 /*====================================================================*/
111 static u_char
i365_get (socket_info_t
* s
, u_short reg
)
113 return cb_readb (s
, 0x0800 + reg
);
116 static void i365_set (socket_info_t
* s
, u_short reg
, u_char data
)
118 cb_writeb (s
, 0x0800 + reg
, data
);
121 static void i365_bset (socket_info_t
* s
, u_short reg
, u_char mask
)
123 i365_set (s
, reg
, i365_get (s
, reg
) | mask
);
126 static void i365_bclr (socket_info_t
* s
, u_short reg
, u_char mask
)
128 i365_set (s
, reg
, i365_get (s
, reg
) & ~mask
);
132 static void i365_bflip (socket_info_t
* s
, u_short reg
, u_char mask
, int b
)
134 u_char d
= i365_get (s
, reg
);
136 i365_set (s
, reg
, (b
) ? (d
| mask
) : (d
& ~mask
));
139 static u_short
i365_get_pair (socket_info_t
* s
, u_short reg
)
141 return (i365_get (s
, reg
) + (i365_get (s
, reg
+ 1) << 8));
143 #endif /* not used */
145 static void i365_set_pair (socket_info_t
* s
, u_short reg
, u_short data
)
147 i365_set (s
, reg
, data
& 0xff);
148 i365_set (s
, reg
+ 1, data
>> 8);
151 /*======================================================================
153 Code to save and restore global state information for TI 1130 and
154 TI 1131 controllers, and to set and report global configuration
157 ======================================================================*/
159 static void ti113x_get_state (socket_info_t
* s
)
161 ti113x_state_t
*p
= &s
->state
;
163 pci_readl (s
, TI113X_SYSTEM_CONTROL
, &p
->sysctl
);
164 pci_readb (s
, TI113X_CARD_CONTROL
, &p
->cardctl
);
165 pci_readb (s
, TI113X_DEVICE_CONTROL
, &p
->devctl
);
166 pci_readb (s
, TI1250_DIAGNOSTIC
, &p
->diag
);
167 pci_readl (s
, TI12XX_IRQMUX
, &p
->irqmux
);
170 static void ti113x_set_state (socket_info_t
* s
)
172 ti113x_state_t
*p
= &s
->state
;
174 pci_writel (s
, TI113X_SYSTEM_CONTROL
, p
->sysctl
);
175 pci_writeb (s
, TI113X_CARD_CONTROL
, p
->cardctl
);
176 pci_writeb (s
, TI113X_DEVICE_CONTROL
, p
->devctl
);
177 pci_writeb (s
, TI1250_MULTIMEDIA_CTL
, 0);
178 pci_writeb (s
, TI1250_DIAGNOSTIC
, p
->diag
);
179 pci_writel (s
, TI12XX_IRQMUX
, p
->irqmux
);
180 i365_set_pair (s
, TI113X_IO_OFFSET (0), 0);
181 i365_set_pair (s
, TI113X_IO_OFFSET (1), 0);
184 static u_int
ti113x_set_opts (socket_info_t
* s
)
186 ti113x_state_t
*p
= &s
->state
;
189 p
->cardctl
&= ~TI113X_CCR_ZVENABLE
;
190 p
->cardctl
|= TI113X_CCR_SPKROUTEN
;
195 /*======================================================================
197 Routines to handle common CardBus options
199 ======================================================================*/
201 /* Default settings for PCI command configuration register */
202 #define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
203 PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
205 static void cb_get_state (socket_info_t
* s
)
207 pci_readb (s
, PCI_CACHE_LINE_SIZE
, &s
->cache
);
208 pci_readb (s
, PCI_LATENCY_TIMER
, &s
->pci_lat
);
209 pci_readb (s
, CB_LATENCY_TIMER
, &s
->cb_lat
);
210 pci_readb (s
, CB_CARDBUS_BUS
, &s
->cap
.cardbus
);
211 pci_readb (s
, CB_SUBORD_BUS
, &s
->sub_bus
);
212 pci_readw (s
, CB_BRIDGE_CONTROL
, &s
->bcr
);
215 static void cb_set_state (socket_info_t
* s
)
217 pci_writel (s
, CB_LEGACY_MODE_BASE
, 0);
218 pci_writel (s
, PCI_BASE_ADDRESS_0
, s
->cb_phys
);
219 pci_writew (s
, PCI_COMMAND
, CMD_DFLT
);
220 pci_writeb (s
, PCI_CACHE_LINE_SIZE
, s
->cache
);
221 pci_writeb (s
, PCI_LATENCY_TIMER
, s
->pci_lat
);
222 pci_writeb (s
, CB_LATENCY_TIMER
, s
->cb_lat
);
223 pci_writeb (s
, CB_CARDBUS_BUS
, s
->cap
.cardbus
);
224 pci_writeb (s
, CB_SUBORD_BUS
, s
->sub_bus
);
225 pci_writew (s
, CB_BRIDGE_CONTROL
, s
->bcr
);
228 static void cb_set_opts (socket_info_t
* s
)
238 /*======================================================================
240 Power control for Cardbus controllers: used both for 16-bit and
243 ======================================================================*/
245 static int cb_set_power (socket_info_t
* s
, socket_state_t
* state
)
249 /* restart card voltage detection if it seems appropriate */
250 if ((state
->Vcc
== 0) && (state
->Vpp
== 0) &&
251 !(cb_readl (s
, CB_SOCKET_STATE
) & CB_SS_VSENSE
))
252 cb_writel (s
, CB_SOCKET_FORCE
, CB_SF_CVSTEST
);
253 switch (state
->Vcc
) {
266 switch (state
->Vpp
) {
276 reg
|= CB_SC_VPP_12V
;
281 if (reg
!= cb_readl (s
, CB_SOCKET_CONTROL
))
282 cb_writel (s
, CB_SOCKET_CONTROL
, reg
);
286 /*======================================================================
288 Generic routines to get and set controller options
290 ======================================================================*/
292 static void get_bridge_state (socket_info_t
* s
)
294 ti113x_get_state (s
);
298 static void set_bridge_state (socket_info_t
* s
)
301 i365_set (s
, I365_GBLCTL
, 0x00);
302 i365_set (s
, I365_GENCTL
, 0x00);
303 ti113x_set_state (s
);
306 static void set_bridge_opts (socket_info_t
* s
)
312 /*====================================================================*/
314 static int i365_get_status (socket_info_t
* s
, u_int
* value
)
318 status
= i365_get (s
, I365_STATUS
);
319 *value
= ((status
& I365_CS_DETECT
) == I365_CS_DETECT
) ? SS_DETECT
: 0;
320 if (i365_get (s
, I365_INTCTL
) & I365_PC_IOCARD
) {
321 *value
|= (status
& I365_CS_STSCHG
) ? 0 : SS_STSCHG
;
323 *value
|= (status
& I365_CS_BVD1
) ? 0 : SS_BATDEAD
;
324 *value
|= (status
& I365_CS_BVD2
) ? 0 : SS_BATWARN
;
326 *value
|= (status
& I365_CS_WRPROT
) ? SS_WRPROT
: 0;
327 *value
|= (status
& I365_CS_READY
) ? SS_READY
: 0;
328 *value
|= (status
& I365_CS_POWERON
) ? SS_POWERON
: 0;
330 status
= cb_readl (s
, CB_SOCKET_STATE
);
331 *value
|= (status
& CB_SS_32BIT
) ? SS_CARDBUS
: 0;
332 *value
|= (status
& CB_SS_3VCARD
) ? SS_3VCARD
: 0;
333 *value
|= (status
& CB_SS_XVCARD
) ? SS_XVCARD
: 0;
334 *value
|= (status
& CB_SS_VSENSE
) ? 0 : SS_PENDING
;
335 /* For now, ignore cards with unsupported voltage keys */
336 if (*value
& SS_XVCARD
)
337 *value
&= ~(SS_DETECT
| SS_3VCARD
| SS_XVCARD
);
340 } /* i365_get_status */
342 static int i365_set_socket (socket_info_t
* s
, socket_state_t
* state
)
346 set_bridge_state (s
);
348 /* IO card, RESET flag */
350 reg
|= (state
->flags
& SS_RESET
) ? 0 : I365_PC_RESET
;
351 reg
|= (state
->flags
& SS_IOCARD
) ? I365_PC_IOCARD
: 0;
352 i365_set (s
, I365_INTCTL
, reg
);
354 reg
= I365_PWR_NORESET
;
355 if (state
->flags
& SS_PWR_AUTO
)
356 reg
|= I365_PWR_AUTO
;
357 if (state
->flags
& SS_OUTPUT_ENA
)
360 cb_set_power (s
, state
);
361 reg
|= i365_get (s
, I365_POWER
) & (I365_VCC_MASK
| I365_VPP1_MASK
);
363 if (reg
!= i365_get (s
, I365_POWER
))
364 i365_set (s
, I365_POWER
, reg
);
367 } /* i365_set_socket */
369 /*====================================================================*/
371 static int i365_set_mem_map (socket_info_t
* s
, struct pccard_mem_map
*mem
)
378 (mem
->card_start
> 0x3ffffff) ||
379 (mem
->sys_start
> mem
->sys_stop
) ||
380 (mem
->speed
> 1000)) {
384 /* Turn off the window before changing anything */
385 if (i365_get (s
, I365_ADDRWIN
) & I365_ENA_MEM (map
))
386 i365_bclr (s
, I365_ADDRWIN
, I365_ENA_MEM (map
));
388 /* Take care of high byte, for PCI controllers */
389 i365_set (s
, CB_MEM_PAGE (map
), mem
->sys_start
>> 24);
391 base
= I365_MEM (map
);
392 i
= (mem
->sys_start
>> 12) & 0x0fff;
393 if (mem
->flags
& MAP_16BIT
)
395 if (mem
->flags
& MAP_0WS
)
397 i365_set_pair (s
, base
+ I365_W_START
, i
);
399 i
= (mem
->sys_stop
>> 12) & 0x0fff;
400 switch (mem
->speed
/ CYCLE_TIME
) {
410 i
|= I365_MEM_WS1
| I365_MEM_WS0
;
413 i365_set_pair (s
, base
+ I365_W_STOP
, i
);
415 i
= ((mem
->card_start
- mem
->sys_start
) >> 12) & 0x3fff;
416 if (mem
->flags
& MAP_WRPROT
)
417 i
|= I365_MEM_WRPROT
;
418 if (mem
->flags
& MAP_ATTRIB
)
420 i365_set_pair (s
, base
+ I365_W_OFF
, i
);
422 /* Turn on the window if necessary */
423 if (mem
->flags
& MAP_ACTIVE
)
424 i365_bset (s
, I365_ADDRWIN
, I365_ENA_MEM (map
));
426 } /* i365_set_mem_map */
428 static int i365_set_io_map (socket_info_t
* s
, struct pccard_io_map
*io
)
433 if ((map
> 1) || (io
->start
> 0xffff) || (io
->stop
> 0xffff) ||
434 (io
->stop
< io
->start
))
436 /* Turn off the window before changing anything */
437 if (i365_get (s
, I365_ADDRWIN
) & I365_ENA_IO (map
))
438 i365_bclr (s
, I365_ADDRWIN
, I365_ENA_IO (map
));
439 i365_set_pair (s
, I365_IO (map
) + I365_W_START
, io
->start
);
440 i365_set_pair (s
, I365_IO (map
) + I365_W_STOP
, io
->stop
);
441 ioctl
= i365_get (s
, I365_IOCTL
) & ~I365_IOCTL_MASK (map
);
443 ioctl
|= I365_IOCTL_WAIT (map
);
444 if (io
->flags
& MAP_0WS
)
445 ioctl
|= I365_IOCTL_0WS (map
);
446 if (io
->flags
& MAP_16BIT
)
447 ioctl
|= I365_IOCTL_16BIT (map
);
448 if (io
->flags
& MAP_AUTOSZ
)
449 ioctl
|= I365_IOCTL_IOCS16 (map
);
450 i365_set (s
, I365_IOCTL
, ioctl
);
451 /* Turn on the window if necessary */
452 if (io
->flags
& MAP_ACTIVE
)
453 i365_bset (s
, I365_ADDRWIN
, I365_ENA_IO (map
));
455 } /* i365_set_io_map */
457 /*====================================================================*/
459 int i82365_init (void)
464 if ((socket
.dev
= pci_find_devices (supported
, 0)) < 0) {
465 /* Controller not found */
469 pci_read_config_dword (socket
.dev
, PCI_BASE_ADDRESS_0
, &socket
.cb_phys
);
470 socket
.cb_phys
&= ~0xf;
472 get_bridge_state (&socket
);
473 set_bridge_opts (&socket
);
475 i365_get_status (&socket
, &val
);
477 if (val
& SS_DETECT
) {
478 if (val
& SS_3VCARD
) {
479 state
.Vcc
= state
.Vpp
= 33;
480 puts (" 3.3V card found: ");
481 } else if (!(val
& SS_XVCARD
)) {
482 state
.Vcc
= state
.Vpp
= 50;
483 puts (" 5.0V card found: ");
485 printf ("i82365: unsupported voltage key\n");
486 state
.Vcc
= state
.Vpp
= 0;
489 /* No card inserted */
493 state
.flags
= SS_IOCARD
| SS_OUTPUT_ENA
;
497 i365_set_socket (&socket
, &state
);
499 for (i
= 500; i
; i
--) {
500 if ((i365_get (&socket
, I365_STATUS
) & I365_CS_READY
))
506 /* PC Card not ready for data transfer */
511 mem
.flags
= MAP_ATTRIB
| MAP_ACTIVE
;
513 mem
.sys_start
= CFG_PCMCIA_MEM_ADDR
;
514 mem
.sys_stop
= CFG_PCMCIA_MEM_ADDR
+ CFG_PCMCIA_MEM_SIZE
- 1;
517 i365_set_mem_map (&socket
, &mem
);
520 io
.flags
= MAP_AUTOSZ
| MAP_ACTIVE
;
525 i365_set_io_map (&socket
, &io
);
528 i82365_dump_regions (socket
.dev
);
534 void i82365_exit (void)
542 i365_set_io_map (&socket
, &io
);
548 mem
.sys_stop
= 0x1000;
551 i365_set_mem_map (&socket
, &mem
);
553 socket
.state
.sysctl
&= 0xFFFF00FF;
555 state
.Vcc
= state
.Vpp
= 0;
557 i365_set_socket (&socket
, &state
);
560 /*======================================================================
564 ======================================================================*/
567 static void i82365_dump_regions (pci_dev_t dev
)
570 u_int
*mem
= (void *) sock
.cb_phys
;
571 u_char
*cis
= (void *) CFG_PCMCIA_MEM_ADDR
;
572 u_char
*ide
= (void *) (CFG_ATA_BASE_ADDR
+ CFG_ATA_REG_OFFSET
);
574 pci_read_config_dword (dev
, 0x00, tmp
+ 0);
575 pci_read_config_dword (dev
, 0x80, tmp
+ 1);
577 printf ("PCI CONF: %08X ... %08X\n", tmp
[0], tmp
[1]);
578 printf ("PCI MEM: ... %08X ... %08X\n", mem
[0x8 / 4], mem
[0x800 / 4]);
579 printf ("CIS: ...%c%c%c%c%c%c%c%c...\n",
580 cis
[0x38], cis
[0x3a], cis
[0x3c], cis
[0x3e],
581 cis
[0x40], cis
[0x42], cis
[0x44], cis
[0x48]);
582 printf ("CIS CONF: %02X %02X %02X ...\n",
583 cis
[0x200], cis
[0x202], cis
[0x204]);
584 printf ("IDE: %02X %02X %02X %02X %02X %02X %02X %02X\n",
585 ide
[0], ide
[1], ide
[2], ide
[3],
586 ide
[4], ide
[5], ide
[6], ide
[7]);
590 #endif /* CONFIG_I82365 */