2 * Copyright (C) 2012 Invensense, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/err.h>
18 #include <linux/delay.h>
19 #include <linux/sysfs.h>
20 #include <linux/jiffies.h>
21 #include <linux/irq.h>
22 #include <linux/interrupt.h>
23 #include <linux/kfifo.h>
24 #include <linux/spinlock.h>
25 #include <linux/iio/iio.h>
26 #include <linux/acpi.h>
27 #include <linux/platform_device.h>
28 #include "inv_mpu_iio.h"
31 * this is the gyro scale translated from dynamic range plus/minus
32 * {250, 500, 1000, 2000} to rad/s
34 static const int gyro_scale_6050
[] = {133090, 266181, 532362, 1064724};
37 * this is the accel scale translated from dynamic range plus/minus
38 * {2, 4, 8, 16} to m/s^2
40 static const int accel_scale
[] = {598, 1196, 2392, 4785};
42 static const struct inv_mpu6050_reg_map reg_set_6500
= {
43 .sample_rate_div
= INV_MPU6050_REG_SAMPLE_RATE_DIV
,
44 .lpf
= INV_MPU6050_REG_CONFIG
,
45 .accel_lpf
= INV_MPU6500_REG_ACCEL_CONFIG_2
,
46 .user_ctrl
= INV_MPU6050_REG_USER_CTRL
,
47 .fifo_en
= INV_MPU6050_REG_FIFO_EN
,
48 .gyro_config
= INV_MPU6050_REG_GYRO_CONFIG
,
49 .accl_config
= INV_MPU6050_REG_ACCEL_CONFIG
,
50 .fifo_count_h
= INV_MPU6050_REG_FIFO_COUNT_H
,
51 .fifo_r_w
= INV_MPU6050_REG_FIFO_R_W
,
52 .raw_gyro
= INV_MPU6050_REG_RAW_GYRO
,
53 .raw_accl
= INV_MPU6050_REG_RAW_ACCEL
,
54 .temperature
= INV_MPU6050_REG_TEMPERATURE
,
55 .int_enable
= INV_MPU6050_REG_INT_ENABLE
,
56 .int_status
= INV_MPU6050_REG_INT_STATUS
,
57 .pwr_mgmt_1
= INV_MPU6050_REG_PWR_MGMT_1
,
58 .pwr_mgmt_2
= INV_MPU6050_REG_PWR_MGMT_2
,
59 .int_pin_cfg
= INV_MPU6050_REG_INT_PIN_CFG
,
60 .accl_offset
= INV_MPU6500_REG_ACCEL_OFFSET
,
61 .gyro_offset
= INV_MPU6050_REG_GYRO_OFFSET
,
64 static const struct inv_mpu6050_reg_map reg_set_6050
= {
65 .sample_rate_div
= INV_MPU6050_REG_SAMPLE_RATE_DIV
,
66 .lpf
= INV_MPU6050_REG_CONFIG
,
67 .user_ctrl
= INV_MPU6050_REG_USER_CTRL
,
68 .fifo_en
= INV_MPU6050_REG_FIFO_EN
,
69 .gyro_config
= INV_MPU6050_REG_GYRO_CONFIG
,
70 .accl_config
= INV_MPU6050_REG_ACCEL_CONFIG
,
71 .fifo_count_h
= INV_MPU6050_REG_FIFO_COUNT_H
,
72 .fifo_r_w
= INV_MPU6050_REG_FIFO_R_W
,
73 .raw_gyro
= INV_MPU6050_REG_RAW_GYRO
,
74 .raw_accl
= INV_MPU6050_REG_RAW_ACCEL
,
75 .temperature
= INV_MPU6050_REG_TEMPERATURE
,
76 .int_enable
= INV_MPU6050_REG_INT_ENABLE
,
77 .pwr_mgmt_1
= INV_MPU6050_REG_PWR_MGMT_1
,
78 .pwr_mgmt_2
= INV_MPU6050_REG_PWR_MGMT_2
,
79 .int_pin_cfg
= INV_MPU6050_REG_INT_PIN_CFG
,
80 .accl_offset
= INV_MPU6050_REG_ACCEL_OFFSET
,
81 .gyro_offset
= INV_MPU6050_REG_GYRO_OFFSET
,
84 static const struct inv_mpu6050_chip_config chip_config_6050
= {
85 .fsr
= INV_MPU6050_FSR_2000DPS
,
86 .lpf
= INV_MPU6050_FILTER_20HZ
,
87 .fifo_rate
= INV_MPU6050_INIT_FIFO_RATE
,
88 .gyro_fifo_enable
= false,
89 .accl_fifo_enable
= false,
90 .accl_fs
= INV_MPU6050_FS_02G
,
94 /* Indexed by enum inv_devices */
95 static const struct inv_mpu6050_hw hw_info
[] = {
97 .whoami
= INV_MPU6050_WHOAMI_VALUE
,
100 .config
= &chip_config_6050
,
103 .whoami
= INV_MPU6500_WHOAMI_VALUE
,
105 .reg
= ®_set_6500
,
106 .config
= &chip_config_6050
,
109 .whoami
= INV_MPU6000_WHOAMI_VALUE
,
111 .reg
= ®_set_6050
,
112 .config
= &chip_config_6050
,
115 .whoami
= INV_MPU9150_WHOAMI_VALUE
,
117 .reg
= ®_set_6050
,
118 .config
= &chip_config_6050
,
121 .whoami
= INV_MPU9250_WHOAMI_VALUE
,
123 .reg
= ®_set_6500
,
124 .config
= &chip_config_6050
,
127 .whoami
= INV_MPU9255_WHOAMI_VALUE
,
129 .reg
= ®_set_6500
,
130 .config
= &chip_config_6050
,
133 .whoami
= INV_ICM20608_WHOAMI_VALUE
,
135 .reg
= ®_set_6500
,
136 .config
= &chip_config_6050
,
140 int inv_mpu6050_switch_engine(struct inv_mpu6050_state
*st
, bool en
, u32 mask
)
142 unsigned int d
, mgmt_1
;
145 * switch clock needs to be careful. Only when gyro is on, can
146 * clock source be switched to gyro. Otherwise, it must be set to
149 if (mask
== INV_MPU6050_BIT_PWR_GYRO_STBY
) {
150 result
= regmap_read(st
->map
, st
->reg
->pwr_mgmt_1
, &mgmt_1
);
154 mgmt_1
&= ~INV_MPU6050_BIT_CLK_MASK
;
157 if ((mask
== INV_MPU6050_BIT_PWR_GYRO_STBY
) && (!en
)) {
159 * turning off gyro requires switch to internal clock first.
160 * Then turn off gyro engine
162 mgmt_1
|= INV_CLK_INTERNAL
;
163 result
= regmap_write(st
->map
, st
->reg
->pwr_mgmt_1
, mgmt_1
);
168 result
= regmap_read(st
->map
, st
->reg
->pwr_mgmt_2
, &d
);
175 result
= regmap_write(st
->map
, st
->reg
->pwr_mgmt_2
, d
);
180 /* Wait for output to stabilize */
181 msleep(INV_MPU6050_TEMP_UP_TIME
);
182 if (mask
== INV_MPU6050_BIT_PWR_GYRO_STBY
) {
183 /* switch internal clock to PLL */
184 mgmt_1
|= INV_CLK_PLL
;
185 result
= regmap_write(st
->map
,
186 st
->reg
->pwr_mgmt_1
, mgmt_1
);
195 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state
*st
, bool power_on
)
200 if (!st
->powerup_count
) {
201 result
= regmap_write(st
->map
, st
->reg
->pwr_mgmt_1
, 0);
204 usleep_range(INV_MPU6050_REG_UP_TIME_MIN
,
205 INV_MPU6050_REG_UP_TIME_MAX
);
209 if (st
->powerup_count
== 1) {
210 result
= regmap_write(st
->map
, st
->reg
->pwr_mgmt_1
,
211 INV_MPU6050_BIT_SLEEP
);
218 dev_dbg(regmap_get_device(st
->map
), "set power %d, count=%u\n",
219 power_on
, st
->powerup_count
);
223 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg
);
226 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
228 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
229 * MPU6500 and above have a dedicated register for accelerometer
231 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state
*st
,
232 enum inv_mpu6050_filter_e val
)
236 result
= regmap_write(st
->map
, st
->reg
->lpf
, val
);
240 switch (st
->chip_type
) {
244 /* old chips, nothing to do */
249 result
= regmap_write(st
->map
, st
->reg
->accel_lpf
, val
);
257 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
259 * Initial configuration:
263 * Clock source: Gyro PLL
265 static int inv_mpu6050_init_config(struct iio_dev
*indio_dev
)
269 struct inv_mpu6050_state
*st
= iio_priv(indio_dev
);
271 result
= inv_mpu6050_set_power_itg(st
, true);
274 d
= (INV_MPU6050_FSR_2000DPS
<< INV_MPU6050_GYRO_CONFIG_FSR_SHIFT
);
275 result
= regmap_write(st
->map
, st
->reg
->gyro_config
, d
);
277 goto error_power_off
;
279 result
= inv_mpu6050_set_lpf_regs(st
, INV_MPU6050_FILTER_20HZ
);
281 goto error_power_off
;
283 d
= INV_MPU6050_ONE_K_HZ
/ INV_MPU6050_INIT_FIFO_RATE
- 1;
284 result
= regmap_write(st
->map
, st
->reg
->sample_rate_div
, d
);
286 goto error_power_off
;
288 d
= (INV_MPU6050_FS_02G
<< INV_MPU6050_ACCL_CONFIG_FSR_SHIFT
);
289 result
= regmap_write(st
->map
, st
->reg
->accl_config
, d
);
291 goto error_power_off
;
293 result
= regmap_write(st
->map
, st
->reg
->int_pin_cfg
, st
->irq_mask
);
297 memcpy(&st
->chip_config
, hw_info
[st
->chip_type
].config
,
298 sizeof(struct inv_mpu6050_chip_config
));
300 return inv_mpu6050_set_power_itg(st
, false);
303 inv_mpu6050_set_power_itg(st
, false);
307 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state
*st
, int reg
,
311 __be16 d
= cpu_to_be16(val
);
313 ind
= (axis
- IIO_MOD_X
) * 2;
314 result
= regmap_bulk_write(st
->map
, reg
+ ind
, (u8
*)&d
, 2);
321 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state
*st
, int reg
,
327 ind
= (axis
- IIO_MOD_X
) * 2;
328 result
= regmap_bulk_read(st
->map
, reg
+ ind
, (u8
*)&d
, 2);
331 *val
= (short)be16_to_cpup(&d
);
336 static int inv_mpu6050_read_channel_data(struct iio_dev
*indio_dev
,
337 struct iio_chan_spec
const *chan
,
340 struct inv_mpu6050_state
*st
= iio_priv(indio_dev
);
344 result
= inv_mpu6050_set_power_itg(st
, true);
348 switch (chan
->type
) {
350 result
= inv_mpu6050_switch_engine(st
, true,
351 INV_MPU6050_BIT_PWR_GYRO_STBY
);
353 goto error_power_off
;
354 ret
= inv_mpu6050_sensor_show(st
, st
->reg
->raw_gyro
,
355 chan
->channel2
, val
);
356 result
= inv_mpu6050_switch_engine(st
, false,
357 INV_MPU6050_BIT_PWR_GYRO_STBY
);
359 goto error_power_off
;
362 result
= inv_mpu6050_switch_engine(st
, true,
363 INV_MPU6050_BIT_PWR_ACCL_STBY
);
365 goto error_power_off
;
366 ret
= inv_mpu6050_sensor_show(st
, st
->reg
->raw_accl
,
367 chan
->channel2
, val
);
368 result
= inv_mpu6050_switch_engine(st
, false,
369 INV_MPU6050_BIT_PWR_ACCL_STBY
);
371 goto error_power_off
;
374 /* wait for stablization */
375 msleep(INV_MPU6050_SENSOR_UP_TIME
);
376 ret
= inv_mpu6050_sensor_show(st
, st
->reg
->temperature
,
384 result
= inv_mpu6050_set_power_itg(st
, false);
386 goto error_power_off
;
391 inv_mpu6050_set_power_itg(st
, false);
396 inv_mpu6050_read_raw(struct iio_dev
*indio_dev
,
397 struct iio_chan_spec
const *chan
,
398 int *val
, int *val2
, long mask
)
400 struct inv_mpu6050_state
*st
= iio_priv(indio_dev
);
404 case IIO_CHAN_INFO_RAW
:
405 ret
= iio_device_claim_direct_mode(indio_dev
);
408 mutex_lock(&st
->lock
);
409 ret
= inv_mpu6050_read_channel_data(indio_dev
, chan
, val
);
410 mutex_unlock(&st
->lock
);
411 iio_device_release_direct_mode(indio_dev
);
413 case IIO_CHAN_INFO_SCALE
:
414 switch (chan
->type
) {
416 mutex_lock(&st
->lock
);
418 *val2
= gyro_scale_6050
[st
->chip_config
.fsr
];
419 mutex_unlock(&st
->lock
);
421 return IIO_VAL_INT_PLUS_NANO
;
423 mutex_lock(&st
->lock
);
425 *val2
= accel_scale
[st
->chip_config
.accl_fs
];
426 mutex_unlock(&st
->lock
);
428 return IIO_VAL_INT_PLUS_MICRO
;
431 *val2
= INV_MPU6050_TEMP_SCALE
;
433 return IIO_VAL_INT_PLUS_MICRO
;
437 case IIO_CHAN_INFO_OFFSET
:
438 switch (chan
->type
) {
440 *val
= INV_MPU6050_TEMP_OFFSET
;
446 case IIO_CHAN_INFO_CALIBBIAS
:
447 switch (chan
->type
) {
449 mutex_lock(&st
->lock
);
450 ret
= inv_mpu6050_sensor_show(st
, st
->reg
->gyro_offset
,
451 chan
->channel2
, val
);
452 mutex_unlock(&st
->lock
);
455 mutex_lock(&st
->lock
);
456 ret
= inv_mpu6050_sensor_show(st
, st
->reg
->accl_offset
,
457 chan
->channel2
, val
);
458 mutex_unlock(&st
->lock
);
469 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state
*st
, int val
)
474 for (i
= 0; i
< ARRAY_SIZE(gyro_scale_6050
); ++i
) {
475 if (gyro_scale_6050
[i
] == val
) {
476 d
= (i
<< INV_MPU6050_GYRO_CONFIG_FSR_SHIFT
);
477 result
= regmap_write(st
->map
, st
->reg
->gyro_config
, d
);
481 st
->chip_config
.fsr
= i
;
489 static int inv_write_raw_get_fmt(struct iio_dev
*indio_dev
,
490 struct iio_chan_spec
const *chan
, long mask
)
493 case IIO_CHAN_INFO_SCALE
:
494 switch (chan
->type
) {
496 return IIO_VAL_INT_PLUS_NANO
;
498 return IIO_VAL_INT_PLUS_MICRO
;
501 return IIO_VAL_INT_PLUS_MICRO
;
507 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state
*st
, int val
)
512 for (i
= 0; i
< ARRAY_SIZE(accel_scale
); ++i
) {
513 if (accel_scale
[i
] == val
) {
514 d
= (i
<< INV_MPU6050_ACCL_CONFIG_FSR_SHIFT
);
515 result
= regmap_write(st
->map
, st
->reg
->accl_config
, d
);
519 st
->chip_config
.accl_fs
= i
;
527 static int inv_mpu6050_write_raw(struct iio_dev
*indio_dev
,
528 struct iio_chan_spec
const *chan
,
529 int val
, int val2
, long mask
)
531 struct inv_mpu6050_state
*st
= iio_priv(indio_dev
);
535 * we should only update scale when the chip is disabled, i.e.
538 result
= iio_device_claim_direct_mode(indio_dev
);
542 mutex_lock(&st
->lock
);
543 result
= inv_mpu6050_set_power_itg(st
, true);
545 goto error_write_raw_unlock
;
548 case IIO_CHAN_INFO_SCALE
:
549 switch (chan
->type
) {
551 result
= inv_mpu6050_write_gyro_scale(st
, val2
);
554 result
= inv_mpu6050_write_accel_scale(st
, val2
);
561 case IIO_CHAN_INFO_CALIBBIAS
:
562 switch (chan
->type
) {
564 result
= inv_mpu6050_sensor_set(st
,
565 st
->reg
->gyro_offset
,
566 chan
->channel2
, val
);
569 result
= inv_mpu6050_sensor_set(st
,
570 st
->reg
->accl_offset
,
571 chan
->channel2
, val
);
583 result
|= inv_mpu6050_set_power_itg(st
, false);
584 error_write_raw_unlock
:
585 mutex_unlock(&st
->lock
);
586 iio_device_release_direct_mode(indio_dev
);
592 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
594 * Based on the Nyquist principle, the sampling rate must
595 * exceed twice of the bandwidth of the signal, or there
596 * would be alising. This function basically search for the
597 * correct low pass parameters based on the fifo rate, e.g,
598 * sampling frequency.
600 * lpf is set automatically when setting sampling rate to avoid any aliases.
602 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state
*st
, int rate
)
604 static const int hz
[] = {188, 98, 42, 20, 10, 5};
605 static const int d
[] = {
606 INV_MPU6050_FILTER_188HZ
, INV_MPU6050_FILTER_98HZ
,
607 INV_MPU6050_FILTER_42HZ
, INV_MPU6050_FILTER_20HZ
,
608 INV_MPU6050_FILTER_10HZ
, INV_MPU6050_FILTER_5HZ
615 while ((h
< hz
[i
]) && (i
< ARRAY_SIZE(d
) - 1))
618 result
= inv_mpu6050_set_lpf_regs(st
, data
);
621 st
->chip_config
.lpf
= data
;
627 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
630 inv_mpu6050_fifo_rate_store(struct device
*dev
, struct device_attribute
*attr
,
631 const char *buf
, size_t count
)
636 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
637 struct inv_mpu6050_state
*st
= iio_priv(indio_dev
);
639 if (kstrtoint(buf
, 10, &fifo_rate
))
641 if (fifo_rate
< INV_MPU6050_MIN_FIFO_RATE
||
642 fifo_rate
> INV_MPU6050_MAX_FIFO_RATE
)
645 result
= iio_device_claim_direct_mode(indio_dev
);
649 mutex_lock(&st
->lock
);
650 if (fifo_rate
== st
->chip_config
.fifo_rate
) {
652 goto fifo_rate_fail_unlock
;
654 result
= inv_mpu6050_set_power_itg(st
, true);
656 goto fifo_rate_fail_unlock
;
658 d
= INV_MPU6050_ONE_K_HZ
/ fifo_rate
- 1;
659 result
= regmap_write(st
->map
, st
->reg
->sample_rate_div
, d
);
661 goto fifo_rate_fail_power_off
;
662 st
->chip_config
.fifo_rate
= fifo_rate
;
664 result
= inv_mpu6050_set_lpf(st
, fifo_rate
);
666 goto fifo_rate_fail_power_off
;
668 fifo_rate_fail_power_off
:
669 result
|= inv_mpu6050_set_power_itg(st
, false);
670 fifo_rate_fail_unlock
:
671 mutex_unlock(&st
->lock
);
672 iio_device_release_direct_mode(indio_dev
);
680 * inv_fifo_rate_show() - Get the current sampling rate.
683 inv_fifo_rate_show(struct device
*dev
, struct device_attribute
*attr
,
686 struct inv_mpu6050_state
*st
= iio_priv(dev_to_iio_dev(dev
));
689 mutex_lock(&st
->lock
);
690 fifo_rate
= st
->chip_config
.fifo_rate
;
691 mutex_unlock(&st
->lock
);
693 return scnprintf(buf
, PAGE_SIZE
, "%u\n", fifo_rate
);
697 * inv_attr_show() - calling this function will show current
700 * Deprecated in favor of IIO mounting matrix API.
702 * See inv_get_mount_matrix()
704 static ssize_t
inv_attr_show(struct device
*dev
, struct device_attribute
*attr
,
707 struct inv_mpu6050_state
*st
= iio_priv(dev_to_iio_dev(dev
));
708 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
711 switch (this_attr
->address
) {
713 * In MPU6050, the two matrix are the same because gyro and accel
714 * are integrated in one chip
716 case ATTR_GYRO_MATRIX
:
717 case ATTR_ACCL_MATRIX
:
718 m
= st
->plat_data
.orientation
;
720 return scnprintf(buf
, PAGE_SIZE
,
721 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
722 m
[0], m
[1], m
[2], m
[3], m
[4], m
[5], m
[6], m
[7], m
[8]);
729 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
731 * @indio_dev: The IIO device
732 * @trig: The new trigger
734 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
735 * device, -EINVAL otherwise.
737 static int inv_mpu6050_validate_trigger(struct iio_dev
*indio_dev
,
738 struct iio_trigger
*trig
)
740 struct inv_mpu6050_state
*st
= iio_priv(indio_dev
);
742 if (st
->trig
!= trig
)
748 static const struct iio_mount_matrix
*
749 inv_get_mount_matrix(const struct iio_dev
*indio_dev
,
750 const struct iio_chan_spec
*chan
)
752 return &((struct inv_mpu6050_state
*)iio_priv(indio_dev
))->orientation
;
755 static const struct iio_chan_spec_ext_info inv_ext_info
[] = {
756 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE
, inv_get_mount_matrix
),
760 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
764 .channel2 = _channel2, \
765 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
766 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
767 BIT(IIO_CHAN_INFO_CALIBBIAS), \
768 .scan_index = _index, \
774 .endianness = IIO_BE, \
776 .ext_info = inv_ext_info, \
779 static const struct iio_chan_spec inv_mpu_channels
[] = {
780 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP
),
782 * Note that temperature should only be via polled reading only,
783 * not the final scan elements output.
787 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
)
788 | BIT(IIO_CHAN_INFO_OFFSET
)
789 | BIT(IIO_CHAN_INFO_SCALE
),
792 INV_MPU6050_CHAN(IIO_ANGL_VEL
, IIO_MOD_X
, INV_MPU6050_SCAN_GYRO_X
),
793 INV_MPU6050_CHAN(IIO_ANGL_VEL
, IIO_MOD_Y
, INV_MPU6050_SCAN_GYRO_Y
),
794 INV_MPU6050_CHAN(IIO_ANGL_VEL
, IIO_MOD_Z
, INV_MPU6050_SCAN_GYRO_Z
),
796 INV_MPU6050_CHAN(IIO_ACCEL
, IIO_MOD_X
, INV_MPU6050_SCAN_ACCL_X
),
797 INV_MPU6050_CHAN(IIO_ACCEL
, IIO_MOD_Y
, INV_MPU6050_SCAN_ACCL_Y
),
798 INV_MPU6050_CHAN(IIO_ACCEL
, IIO_MOD_Z
, INV_MPU6050_SCAN_ACCL_Z
),
802 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
803 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
804 * low-pass filter. Specifically, each of these sampling rates are about twice
805 * the bandwidth of a corresponding low-pass filter, which should eliminate
806 * aliasing following the Nyquist principle. By picking a frequency different
807 * from these, the user risks aliasing effects.
809 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
810 static IIO_CONST_ATTR(in_anglvel_scale_available
,
811 "0.000133090 0.000266181 0.000532362 0.001064724");
812 static IIO_CONST_ATTR(in_accel_scale_available
,
813 "0.000598 0.001196 0.002392 0.004785");
814 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO
| S_IWUSR
, inv_fifo_rate_show
,
815 inv_mpu6050_fifo_rate_store
);
817 /* Deprecated: kept for userspace backward compatibility. */
818 static IIO_DEVICE_ATTR(in_gyro_matrix
, S_IRUGO
, inv_attr_show
, NULL
,
820 static IIO_DEVICE_ATTR(in_accel_matrix
, S_IRUGO
, inv_attr_show
, NULL
,
823 static struct attribute
*inv_attributes
[] = {
824 &iio_dev_attr_in_gyro_matrix
.dev_attr
.attr
, /* deprecated */
825 &iio_dev_attr_in_accel_matrix
.dev_attr
.attr
, /* deprecated */
826 &iio_dev_attr_sampling_frequency
.dev_attr
.attr
,
827 &iio_const_attr_sampling_frequency_available
.dev_attr
.attr
,
828 &iio_const_attr_in_accel_scale_available
.dev_attr
.attr
,
829 &iio_const_attr_in_anglvel_scale_available
.dev_attr
.attr
,
833 static const struct attribute_group inv_attribute_group
= {
834 .attrs
= inv_attributes
837 static const struct iio_info mpu_info
= {
838 .read_raw
= &inv_mpu6050_read_raw
,
839 .write_raw
= &inv_mpu6050_write_raw
,
840 .write_raw_get_fmt
= &inv_write_raw_get_fmt
,
841 .attrs
= &inv_attribute_group
,
842 .validate_trigger
= inv_mpu6050_validate_trigger
,
846 * inv_check_and_setup_chip() - check and setup chip.
848 static int inv_check_and_setup_chip(struct inv_mpu6050_state
*st
)
854 st
->hw
= &hw_info
[st
->chip_type
];
855 st
->reg
= hw_info
[st
->chip_type
].reg
;
857 /* check chip self-identification */
858 result
= regmap_read(st
->map
, INV_MPU6050_REG_WHOAMI
, ®val
);
861 if (regval
!= st
->hw
->whoami
) {
862 /* check whoami against all possible values */
863 for (i
= 0; i
< INV_NUM_PARTS
; ++i
) {
864 if (regval
== hw_info
[i
].whoami
) {
865 dev_warn(regmap_get_device(st
->map
),
866 "whoami mismatch got %#02x (%s)"
867 "expected %#02hhx (%s)\n",
868 regval
, hw_info
[i
].name
,
869 st
->hw
->whoami
, st
->hw
->name
);
873 if (i
>= INV_NUM_PARTS
) {
874 dev_err(regmap_get_device(st
->map
),
875 "invalid whoami %#02x expected %#02hhx (%s)\n",
876 regval
, st
->hw
->whoami
, st
->hw
->name
);
881 /* reset to make sure previous state are not there */
882 result
= regmap_write(st
->map
, st
->reg
->pwr_mgmt_1
,
883 INV_MPU6050_BIT_H_RESET
);
886 msleep(INV_MPU6050_POWER_UP_TIME
);
889 * Turn power on. After reset, the sleep bit could be on
890 * or off depending on the OTP settings. Turning power on
891 * make it in a definite state as well as making the hardware
892 * state align with the software state
894 result
= inv_mpu6050_set_power_itg(st
, true);
898 result
= inv_mpu6050_switch_engine(st
, false,
899 INV_MPU6050_BIT_PWR_ACCL_STBY
);
901 goto error_power_off
;
902 result
= inv_mpu6050_switch_engine(st
, false,
903 INV_MPU6050_BIT_PWR_GYRO_STBY
);
905 goto error_power_off
;
907 return inv_mpu6050_set_power_itg(st
, false);
910 inv_mpu6050_set_power_itg(st
, false);
914 int inv_mpu_core_probe(struct regmap
*regmap
, int irq
, const char *name
,
915 int (*inv_mpu_bus_setup
)(struct iio_dev
*), int chip_type
)
917 struct inv_mpu6050_state
*st
;
918 struct iio_dev
*indio_dev
;
919 struct inv_mpu6050_platform_data
*pdata
;
920 struct device
*dev
= regmap_get_device(regmap
);
922 struct irq_data
*desc
;
925 indio_dev
= devm_iio_device_alloc(dev
, sizeof(*st
));
929 BUILD_BUG_ON(ARRAY_SIZE(hw_info
) != INV_NUM_PARTS
);
930 if (chip_type
< 0 || chip_type
>= INV_NUM_PARTS
) {
931 dev_err(dev
, "Bad invensense chip_type=%d name=%s\n",
935 st
= iio_priv(indio_dev
);
936 mutex_init(&st
->lock
);
937 st
->chip_type
= chip_type
;
938 st
->powerup_count
= 0;
942 pdata
= dev_get_platdata(dev
);
944 result
= of_iio_read_mount_matrix(dev
, "mount-matrix",
947 dev_err(dev
, "Failed to retrieve mounting matrix %d\n",
952 st
->plat_data
= *pdata
;
955 desc
= irq_get_irq_data(irq
);
957 dev_err(dev
, "Could not find IRQ %d\n", irq
);
961 irq_type
= irqd_get_trigger_type(desc
);
963 irq_type
= IRQF_TRIGGER_RISING
;
964 if (irq_type
== IRQF_TRIGGER_RISING
)
965 st
->irq_mask
= INV_MPU6050_ACTIVE_HIGH
;
966 else if (irq_type
== IRQF_TRIGGER_FALLING
)
967 st
->irq_mask
= INV_MPU6050_ACTIVE_LOW
;
968 else if (irq_type
== IRQF_TRIGGER_HIGH
)
969 st
->irq_mask
= INV_MPU6050_ACTIVE_HIGH
|
970 INV_MPU6050_LATCH_INT_EN
;
971 else if (irq_type
== IRQF_TRIGGER_LOW
)
972 st
->irq_mask
= INV_MPU6050_ACTIVE_LOW
|
973 INV_MPU6050_LATCH_INT_EN
;
975 dev_err(dev
, "Invalid interrupt type 0x%x specified\n",
980 /* power is turned on inside check chip type*/
981 result
= inv_check_and_setup_chip(st
);
985 result
= inv_mpu6050_init_config(indio_dev
);
987 dev_err(dev
, "Could not initialize device.\n");
991 if (inv_mpu_bus_setup
)
992 inv_mpu_bus_setup(indio_dev
);
994 dev_set_drvdata(dev
, indio_dev
);
995 indio_dev
->dev
.parent
= dev
;
996 /* name will be NULL when enumerated via ACPI */
998 indio_dev
->name
= name
;
1000 indio_dev
->name
= dev_name(dev
);
1001 indio_dev
->channels
= inv_mpu_channels
;
1002 indio_dev
->num_channels
= ARRAY_SIZE(inv_mpu_channels
);
1004 indio_dev
->info
= &mpu_info
;
1005 indio_dev
->modes
= INDIO_BUFFER_TRIGGERED
;
1007 result
= devm_iio_triggered_buffer_setup(dev
, indio_dev
,
1008 inv_mpu6050_irq_handler
,
1009 inv_mpu6050_read_fifo
,
1012 dev_err(dev
, "configure buffer fail %d\n", result
);
1015 result
= inv_mpu6050_probe_trigger(indio_dev
, irq_type
);
1017 dev_err(dev
, "trigger probe fail %d\n", result
);
1021 INIT_KFIFO(st
->timestamps
);
1022 spin_lock_init(&st
->time_stamp_lock
);
1023 result
= devm_iio_device_register(dev
, indio_dev
);
1025 dev_err(dev
, "IIO register fail %d\n", result
);
1031 EXPORT_SYMBOL_GPL(inv_mpu_core_probe
);
1033 #ifdef CONFIG_PM_SLEEP
1035 static int inv_mpu_resume(struct device
*dev
)
1037 struct inv_mpu6050_state
*st
= iio_priv(dev_get_drvdata(dev
));
1040 mutex_lock(&st
->lock
);
1041 result
= inv_mpu6050_set_power_itg(st
, true);
1042 mutex_unlock(&st
->lock
);
1047 static int inv_mpu_suspend(struct device
*dev
)
1049 struct inv_mpu6050_state
*st
= iio_priv(dev_get_drvdata(dev
));
1052 mutex_lock(&st
->lock
);
1053 result
= inv_mpu6050_set_power_itg(st
, false);
1054 mutex_unlock(&st
->lock
);
1058 #endif /* CONFIG_PM_SLEEP */
1060 SIMPLE_DEV_PM_OPS(inv_mpu_pmops
, inv_mpu_suspend
, inv_mpu_resume
);
1061 EXPORT_SYMBOL_GPL(inv_mpu_pmops
);
1063 MODULE_AUTHOR("Invensense Corporation");
1064 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1065 MODULE_LICENSE("GPL");