2 * Copyright(c) 2015 - 2018 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
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44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 #include <rdma/ib_mad.h>
49 #include <rdma/ib_user_verbs.h>
51 #include <linux/module.h>
52 #include <linux/utsname.h>
53 #include <linux/rculist.h>
55 #include <linux/vmalloc.h>
56 #include <rdma/opa_addr.h>
63 #include "verbs_txreq.h"
69 static unsigned int hfi1_lkey_table_size
= 16;
70 module_param_named(lkey_table_size
, hfi1_lkey_table_size
, uint
,
72 MODULE_PARM_DESC(lkey_table_size
,
73 "LKEY table size in bits (2^n, 1 <= n <= 23)");
75 static unsigned int hfi1_max_pds
= 0xFFFF;
76 module_param_named(max_pds
, hfi1_max_pds
, uint
, S_IRUGO
);
77 MODULE_PARM_DESC(max_pds
,
78 "Maximum number of protection domains to support");
80 static unsigned int hfi1_max_ahs
= 0xFFFF;
81 module_param_named(max_ahs
, hfi1_max_ahs
, uint
, S_IRUGO
);
82 MODULE_PARM_DESC(max_ahs
, "Maximum number of address handles to support");
84 unsigned int hfi1_max_cqes
= 0x2FFFFF;
85 module_param_named(max_cqes
, hfi1_max_cqes
, uint
, S_IRUGO
);
86 MODULE_PARM_DESC(max_cqes
,
87 "Maximum number of completion queue entries to support");
89 unsigned int hfi1_max_cqs
= 0x1FFFF;
90 module_param_named(max_cqs
, hfi1_max_cqs
, uint
, S_IRUGO
);
91 MODULE_PARM_DESC(max_cqs
, "Maximum number of completion queues to support");
93 unsigned int hfi1_max_qp_wrs
= 0x3FFF;
94 module_param_named(max_qp_wrs
, hfi1_max_qp_wrs
, uint
, S_IRUGO
);
95 MODULE_PARM_DESC(max_qp_wrs
, "Maximum number of QP WRs to support");
97 unsigned int hfi1_max_qps
= 32768;
98 module_param_named(max_qps
, hfi1_max_qps
, uint
, S_IRUGO
);
99 MODULE_PARM_DESC(max_qps
, "Maximum number of QPs to support");
101 unsigned int hfi1_max_sges
= 0x60;
102 module_param_named(max_sges
, hfi1_max_sges
, uint
, S_IRUGO
);
103 MODULE_PARM_DESC(max_sges
, "Maximum number of SGEs to support");
105 unsigned int hfi1_max_mcast_grps
= 16384;
106 module_param_named(max_mcast_grps
, hfi1_max_mcast_grps
, uint
, S_IRUGO
);
107 MODULE_PARM_DESC(max_mcast_grps
,
108 "Maximum number of multicast groups to support");
110 unsigned int hfi1_max_mcast_qp_attached
= 16;
111 module_param_named(max_mcast_qp_attached
, hfi1_max_mcast_qp_attached
,
113 MODULE_PARM_DESC(max_mcast_qp_attached
,
114 "Maximum number of attached QPs to support");
116 unsigned int hfi1_max_srqs
= 1024;
117 module_param_named(max_srqs
, hfi1_max_srqs
, uint
, S_IRUGO
);
118 MODULE_PARM_DESC(max_srqs
, "Maximum number of SRQs to support");
120 unsigned int hfi1_max_srq_sges
= 128;
121 module_param_named(max_srq_sges
, hfi1_max_srq_sges
, uint
, S_IRUGO
);
122 MODULE_PARM_DESC(max_srq_sges
, "Maximum number of SRQ SGEs to support");
124 unsigned int hfi1_max_srq_wrs
= 0x1FFFF;
125 module_param_named(max_srq_wrs
, hfi1_max_srq_wrs
, uint
, S_IRUGO
);
126 MODULE_PARM_DESC(max_srq_wrs
, "Maximum number of SRQ WRs support");
128 unsigned short piothreshold
= 256;
129 module_param(piothreshold
, ushort
, S_IRUGO
);
130 MODULE_PARM_DESC(piothreshold
, "size used to determine sdma vs. pio");
132 static unsigned int sge_copy_mode
;
133 module_param(sge_copy_mode
, uint
, S_IRUGO
);
134 MODULE_PARM_DESC(sge_copy_mode
,
135 "Verbs copy mode: 0 use memcpy, 1 use cacheless copy, 2 adapt based on WSS");
137 static void verbs_sdma_complete(
138 struct sdma_txreq
*cookie
,
141 static int pio_wait(struct rvt_qp
*qp
,
142 struct send_context
*sc
,
143 struct hfi1_pkt_state
*ps
,
146 /* Length of buffer to create verbs txreq cache name */
147 #define TXREQ_NAME_LEN 24
149 /* 16B trailing buffer */
150 static const u8 trail_buf
[MAX_16B_PADDING
];
152 static uint wss_threshold
= 80;
153 module_param(wss_threshold
, uint
, S_IRUGO
);
154 MODULE_PARM_DESC(wss_threshold
, "Percentage (1-100) of LLC to use as a threshold for a cacheless copy");
155 static uint wss_clean_period
= 256;
156 module_param(wss_clean_period
, uint
, S_IRUGO
);
157 MODULE_PARM_DESC(wss_clean_period
, "Count of verbs copies before an entry in the page copy table is cleaned");
160 * Translate ib_wr_opcode into ib_wc_opcode.
162 const enum ib_wc_opcode ib_hfi1_wc_opcode
[] = {
163 [IB_WR_RDMA_WRITE
] = IB_WC_RDMA_WRITE
,
164 [IB_WR_RDMA_WRITE_WITH_IMM
] = IB_WC_RDMA_WRITE
,
165 [IB_WR_SEND
] = IB_WC_SEND
,
166 [IB_WR_SEND_WITH_IMM
] = IB_WC_SEND
,
167 [IB_WR_RDMA_READ
] = IB_WC_RDMA_READ
,
168 [IB_WR_ATOMIC_CMP_AND_SWP
] = IB_WC_COMP_SWAP
,
169 [IB_WR_ATOMIC_FETCH_AND_ADD
] = IB_WC_FETCH_ADD
,
170 [IB_WR_SEND_WITH_INV
] = IB_WC_SEND
,
171 [IB_WR_LOCAL_INV
] = IB_WC_LOCAL_INV
,
172 [IB_WR_REG_MR
] = IB_WC_REG_MR
176 * Length of header by opcode, 0 --> not supported
178 const u8 hdr_len_by_opcode
[256] = {
180 [IB_OPCODE_RC_SEND_FIRST
] = 12 + 8,
181 [IB_OPCODE_RC_SEND_MIDDLE
] = 12 + 8,
182 [IB_OPCODE_RC_SEND_LAST
] = 12 + 8,
183 [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE
] = 12 + 8 + 4,
184 [IB_OPCODE_RC_SEND_ONLY
] = 12 + 8,
185 [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE
] = 12 + 8 + 4,
186 [IB_OPCODE_RC_RDMA_WRITE_FIRST
] = 12 + 8 + 16,
187 [IB_OPCODE_RC_RDMA_WRITE_MIDDLE
] = 12 + 8,
188 [IB_OPCODE_RC_RDMA_WRITE_LAST
] = 12 + 8,
189 [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE
] = 12 + 8 + 4,
190 [IB_OPCODE_RC_RDMA_WRITE_ONLY
] = 12 + 8 + 16,
191 [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE
] = 12 + 8 + 20,
192 [IB_OPCODE_RC_RDMA_READ_REQUEST
] = 12 + 8 + 16,
193 [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST
] = 12 + 8 + 4,
194 [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE
] = 12 + 8,
195 [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST
] = 12 + 8 + 4,
196 [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY
] = 12 + 8 + 4,
197 [IB_OPCODE_RC_ACKNOWLEDGE
] = 12 + 8 + 4,
198 [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE
] = 12 + 8 + 4 + 8,
199 [IB_OPCODE_RC_COMPARE_SWAP
] = 12 + 8 + 28,
200 [IB_OPCODE_RC_FETCH_ADD
] = 12 + 8 + 28,
201 [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE
] = 12 + 8 + 4,
202 [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE
] = 12 + 8 + 4,
204 [IB_OPCODE_UC_SEND_FIRST
] = 12 + 8,
205 [IB_OPCODE_UC_SEND_MIDDLE
] = 12 + 8,
206 [IB_OPCODE_UC_SEND_LAST
] = 12 + 8,
207 [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE
] = 12 + 8 + 4,
208 [IB_OPCODE_UC_SEND_ONLY
] = 12 + 8,
209 [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE
] = 12 + 8 + 4,
210 [IB_OPCODE_UC_RDMA_WRITE_FIRST
] = 12 + 8 + 16,
211 [IB_OPCODE_UC_RDMA_WRITE_MIDDLE
] = 12 + 8,
212 [IB_OPCODE_UC_RDMA_WRITE_LAST
] = 12 + 8,
213 [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE
] = 12 + 8 + 4,
214 [IB_OPCODE_UC_RDMA_WRITE_ONLY
] = 12 + 8 + 16,
215 [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE
] = 12 + 8 + 20,
217 [IB_OPCODE_UD_SEND_ONLY
] = 12 + 8 + 8,
218 [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE
] = 12 + 8 + 12
221 static const opcode_handler opcode_handler_tbl
[256] = {
223 [IB_OPCODE_RC_SEND_FIRST
] = &hfi1_rc_rcv
,
224 [IB_OPCODE_RC_SEND_MIDDLE
] = &hfi1_rc_rcv
,
225 [IB_OPCODE_RC_SEND_LAST
] = &hfi1_rc_rcv
,
226 [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE
] = &hfi1_rc_rcv
,
227 [IB_OPCODE_RC_SEND_ONLY
] = &hfi1_rc_rcv
,
228 [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE
] = &hfi1_rc_rcv
,
229 [IB_OPCODE_RC_RDMA_WRITE_FIRST
] = &hfi1_rc_rcv
,
230 [IB_OPCODE_RC_RDMA_WRITE_MIDDLE
] = &hfi1_rc_rcv
,
231 [IB_OPCODE_RC_RDMA_WRITE_LAST
] = &hfi1_rc_rcv
,
232 [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE
] = &hfi1_rc_rcv
,
233 [IB_OPCODE_RC_RDMA_WRITE_ONLY
] = &hfi1_rc_rcv
,
234 [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE
] = &hfi1_rc_rcv
,
235 [IB_OPCODE_RC_RDMA_READ_REQUEST
] = &hfi1_rc_rcv
,
236 [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST
] = &hfi1_rc_rcv
,
237 [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE
] = &hfi1_rc_rcv
,
238 [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST
] = &hfi1_rc_rcv
,
239 [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY
] = &hfi1_rc_rcv
,
240 [IB_OPCODE_RC_ACKNOWLEDGE
] = &hfi1_rc_rcv
,
241 [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE
] = &hfi1_rc_rcv
,
242 [IB_OPCODE_RC_COMPARE_SWAP
] = &hfi1_rc_rcv
,
243 [IB_OPCODE_RC_FETCH_ADD
] = &hfi1_rc_rcv
,
244 [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE
] = &hfi1_rc_rcv
,
245 [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE
] = &hfi1_rc_rcv
,
247 [IB_OPCODE_UC_SEND_FIRST
] = &hfi1_uc_rcv
,
248 [IB_OPCODE_UC_SEND_MIDDLE
] = &hfi1_uc_rcv
,
249 [IB_OPCODE_UC_SEND_LAST
] = &hfi1_uc_rcv
,
250 [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE
] = &hfi1_uc_rcv
,
251 [IB_OPCODE_UC_SEND_ONLY
] = &hfi1_uc_rcv
,
252 [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE
] = &hfi1_uc_rcv
,
253 [IB_OPCODE_UC_RDMA_WRITE_FIRST
] = &hfi1_uc_rcv
,
254 [IB_OPCODE_UC_RDMA_WRITE_MIDDLE
] = &hfi1_uc_rcv
,
255 [IB_OPCODE_UC_RDMA_WRITE_LAST
] = &hfi1_uc_rcv
,
256 [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE
] = &hfi1_uc_rcv
,
257 [IB_OPCODE_UC_RDMA_WRITE_ONLY
] = &hfi1_uc_rcv
,
258 [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE
] = &hfi1_uc_rcv
,
260 [IB_OPCODE_UD_SEND_ONLY
] = &hfi1_ud_rcv
,
261 [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE
] = &hfi1_ud_rcv
,
263 [IB_OPCODE_CNP
] = &hfi1_cnp_rcv
268 static const u32 pio_opmask
[BIT(3)] = {
270 [IB_OPCODE_RC
>> 5] =
271 BIT(RC_OP(SEND_ONLY
) & OPMASK
) |
272 BIT(RC_OP(SEND_ONLY_WITH_IMMEDIATE
) & OPMASK
) |
273 BIT(RC_OP(RDMA_WRITE_ONLY
) & OPMASK
) |
274 BIT(RC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE
) & OPMASK
) |
275 BIT(RC_OP(RDMA_READ_REQUEST
) & OPMASK
) |
276 BIT(RC_OP(ACKNOWLEDGE
) & OPMASK
) |
277 BIT(RC_OP(ATOMIC_ACKNOWLEDGE
) & OPMASK
) |
278 BIT(RC_OP(COMPARE_SWAP
) & OPMASK
) |
279 BIT(RC_OP(FETCH_ADD
) & OPMASK
),
281 [IB_OPCODE_UC
>> 5] =
282 BIT(UC_OP(SEND_ONLY
) & OPMASK
) |
283 BIT(UC_OP(SEND_ONLY_WITH_IMMEDIATE
) & OPMASK
) |
284 BIT(UC_OP(RDMA_WRITE_ONLY
) & OPMASK
) |
285 BIT(UC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE
) & OPMASK
),
291 __be64 ib_hfi1_sys_image_guid
;
294 * Make sure the QP is ready and able to accept the given opcode.
296 static inline opcode_handler
qp_ok(struct hfi1_packet
*packet
)
298 if (!(ib_rvt_state_ops
[packet
->qp
->state
] & RVT_PROCESS_RECV_OK
))
300 if (((packet
->opcode
& RVT_OPCODE_QP_MASK
) ==
301 packet
->qp
->allowed_ops
) ||
302 (packet
->opcode
== IB_OPCODE_CNP
))
303 return opcode_handler_tbl
[packet
->opcode
];
308 static u64
hfi1_fault_tx(struct rvt_qp
*qp
, u8 opcode
, u64 pbc
)
310 #ifdef CONFIG_FAULT_INJECTION
311 if ((opcode
& IB_OPCODE_MSP
) == IB_OPCODE_MSP
)
313 * In order to drop non-IB traffic we
314 * set PbcInsertHrc to NONE (0x2).
315 * The packet will still be delivered
316 * to the receiving node but a
317 * KHdrHCRCErr (KDETH packet with a bad
318 * HCRC) will be triggered and the
319 * packet will not be delivered to the
322 pbc
|= (u64
)PBC_IHCRC_NONE
<< PBC_INSERT_HCRC_SHIFT
;
325 * In order to drop regular verbs
326 * traffic we set the PbcTestEbp
327 * flag. The packet will still be
328 * delivered to the receiving node but
329 * a 'late ebp error' will be
330 * triggered and will be dropped.
337 static int hfi1_do_pkey_check(struct hfi1_packet
*packet
)
339 struct hfi1_ctxtdata
*rcd
= packet
->rcd
;
340 struct hfi1_pportdata
*ppd
= rcd
->ppd
;
341 struct hfi1_16b_header
*hdr
= packet
->hdr
;
344 /* Pkey check needed only for bypass packets */
345 if (packet
->etype
!= RHF_RCV_TYPE_BYPASS
)
348 /* Perform pkey check */
349 pkey
= hfi1_16B_get_pkey(hdr
);
350 return ingress_pkey_check(ppd
, pkey
, packet
->sc
,
351 packet
->qp
->s_pkey_index
,
355 static inline void hfi1_handle_packet(struct hfi1_packet
*packet
,
359 struct hfi1_ctxtdata
*rcd
= packet
->rcd
;
360 struct hfi1_pportdata
*ppd
= rcd
->ppd
;
361 struct hfi1_ibport
*ibp
= rcd_to_iport(rcd
);
362 struct rvt_dev_info
*rdi
= &ppd
->dd
->verbs_dev
.rdi
;
363 opcode_handler packet_handler
;
366 inc_opstats(packet
->tlen
, &rcd
->opstats
->stats
[packet
->opcode
]);
368 if (unlikely(is_mcast
)) {
369 struct rvt_mcast
*mcast
;
370 struct rvt_mcast_qp
*p
;
374 mcast
= rvt_mcast_find(&ibp
->rvp
,
376 opa_get_lid(packet
->dlid
, 9B
));
379 list_for_each_entry_rcu(p
, &mcast
->qp_list
, list
) {
381 if (hfi1_do_pkey_check(packet
))
383 spin_lock_irqsave(&packet
->qp
->r_lock
, flags
);
384 packet_handler
= qp_ok(packet
);
385 if (likely(packet_handler
))
386 packet_handler(packet
);
388 ibp
->rvp
.n_pkt_drops
++;
389 spin_unlock_irqrestore(&packet
->qp
->r_lock
, flags
);
392 * Notify rvt_multicast_detach() if it is waiting for us
395 if (atomic_dec_return(&mcast
->refcount
) <= 1)
396 wake_up(&mcast
->wait
);
398 /* Get the destination QP number. */
399 if (packet
->etype
== RHF_RCV_TYPE_BYPASS
&&
400 hfi1_16B_get_l4(packet
->hdr
) == OPA_16B_L4_FM
)
401 qp_num
= hfi1_16B_get_dest_qpn(packet
->mgmt
);
403 qp_num
= ib_bth_get_qpn(packet
->ohdr
);
406 packet
->qp
= rvt_lookup_qpn(rdi
, &ibp
->rvp
, qp_num
);
410 if (hfi1_do_pkey_check(packet
))
413 spin_lock_irqsave(&packet
->qp
->r_lock
, flags
);
414 packet_handler
= qp_ok(packet
);
415 if (likely(packet_handler
))
416 packet_handler(packet
);
418 ibp
->rvp
.n_pkt_drops
++;
419 spin_unlock_irqrestore(&packet
->qp
->r_lock
, flags
);
426 ibp
->rvp
.n_pkt_drops
++;
430 * hfi1_ib_rcv - process an incoming packet
431 * @packet: data packet information
433 * This is called to process an incoming packet at interrupt level.
435 void hfi1_ib_rcv(struct hfi1_packet
*packet
)
437 struct hfi1_ctxtdata
*rcd
= packet
->rcd
;
439 trace_input_ibhdr(rcd
->dd
, packet
, !!(rhf_dc_info(packet
->rhf
)));
440 hfi1_handle_packet(packet
, hfi1_check_mcast(packet
->dlid
));
443 void hfi1_16B_rcv(struct hfi1_packet
*packet
)
445 struct hfi1_ctxtdata
*rcd
= packet
->rcd
;
447 trace_input_ibhdr(rcd
->dd
, packet
, false);
448 hfi1_handle_packet(packet
, hfi1_check_mcast(packet
->dlid
));
452 * This is called from a timer to check for QPs
453 * which need kernel memory in order to send a packet.
455 static void mem_timer(struct timer_list
*t
)
457 struct hfi1_ibdev
*dev
= from_timer(dev
, t
, mem_timer
);
458 struct list_head
*list
= &dev
->memwait
;
459 struct rvt_qp
*qp
= NULL
;
462 struct hfi1_qp_priv
*priv
;
464 write_seqlock_irqsave(&dev
->iowait_lock
, flags
);
465 if (!list_empty(list
)) {
466 wait
= list_first_entry(list
, struct iowait
, list
);
467 qp
= iowait_to_qp(wait
);
469 list_del_init(&priv
->s_iowait
.list
);
470 priv
->s_iowait
.lock
= NULL
;
471 /* refcount held until actual wake up */
472 if (!list_empty(list
))
473 mod_timer(&dev
->mem_timer
, jiffies
+ 1);
475 write_sequnlock_irqrestore(&dev
->iowait_lock
, flags
);
478 hfi1_qp_wakeup(qp
, RVT_S_WAIT_KMEM
);
482 * This is called with progress side lock held.
485 static void verbs_sdma_complete(
486 struct sdma_txreq
*cookie
,
489 struct verbs_txreq
*tx
=
490 container_of(cookie
, struct verbs_txreq
, txreq
);
491 struct rvt_qp
*qp
= tx
->qp
;
493 spin_lock(&qp
->s_lock
);
495 rvt_send_complete(qp
, tx
->wqe
, IB_WC_SUCCESS
);
496 } else if (qp
->ibqp
.qp_type
== IB_QPT_RC
) {
497 struct hfi1_opa_header
*hdr
;
500 hfi1_rc_send_complete(qp
, hdr
);
502 spin_unlock(&qp
->s_lock
);
507 static int wait_kmem(struct hfi1_ibdev
*dev
,
509 struct hfi1_pkt_state
*ps
)
511 struct hfi1_qp_priv
*priv
= qp
->priv
;
515 spin_lock_irqsave(&qp
->s_lock
, flags
);
516 if (ib_rvt_state_ops
[qp
->state
] & RVT_PROCESS_RECV_OK
) {
517 write_seqlock(&dev
->iowait_lock
);
518 list_add_tail(&ps
->s_txreq
->txreq
.list
,
520 if (list_empty(&priv
->s_iowait
.list
)) {
521 if (list_empty(&dev
->memwait
))
522 mod_timer(&dev
->mem_timer
, jiffies
+ 1);
523 qp
->s_flags
|= RVT_S_WAIT_KMEM
;
524 list_add_tail(&priv
->s_iowait
.list
, &dev
->memwait
);
525 priv
->s_iowait
.lock
= &dev
->iowait_lock
;
526 trace_hfi1_qpsleep(qp
, RVT_S_WAIT_KMEM
);
529 write_sequnlock(&dev
->iowait_lock
);
530 hfi1_qp_unbusy(qp
, ps
->wait
);
533 spin_unlock_irqrestore(&qp
->s_lock
, flags
);
539 * This routine calls txadds for each sg entry.
541 * Add failures will revert the sge cursor
543 static noinline
int build_verbs_ulp_payload(
544 struct sdma_engine
*sde
,
546 struct verbs_txreq
*tx
)
548 struct rvt_sge_state
*ss
= tx
->ss
;
549 struct rvt_sge
*sg_list
= ss
->sg_list
;
550 struct rvt_sge sge
= ss
->sge
;
551 u8 num_sge
= ss
->num_sge
;
556 len
= ss
->sge
.length
;
559 if (len
> ss
->sge
.sge_length
)
560 len
= ss
->sge
.sge_length
;
561 WARN_ON_ONCE(len
== 0);
562 ret
= sdma_txadd_kvaddr(
569 rvt_update_sge(ss
, len
, false);
576 ss
->num_sge
= num_sge
;
577 ss
->sg_list
= sg_list
;
582 * update_tx_opstats - record stats by opcode
584 * @ps: transmit packet state
585 * @plen: the plen in dwords
587 * This is a routine to record the tx opstats after a
588 * packet has been presented to the egress mechanism.
590 static void update_tx_opstats(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
593 #ifdef CONFIG_DEBUG_FS
594 struct hfi1_devdata
*dd
= dd_from_ibdev(qp
->ibqp
.device
);
595 struct hfi1_opcode_stats_perctx
*s
= get_cpu_ptr(dd
->tx_opstats
);
597 inc_opstats(plen
* 4, &s
->stats
[ps
->opcode
]);
603 * Build the number of DMA descriptors needed to send length bytes of data.
605 * NOTE: DMA mapping is held in the tx until completed in the ring or
606 * the tx desc is freed without having been submitted to the ring
608 * This routine ensures all the helper routine calls succeed.
611 static int build_verbs_tx_desc(
612 struct sdma_engine
*sde
,
614 struct verbs_txreq
*tx
,
615 struct hfi1_ahg_info
*ahg_info
,
619 struct hfi1_sdma_header
*phdr
= &tx
->phdr
;
620 u16 hdrbytes
= (tx
->hdr_dwords
+ sizeof(pbc
) / 4) << 2;
623 if (tx
->phdr
.hdr
.hdr_type
) {
625 * hdrbytes accounts for PBC. Need to subtract 8 bytes
626 * before calculating padding.
628 extra_bytes
= hfi1_get_16b_padding(hdrbytes
- 8, length
) +
629 (SIZE_OF_CRC
<< 2) + SIZE_OF_LT
;
631 if (!ahg_info
->ahgcount
) {
632 ret
= sdma_txinit_ahg(
641 verbs_sdma_complete
);
644 phdr
->pbc
= cpu_to_le64(pbc
);
645 ret
= sdma_txadd_kvaddr(
653 ret
= sdma_txinit_ahg(
661 verbs_sdma_complete
);
665 /* add the ulp payload - if any. tx->ss can be NULL for acks */
667 ret
= build_verbs_ulp_payload(sde
, length
, tx
);
672 /* add icrc, lt byte, and padding to flit */
674 ret
= sdma_txadd_kvaddr(sde
->dd
, &tx
->txreq
,
675 (void *)trail_buf
, extra_bytes
);
681 int hfi1_verbs_send_dma(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
684 struct hfi1_qp_priv
*priv
= qp
->priv
;
685 struct hfi1_ahg_info
*ahg_info
= priv
->s_ahg
;
686 u32 hdrwords
= ps
->s_txreq
->hdr_dwords
;
687 u32 len
= ps
->s_txreq
->s_cur_size
;
689 struct hfi1_ibdev
*dev
= ps
->dev
;
690 struct hfi1_pportdata
*ppd
= ps
->ppd
;
691 struct verbs_txreq
*tx
;
696 if (ps
->s_txreq
->phdr
.hdr
.hdr_type
) {
697 u8 extra_bytes
= hfi1_get_16b_padding((hdrwords
<< 2), len
);
699 dwords
= (len
+ extra_bytes
+ (SIZE_OF_CRC
<< 2) +
702 dwords
= (len
+ 3) >> 2;
704 plen
= hdrwords
+ dwords
+ sizeof(pbc
) / 4;
707 if (!sdma_txreq_built(&tx
->txreq
)) {
708 if (likely(pbc
== 0)) {
709 u32 vl
= sc_to_vlt(dd_from_ibdev(qp
->ibqp
.device
), sc5
);
712 /* set PBC_DC_INFO bit (aka SC[4]) in pbc */
713 if (ps
->s_txreq
->phdr
.hdr
.hdr_type
)
714 pbc
|= PBC_PACKET_BYPASS
|
715 PBC_INSERT_BYPASS_ICRC
;
717 pbc
|= (ib_is_sc5(sc5
) << PBC_DC_INFO_SHIFT
);
719 if (unlikely(hfi1_dbg_should_fault_tx(qp
, ps
->opcode
)))
720 pbc
= hfi1_fault_tx(qp
, ps
->opcode
, pbc
);
721 pbc
= create_pbc(ppd
,
728 ret
= build_verbs_tx_desc(tx
->sde
, len
, tx
, ahg_info
, pbc
);
732 ret
= sdma_send_txreq(tx
->sde
, ps
->wait
, &tx
->txreq
, ps
->pkts_sent
);
733 if (unlikely(ret
< 0)) {
739 update_tx_opstats(qp
, ps
, plen
);
740 trace_sdma_output_ibhdr(dd_from_ibdev(qp
->ibqp
.device
),
741 &ps
->s_txreq
->phdr
.hdr
, ib_is_sc5(sc5
));
745 /* The current one got "sent" */
748 ret
= wait_kmem(dev
, qp
, ps
);
750 /* free txreq - bad state */
751 hfi1_put_txreq(ps
->s_txreq
);
758 * If we are now in the error state, return zero to flush the
761 static int pio_wait(struct rvt_qp
*qp
,
762 struct send_context
*sc
,
763 struct hfi1_pkt_state
*ps
,
766 struct hfi1_qp_priv
*priv
= qp
->priv
;
767 struct hfi1_devdata
*dd
= sc
->dd
;
768 struct hfi1_ibdev
*dev
= &dd
->verbs_dev
;
773 * Note that as soon as want_buffer() is called and
774 * possibly before it returns, sc_piobufavail()
775 * could be called. Therefore, put QP on the I/O wait list before
776 * enabling the PIO avail interrupt.
778 spin_lock_irqsave(&qp
->s_lock
, flags
);
779 if (ib_rvt_state_ops
[qp
->state
] & RVT_PROCESS_RECV_OK
) {
780 write_seqlock(&dev
->iowait_lock
);
781 list_add_tail(&ps
->s_txreq
->txreq
.list
,
783 if (list_empty(&priv
->s_iowait
.list
)) {
784 struct hfi1_ibdev
*dev
= &dd
->verbs_dev
;
787 dev
->n_piowait
+= !!(flag
& RVT_S_WAIT_PIO
);
788 dev
->n_piodrain
+= !!(flag
& HFI1_S_WAIT_PIO_DRAIN
);
790 was_empty
= list_empty(&sc
->piowait
);
791 iowait_queue(ps
->pkts_sent
, &priv
->s_iowait
,
793 priv
->s_iowait
.lock
= &dev
->iowait_lock
;
794 trace_hfi1_qpsleep(qp
, RVT_S_WAIT_PIO
);
796 /* counting: only call wantpiobuf_intr if first user */
798 hfi1_sc_wantpiobuf_intr(sc
, 1);
800 write_sequnlock(&dev
->iowait_lock
);
801 hfi1_qp_unbusy(qp
, ps
->wait
);
804 spin_unlock_irqrestore(&qp
->s_lock
, flags
);
808 static void verbs_pio_complete(void *arg
, int code
)
810 struct rvt_qp
*qp
= (struct rvt_qp
*)arg
;
811 struct hfi1_qp_priv
*priv
= qp
->priv
;
813 if (iowait_pio_dec(&priv
->s_iowait
))
814 iowait_drain_wakeup(&priv
->s_iowait
);
817 int hfi1_verbs_send_pio(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
820 struct hfi1_qp_priv
*priv
= qp
->priv
;
821 u32 hdrwords
= ps
->s_txreq
->hdr_dwords
;
822 struct rvt_sge_state
*ss
= ps
->s_txreq
->ss
;
823 u32 len
= ps
->s_txreq
->s_cur_size
;
826 struct hfi1_pportdata
*ppd
= ps
->ppd
;
829 unsigned long flags
= 0;
830 struct send_context
*sc
;
831 struct pio_buf
*pbuf
;
832 int wc_status
= IB_WC_SUCCESS
;
834 pio_release_cb cb
= NULL
;
837 if (ps
->s_txreq
->phdr
.hdr
.hdr_type
) {
838 u8 pad_size
= hfi1_get_16b_padding((hdrwords
<< 2), len
);
840 extra_bytes
= pad_size
+ (SIZE_OF_CRC
<< 2) + SIZE_OF_LT
;
841 dwords
= (len
+ extra_bytes
) >> 2;
842 hdr
= (u32
*)&ps
->s_txreq
->phdr
.hdr
.opah
;
844 dwords
= (len
+ 3) >> 2;
845 hdr
= (u32
*)&ps
->s_txreq
->phdr
.hdr
.ibh
;
847 plen
= hdrwords
+ dwords
+ sizeof(pbc
) / 4;
849 /* only RC/UC use complete */
850 switch (qp
->ibqp
.qp_type
) {
853 cb
= verbs_pio_complete
;
859 /* vl15 special case taken care of in ud.c */
861 sc
= ps
->s_txreq
->psc
;
863 if (likely(pbc
== 0)) {
864 u8 vl
= sc_to_vlt(dd_from_ibdev(qp
->ibqp
.device
), sc5
);
866 /* set PBC_DC_INFO bit (aka SC[4]) in pbc */
867 if (ps
->s_txreq
->phdr
.hdr
.hdr_type
)
868 pbc
|= PBC_PACKET_BYPASS
| PBC_INSERT_BYPASS_ICRC
;
870 pbc
|= (ib_is_sc5(sc5
) << PBC_DC_INFO_SHIFT
);
872 if (unlikely(hfi1_dbg_should_fault_tx(qp
, ps
->opcode
)))
873 pbc
= hfi1_fault_tx(qp
, ps
->opcode
, pbc
);
874 pbc
= create_pbc(ppd
, pbc
, qp
->srate_mbps
, vl
, plen
);
877 iowait_pio_inc(&priv
->s_iowait
);
878 pbuf
= sc_buffer_alloc(sc
, plen
, cb
, qp
);
879 if (unlikely(!pbuf
)) {
881 verbs_pio_complete(qp
, 0);
882 if (ppd
->host_link_state
!= HLS_UP_ACTIVE
) {
884 * If we have filled the PIO buffers to capacity and are
885 * not in an active state this request is not going to
886 * go out to so just complete it with an error or else a
887 * ULP or the core may be stuck waiting.
891 "alloc failed. state not active, completing");
892 wc_status
= IB_WC_GENERAL_ERR
;
896 * This is a normal occurrence. The PIO buffs are full
897 * up but we are still happily sending, well we could be
898 * so lets continue to queue the request.
900 hfi1_cdbg(PIO
, "alloc failed. state active, queuing");
901 ret
= pio_wait(qp
, sc
, ps
, RVT_S_WAIT_PIO
);
903 /* txreq not queued - free */
905 /* tx consumed in wait */
911 pio_copy(ppd
->dd
, pbuf
, pbc
, hdr
, hdrwords
);
913 seg_pio_copy_start(pbuf
, pbc
,
917 void *addr
= ss
->sge
.vaddr
;
918 u32 slen
= ss
->sge
.length
;
922 rvt_update_sge(ss
, slen
, false);
923 seg_pio_copy_mid(pbuf
, addr
, slen
);
927 /* add icrc, lt byte, and padding to flit */
929 seg_pio_copy_mid(pbuf
, trail_buf
, extra_bytes
);
931 seg_pio_copy_end(pbuf
);
934 update_tx_opstats(qp
, ps
, plen
);
935 trace_pio_output_ibhdr(dd_from_ibdev(qp
->ibqp
.device
),
936 &ps
->s_txreq
->phdr
.hdr
, ib_is_sc5(sc5
));
940 spin_lock_irqsave(&qp
->s_lock
, flags
);
941 rvt_send_complete(qp
, qp
->s_wqe
, wc_status
);
942 spin_unlock_irqrestore(&qp
->s_lock
, flags
);
943 } else if (qp
->ibqp
.qp_type
== IB_QPT_RC
) {
944 spin_lock_irqsave(&qp
->s_lock
, flags
);
945 hfi1_rc_send_complete(qp
, &ps
->s_txreq
->phdr
.hdr
);
946 spin_unlock_irqrestore(&qp
->s_lock
, flags
);
952 hfi1_put_txreq(ps
->s_txreq
);
957 * egress_pkey_matches_entry - return 1 if the pkey matches ent (ent
958 * being an entry from the partition key table), return 0
959 * otherwise. Use the matching criteria for egress partition keys
960 * specified in the OPAv1 spec., section 9.1l.7.
962 static inline int egress_pkey_matches_entry(u16 pkey
, u16 ent
)
964 u16 mkey
= pkey
& PKEY_LOW_15_MASK
;
965 u16 mentry
= ent
& PKEY_LOW_15_MASK
;
967 if (mkey
== mentry
) {
969 * If pkey[15] is set (full partition member),
970 * is bit 15 in the corresponding table element
971 * clear (limited member)?
973 if (pkey
& PKEY_MEMBER_MASK
)
974 return !!(ent
& PKEY_MEMBER_MASK
);
981 * egress_pkey_check - check P_KEY of a packet
982 * @ppd: Physical IB port data
983 * @slid: SLID for packet
984 * @bkey: PKEY for header
985 * @sc5: SC for packet
986 * @s_pkey_index: It will be used for look up optimization for kernel contexts
987 * only. If it is negative value, then it means user contexts is calling this
990 * It checks if hdr's pkey is valid.
992 * Return: 0 on success, otherwise, 1
994 int egress_pkey_check(struct hfi1_pportdata
*ppd
, u32 slid
, u16 pkey
,
995 u8 sc5
, int8_t s_pkey_index
)
997 struct hfi1_devdata
*dd
;
999 int is_user_ctxt_mechanism
= (s_pkey_index
< 0);
1001 if (!(ppd
->part_enforce
& HFI1_PART_ENFORCE_OUT
))
1004 /* If SC15, pkey[0:14] must be 0x7fff */
1005 if ((sc5
== 0xf) && ((pkey
& PKEY_LOW_15_MASK
) != PKEY_LOW_15_MASK
))
1008 /* Is the pkey = 0x0, or 0x8000? */
1009 if ((pkey
& PKEY_LOW_15_MASK
) == 0)
1013 * For the kernel contexts only, if a qp is passed into the function,
1014 * the most likely matching pkey has index qp->s_pkey_index
1016 if (!is_user_ctxt_mechanism
&&
1017 egress_pkey_matches_entry(pkey
, ppd
->pkeys
[s_pkey_index
])) {
1021 for (i
= 0; i
< MAX_PKEY_VALUES
; i
++) {
1022 if (egress_pkey_matches_entry(pkey
, ppd
->pkeys
[i
]))
1027 * For the user-context mechanism, the P_KEY check would only happen
1028 * once per SDMA request, not once per packet. Therefore, there's no
1029 * need to increment the counter for the user-context mechanism.
1031 if (!is_user_ctxt_mechanism
) {
1032 incr_cntr64(&ppd
->port_xmit_constraint_errors
);
1034 if (!(dd
->err_info_xmit_constraint
.status
&
1035 OPA_EI_STATUS_SMASK
)) {
1036 dd
->err_info_xmit_constraint
.status
|=
1037 OPA_EI_STATUS_SMASK
;
1038 dd
->err_info_xmit_constraint
.slid
= slid
;
1039 dd
->err_info_xmit_constraint
.pkey
= pkey
;
1046 * get_send_routine - choose an egress routine
1048 * Choose an egress routine based on QP type
1051 static inline send_routine
get_send_routine(struct rvt_qp
*qp
,
1052 struct hfi1_pkt_state
*ps
)
1054 struct hfi1_devdata
*dd
= dd_from_ibdev(qp
->ibqp
.device
);
1055 struct hfi1_qp_priv
*priv
= qp
->priv
;
1056 struct verbs_txreq
*tx
= ps
->s_txreq
;
1058 if (unlikely(!(dd
->flags
& HFI1_HAS_SEND_DMA
)))
1059 return dd
->process_pio_send
;
1060 switch (qp
->ibqp
.qp_type
) {
1062 return dd
->process_pio_send
;
1069 tx
->s_cur_size
<= min(piothreshold
, qp
->pmtu
) &&
1070 (BIT(ps
->opcode
& OPMASK
) & pio_opmask
[ps
->opcode
>> 5]) &&
1071 iowait_sdma_pending(&priv
->s_iowait
) == 0 &&
1072 !sdma_txreq_built(&tx
->txreq
))
1073 return dd
->process_pio_send
;
1079 return dd
->process_dma_send
;
1083 * hfi1_verbs_send - send a packet
1084 * @qp: the QP to send on
1085 * @ps: the state of the packet to send
1087 * Return zero if packet is sent or queued OK.
1088 * Return non-zero and clear qp->s_flags RVT_S_BUSY otherwise.
1090 int hfi1_verbs_send(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
)
1092 struct hfi1_devdata
*dd
= dd_from_ibdev(qp
->ibqp
.device
);
1093 struct hfi1_qp_priv
*priv
= qp
->priv
;
1094 struct ib_other_headers
*ohdr
= NULL
;
1101 /* locate the pkey within the headers */
1102 if (ps
->s_txreq
->phdr
.hdr
.hdr_type
) {
1103 struct hfi1_16b_header
*hdr
= &ps
->s_txreq
->phdr
.hdr
.opah
;
1105 l4
= hfi1_16B_get_l4(hdr
);
1106 if (l4
== OPA_16B_L4_IB_LOCAL
)
1108 else if (l4
== OPA_16B_L4_IB_GLOBAL
)
1109 ohdr
= &hdr
->u
.l
.oth
;
1111 slid
= hfi1_16B_get_slid(hdr
);
1112 pkey
= hfi1_16B_get_pkey(hdr
);
1114 struct ib_header
*hdr
= &ps
->s_txreq
->phdr
.hdr
.ibh
;
1115 u8 lnh
= ib_get_lnh(hdr
);
1117 if (lnh
== HFI1_LRH_GRH
)
1118 ohdr
= &hdr
->u
.l
.oth
;
1121 slid
= ib_get_slid(hdr
);
1122 pkey
= ib_bth_get_pkey(ohdr
);
1125 if (likely(l4
!= OPA_16B_L4_FM
))
1126 ps
->opcode
= ib_bth_get_opcode(ohdr
);
1128 ps
->opcode
= IB_OPCODE_UD_SEND_ONLY
;
1130 sr
= get_send_routine(qp
, ps
);
1131 ret
= egress_pkey_check(dd
->pport
, slid
, pkey
,
1132 priv
->s_sc
, qp
->s_pkey_index
);
1133 if (unlikely(ret
)) {
1135 * The value we are returning here does not get propagated to
1136 * the verbs caller. Thus we need to complete the request with
1137 * error otherwise the caller could be sitting waiting on the
1138 * completion event. Only do this for PIO. SDMA has its own
1139 * mechanism for handling the errors. So for SDMA we can just
1142 if (sr
== dd
->process_pio_send
) {
1143 unsigned long flags
;
1145 hfi1_cdbg(PIO
, "%s() Failed. Completing with err",
1147 spin_lock_irqsave(&qp
->s_lock
, flags
);
1148 rvt_send_complete(qp
, qp
->s_wqe
, IB_WC_GENERAL_ERR
);
1149 spin_unlock_irqrestore(&qp
->s_lock
, flags
);
1153 if (sr
== dd
->process_dma_send
&& iowait_pio_pending(&priv
->s_iowait
))
1157 HFI1_S_WAIT_PIO_DRAIN
);
1158 return sr(qp
, ps
, 0);
1162 * hfi1_fill_device_attr - Fill in rvt dev info device attributes.
1163 * @dd: the device data structure
1165 static void hfi1_fill_device_attr(struct hfi1_devdata
*dd
)
1167 struct rvt_dev_info
*rdi
= &dd
->verbs_dev
.rdi
;
1168 u32 ver
= dd
->dc8051_ver
;
1170 memset(&rdi
->dparms
.props
, 0, sizeof(rdi
->dparms
.props
));
1172 rdi
->dparms
.props
.fw_ver
= ((u64
)(dc8051_ver_maj(ver
)) << 32) |
1173 ((u64
)(dc8051_ver_min(ver
)) << 16) |
1174 (u64
)dc8051_ver_patch(ver
);
1176 rdi
->dparms
.props
.device_cap_flags
= IB_DEVICE_BAD_PKEY_CNTR
|
1177 IB_DEVICE_BAD_QKEY_CNTR
| IB_DEVICE_SHUTDOWN_PORT
|
1178 IB_DEVICE_SYS_IMAGE_GUID
| IB_DEVICE_RC_RNR_NAK_GEN
|
1179 IB_DEVICE_PORT_ACTIVE_EVENT
| IB_DEVICE_SRQ_RESIZE
|
1180 IB_DEVICE_MEM_MGT_EXTENSIONS
|
1181 IB_DEVICE_RDMA_NETDEV_OPA_VNIC
;
1182 rdi
->dparms
.props
.page_size_cap
= PAGE_SIZE
;
1183 rdi
->dparms
.props
.vendor_id
= dd
->oui1
<< 16 | dd
->oui2
<< 8 | dd
->oui3
;
1184 rdi
->dparms
.props
.vendor_part_id
= dd
->pcidev
->device
;
1185 rdi
->dparms
.props
.hw_ver
= dd
->minrev
;
1186 rdi
->dparms
.props
.sys_image_guid
= ib_hfi1_sys_image_guid
;
1187 rdi
->dparms
.props
.max_mr_size
= U64_MAX
;
1188 rdi
->dparms
.props
.max_fast_reg_page_list_len
= UINT_MAX
;
1189 rdi
->dparms
.props
.max_qp
= hfi1_max_qps
;
1190 rdi
->dparms
.props
.max_qp_wr
= hfi1_max_qp_wrs
;
1191 rdi
->dparms
.props
.max_send_sge
= hfi1_max_sges
;
1192 rdi
->dparms
.props
.max_recv_sge
= hfi1_max_sges
;
1193 rdi
->dparms
.props
.max_sge_rd
= hfi1_max_sges
;
1194 rdi
->dparms
.props
.max_cq
= hfi1_max_cqs
;
1195 rdi
->dparms
.props
.max_ah
= hfi1_max_ahs
;
1196 rdi
->dparms
.props
.max_cqe
= hfi1_max_cqes
;
1197 rdi
->dparms
.props
.max_mr
= rdi
->lkey_table
.max
;
1198 rdi
->dparms
.props
.max_fmr
= rdi
->lkey_table
.max
;
1199 rdi
->dparms
.props
.max_map_per_fmr
= 32767;
1200 rdi
->dparms
.props
.max_pd
= hfi1_max_pds
;
1201 rdi
->dparms
.props
.max_qp_rd_atom
= HFI1_MAX_RDMA_ATOMIC
;
1202 rdi
->dparms
.props
.max_qp_init_rd_atom
= 255;
1203 rdi
->dparms
.props
.max_srq
= hfi1_max_srqs
;
1204 rdi
->dparms
.props
.max_srq_wr
= hfi1_max_srq_wrs
;
1205 rdi
->dparms
.props
.max_srq_sge
= hfi1_max_srq_sges
;
1206 rdi
->dparms
.props
.atomic_cap
= IB_ATOMIC_GLOB
;
1207 rdi
->dparms
.props
.max_pkeys
= hfi1_get_npkeys(dd
);
1208 rdi
->dparms
.props
.max_mcast_grp
= hfi1_max_mcast_grps
;
1209 rdi
->dparms
.props
.max_mcast_qp_attach
= hfi1_max_mcast_qp_attached
;
1210 rdi
->dparms
.props
.max_total_mcast_qp_attach
=
1211 rdi
->dparms
.props
.max_mcast_qp_attach
*
1212 rdi
->dparms
.props
.max_mcast_grp
;
1215 static inline u16
opa_speed_to_ib(u16 in
)
1219 if (in
& OPA_LINK_SPEED_25G
)
1220 out
|= IB_SPEED_EDR
;
1221 if (in
& OPA_LINK_SPEED_12_5G
)
1222 out
|= IB_SPEED_FDR
;
1228 * Convert a single OPA link width (no multiple flags) to an IB value.
1229 * A zero OPA link width means link down, which means the IB width value
1232 static inline u16
opa_width_to_ib(u16 in
)
1235 case OPA_LINK_WIDTH_1X
:
1236 /* map 2x and 3x to 1x as they don't exist in IB */
1237 case OPA_LINK_WIDTH_2X
:
1238 case OPA_LINK_WIDTH_3X
:
1240 default: /* link down or unknown, return our largest width */
1241 case OPA_LINK_WIDTH_4X
:
1246 static int query_port(struct rvt_dev_info
*rdi
, u8 port_num
,
1247 struct ib_port_attr
*props
)
1249 struct hfi1_ibdev
*verbs_dev
= dev_from_rdi(rdi
);
1250 struct hfi1_devdata
*dd
= dd_from_dev(verbs_dev
);
1251 struct hfi1_pportdata
*ppd
= &dd
->pport
[port_num
- 1];
1254 /* props being zeroed by the caller, avoid zeroing it here */
1255 props
->lid
= lid
? lid
: 0;
1256 props
->lmc
= ppd
->lmc
;
1257 /* OPA logical states match IB logical states */
1258 props
->state
= driver_lstate(ppd
);
1259 props
->phys_state
= driver_pstate(ppd
);
1260 props
->gid_tbl_len
= HFI1_GUIDS_PER_PORT
;
1261 props
->active_width
= (u8
)opa_width_to_ib(ppd
->link_width_active
);
1262 /* see rate_show() in ib core/sysfs.c */
1263 props
->active_speed
= (u8
)opa_speed_to_ib(ppd
->link_speed_active
);
1264 props
->max_vl_num
= ppd
->vls_supported
;
1266 /* Once we are a "first class" citizen and have added the OPA MTUs to
1267 * the core we can advertise the larger MTU enum to the ULPs, for now
1268 * advertise only 4K.
1270 * Those applications which are either OPA aware or pass the MTU enum
1271 * from the Path Records to us will get the new 8k MTU. Those that
1272 * attempt to process the MTU enum may fail in various ways.
1274 props
->max_mtu
= mtu_to_enum((!valid_ib_mtu(hfi1_max_mtu
) ?
1275 4096 : hfi1_max_mtu
), IB_MTU_4096
);
1276 props
->active_mtu
= !valid_ib_mtu(ppd
->ibmtu
) ? props
->max_mtu
:
1277 mtu_to_enum(ppd
->ibmtu
, IB_MTU_4096
);
1282 static int modify_device(struct ib_device
*device
,
1283 int device_modify_mask
,
1284 struct ib_device_modify
*device_modify
)
1286 struct hfi1_devdata
*dd
= dd_from_ibdev(device
);
1290 if (device_modify_mask
& ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID
|
1291 IB_DEVICE_MODIFY_NODE_DESC
)) {
1296 if (device_modify_mask
& IB_DEVICE_MODIFY_NODE_DESC
) {
1297 memcpy(device
->node_desc
, device_modify
->node_desc
,
1298 IB_DEVICE_NODE_DESC_MAX
);
1299 for (i
= 0; i
< dd
->num_pports
; i
++) {
1300 struct hfi1_ibport
*ibp
= &dd
->pport
[i
].ibport_data
;
1302 hfi1_node_desc_chg(ibp
);
1306 if (device_modify_mask
& IB_DEVICE_MODIFY_SYS_IMAGE_GUID
) {
1307 ib_hfi1_sys_image_guid
=
1308 cpu_to_be64(device_modify
->sys_image_guid
);
1309 for (i
= 0; i
< dd
->num_pports
; i
++) {
1310 struct hfi1_ibport
*ibp
= &dd
->pport
[i
].ibport_data
;
1312 hfi1_sys_guid_chg(ibp
);
1322 static int shut_down_port(struct rvt_dev_info
*rdi
, u8 port_num
)
1324 struct hfi1_ibdev
*verbs_dev
= dev_from_rdi(rdi
);
1325 struct hfi1_devdata
*dd
= dd_from_dev(verbs_dev
);
1326 struct hfi1_pportdata
*ppd
= &dd
->pport
[port_num
- 1];
1329 set_link_down_reason(ppd
, OPA_LINKDOWN_REASON_UNKNOWN
, 0,
1330 OPA_LINKDOWN_REASON_UNKNOWN
);
1331 ret
= set_link_state(ppd
, HLS_DN_DOWNDEF
);
1335 static int hfi1_get_guid_be(struct rvt_dev_info
*rdi
, struct rvt_ibport
*rvp
,
1336 int guid_index
, __be64
*guid
)
1338 struct hfi1_ibport
*ibp
= container_of(rvp
, struct hfi1_ibport
, rvp
);
1340 if (guid_index
>= HFI1_GUIDS_PER_PORT
)
1343 *guid
= get_sguid(ibp
, guid_index
);
1348 * convert ah port,sl to sc
1350 u8
ah_to_sc(struct ib_device
*ibdev
, struct rdma_ah_attr
*ah
)
1352 struct hfi1_ibport
*ibp
= to_iport(ibdev
, rdma_ah_get_port_num(ah
));
1354 return ibp
->sl_to_sc
[rdma_ah_get_sl(ah
)];
1357 static int hfi1_check_ah(struct ib_device
*ibdev
, struct rdma_ah_attr
*ah_attr
)
1359 struct hfi1_ibport
*ibp
;
1360 struct hfi1_pportdata
*ppd
;
1361 struct hfi1_devdata
*dd
;
1365 if (hfi1_check_mcast(rdma_ah_get_dlid(ah_attr
)) &&
1366 !(rdma_ah_get_ah_flags(ah_attr
) & IB_AH_GRH
))
1369 /* test the mapping for validity */
1370 ibp
= to_iport(ibdev
, rdma_ah_get_port_num(ah_attr
));
1371 ppd
= ppd_from_ibp(ibp
);
1372 dd
= dd_from_ppd(ppd
);
1374 sl
= rdma_ah_get_sl(ah_attr
);
1375 if (sl
>= ARRAY_SIZE(ibp
->sl_to_sc
))
1378 sc5
= ibp
->sl_to_sc
[sl
];
1379 if (sc_to_vlt(dd
, sc5
) > num_vls
&& sc_to_vlt(dd
, sc5
) != 0xf)
1384 static void hfi1_notify_new_ah(struct ib_device
*ibdev
,
1385 struct rdma_ah_attr
*ah_attr
,
1388 struct hfi1_ibport
*ibp
;
1389 struct hfi1_pportdata
*ppd
;
1390 struct hfi1_devdata
*dd
;
1392 struct rdma_ah_attr
*attr
= &ah
->attr
;
1395 * Do not trust reading anything from rvt_ah at this point as it is not
1396 * done being setup. We can however modify things which we need to set.
1399 ibp
= to_iport(ibdev
, rdma_ah_get_port_num(ah_attr
));
1400 ppd
= ppd_from_ibp(ibp
);
1401 sc5
= ibp
->sl_to_sc
[rdma_ah_get_sl(&ah
->attr
)];
1402 hfi1_update_ah_attr(ibdev
, attr
);
1403 hfi1_make_opa_lid(attr
);
1404 dd
= dd_from_ppd(ppd
);
1405 ah
->vl
= sc_to_vlt(dd
, sc5
);
1406 if (ah
->vl
< num_vls
|| ah
->vl
== 15)
1407 ah
->log_pmtu
= ilog2(dd
->vld
[ah
->vl
].mtu
);
1411 * hfi1_get_npkeys - return the size of the PKEY table for context 0
1412 * @dd: the hfi1_ib device
1414 unsigned hfi1_get_npkeys(struct hfi1_devdata
*dd
)
1416 return ARRAY_SIZE(dd
->pport
[0].pkeys
);
1419 static void init_ibport(struct hfi1_pportdata
*ppd
)
1421 struct hfi1_ibport
*ibp
= &ppd
->ibport_data
;
1422 size_t sz
= ARRAY_SIZE(ibp
->sl_to_sc
);
1425 for (i
= 0; i
< sz
; i
++) {
1426 ibp
->sl_to_sc
[i
] = i
;
1427 ibp
->sc_to_sl
[i
] = i
;
1430 for (i
= 0; i
< RVT_MAX_TRAP_LISTS
; i
++)
1431 INIT_LIST_HEAD(&ibp
->rvp
.trap_lists
[i
].list
);
1432 timer_setup(&ibp
->rvp
.trap_timer
, hfi1_handle_trap_timer
, 0);
1434 spin_lock_init(&ibp
->rvp
.lock
);
1435 /* Set the prefix to the default value (see ch. 4.1.1) */
1436 ibp
->rvp
.gid_prefix
= IB_DEFAULT_GID_PREFIX
;
1437 ibp
->rvp
.sm_lid
= 0;
1439 * Below should only set bits defined in OPA PortInfo.CapabilityMask
1440 * and PortInfo.CapabilityMask3
1442 ibp
->rvp
.port_cap_flags
= IB_PORT_AUTO_MIGR_SUP
|
1443 IB_PORT_CAP_MASK_NOTICE_SUP
;
1444 ibp
->rvp
.port_cap3_flags
= OPA_CAP_MASK3_IsSharedSpaceSupported
;
1445 ibp
->rvp
.pma_counter_select
[0] = IB_PMA_PORT_XMIT_DATA
;
1446 ibp
->rvp
.pma_counter_select
[1] = IB_PMA_PORT_RCV_DATA
;
1447 ibp
->rvp
.pma_counter_select
[2] = IB_PMA_PORT_XMIT_PKTS
;
1448 ibp
->rvp
.pma_counter_select
[3] = IB_PMA_PORT_RCV_PKTS
;
1449 ibp
->rvp
.pma_counter_select
[4] = IB_PMA_PORT_XMIT_WAIT
;
1451 RCU_INIT_POINTER(ibp
->rvp
.qp
[0], NULL
);
1452 RCU_INIT_POINTER(ibp
->rvp
.qp
[1], NULL
);
1455 static void hfi1_get_dev_fw_str(struct ib_device
*ibdev
, char *str
)
1457 struct rvt_dev_info
*rdi
= ib_to_rvt(ibdev
);
1458 struct hfi1_ibdev
*dev
= dev_from_rdi(rdi
);
1459 u32 ver
= dd_from_dev(dev
)->dc8051_ver
;
1461 snprintf(str
, IB_FW_VERSION_NAME_MAX
, "%u.%u.%u", dc8051_ver_maj(ver
),
1462 dc8051_ver_min(ver
), dc8051_ver_patch(ver
));
1465 static const char * const driver_cntr_names
[] = {
1466 /* must be element 0*/
1474 "DRIVER_RcvLen_Errs",
1475 "DRIVER_EgrBufFull",
1479 static DEFINE_MUTEX(cntr_names_lock
); /* protects the *_cntr_names bufers */
1480 static const char **dev_cntr_names
;
1481 static const char **port_cntr_names
;
1482 int num_driver_cntrs
= ARRAY_SIZE(driver_cntr_names
);
1483 static int num_dev_cntrs
;
1484 static int num_port_cntrs
;
1485 static int cntr_names_initialized
;
1488 * Convert a list of names separated by '\n' into an array of NULL terminated
1489 * strings. Optionally some entries can be reserved in the array to hold extra
1492 static int init_cntr_names(const char *names_in
,
1493 const size_t names_len
,
1494 int num_extra_names
,
1496 const char ***cntr_names
)
1498 char *names_out
, *p
, **q
;
1502 for (i
= 0; i
< names_len
; i
++)
1503 if (names_in
[i
] == '\n')
1506 names_out
= kmalloc((n
+ num_extra_names
) * sizeof(char *) + names_len
,
1514 p
= names_out
+ (n
+ num_extra_names
) * sizeof(char *);
1515 memcpy(p
, names_in
, names_len
);
1517 q
= (char **)names_out
;
1518 for (i
= 0; i
< n
; i
++) {
1520 p
= strchr(p
, '\n');
1525 *cntr_names
= (const char **)names_out
;
1529 static struct rdma_hw_stats
*alloc_hw_stats(struct ib_device
*ibdev
,
1534 mutex_lock(&cntr_names_lock
);
1535 if (!cntr_names_initialized
) {
1536 struct hfi1_devdata
*dd
= dd_from_ibdev(ibdev
);
1538 err
= init_cntr_names(dd
->cntrnames
,
1544 mutex_unlock(&cntr_names_lock
);
1548 for (i
= 0; i
< num_driver_cntrs
; i
++)
1549 dev_cntr_names
[num_dev_cntrs
+ i
] =
1550 driver_cntr_names
[i
];
1552 err
= init_cntr_names(dd
->portcntrnames
,
1553 dd
->portcntrnameslen
,
1558 kfree(dev_cntr_names
);
1559 dev_cntr_names
= NULL
;
1560 mutex_unlock(&cntr_names_lock
);
1563 cntr_names_initialized
= 1;
1565 mutex_unlock(&cntr_names_lock
);
1568 return rdma_alloc_hw_stats_struct(
1570 num_dev_cntrs
+ num_driver_cntrs
,
1571 RDMA_HW_STATS_DEFAULT_LIFESPAN
);
1573 return rdma_alloc_hw_stats_struct(
1576 RDMA_HW_STATS_DEFAULT_LIFESPAN
);
1579 static u64
hfi1_sps_ints(void)
1581 unsigned long flags
;
1582 struct hfi1_devdata
*dd
;
1585 spin_lock_irqsave(&hfi1_devs_lock
, flags
);
1586 list_for_each_entry(dd
, &hfi1_dev_list
, list
) {
1587 sps_ints
+= get_all_cpu_total(dd
->int_counter
);
1589 spin_unlock_irqrestore(&hfi1_devs_lock
, flags
);
1593 static int get_hw_stats(struct ib_device
*ibdev
, struct rdma_hw_stats
*stats
,
1600 u64
*stats
= (u64
*)&hfi1_stats
;
1603 hfi1_read_cntrs(dd_from_ibdev(ibdev
), NULL
, &values
);
1604 values
[num_dev_cntrs
] = hfi1_sps_ints();
1605 for (i
= 1; i
< num_driver_cntrs
; i
++)
1606 values
[num_dev_cntrs
+ i
] = stats
[i
];
1607 count
= num_dev_cntrs
+ num_driver_cntrs
;
1609 struct hfi1_ibport
*ibp
= to_iport(ibdev
, port
);
1611 hfi1_read_portcntrs(ppd_from_ibp(ibp
), NULL
, &values
);
1612 count
= num_port_cntrs
;
1615 memcpy(stats
->value
, values
, count
* sizeof(u64
));
1620 * hfi1_register_ib_device - register our device with the infiniband core
1621 * @dd: the device data structure
1622 * Return 0 if successful, errno if unsuccessful.
1624 int hfi1_register_ib_device(struct hfi1_devdata
*dd
)
1626 struct hfi1_ibdev
*dev
= &dd
->verbs_dev
;
1627 struct ib_device
*ibdev
= &dev
->rdi
.ibdev
;
1628 struct hfi1_pportdata
*ppd
= dd
->pport
;
1629 struct hfi1_ibport
*ibp
= &ppd
->ibport_data
;
1633 for (i
= 0; i
< dd
->num_pports
; i
++)
1634 init_ibport(ppd
+ i
);
1636 /* Only need to initialize non-zero fields. */
1638 timer_setup(&dev
->mem_timer
, mem_timer
, 0);
1640 seqlock_init(&dev
->iowait_lock
);
1641 seqlock_init(&dev
->txwait_lock
);
1642 INIT_LIST_HEAD(&dev
->txwait
);
1643 INIT_LIST_HEAD(&dev
->memwait
);
1645 ret
= verbs_txreq_init(dev
);
1647 goto err_verbs_txreq
;
1649 /* Use first-port GUID as node guid */
1650 ibdev
->node_guid
= get_sguid(ibp
, HFI1_PORT_GUID_INDEX
);
1653 * The system image GUID is supposed to be the same for all
1654 * HFIs in a single system but since there can be other
1655 * device types in the system, we can't be sure this is unique.
1657 if (!ib_hfi1_sys_image_guid
)
1658 ib_hfi1_sys_image_guid
= ibdev
->node_guid
;
1659 ibdev
->owner
= THIS_MODULE
;
1660 ibdev
->phys_port_cnt
= dd
->num_pports
;
1661 ibdev
->dev
.parent
= &dd
->pcidev
->dev
;
1662 ibdev
->modify_device
= modify_device
;
1663 ibdev
->alloc_hw_stats
= alloc_hw_stats
;
1664 ibdev
->get_hw_stats
= get_hw_stats
;
1665 ibdev
->alloc_rdma_netdev
= hfi1_vnic_alloc_rn
;
1667 /* keep process mad in the driver */
1668 ibdev
->process_mad
= hfi1_process_mad
;
1669 ibdev
->get_dev_fw_str
= hfi1_get_dev_fw_str
;
1671 strlcpy(ibdev
->node_desc
, init_utsname()->nodename
,
1672 sizeof(ibdev
->node_desc
));
1675 * Fill in rvt info object.
1677 dd
->verbs_dev
.rdi
.driver_f
.port_callback
= hfi1_create_port_files
;
1678 dd
->verbs_dev
.rdi
.driver_f
.get_pci_dev
= get_pci_dev
;
1679 dd
->verbs_dev
.rdi
.driver_f
.check_ah
= hfi1_check_ah
;
1680 dd
->verbs_dev
.rdi
.driver_f
.notify_new_ah
= hfi1_notify_new_ah
;
1681 dd
->verbs_dev
.rdi
.driver_f
.get_guid_be
= hfi1_get_guid_be
;
1682 dd
->verbs_dev
.rdi
.driver_f
.query_port_state
= query_port
;
1683 dd
->verbs_dev
.rdi
.driver_f
.shut_down_port
= shut_down_port
;
1684 dd
->verbs_dev
.rdi
.driver_f
.cap_mask_chg
= hfi1_cap_mask_chg
;
1686 * Fill in rvt info device attributes.
1688 hfi1_fill_device_attr(dd
);
1691 dd
->verbs_dev
.rdi
.dparms
.qp_table_size
= hfi1_qp_table_size
;
1692 dd
->verbs_dev
.rdi
.dparms
.qpn_start
= 0;
1693 dd
->verbs_dev
.rdi
.dparms
.qpn_inc
= 1;
1694 dd
->verbs_dev
.rdi
.dparms
.qos_shift
= dd
->qos_shift
;
1695 dd
->verbs_dev
.rdi
.dparms
.qpn_res_start
= kdeth_qp
<< 16;
1696 dd
->verbs_dev
.rdi
.dparms
.qpn_res_end
=
1697 dd
->verbs_dev
.rdi
.dparms
.qpn_res_start
+ 65535;
1698 dd
->verbs_dev
.rdi
.dparms
.max_rdma_atomic
= HFI1_MAX_RDMA_ATOMIC
;
1699 dd
->verbs_dev
.rdi
.dparms
.psn_mask
= PSN_MASK
;
1700 dd
->verbs_dev
.rdi
.dparms
.psn_shift
= PSN_SHIFT
;
1701 dd
->verbs_dev
.rdi
.dparms
.psn_modify_mask
= PSN_MODIFY_MASK
;
1702 dd
->verbs_dev
.rdi
.dparms
.core_cap_flags
= RDMA_CORE_PORT_INTEL_OPA
|
1703 RDMA_CORE_CAP_OPA_AH
;
1704 dd
->verbs_dev
.rdi
.dparms
.max_mad_size
= OPA_MGMT_MAD_SIZE
;
1706 dd
->verbs_dev
.rdi
.driver_f
.qp_priv_alloc
= qp_priv_alloc
;
1707 dd
->verbs_dev
.rdi
.driver_f
.qp_priv_free
= qp_priv_free
;
1708 dd
->verbs_dev
.rdi
.driver_f
.free_all_qps
= free_all_qps
;
1709 dd
->verbs_dev
.rdi
.driver_f
.notify_qp_reset
= notify_qp_reset
;
1710 dd
->verbs_dev
.rdi
.driver_f
.do_send
= hfi1_do_send_from_rvt
;
1711 dd
->verbs_dev
.rdi
.driver_f
.schedule_send
= hfi1_schedule_send
;
1712 dd
->verbs_dev
.rdi
.driver_f
.schedule_send_no_lock
= _hfi1_schedule_send
;
1713 dd
->verbs_dev
.rdi
.driver_f
.get_pmtu_from_attr
= get_pmtu_from_attr
;
1714 dd
->verbs_dev
.rdi
.driver_f
.notify_error_qp
= notify_error_qp
;
1715 dd
->verbs_dev
.rdi
.driver_f
.flush_qp_waiters
= flush_qp_waiters
;
1716 dd
->verbs_dev
.rdi
.driver_f
.stop_send_queue
= stop_send_queue
;
1717 dd
->verbs_dev
.rdi
.driver_f
.quiesce_qp
= quiesce_qp
;
1718 dd
->verbs_dev
.rdi
.driver_f
.notify_error_qp
= notify_error_qp
;
1719 dd
->verbs_dev
.rdi
.driver_f
.mtu_from_qp
= mtu_from_qp
;
1720 dd
->verbs_dev
.rdi
.driver_f
.mtu_to_path_mtu
= mtu_to_path_mtu
;
1721 dd
->verbs_dev
.rdi
.driver_f
.check_modify_qp
= hfi1_check_modify_qp
;
1722 dd
->verbs_dev
.rdi
.driver_f
.modify_qp
= hfi1_modify_qp
;
1723 dd
->verbs_dev
.rdi
.driver_f
.notify_restart_rc
= hfi1_restart_rc
;
1724 dd
->verbs_dev
.rdi
.driver_f
.setup_wqe
= hfi1_setup_wqe
;
1725 dd
->verbs_dev
.rdi
.driver_f
.comp_vect_cpu_lookup
=
1726 hfi1_comp_vect_mappings_lookup
;
1728 /* completeion queue */
1729 dd
->verbs_dev
.rdi
.ibdev
.num_comp_vectors
= dd
->comp_vect_possible_cpus
;
1730 dd
->verbs_dev
.rdi
.dparms
.node
= dd
->node
;
1733 dd
->verbs_dev
.rdi
.flags
= 0; /* Let rdmavt handle it all */
1734 dd
->verbs_dev
.rdi
.dparms
.lkey_table_size
= hfi1_lkey_table_size
;
1735 dd
->verbs_dev
.rdi
.dparms
.nports
= dd
->num_pports
;
1736 dd
->verbs_dev
.rdi
.dparms
.npkeys
= hfi1_get_npkeys(dd
);
1737 dd
->verbs_dev
.rdi
.dparms
.sge_copy_mode
= sge_copy_mode
;
1738 dd
->verbs_dev
.rdi
.dparms
.wss_threshold
= wss_threshold
;
1739 dd
->verbs_dev
.rdi
.dparms
.wss_clean_period
= wss_clean_period
;
1741 /* post send table */
1742 dd
->verbs_dev
.rdi
.post_parms
= hfi1_post_parms
;
1744 /* opcode translation table */
1745 dd
->verbs_dev
.rdi
.wc_opcode
= ib_hfi1_wc_opcode
;
1748 for (i
= 0; i
< dd
->num_pports
; i
++, ppd
++)
1749 rvt_init_port(&dd
->verbs_dev
.rdi
,
1750 &ppd
->ibport_data
.rvp
,
1754 rdma_set_device_sysfs_group(&dd
->verbs_dev
.rdi
.ibdev
,
1755 &ib_hfi1_attr_group
);
1757 ret
= rvt_register_device(&dd
->verbs_dev
.rdi
, RDMA_DRIVER_HFI1
);
1759 goto err_verbs_txreq
;
1761 ret
= hfi1_verbs_register_sysfs(dd
);
1768 rvt_unregister_device(&dd
->verbs_dev
.rdi
);
1770 verbs_txreq_exit(dev
);
1771 dd_dev_err(dd
, "cannot register verbs: %d!\n", -ret
);
1775 void hfi1_unregister_ib_device(struct hfi1_devdata
*dd
)
1777 struct hfi1_ibdev
*dev
= &dd
->verbs_dev
;
1779 hfi1_verbs_unregister_sysfs(dd
);
1781 rvt_unregister_device(&dd
->verbs_dev
.rdi
);
1783 if (!list_empty(&dev
->txwait
))
1784 dd_dev_err(dd
, "txwait list not empty!\n");
1785 if (!list_empty(&dev
->memwait
))
1786 dd_dev_err(dd
, "memwait list not empty!\n");
1788 del_timer_sync(&dev
->mem_timer
);
1789 verbs_txreq_exit(dev
);
1791 mutex_lock(&cntr_names_lock
);
1792 kfree(dev_cntr_names
);
1793 kfree(port_cntr_names
);
1794 dev_cntr_names
= NULL
;
1795 port_cntr_names
= NULL
;
1796 cntr_names_initialized
= 0;
1797 mutex_unlock(&cntr_names_lock
);
1800 void hfi1_cnp_rcv(struct hfi1_packet
*packet
)
1802 struct hfi1_ibport
*ibp
= rcd_to_iport(packet
->rcd
);
1803 struct hfi1_pportdata
*ppd
= ppd_from_ibp(ibp
);
1804 struct ib_header
*hdr
= packet
->hdr
;
1805 struct rvt_qp
*qp
= packet
->qp
;
1808 u8 sl
, sc5
, svc_type
;
1810 switch (packet
->qp
->ibqp
.qp_type
) {
1812 rlid
= rdma_ah_get_dlid(&qp
->remote_ah_attr
);
1813 rqpn
= qp
->remote_qpn
;
1814 svc_type
= IB_CC_SVCTYPE_UC
;
1817 rlid
= rdma_ah_get_dlid(&qp
->remote_ah_attr
);
1818 rqpn
= qp
->remote_qpn
;
1819 svc_type
= IB_CC_SVCTYPE_RC
;
1824 svc_type
= IB_CC_SVCTYPE_UD
;
1827 ibp
->rvp
.n_pkt_drops
++;
1831 sc5
= hfi1_9B_get_sc5(hdr
, packet
->rhf
);
1832 sl
= ibp
->sc_to_sl
[sc5
];
1833 lqpn
= qp
->ibqp
.qp_num
;
1835 process_becn(ppd
, sl
, rlid
, lqpn
, rqpn
, svc_type
);