drivers/media/dvb-frontends/af9033.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Afatech AF9033 demodulator driver
   4  *
   5  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
   6  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   7  */
   8
   9 #include "af9033_priv.h"
  10
  11 struct af9033_dev {
  12         struct i2c_client *client;
  13         struct regmap *regmap;
  14         struct dvb_frontend fe;
  15         struct af9033_config cfg;
  16         bool is_af9035;
  17         bool is_it9135;
  18
  19         u32 bandwidth_hz;
  20         bool ts_mode_parallel;
  21         bool ts_mode_serial;
  22
  23         enum fe_status fe_status;
  24         u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
  25         u64 post_bit_error;
  26         u64 post_bit_count;
  27         u64 error_block_count;
  28         u64 total_block_count;
  29 };
  30
  31 /* Write reg val table using reg addr auto increment */
  32 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
  33                                  const struct reg_val *tab, int tab_len)
  34 {
  35         struct i2c_client *client = dev->client;
  36 #define MAX_TAB_LEN 212
  37         int ret, i, j;
  38         u8 buf[1 + MAX_TAB_LEN];
  39
  40         dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
  41
  42         if (tab_len > sizeof(buf)) {
  43                 dev_warn(&client->dev, "tab len %d is too big\n", tab_len);
  44                 return -EINVAL;
  45         }
  46
  47         for (i = 0, j = 0; i < tab_len; i++) {
  48                 buf[j] = tab[i].val;
  49
  50                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
  51                         ret = regmap_bulk_write(dev->regmap, tab[i].reg - j,
  52                                                 buf, j + 1);
  53                         if (ret)
  54                                 goto err;
  55
  56                         j = 0;
  57                 } else {
  58                         j++;
  59                 }
  60         }
  61
  62         return 0;
  63 err:
  64         dev_dbg(&client->dev, "failed=%d\n", ret);
  65         return ret;
  66 }
  67
  68 static int af9033_init(struct dvb_frontend *fe)
  69 {
  70         struct af9033_dev *dev = fe->demodulator_priv;
  71         struct i2c_client *client = dev->client;
  72         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  73         int ret, i, len;
  74         unsigned int utmp;
  75         const struct reg_val *init;
  76         u8 buf[4];
  77         struct reg_val_mask tab[] = {
  78                 { 0x80fb24, 0x00, 0x08 },
  79                 { 0x80004c, 0x00, 0xff },
  80                 { 0x00f641, dev->cfg.tuner, 0xff },
  81                 { 0x80f5ca, 0x01, 0x01 },
  82                 { 0x80f715, 0x01, 0x01 },
  83                 { 0x00f41f, 0x04, 0x04 },
  84                 { 0x00f41a, 0x01, 0x01 },
  85                 { 0x80f731, 0x00, 0x01 },
  86                 { 0x00d91e, 0x00, 0x01 },
  87                 { 0x00d919, 0x00, 0x01 },
  88                 { 0x80f732, 0x00, 0x01 },
  89                 { 0x00d91f, 0x00, 0x01 },
  90                 { 0x00d91a, 0x00, 0x01 },
  91                 { 0x80f730, 0x00, 0x01 },
  92                 { 0x80f778, 0x00, 0xff },
  93                 { 0x80f73c, 0x01, 0x01 },
  94                 { 0x80f776, 0x00, 0x01 },
  95                 { 0x00d8fd, 0x01, 0xff },
  96                 { 0x00d830, 0x01, 0xff },
  97                 { 0x00d831, 0x00, 0xff },
  98                 { 0x00d832, 0x00, 0xff },
  99                 { 0x80f985, dev->ts_mode_serial, 0x01 },
 100                 { 0x80f986, dev->ts_mode_parallel, 0x01 },
 101                 { 0x00d827, 0x00, 0xff },
 102                 { 0x00d829, 0x00, 0xff },
 103                 { 0x800045, dev->cfg.adc_multiplier, 0xff },
 104         };
 105
 106         dev_dbg(&client->dev, "\n");
 107
 108         /* Main clk control */
 109         utmp = div_u64((u64)dev->cfg.clock * 0x80000, 1000000);
 110         buf[0] = (utmp >>  0) & 0xff;
 111         buf[1] = (utmp >>  8) & 0xff;
 112         buf[2] = (utmp >> 16) & 0xff;
 113         buf[3] = (utmp >> 24) & 0xff;
 114         ret = regmap_bulk_write(dev->regmap, 0x800025, buf, 4);
 115         if (ret)
 116                 goto err;
 117
 118         dev_dbg(&client->dev, "clk=%u clk_cw=%08x\n", dev->cfg.clock, utmp);
 119
 120         /* ADC clk control */
 121         for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 122                 if (clock_adc_lut[i].clock == dev->cfg.clock)
 123                         break;
 124         }
 125         if (i == ARRAY_SIZE(clock_adc_lut)) {
 126                 dev_err(&client->dev, "Couldn't find ADC config for clock %d\n",
 127                         dev->cfg.clock);
 128                 goto err;
 129         }
 130
 131         utmp = div_u64((u64)clock_adc_lut[i].adc * 0x80000, 1000000);
 132         buf[0] = (utmp >>  0) & 0xff;
 133         buf[1] = (utmp >>  8) & 0xff;
 134         buf[2] = (utmp >> 16) & 0xff;
 135         ret = regmap_bulk_write(dev->regmap, 0x80f1cd, buf, 3);
 136         if (ret)
 137                 goto err;
 138
 139         dev_dbg(&client->dev, "adc=%u adc_cw=%06x\n",
 140                 clock_adc_lut[i].adc, utmp);
 141
 142         /* Config register table */
 143         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 144                 ret = regmap_update_bits(dev->regmap, tab[i].reg, tab[i].mask,
 145                                          tab[i].val);
 146                 if (ret)
 147                         goto err;
 148         }
 149
 150         /* Demod clk output */
 151         if (dev->cfg.dyn0_clk) {
 152                 ret = regmap_write(dev->regmap, 0x80fba8, 0x00);
 153                 if (ret)
 154                         goto err;
 155         }
 156
 157         /* TS interface */
 158         if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
 159                 ret = regmap_update_bits(dev->regmap, 0x80f9a5, 0x01, 0x00);
 160                 if (ret)
 161                         goto err;
 162                 ret = regmap_update_bits(dev->regmap, 0x80f9b5, 0x01, 0x01);
 163                 if (ret)
 164                         goto err;
 165         } else {
 166                 ret = regmap_update_bits(dev->regmap, 0x80f990, 0x01, 0x00);
 167                 if (ret)
 168                         goto err;
 169                 ret = regmap_update_bits(dev->regmap, 0x80f9b5, 0x01, 0x00);
 170                 if (ret)
 171                         goto err;
 172         }
 173
 174         /* Demod core settings */
 175         dev_dbg(&client->dev, "load ofsm settings\n");
 176         switch (dev->cfg.tuner) {
 177         case AF9033_TUNER_IT9135_38:
 178         case AF9033_TUNER_IT9135_51:
 179         case AF9033_TUNER_IT9135_52:
 180                 len = ARRAY_SIZE(ofsm_init_it9135_v1);
 181                 init = ofsm_init_it9135_v1;
 182                 break;
 183         case AF9033_TUNER_IT9135_60:
 184         case AF9033_TUNER_IT9135_61:
 185         case AF9033_TUNER_IT9135_62:
 186                 len = ARRAY_SIZE(ofsm_init_it9135_v2);
 187                 init = ofsm_init_it9135_v2;
 188                 break;
 189         default:
 190                 len = ARRAY_SIZE(ofsm_init);
 191                 init = ofsm_init;
 192                 break;
 193         }
 194
 195         ret = af9033_wr_reg_val_tab(dev, init, len);
 196         if (ret)
 197                 goto err;
 198
 199         /* Demod tuner specific settings */
 200         dev_dbg(&client->dev, "load tuner specific settings\n");
 201         switch (dev->cfg.tuner) {
 202         case AF9033_TUNER_TUA9001:
 203                 len = ARRAY_SIZE(tuner_init_tua9001);
 204                 init = tuner_init_tua9001;
 205                 break;
 206         case AF9033_TUNER_FC0011:
 207                 len = ARRAY_SIZE(tuner_init_fc0011);
 208                 init = tuner_init_fc0011;
 209                 break;
 210         case AF9033_TUNER_MXL5007T:
 211                 len = ARRAY_SIZE(tuner_init_mxl5007t);
 212                 init = tuner_init_mxl5007t;
 213                 break;
 214         case AF9033_TUNER_TDA18218:
 215                 len = ARRAY_SIZE(tuner_init_tda18218);
 216                 init = tuner_init_tda18218;
 217                 break;
 218         case AF9033_TUNER_FC2580:
 219                 len = ARRAY_SIZE(tuner_init_fc2580);
 220                 init = tuner_init_fc2580;
 221                 break;
 222         case AF9033_TUNER_FC0012:
 223                 len = ARRAY_SIZE(tuner_init_fc0012);
 224                 init = tuner_init_fc0012;
 225                 break;
 226         case AF9033_TUNER_IT9135_38:
 227                 len = ARRAY_SIZE(tuner_init_it9135_38);
 228                 init = tuner_init_it9135_38;
 229                 break;
 230         case AF9033_TUNER_IT9135_51:
 231                 len = ARRAY_SIZE(tuner_init_it9135_51);
 232                 init = tuner_init_it9135_51;
 233                 break;
 234         case AF9033_TUNER_IT9135_52:
 235                 len = ARRAY_SIZE(tuner_init_it9135_52);
 236                 init = tuner_init_it9135_52;
 237                 break;
 238         case AF9033_TUNER_IT9135_60:
 239                 len = ARRAY_SIZE(tuner_init_it9135_60);
 240                 init = tuner_init_it9135_60;
 241                 break;
 242         case AF9033_TUNER_IT9135_61:
 243                 len = ARRAY_SIZE(tuner_init_it9135_61);
 244                 init = tuner_init_it9135_61;
 245                 break;
 246         case AF9033_TUNER_IT9135_62:
 247                 len = ARRAY_SIZE(tuner_init_it9135_62);
 248                 init = tuner_init_it9135_62;
 249                 break;
 250         default:
 251                 dev_dbg(&client->dev, "unsupported tuner ID=%d\n",
 252                         dev->cfg.tuner);
 253                 ret = -ENODEV;
 254                 goto err;
 255         }
 256
 257         ret = af9033_wr_reg_val_tab(dev, init, len);
 258         if (ret)
 259                 goto err;
 260
 261         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 262                 ret = regmap_update_bits(dev->regmap, 0x00d91c, 0x01, 0x01);
 263                 if (ret)
 264                         goto err;
 265                 ret = regmap_update_bits(dev->regmap, 0x00d917, 0x01, 0x00);
 266                 if (ret)
 267                         goto err;
 268                 ret = regmap_update_bits(dev->regmap, 0x00d916, 0x01, 0x00);
 269                 if (ret)
 270                         goto err;
 271         }
 272
 273         switch (dev->cfg.tuner) {
 274         case AF9033_TUNER_IT9135_60:
 275         case AF9033_TUNER_IT9135_61:
 276         case AF9033_TUNER_IT9135_62:
 277                 ret = regmap_write(dev->regmap, 0x800000, 0x01);
 278                 if (ret)
 279                         goto err;
 280         }
 281
 282         dev->bandwidth_hz = 0; /* Force to program all parameters */
 283         /* Init stats here in order signal app which stats are supported */
 284         c->strength.len = 1;
 285         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 286         c->cnr.len = 1;
 287         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 288         c->block_count.len = 1;
 289         c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 290         c->block_error.len = 1;
 291         c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 292         c->post_bit_count.len = 1;
 293         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 294         c->post_bit_error.len = 1;
 295         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 296
 297         return 0;
 298 err:
 299         dev_dbg(&client->dev, "failed=%d\n", ret);
 300         return ret;
 301 }
 302
 303 static int af9033_sleep(struct dvb_frontend *fe)
 304 {
 305         struct af9033_dev *dev = fe->demodulator_priv;
 306         struct i2c_client *client = dev->client;
 307         int ret;
 308         unsigned int utmp;
 309
 310         dev_dbg(&client->dev, "\n");
 311
 312         ret = regmap_write(dev->regmap, 0x80004c, 0x01);
 313         if (ret)
 314                 goto err;
 315         ret = regmap_write(dev->regmap, 0x800000, 0x00);
 316         if (ret)
 317                 goto err;
 318         ret = regmap_read_poll_timeout(dev->regmap, 0x80004c, utmp, utmp == 0,
 319                                        5000, 1000000);
 320         if (ret)
 321                 goto err;
 322         ret = regmap_update_bits(dev->regmap, 0x80fb24, 0x08, 0x08);
 323         if (ret)
 324                 goto err;
 325
 326         /* Prevent current leak by setting TS interface to parallel mode */
 327         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 328                 /* Enable parallel TS */
 329                 ret = regmap_update_bits(dev->regmap, 0x00d917, 0x01, 0x00);
 330                 if (ret)
 331                         goto err;
 332                 ret = regmap_update_bits(dev->regmap, 0x00d916, 0x01, 0x01);
 333                 if (ret)
 334                         goto err;
 335         }
 336
 337         return 0;
 338 err:
 339         dev_dbg(&client->dev, "failed=%d\n", ret);
 340         return ret;
 341 }
 342
 343 static int af9033_get_tune_settings(struct dvb_frontend *fe,
 344                                     struct dvb_frontend_tune_settings *fesettings)
 345 {
 346         /* 800 => 2000 because IT9135 v2 is slow to gain lock */
 347         fesettings->min_delay_ms = 2000;
 348         fesettings->step_size = 0;
 349         fesettings->max_drift = 0;
 350
 351         return 0;
 352 }
 353
 354 static int af9033_set_frontend(struct dvb_frontend *fe)
 355 {
 356         struct af9033_dev *dev = fe->demodulator_priv;
 357         struct i2c_client *client = dev->client;
 358         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 359         int ret, i;
 360         unsigned int utmp, adc_freq;
 361         u8 tmp, buf[3], bandwidth_reg_val;
 362         u32 if_frequency;
 363
 364         dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u\n",
 365                 c->frequency, c->bandwidth_hz);
 366
 367         /* Check bandwidth */
 368         switch (c->bandwidth_hz) {
 369         case 6000000:
 370                 bandwidth_reg_val = 0x00;
 371                 break;
 372         case 7000000:
 373                 bandwidth_reg_val = 0x01;
 374                 break;
 375         case 8000000:
 376                 bandwidth_reg_val = 0x02;
 377                 break;
 378         default:
 379                 dev_dbg(&client->dev, "invalid bandwidth_hz\n");
 380                 ret = -EINVAL;
 381                 goto err;
 382         }
 383
 384         /* Program tuner */
 385         if (fe->ops.tuner_ops.set_params)
 386                 fe->ops.tuner_ops.set_params(fe);
 387
 388         /* Coefficients */
 389         if (c->bandwidth_hz != dev->bandwidth_hz) {
 390                 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
 391                         if (coeff_lut[i].clock == dev->cfg.clock &&
 392                             coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
 393                                 break;
 394                         }
 395                 }
 396                 if (i == ARRAY_SIZE(coeff_lut)) {
 397                         dev_err(&client->dev,
 398                                 "Couldn't find config for clock %u\n",
 399                                 dev->cfg.clock);
 400                         ret = -EINVAL;
 401                         goto err;
 402                 }
 403
 404                 ret = regmap_bulk_write(dev->regmap, 0x800001, coeff_lut[i].val,
 405                                         sizeof(coeff_lut[i].val));
 406                 if (ret)
 407                         goto err;
 408         }
 409
 410         /* IF frequency control */
 411         if (c->bandwidth_hz != dev->bandwidth_hz) {
 412                 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 413                         if (clock_adc_lut[i].clock == dev->cfg.clock)
 414                                 break;
 415                 }
 416                 if (i == ARRAY_SIZE(clock_adc_lut)) {
 417                         dev_err(&client->dev,
 418                                 "Couldn't find ADC clock for clock %u\n",
 419                                 dev->cfg.clock);
 420                         ret = -EINVAL;
 421                         goto err;
 422                 }
 423                 adc_freq = clock_adc_lut[i].adc;
 424
 425                 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
 426                         adc_freq = 2 * adc_freq;
 427
 428                 /* Get used IF frequency */
 429                 if (fe->ops.tuner_ops.get_if_frequency)
 430                         fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
 431                 else
 432                         if_frequency = 0;
 433
 434                 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x800000,
 435                                              adc_freq);
 436
 437                 if (!dev->cfg.spec_inv && if_frequency)
 438                         utmp = 0x800000 - utmp;
 439
 440                 buf[0] = (utmp >>  0) & 0xff;
 441                 buf[1] = (utmp >>  8) & 0xff;
 442                 buf[2] = (utmp >> 16) & 0xff;
 443                 ret = regmap_bulk_write(dev->regmap, 0x800029, buf, 3);
 444                 if (ret)
 445                         goto err;
 446
 447                 dev_dbg(&client->dev, "if_frequency_cw=%06x\n", utmp);
 448
 449                 dev->bandwidth_hz = c->bandwidth_hz;
 450         }
 451
 452         ret = regmap_update_bits(dev->regmap, 0x80f904, 0x03,
 453                                  bandwidth_reg_val);
 454         if (ret)
 455                 goto err;
 456         ret = regmap_write(dev->regmap, 0x800040, 0x00);
 457         if (ret)
 458                 goto err;
 459         ret = regmap_write(dev->regmap, 0x800047, 0x00);
 460         if (ret)
 461                 goto err;
 462         ret = regmap_update_bits(dev->regmap, 0x80f999, 0x01, 0x00);
 463         if (ret)
 464                 goto err;
 465
 466         if (c->frequency <= 230000000)
 467                 tmp = 0x00; /* VHF */
 468         else
 469                 tmp = 0x01; /* UHF */
 470
 471         ret = regmap_write(dev->regmap, 0x80004b, tmp);
 472         if (ret)
 473                 goto err;
 474         /* Reset FSM */
 475         ret = regmap_write(dev->regmap, 0x800000, 0x00);
 476         if (ret)
 477                 goto err;
 478
 479         return 0;
 480 err:
 481         dev_dbg(&client->dev, "failed=%d\n", ret);
 482         return ret;
 483 }
 484
 485 static int af9033_get_frontend(struct dvb_frontend *fe,
 486                                struct dtv_frontend_properties *c)
 487 {
 488         struct af9033_dev *dev = fe->demodulator_priv;
 489         struct i2c_client *client = dev->client;
 490         int ret;
 491         u8 buf[8];
 492
 493         dev_dbg(&client->dev, "\n");
 494
 495         /* Read all needed TPS registers */
 496         ret = regmap_bulk_read(dev->regmap, 0x80f900, buf, 8);
 497         if (ret)
 498                 goto err;
 499
 500         switch ((buf[0] >> 0) & 3) {
 501         case 0:
 502                 c->transmission_mode = TRANSMISSION_MODE_2K;
 503                 break;
 504         case 1:
 505                 c->transmission_mode = TRANSMISSION_MODE_8K;
 506                 break;
 507         }
 508
 509         switch ((buf[1] >> 0) & 3) {
 510         case 0:
 511                 c->guard_interval = GUARD_INTERVAL_1_32;
 512                 break;
 513         case 1:
 514                 c->guard_interval = GUARD_INTERVAL_1_16;
 515                 break;
 516         case 2:
 517                 c->guard_interval = GUARD_INTERVAL_1_8;
 518                 break;
 519         case 3:
 520                 c->guard_interval = GUARD_INTERVAL_1_4;
 521                 break;
 522         }
 523
 524         switch ((buf[2] >> 0) & 7) {
 525         case 0:
 526                 c->hierarchy = HIERARCHY_NONE;
 527                 break;
 528         case 1:
 529                 c->hierarchy = HIERARCHY_1;
 530                 break;
 531         case 2:
 532                 c->hierarchy = HIERARCHY_2;
 533                 break;
 534         case 3:
 535                 c->hierarchy = HIERARCHY_4;
 536                 break;
 537         }
 538
 539         switch ((buf[3] >> 0) & 3) {
 540         case 0:
 541                 c->modulation = QPSK;
 542                 break;
 543         case 1:
 544                 c->modulation = QAM_16;
 545                 break;
 546         case 2:
 547                 c->modulation = QAM_64;
 548                 break;
 549         }
 550
 551         switch ((buf[4] >> 0) & 3) {
 552         case 0:
 553                 c->bandwidth_hz = 6000000;
 554                 break;
 555         case 1:
 556                 c->bandwidth_hz = 7000000;
 557                 break;
 558         case 2:
 559                 c->bandwidth_hz = 8000000;
 560                 break;
 561         }
 562
 563         switch ((buf[6] >> 0) & 7) {
 564         case 0:
 565                 c->code_rate_HP = FEC_1_2;
 566                 break;
 567         case 1:
 568                 c->code_rate_HP = FEC_2_3;
 569                 break;
 570         case 2:
 571                 c->code_rate_HP = FEC_3_4;
 572                 break;
 573         case 3:
 574                 c->code_rate_HP = FEC_5_6;
 575                 break;
 576         case 4:
 577                 c->code_rate_HP = FEC_7_8;
 578                 break;
 579         case 5:
 580                 c->code_rate_HP = FEC_NONE;
 581                 break;
 582         }
 583
 584         switch ((buf[7] >> 0) & 7) {
 585         case 0:
 586                 c->code_rate_LP = FEC_1_2;
 587                 break;
 588         case 1:
 589                 c->code_rate_LP = FEC_2_3;
 590                 break;
 591         case 2:
 592                 c->code_rate_LP = FEC_3_4;
 593                 break;
 594         case 3:
 595                 c->code_rate_LP = FEC_5_6;
 596                 break;
 597         case 4:
 598                 c->code_rate_LP = FEC_7_8;
 599                 break;
 600         case 5:
 601                 c->code_rate_LP = FEC_NONE;
 602                 break;
 603         }
 604
 605         return 0;
 606 err:
 607         dev_dbg(&client->dev, "failed=%d\n", ret);
 608         return ret;
 609 }
 610
 611 static int af9033_read_status(struct dvb_frontend *fe, enum fe_status *status)
 612 {
 613         struct af9033_dev *dev = fe->demodulator_priv;
 614         struct i2c_client *client = dev->client;
 615         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 616         int ret, tmp = 0;
 617         u8 buf[7];
 618         unsigned int utmp, utmp1;
 619
 620         dev_dbg(&client->dev, "\n");
 621
 622         *status = 0;
 623
 624         /* Radio channel status: 0=no result, 1=has signal, 2=no signal */
 625         ret = regmap_read(dev->regmap, 0x800047, &utmp);
 626         if (ret)
 627                 goto err;
 628
 629         /* Has signal */
 630         if (utmp == 0x01)
 631                 *status |= FE_HAS_SIGNAL;
 632
 633         if (utmp != 0x02) {
 634                 /* TPS lock */
 635                 ret = regmap_read(dev->regmap, 0x80f5a9, &utmp);
 636                 if (ret)
 637                         goto err;
 638
 639                 if ((utmp >> 0) & 0x01)
 640                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 641                                         FE_HAS_VITERBI;
 642
 643                 /* Full lock */
 644                 ret = regmap_read(dev->regmap, 0x80f999, &utmp);
 645                 if (ret)
 646                         goto err;
 647
 648                 if ((utmp >> 0) & 0x01)
 649                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 650                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 651                                         FE_HAS_LOCK;
 652         }
 653
 654         dev->fe_status = *status;
 655
 656         /* Signal strength */
 657         if (dev->fe_status & FE_HAS_SIGNAL) {
 658                 if (dev->is_af9035) {
 659                         ret = regmap_read(dev->regmap, 0x80004a, &utmp);
 660                         if (ret)
 661                                 goto err;
 662                         tmp = -utmp * 1000;
 663                 } else {
 664                         ret = regmap_read(dev->regmap, 0x8000f7, &utmp);
 665                         if (ret)
 666                                 goto err;
 667                         tmp = (utmp - 100) * 1000;
 668                 }
 669
 670                 c->strength.len = 1;
 671                 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
 672                 c->strength.stat[0].svalue = tmp;
 673         } else {
 674                 c->strength.len = 1;
 675                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 676         }
 677
 678         /* CNR */
 679         if (dev->fe_status & FE_HAS_VITERBI) {
 680                 /* Read raw SNR value */
 681                 ret = regmap_bulk_read(dev->regmap, 0x80002c, buf, 3);
 682                 if (ret)
 683                         goto err;
 684
 685                 utmp1 = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
 686
 687                 /* Read superframe number */
 688                 ret = regmap_read(dev->regmap, 0x80f78b, &utmp);
 689                 if (ret)
 690                         goto err;
 691
 692                 if (utmp)
 693                         utmp1 /= utmp;
 694
 695                 /* Read current transmission mode */
 696                 ret = regmap_read(dev->regmap, 0x80f900, &utmp);
 697                 if (ret)
 698                         goto err;
 699
 700                 switch ((utmp >> 0) & 3) {
 701                 case 0:
 702                         /* 2k */
 703                         utmp1 *= 4;
 704                         break;
 705                 case 1:
 706                         /* 8k */
 707                         utmp1 *= 1;
 708                         break;
 709                 case 2:
 710                         /* 4k */
 711                         utmp1 *= 2;
 712                         break;
 713                 default:
 714                         utmp1 *= 0;
 715                         break;
 716                 }
 717
 718                 /* Read current modulation */
 719                 ret = regmap_read(dev->regmap, 0x80f903, &utmp);
 720                 if (ret)
 721                         goto err;
 722
 723                 switch ((utmp >> 0) & 3) {
 724                 case 0:
 725                         /*
 726                          * QPSK
 727                          * CNR[dB] 13 * -log10((1690000 - value) / value) + 2.6
 728                          * value [653799, 1689999], 2.6 / 13 = 3355443
 729                          */
 730                         utmp1 = clamp(utmp1, 653799U, 1689999U);
 731                         utmp1 = ((u64)(intlog10(utmp1)
 732                                  - intlog10(1690000 - utmp1)
 733                                  + 3355443) * 13 * 1000) >> 24;
 734                         break;
 735                 case 1:
 736                         /*
 737                          * QAM-16
 738                          * CNR[dB] 6 * log10((value - 370000) / (828000 - value)) + 15.7
 739                          * value [371105, 827999], 15.7 / 6 = 43900382
 740                          */
 741                         utmp1 = clamp(utmp1, 371105U, 827999U);
 742                         utmp1 = ((u64)(intlog10(utmp1 - 370000)
 743                                  - intlog10(828000 - utmp1)
 744                                  + 43900382) * 6 * 1000) >> 24;
 745                         break;
 746                 case 2:
 747                         /*
 748                          * QAM-64
 749                          * CNR[dB] 8 * log10((value - 193000) / (425000 - value)) + 23.8
 750                          * value [193246, 424999], 23.8 / 8 = 49912218
 751                          */
 752                         utmp1 = clamp(utmp1, 193246U, 424999U);
 753                         utmp1 = ((u64)(intlog10(utmp1 - 193000)
 754                                  - intlog10(425000 - utmp1)
 755                                  + 49912218) * 8 * 1000) >> 24;
 756                         break;
 757                 default:
 758                         utmp1 = 0;
 759                         break;
 760                 }
 761
 762                 dev_dbg(&client->dev, "cnr=%u\n", utmp1);
 763
 764                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 765                 c->cnr.stat[0].svalue = utmp1;
 766         } else {
 767                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 768         }
 769
 770         /* UCB/PER/BER */
 771         if (dev->fe_status & FE_HAS_LOCK) {
 772                 /* Outer FEC, 204 byte packets */
 773                 u16 abort_packet_count, rsd_packet_count;
 774                 /* Inner FEC, bits */
 775                 u32 rsd_bit_err_count;
 776
 777                 /*
 778                  * Packet count used for measurement is 10000
 779                  * (rsd_packet_count). Maybe it should be increased?
 780                  */
 781
 782                 ret = regmap_bulk_read(dev->regmap, 0x800032, buf, 7);
 783                 if (ret)
 784                         goto err;
 785
 786                 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
 787                 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
 788                 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
 789
 790                 dev->error_block_count += abort_packet_count;
 791                 dev->total_block_count += rsd_packet_count;
 792                 dev->post_bit_error += rsd_bit_err_count;
 793                 dev->post_bit_count += rsd_packet_count * 204 * 8;
 794
 795                 c->block_count.len = 1;
 796                 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
 797                 c->block_count.stat[0].uvalue = dev->total_block_count;
 798
 799                 c->block_error.len = 1;
 800                 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
 801                 c->block_error.stat[0].uvalue = dev->error_block_count;
 802
 803                 c->post_bit_count.len = 1;
 804                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 805                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 806
 807                 c->post_bit_error.len = 1;
 808                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 809                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 810         }
 811
 812         return 0;
 813 err:
 814         dev_dbg(&client->dev, "failed=%d\n", ret);
 815         return ret;
 816 }
 817
 818 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
 819 {
 820         struct af9033_dev *dev = fe->demodulator_priv;
 821         struct i2c_client *client = dev->client;
 822         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 823         int ret;
 824         unsigned int utmp;
 825
 826         dev_dbg(&client->dev, "\n");
 827
 828         /* Use DVBv5 CNR */
 829         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL) {
 830                 /* Return 0.1 dB for AF9030 and 0-0xffff for IT9130. */
 831                 if (dev->is_af9035) {
 832                         /* 1000x => 10x (0.1 dB) */
 833                         *snr = div_s64(c->cnr.stat[0].svalue, 100);
 834                 } else {
 835                         /* 1000x => 1x (1 dB) */
 836                         *snr = div_s64(c->cnr.stat[0].svalue, 1000);
 837
 838                         /* Read current modulation */
 839                         ret = regmap_read(dev->regmap, 0x80f903, &utmp);
 840                         if (ret)
 841                                 goto err;
 842
 843                         /* scale value to 0x0000-0xffff */
 844                         switch ((utmp >> 0) & 3) {
 845                         case 0:
 846                                 *snr = *snr * 0xffff / 23;
 847                                 break;
 848                         case 1:
 849                                 *snr = *snr * 0xffff / 26;
 850                                 break;
 851                         case 2:
 852                                 *snr = *snr * 0xffff / 32;
 853                                 break;
 854                         default:
 855                                 goto err;
 856                         }
 857                 }
 858         } else {
 859                 *snr = 0;
 860         }
 861
 862         return 0;
 863 err:
 864         dev_dbg(&client->dev, "failed=%d\n", ret);
 865         return ret;
 866 }
 867
 868 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 869 {
 870         struct af9033_dev *dev = fe->demodulator_priv;
 871         struct i2c_client *client = dev->client;
 872         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 873         int ret, tmp, power_real;
 874         unsigned int utmp;
 875         u8 gain_offset, buf[7];
 876
 877         dev_dbg(&client->dev, "\n");
 878
 879         if (dev->is_af9035) {
 880                 /* Read signal strength of 0-100 scale */
 881                 ret = regmap_read(dev->regmap, 0x800048, &utmp);
 882                 if (ret)
 883                         goto err;
 884
 885                 /* Scale value to 0x0000-0xffff */
 886                 *strength = utmp * 0xffff / 100;
 887         } else {
 888                 ret = regmap_read(dev->regmap, 0x8000f7, &utmp);
 889                 if (ret)
 890                         goto err;
 891
 892                 ret = regmap_bulk_read(dev->regmap, 0x80f900, buf, 7);
 893                 if (ret)
 894                         goto err;
 895
 896                 if (c->frequency <= 300000000)
 897                         gain_offset = 7; /* VHF */
 898                 else
 899                         gain_offset = 4; /* UHF */
 900
 901                 power_real = (utmp - 100 - gain_offset) -
 902                         power_reference[((buf[3] >> 0) & 3)][((buf[6] >> 0) & 7)];
 903
 904                 if (power_real < -15)
 905                         tmp = 0;
 906                 else if ((power_real >= -15) && (power_real < 0))
 907                         tmp = (2 * (power_real + 15)) / 3;
 908                 else if ((power_real >= 0) && (power_real < 20))
 909                         tmp = 4 * power_real + 10;
 910                 else if ((power_real >= 20) && (power_real < 35))
 911                         tmp = (2 * (power_real - 20)) / 3 + 90;
 912                 else
 913                         tmp = 100;
 914
 915                 /* Scale value to 0x0000-0xffff */
 916                 *strength = tmp * 0xffff / 100;
 917         }
 918
 919         return 0;
 920 err:
 921         dev_dbg(&client->dev, "failed=%d\n", ret);
 922         return ret;
 923 }
 924
 925 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
 926 {
 927         struct af9033_dev *dev = fe->demodulator_priv;
 928
 929         *ber = (dev->post_bit_error - dev->post_bit_error_prev);
 930         dev->post_bit_error_prev = dev->post_bit_error;
 931
 932         return 0;
 933 }
 934
 935 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 936 {
 937         struct af9033_dev *dev = fe->demodulator_priv;
 938
 939         *ucblocks = dev->error_block_count;
 940
 941         return 0;
 942 }
 943
 944 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 945 {
 946         struct af9033_dev *dev = fe->demodulator_priv;
 947         struct i2c_client *client = dev->client;
 948         int ret;
 949
 950         dev_dbg(&client->dev, "enable=%d\n", enable);
 951
 952         ret = regmap_update_bits(dev->regmap, 0x00fa04, 0x01, enable);
 953         if (ret)
 954                 goto err;
 955
 956         return 0;
 957 err:
 958         dev_dbg(&client->dev, "failed=%d\n", ret);
 959         return ret;
 960 }
 961
 962 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
 963 {
 964         struct af9033_dev *dev = fe->demodulator_priv;
 965         struct i2c_client *client = dev->client;
 966         int ret;
 967
 968         dev_dbg(&client->dev, "onoff=%d\n", onoff);
 969
 970         ret = regmap_update_bits(dev->regmap, 0x80f993, 0x01, onoff);
 971         if (ret)
 972                 goto err;
 973
 974         return 0;
 975 err:
 976         dev_dbg(&client->dev, "failed=%d\n", ret);
 977         return ret;
 978 }
 979
 980 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
 981                              int onoff)
 982 {
 983         struct af9033_dev *dev = fe->demodulator_priv;
 984         struct i2c_client *client = dev->client;
 985         int ret;
 986         u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
 987
 988         dev_dbg(&client->dev, "index=%d pid=%04x onoff=%d\n",
 989                 index, pid, onoff);
 990
 991         if (pid > 0x1fff)
 992                 return 0;
 993
 994         ret = regmap_bulk_write(dev->regmap, 0x80f996, wbuf, 2);
 995         if (ret)
 996                 goto err;
 997         ret = regmap_write(dev->regmap, 0x80f994, onoff);
 998         if (ret)
 999                 goto err;
1000         ret = regmap_write(dev->regmap, 0x80f995, index);
1001         if (ret)
1002                 goto err;
1003
1004         return 0;
1005 err:
1006         dev_dbg(&client->dev, "failed=%d\n", ret);
1007         return ret;
1008 }
1009
1010 static const struct dvb_frontend_ops af9033_ops = {
1011         .delsys = {SYS_DVBT},
1012         .info = {
1013                 .name = "Afatech AF9033 (DVB-T)",
1014                 .frequency_min_hz = 174 * MHz,
1015                 .frequency_max_hz = 862 * MHz,
1016                 .frequency_stepsize_hz = 250 * kHz,
1017                 .caps = FE_CAN_FEC_1_2 |
1018                         FE_CAN_FEC_2_3 |
1019                         FE_CAN_FEC_3_4 |
1020                         FE_CAN_FEC_5_6 |
1021                         FE_CAN_FEC_7_8 |
1022                         FE_CAN_FEC_AUTO |
1023                         FE_CAN_QPSK |
1024                         FE_CAN_QAM_16 |
1025                         FE_CAN_QAM_64 |
1026                         FE_CAN_QAM_AUTO |
1027                         FE_CAN_TRANSMISSION_MODE_AUTO |
1028                         FE_CAN_GUARD_INTERVAL_AUTO |
1029                         FE_CAN_HIERARCHY_AUTO |
1030                         FE_CAN_RECOVER |
1031                         FE_CAN_MUTE_TS
1032         },
1033
1034         .init = af9033_init,
1035         .sleep = af9033_sleep,
1036
1037         .get_tune_settings = af9033_get_tune_settings,
1038         .set_frontend = af9033_set_frontend,
1039         .get_frontend = af9033_get_frontend,
1040
1041         .read_status = af9033_read_status,
1042         .read_snr = af9033_read_snr,
1043         .read_signal_strength = af9033_read_signal_strength,
1044         .read_ber = af9033_read_ber,
1045         .read_ucblocks = af9033_read_ucblocks,
1046
1047         .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1048 };
1049
1050 static int af9033_probe(struct i2c_client *client,
1051                         const struct i2c_device_id *id)
1052 {
1053         struct af9033_config *cfg = client->dev.platform_data;
1054         struct af9033_dev *dev;
1055         int ret;
1056         u8 buf[8];
1057         u32 reg;
1058         static const struct regmap_config regmap_config = {
1059                 .reg_bits    =  24,
1060                 .val_bits    =  8,
1061         };
1062
1063         /* Allocate memory for the internal state */
1064         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1065         if (!dev) {
1066                 ret = -ENOMEM;
1067                 goto err;
1068         }
1069
1070         /* Setup the state */
1071         dev->client = client;
1072         memcpy(&dev->cfg, cfg, sizeof(dev->cfg));
1073         switch (dev->cfg.ts_mode) {
1074         case AF9033_TS_MODE_PARALLEL:
1075                 dev->ts_mode_parallel = true;
1076                 break;
1077         case AF9033_TS_MODE_SERIAL:
1078                 dev->ts_mode_serial = true;
1079                 break;
1080         case AF9033_TS_MODE_USB:
1081                 /* USB mode for AF9035 */
1082         default:
1083                 break;
1084         }
1085
1086         if (dev->cfg.clock != 12000000) {
1087                 ret = -ENODEV;
1088                 dev_err(&client->dev,
1089                         "Unsupported clock %u Hz. Only 12000000 Hz is supported currently\n",
1090                         dev->cfg.clock);
1091                 goto err_kfree;
1092         }
1093
1094         /* Create regmap */
1095         dev->regmap = regmap_init_i2c(client, &regmap_config);
1096         if (IS_ERR(dev->regmap)) {
1097                 ret = PTR_ERR(dev->regmap);
1098                 goto err_kfree;
1099         }
1100
1101         /* Firmware version */
1102         switch (dev->cfg.tuner) {
1103         case AF9033_TUNER_IT9135_38:
1104         case AF9033_TUNER_IT9135_51:
1105         case AF9033_TUNER_IT9135_52:
1106         case AF9033_TUNER_IT9135_60:
1107         case AF9033_TUNER_IT9135_61:
1108         case AF9033_TUNER_IT9135_62:
1109                 dev->is_it9135 = true;
1110                 reg = 0x004bfc;
1111                 break;
1112         default:
1113                 dev->is_af9035 = true;
1114                 reg = 0x0083e9;
1115                 break;
1116         }
1117
1118         ret = regmap_bulk_read(dev->regmap, reg, &buf[0], 4);
1119         if (ret)
1120                 goto err_regmap_exit;
1121         ret = regmap_bulk_read(dev->regmap, 0x804191, &buf[4], 4);
1122         if (ret)
1123                 goto err_regmap_exit;
1124
1125         dev_info(&client->dev,
1126                  "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1127                  buf[0], buf[1], buf[2], buf[3],
1128                  buf[4], buf[5], buf[6], buf[7]);
1129
1130         /* Sleep as chip seems to be partly active by default */
1131         /* IT9135 did not like to sleep at that early */
1132         if (dev->is_af9035) {
1133                 ret = regmap_write(dev->regmap, 0x80004c, 0x01);
1134                 if (ret)
1135                         goto err_regmap_exit;
1136                 ret = regmap_write(dev->regmap, 0x800000, 0x00);
1137                 if (ret)
1138                         goto err_regmap_exit;
1139         }
1140
1141         /* Create dvb frontend */
1142         memcpy(&dev->fe.ops, &af9033_ops, sizeof(dev->fe.ops));
1143         dev->fe.demodulator_priv = dev;
1144         *cfg->fe = &dev->fe;
1145         if (cfg->ops) {
1146                 cfg->ops->pid_filter = af9033_pid_filter;
1147                 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1148         }
1149         cfg->regmap = dev->regmap;
1150         i2c_set_clientdata(client, dev);
1151
1152         dev_info(&client->dev, "Afatech AF9033 successfully attached\n");
1153
1154         return 0;
1155 err_regmap_exit:
1156         regmap_exit(dev->regmap);
1157 err_kfree:
1158         kfree(dev);
1159 err:
1160         dev_dbg(&client->dev, "failed=%d\n", ret);
1161         return ret;
1162 }
1163
1164 static int af9033_remove(struct i2c_client *client)
1165 {
1166         struct af9033_dev *dev = i2c_get_clientdata(client);
1167
1168         dev_dbg(&client->dev, "\n");
1169
1170         regmap_exit(dev->regmap);
1171         kfree(dev);
1172
1173         return 0;
1174 }
1175
1176 static const struct i2c_device_id af9033_id_table[] = {
1177         {"af9033", 0},
1178         {}
1179 };
1180 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1181
1182 static struct i2c_driver af9033_driver = {
1183         .driver = {
1184                 .name   = "af9033",
1185                 .suppress_bind_attrs    = true,
1186         },
1187         .probe          = af9033_probe,
1188         .remove         = af9033_remove,
1189         .id_table       = af9033_id_table,
1190 };
1191
1192 module_i2c_driver(af9033_driver);
1193
1194 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1195 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1196 MODULE_LICENSE("GPL");