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Merge branch 'linux-4.15' of git://github.com/skeggsb/linux into drm-fixes
[thirdparty/kernel/stable.git] / drivers / misc / c2port / core.c
1 /*
2 * Silicon Labs C2 port core Linux support
3 *
4 * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation
10 */
11
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/errno.h>
16 #include <linux/err.h>
17 #include <linux/kernel.h>
18 #include <linux/ctype.h>
19 #include <linux/delay.h>
20 #include <linux/idr.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23
24 #include <linux/c2port.h>
25
26 #define DRIVER_NAME "c2port"
27 #define DRIVER_VERSION "0.51.0"
28
29 static DEFINE_SPINLOCK(c2port_idr_lock);
30 static DEFINE_IDR(c2port_idr);
31
32 /*
33 * Local variables
34 */
35
36 static struct class *c2port_class;
37
38 /*
39 * C2 registers & commands defines
40 */
41
42 /* C2 registers */
43 #define C2PORT_DEVICEID 0x00
44 #define C2PORT_REVID 0x01
45 #define C2PORT_FPCTL 0x02
46 #define C2PORT_FPDAT 0xB4
47
48 /* C2 interface commands */
49 #define C2PORT_GET_VERSION 0x01
50 #define C2PORT_DEVICE_ERASE 0x03
51 #define C2PORT_BLOCK_READ 0x06
52 #define C2PORT_BLOCK_WRITE 0x07
53 #define C2PORT_PAGE_ERASE 0x08
54
55 /* C2 status return codes */
56 #define C2PORT_INVALID_COMMAND 0x00
57 #define C2PORT_COMMAND_FAILED 0x02
58 #define C2PORT_COMMAND_OK 0x0d
59
60 /*
61 * C2 port low level signal managements
62 */
63
64 static void c2port_reset(struct c2port_device *dev)
65 {
66 struct c2port_ops *ops = dev->ops;
67
68 /* To reset the device we have to keep clock line low for at least
69 * 20us.
70 */
71 local_irq_disable();
72 ops->c2ck_set(dev, 0);
73 udelay(25);
74 ops->c2ck_set(dev, 1);
75 local_irq_enable();
76
77 udelay(1);
78 }
79
80 static void c2port_strobe_ck(struct c2port_device *dev)
81 {
82 struct c2port_ops *ops = dev->ops;
83
84 /* During hi-low-hi transition we disable local IRQs to avoid
85 * interructions since C2 port specification says that it must be
86 * shorter than 5us, otherwise the microcontroller may consider
87 * it as a reset signal!
88 */
89 local_irq_disable();
90 ops->c2ck_set(dev, 0);
91 udelay(1);
92 ops->c2ck_set(dev, 1);
93 local_irq_enable();
94
95 udelay(1);
96 }
97
98 /*
99 * C2 port basic functions
100 */
101
102 static void c2port_write_ar(struct c2port_device *dev, u8 addr)
103 {
104 struct c2port_ops *ops = dev->ops;
105 int i;
106
107 /* START field */
108 c2port_strobe_ck(dev);
109
110 /* INS field (11b, LSB first) */
111 ops->c2d_dir(dev, 0);
112 ops->c2d_set(dev, 1);
113 c2port_strobe_ck(dev);
114 ops->c2d_set(dev, 1);
115 c2port_strobe_ck(dev);
116
117 /* ADDRESS field */
118 for (i = 0; i < 8; i++) {
119 ops->c2d_set(dev, addr & 0x01);
120 c2port_strobe_ck(dev);
121
122 addr >>= 1;
123 }
124
125 /* STOP field */
126 ops->c2d_dir(dev, 1);
127 c2port_strobe_ck(dev);
128 }
129
130 static int c2port_read_ar(struct c2port_device *dev, u8 *addr)
131 {
132 struct c2port_ops *ops = dev->ops;
133 int i;
134
135 /* START field */
136 c2port_strobe_ck(dev);
137
138 /* INS field (10b, LSB first) */
139 ops->c2d_dir(dev, 0);
140 ops->c2d_set(dev, 0);
141 c2port_strobe_ck(dev);
142 ops->c2d_set(dev, 1);
143 c2port_strobe_ck(dev);
144
145 /* ADDRESS field */
146 ops->c2d_dir(dev, 1);
147 *addr = 0;
148 for (i = 0; i < 8; i++) {
149 *addr >>= 1; /* shift in 8-bit ADDRESS field LSB first */
150
151 c2port_strobe_ck(dev);
152 if (ops->c2d_get(dev))
153 *addr |= 0x80;
154 }
155
156 /* STOP field */
157 c2port_strobe_ck(dev);
158
159 return 0;
160 }
161
162 static int c2port_write_dr(struct c2port_device *dev, u8 data)
163 {
164 struct c2port_ops *ops = dev->ops;
165 int timeout, i;
166
167 /* START field */
168 c2port_strobe_ck(dev);
169
170 /* INS field (01b, LSB first) */
171 ops->c2d_dir(dev, 0);
172 ops->c2d_set(dev, 1);
173 c2port_strobe_ck(dev);
174 ops->c2d_set(dev, 0);
175 c2port_strobe_ck(dev);
176
177 /* LENGTH field (00b, LSB first -> 1 byte) */
178 ops->c2d_set(dev, 0);
179 c2port_strobe_ck(dev);
180 ops->c2d_set(dev, 0);
181 c2port_strobe_ck(dev);
182
183 /* DATA field */
184 for (i = 0; i < 8; i++) {
185 ops->c2d_set(dev, data & 0x01);
186 c2port_strobe_ck(dev);
187
188 data >>= 1;
189 }
190
191 /* WAIT field */
192 ops->c2d_dir(dev, 1);
193 timeout = 20;
194 do {
195 c2port_strobe_ck(dev);
196 if (ops->c2d_get(dev))
197 break;
198
199 udelay(1);
200 } while (--timeout > 0);
201 if (timeout == 0)
202 return -EIO;
203
204 /* STOP field */
205 c2port_strobe_ck(dev);
206
207 return 0;
208 }
209
210 static int c2port_read_dr(struct c2port_device *dev, u8 *data)
211 {
212 struct c2port_ops *ops = dev->ops;
213 int timeout, i;
214
215 /* START field */
216 c2port_strobe_ck(dev);
217
218 /* INS field (00b, LSB first) */
219 ops->c2d_dir(dev, 0);
220 ops->c2d_set(dev, 0);
221 c2port_strobe_ck(dev);
222 ops->c2d_set(dev, 0);
223 c2port_strobe_ck(dev);
224
225 /* LENGTH field (00b, LSB first -> 1 byte) */
226 ops->c2d_set(dev, 0);
227 c2port_strobe_ck(dev);
228 ops->c2d_set(dev, 0);
229 c2port_strobe_ck(dev);
230
231 /* WAIT field */
232 ops->c2d_dir(dev, 1);
233 timeout = 20;
234 do {
235 c2port_strobe_ck(dev);
236 if (ops->c2d_get(dev))
237 break;
238
239 udelay(1);
240 } while (--timeout > 0);
241 if (timeout == 0)
242 return -EIO;
243
244 /* DATA field */
245 *data = 0;
246 for (i = 0; i < 8; i++) {
247 *data >>= 1; /* shift in 8-bit DATA field LSB first */
248
249 c2port_strobe_ck(dev);
250 if (ops->c2d_get(dev))
251 *data |= 0x80;
252 }
253
254 /* STOP field */
255 c2port_strobe_ck(dev);
256
257 return 0;
258 }
259
260 static int c2port_poll_in_busy(struct c2port_device *dev)
261 {
262 u8 addr;
263 int ret, timeout = 20;
264
265 do {
266 ret = (c2port_read_ar(dev, &addr));
267 if (ret < 0)
268 return -EIO;
269
270 if (!(addr & 0x02))
271 break;
272
273 udelay(1);
274 } while (--timeout > 0);
275 if (timeout == 0)
276 return -EIO;
277
278 return 0;
279 }
280
281 static int c2port_poll_out_ready(struct c2port_device *dev)
282 {
283 u8 addr;
284 int ret, timeout = 10000; /* erase flash needs long time... */
285
286 do {
287 ret = (c2port_read_ar(dev, &addr));
288 if (ret < 0)
289 return -EIO;
290
291 if (addr & 0x01)
292 break;
293
294 udelay(1);
295 } while (--timeout > 0);
296 if (timeout == 0)
297 return -EIO;
298
299 return 0;
300 }
301
302 /*
303 * sysfs methods
304 */
305
306 static ssize_t c2port_show_name(struct device *dev,
307 struct device_attribute *attr, char *buf)
308 {
309 struct c2port_device *c2dev = dev_get_drvdata(dev);
310
311 return sprintf(buf, "%s\n", c2dev->name);
312 }
313 static DEVICE_ATTR(name, 0444, c2port_show_name, NULL);
314
315 static ssize_t c2port_show_flash_blocks_num(struct device *dev,
316 struct device_attribute *attr, char *buf)
317 {
318 struct c2port_device *c2dev = dev_get_drvdata(dev);
319 struct c2port_ops *ops = c2dev->ops;
320
321 return sprintf(buf, "%d\n", ops->blocks_num);
322 }
323 static DEVICE_ATTR(flash_blocks_num, 0444, c2port_show_flash_blocks_num, NULL);
324
325 static ssize_t c2port_show_flash_block_size(struct device *dev,
326 struct device_attribute *attr, char *buf)
327 {
328 struct c2port_device *c2dev = dev_get_drvdata(dev);
329 struct c2port_ops *ops = c2dev->ops;
330
331 return sprintf(buf, "%d\n", ops->block_size);
332 }
333 static DEVICE_ATTR(flash_block_size, 0444, c2port_show_flash_block_size, NULL);
334
335 static ssize_t c2port_show_flash_size(struct device *dev,
336 struct device_attribute *attr, char *buf)
337 {
338 struct c2port_device *c2dev = dev_get_drvdata(dev);
339 struct c2port_ops *ops = c2dev->ops;
340
341 return sprintf(buf, "%d\n", ops->blocks_num * ops->block_size);
342 }
343 static DEVICE_ATTR(flash_size, 0444, c2port_show_flash_size, NULL);
344
345 static ssize_t access_show(struct device *dev, struct device_attribute *attr,
346 char *buf)
347 {
348 struct c2port_device *c2dev = dev_get_drvdata(dev);
349
350 return sprintf(buf, "%d\n", c2dev->access);
351 }
352
353 static ssize_t access_store(struct device *dev, struct device_attribute *attr,
354 const char *buf, size_t count)
355 {
356 struct c2port_device *c2dev = dev_get_drvdata(dev);
357 struct c2port_ops *ops = c2dev->ops;
358 int status, ret;
359
360 ret = sscanf(buf, "%d", &status);
361 if (ret != 1)
362 return -EINVAL;
363
364 mutex_lock(&c2dev->mutex);
365
366 c2dev->access = !!status;
367
368 /* If access is "on" clock should be HIGH _before_ setting the line
369 * as output and data line should be set as INPUT anyway */
370 if (c2dev->access)
371 ops->c2ck_set(c2dev, 1);
372 ops->access(c2dev, c2dev->access);
373 if (c2dev->access)
374 ops->c2d_dir(c2dev, 1);
375
376 mutex_unlock(&c2dev->mutex);
377
378 return count;
379 }
380 static DEVICE_ATTR_RW(access);
381
382 static ssize_t c2port_store_reset(struct device *dev,
383 struct device_attribute *attr,
384 const char *buf, size_t count)
385 {
386 struct c2port_device *c2dev = dev_get_drvdata(dev);
387
388 /* Check the device access status */
389 if (!c2dev->access)
390 return -EBUSY;
391
392 mutex_lock(&c2dev->mutex);
393
394 c2port_reset(c2dev);
395 c2dev->flash_access = 0;
396
397 mutex_unlock(&c2dev->mutex);
398
399 return count;
400 }
401 static DEVICE_ATTR(reset, 0200, NULL, c2port_store_reset);
402
403 static ssize_t __c2port_show_dev_id(struct c2port_device *dev, char *buf)
404 {
405 u8 data;
406 int ret;
407
408 /* Select DEVICEID register for C2 data register accesses */
409 c2port_write_ar(dev, C2PORT_DEVICEID);
410
411 /* Read and return the device ID register */
412 ret = c2port_read_dr(dev, &data);
413 if (ret < 0)
414 return ret;
415
416 return sprintf(buf, "%d\n", data);
417 }
418
419 static ssize_t c2port_show_dev_id(struct device *dev,
420 struct device_attribute *attr, char *buf)
421 {
422 struct c2port_device *c2dev = dev_get_drvdata(dev);
423 ssize_t ret;
424
425 /* Check the device access status */
426 if (!c2dev->access)
427 return -EBUSY;
428
429 mutex_lock(&c2dev->mutex);
430 ret = __c2port_show_dev_id(c2dev, buf);
431 mutex_unlock(&c2dev->mutex);
432
433 if (ret < 0)
434 dev_err(dev, "cannot read from %s\n", c2dev->name);
435
436 return ret;
437 }
438 static DEVICE_ATTR(dev_id, 0444, c2port_show_dev_id, NULL);
439
440 static ssize_t __c2port_show_rev_id(struct c2port_device *dev, char *buf)
441 {
442 u8 data;
443 int ret;
444
445 /* Select REVID register for C2 data register accesses */
446 c2port_write_ar(dev, C2PORT_REVID);
447
448 /* Read and return the revision ID register */
449 ret = c2port_read_dr(dev, &data);
450 if (ret < 0)
451 return ret;
452
453 return sprintf(buf, "%d\n", data);
454 }
455
456 static ssize_t c2port_show_rev_id(struct device *dev,
457 struct device_attribute *attr, char *buf)
458 {
459 struct c2port_device *c2dev = dev_get_drvdata(dev);
460 ssize_t ret;
461
462 /* Check the device access status */
463 if (!c2dev->access)
464 return -EBUSY;
465
466 mutex_lock(&c2dev->mutex);
467 ret = __c2port_show_rev_id(c2dev, buf);
468 mutex_unlock(&c2dev->mutex);
469
470 if (ret < 0)
471 dev_err(c2dev->dev, "cannot read from %s\n", c2dev->name);
472
473 return ret;
474 }
475 static DEVICE_ATTR(rev_id, 0444, c2port_show_rev_id, NULL);
476
477 static ssize_t c2port_show_flash_access(struct device *dev,
478 struct device_attribute *attr, char *buf)
479 {
480 struct c2port_device *c2dev = dev_get_drvdata(dev);
481
482 return sprintf(buf, "%d\n", c2dev->flash_access);
483 }
484
485 static ssize_t __c2port_store_flash_access(struct c2port_device *dev,
486 int status)
487 {
488 int ret;
489
490 /* Check the device access status */
491 if (!dev->access)
492 return -EBUSY;
493
494 dev->flash_access = !!status;
495
496 /* If flash_access is off we have nothing to do... */
497 if (dev->flash_access == 0)
498 return 0;
499
500 /* Target the C2 flash programming control register for C2 data
501 * register access */
502 c2port_write_ar(dev, C2PORT_FPCTL);
503
504 /* Write the first keycode to enable C2 Flash programming */
505 ret = c2port_write_dr(dev, 0x02);
506 if (ret < 0)
507 return ret;
508
509 /* Write the second keycode to enable C2 Flash programming */
510 ret = c2port_write_dr(dev, 0x01);
511 if (ret < 0)
512 return ret;
513
514 /* Delay for at least 20ms to ensure the target is ready for
515 * C2 flash programming */
516 mdelay(25);
517
518 return 0;
519 }
520
521 static ssize_t c2port_store_flash_access(struct device *dev,
522 struct device_attribute *attr,
523 const char *buf, size_t count)
524 {
525 struct c2port_device *c2dev = dev_get_drvdata(dev);
526 int status;
527 ssize_t ret;
528
529 ret = sscanf(buf, "%d", &status);
530 if (ret != 1)
531 return -EINVAL;
532
533 mutex_lock(&c2dev->mutex);
534 ret = __c2port_store_flash_access(c2dev, status);
535 mutex_unlock(&c2dev->mutex);
536
537 if (ret < 0) {
538 dev_err(c2dev->dev, "cannot enable %s flash programming\n",
539 c2dev->name);
540 return ret;
541 }
542
543 return count;
544 }
545 static DEVICE_ATTR(flash_access, 0644, c2port_show_flash_access,
546 c2port_store_flash_access);
547
548 static ssize_t __c2port_write_flash_erase(struct c2port_device *dev)
549 {
550 u8 status;
551 int ret;
552
553 /* Target the C2 flash programming data register for C2 data register
554 * access.
555 */
556 c2port_write_ar(dev, C2PORT_FPDAT);
557
558 /* Send device erase command */
559 c2port_write_dr(dev, C2PORT_DEVICE_ERASE);
560
561 /* Wait for input acknowledge */
562 ret = c2port_poll_in_busy(dev);
563 if (ret < 0)
564 return ret;
565
566 /* Should check status before starting FLASH access sequence */
567
568 /* Wait for status information */
569 ret = c2port_poll_out_ready(dev);
570 if (ret < 0)
571 return ret;
572
573 /* Read flash programming interface status */
574 ret = c2port_read_dr(dev, &status);
575 if (ret < 0)
576 return ret;
577 if (status != C2PORT_COMMAND_OK)
578 return -EBUSY;
579
580 /* Send a three-byte arming sequence to enable the device erase.
581 * If the sequence is not received correctly, the command will be
582 * ignored.
583 * Sequence is: 0xde, 0xad, 0xa5.
584 */
585 c2port_write_dr(dev, 0xde);
586 ret = c2port_poll_in_busy(dev);
587 if (ret < 0)
588 return ret;
589 c2port_write_dr(dev, 0xad);
590 ret = c2port_poll_in_busy(dev);
591 if (ret < 0)
592 return ret;
593 c2port_write_dr(dev, 0xa5);
594 ret = c2port_poll_in_busy(dev);
595 if (ret < 0)
596 return ret;
597
598 ret = c2port_poll_out_ready(dev);
599 if (ret < 0)
600 return ret;
601
602 return 0;
603 }
604
605 static ssize_t c2port_store_flash_erase(struct device *dev,
606 struct device_attribute *attr,
607 const char *buf, size_t count)
608 {
609 struct c2port_device *c2dev = dev_get_drvdata(dev);
610 int ret;
611
612 /* Check the device and flash access status */
613 if (!c2dev->access || !c2dev->flash_access)
614 return -EBUSY;
615
616 mutex_lock(&c2dev->mutex);
617 ret = __c2port_write_flash_erase(c2dev);
618 mutex_unlock(&c2dev->mutex);
619
620 if (ret < 0) {
621 dev_err(c2dev->dev, "cannot erase %s flash\n", c2dev->name);
622 return ret;
623 }
624
625 return count;
626 }
627 static DEVICE_ATTR(flash_erase, 0200, NULL, c2port_store_flash_erase);
628
629 static ssize_t __c2port_read_flash_data(struct c2port_device *dev,
630 char *buffer, loff_t offset, size_t count)
631 {
632 struct c2port_ops *ops = dev->ops;
633 u8 status, nread = 128;
634 int i, ret;
635
636 /* Check for flash end */
637 if (offset >= ops->block_size * ops->blocks_num)
638 return 0;
639
640 if (ops->block_size * ops->blocks_num - offset < nread)
641 nread = ops->block_size * ops->blocks_num - offset;
642 if (count < nread)
643 nread = count;
644 if (nread == 0)
645 return nread;
646
647 /* Target the C2 flash programming data register for C2 data register
648 * access */
649 c2port_write_ar(dev, C2PORT_FPDAT);
650
651 /* Send flash block read command */
652 c2port_write_dr(dev, C2PORT_BLOCK_READ);
653
654 /* Wait for input acknowledge */
655 ret = c2port_poll_in_busy(dev);
656 if (ret < 0)
657 return ret;
658
659 /* Should check status before starting FLASH access sequence */
660
661 /* Wait for status information */
662 ret = c2port_poll_out_ready(dev);
663 if (ret < 0)
664 return ret;
665
666 /* Read flash programming interface status */
667 ret = c2port_read_dr(dev, &status);
668 if (ret < 0)
669 return ret;
670 if (status != C2PORT_COMMAND_OK)
671 return -EBUSY;
672
673 /* Send address high byte */
674 c2port_write_dr(dev, offset >> 8);
675 ret = c2port_poll_in_busy(dev);
676 if (ret < 0)
677 return ret;
678
679 /* Send address low byte */
680 c2port_write_dr(dev, offset & 0x00ff);
681 ret = c2port_poll_in_busy(dev);
682 if (ret < 0)
683 return ret;
684
685 /* Send address block size */
686 c2port_write_dr(dev, nread);
687 ret = c2port_poll_in_busy(dev);
688 if (ret < 0)
689 return ret;
690
691 /* Should check status before reading FLASH block */
692
693 /* Wait for status information */
694 ret = c2port_poll_out_ready(dev);
695 if (ret < 0)
696 return ret;
697
698 /* Read flash programming interface status */
699 ret = c2port_read_dr(dev, &status);
700 if (ret < 0)
701 return ret;
702 if (status != C2PORT_COMMAND_OK)
703 return -EBUSY;
704
705 /* Read flash block */
706 for (i = 0; i < nread; i++) {
707 ret = c2port_poll_out_ready(dev);
708 if (ret < 0)
709 return ret;
710
711 ret = c2port_read_dr(dev, buffer+i);
712 if (ret < 0)
713 return ret;
714 }
715
716 return nread;
717 }
718
719 static ssize_t c2port_read_flash_data(struct file *filp, struct kobject *kobj,
720 struct bin_attribute *attr,
721 char *buffer, loff_t offset, size_t count)
722 {
723 struct c2port_device *c2dev = dev_get_drvdata(kobj_to_dev(kobj));
724 ssize_t ret;
725
726 /* Check the device and flash access status */
727 if (!c2dev->access || !c2dev->flash_access)
728 return -EBUSY;
729
730 mutex_lock(&c2dev->mutex);
731 ret = __c2port_read_flash_data(c2dev, buffer, offset, count);
732 mutex_unlock(&c2dev->mutex);
733
734 if (ret < 0)
735 dev_err(c2dev->dev, "cannot read %s flash\n", c2dev->name);
736
737 return ret;
738 }
739
740 static ssize_t __c2port_write_flash_data(struct c2port_device *dev,
741 char *buffer, loff_t offset, size_t count)
742 {
743 struct c2port_ops *ops = dev->ops;
744 u8 status, nwrite = 128;
745 int i, ret;
746
747 if (nwrite > count)
748 nwrite = count;
749 if (ops->block_size * ops->blocks_num - offset < nwrite)
750 nwrite = ops->block_size * ops->blocks_num - offset;
751
752 /* Check for flash end */
753 if (offset >= ops->block_size * ops->blocks_num)
754 return -EINVAL;
755
756 /* Target the C2 flash programming data register for C2 data register
757 * access */
758 c2port_write_ar(dev, C2PORT_FPDAT);
759
760 /* Send flash block write command */
761 c2port_write_dr(dev, C2PORT_BLOCK_WRITE);
762
763 /* Wait for input acknowledge */
764 ret = c2port_poll_in_busy(dev);
765 if (ret < 0)
766 return ret;
767
768 /* Should check status before starting FLASH access sequence */
769
770 /* Wait for status information */
771 ret = c2port_poll_out_ready(dev);
772 if (ret < 0)
773 return ret;
774
775 /* Read flash programming interface status */
776 ret = c2port_read_dr(dev, &status);
777 if (ret < 0)
778 return ret;
779 if (status != C2PORT_COMMAND_OK)
780 return -EBUSY;
781
782 /* Send address high byte */
783 c2port_write_dr(dev, offset >> 8);
784 ret = c2port_poll_in_busy(dev);
785 if (ret < 0)
786 return ret;
787
788 /* Send address low byte */
789 c2port_write_dr(dev, offset & 0x00ff);
790 ret = c2port_poll_in_busy(dev);
791 if (ret < 0)
792 return ret;
793
794 /* Send address block size */
795 c2port_write_dr(dev, nwrite);
796 ret = c2port_poll_in_busy(dev);
797 if (ret < 0)
798 return ret;
799
800 /* Should check status before writing FLASH block */
801
802 /* Wait for status information */
803 ret = c2port_poll_out_ready(dev);
804 if (ret < 0)
805 return ret;
806
807 /* Read flash programming interface status */
808 ret = c2port_read_dr(dev, &status);
809 if (ret < 0)
810 return ret;
811 if (status != C2PORT_COMMAND_OK)
812 return -EBUSY;
813
814 /* Write flash block */
815 for (i = 0; i < nwrite; i++) {
816 ret = c2port_write_dr(dev, *(buffer+i));
817 if (ret < 0)
818 return ret;
819
820 ret = c2port_poll_in_busy(dev);
821 if (ret < 0)
822 return ret;
823
824 }
825
826 /* Wait for last flash write to complete */
827 ret = c2port_poll_out_ready(dev);
828 if (ret < 0)
829 return ret;
830
831 return nwrite;
832 }
833
834 static ssize_t c2port_write_flash_data(struct file *filp, struct kobject *kobj,
835 struct bin_attribute *attr,
836 char *buffer, loff_t offset, size_t count)
837 {
838 struct c2port_device *c2dev = dev_get_drvdata(kobj_to_dev(kobj));
839 int ret;
840
841 /* Check the device access status */
842 if (!c2dev->access || !c2dev->flash_access)
843 return -EBUSY;
844
845 mutex_lock(&c2dev->mutex);
846 ret = __c2port_write_flash_data(c2dev, buffer, offset, count);
847 mutex_unlock(&c2dev->mutex);
848
849 if (ret < 0)
850 dev_err(c2dev->dev, "cannot write %s flash\n", c2dev->name);
851
852 return ret;
853 }
854 /* size is computed at run-time */
855 static BIN_ATTR(flash_data, 0644, c2port_read_flash_data,
856 c2port_write_flash_data, 0);
857
858 /*
859 * Class attributes
860 */
861 static struct attribute *c2port_attrs[] = {
862 &dev_attr_name.attr,
863 &dev_attr_flash_blocks_num.attr,
864 &dev_attr_flash_block_size.attr,
865 &dev_attr_flash_size.attr,
866 &dev_attr_access.attr,
867 &dev_attr_reset.attr,
868 &dev_attr_dev_id.attr,
869 &dev_attr_rev_id.attr,
870 &dev_attr_flash_access.attr,
871 &dev_attr_flash_erase.attr,
872 NULL,
873 };
874
875 static struct bin_attribute *c2port_bin_attrs[] = {
876 &bin_attr_flash_data,
877 NULL,
878 };
879
880 static const struct attribute_group c2port_group = {
881 .attrs = c2port_attrs,
882 .bin_attrs = c2port_bin_attrs,
883 };
884
885 static const struct attribute_group *c2port_groups[] = {
886 &c2port_group,
887 NULL,
888 };
889
890 /*
891 * Exported functions
892 */
893
894 struct c2port_device *c2port_device_register(char *name,
895 struct c2port_ops *ops, void *devdata)
896 {
897 struct c2port_device *c2dev;
898 int ret;
899
900 if (unlikely(!ops) || unlikely(!ops->access) || \
901 unlikely(!ops->c2d_dir) || unlikely(!ops->c2ck_set) || \
902 unlikely(!ops->c2d_get) || unlikely(!ops->c2d_set))
903 return ERR_PTR(-EINVAL);
904
905 c2dev = kmalloc(sizeof(struct c2port_device), GFP_KERNEL);
906 if (unlikely(!c2dev))
907 return ERR_PTR(-ENOMEM);
908
909 idr_preload(GFP_KERNEL);
910 spin_lock_irq(&c2port_idr_lock);
911 ret = idr_alloc(&c2port_idr, c2dev, 0, 0, GFP_NOWAIT);
912 spin_unlock_irq(&c2port_idr_lock);
913 idr_preload_end();
914
915 if (ret < 0)
916 goto error_idr_alloc;
917 c2dev->id = ret;
918
919 bin_attr_flash_data.size = ops->blocks_num * ops->block_size;
920
921 c2dev->dev = device_create(c2port_class, NULL, 0, c2dev,
922 "c2port%d", c2dev->id);
923 if (IS_ERR(c2dev->dev)) {
924 ret = PTR_ERR(c2dev->dev);
925 goto error_device_create;
926 }
927 dev_set_drvdata(c2dev->dev, c2dev);
928
929 strncpy(c2dev->name, name, C2PORT_NAME_LEN);
930 c2dev->ops = ops;
931 mutex_init(&c2dev->mutex);
932
933 /* By default C2 port access is off */
934 c2dev->access = c2dev->flash_access = 0;
935 ops->access(c2dev, 0);
936
937 dev_info(c2dev->dev, "C2 port %s added\n", name);
938 dev_info(c2dev->dev, "%s flash has %d blocks x %d bytes "
939 "(%d bytes total)\n",
940 name, ops->blocks_num, ops->block_size,
941 ops->blocks_num * ops->block_size);
942
943 return c2dev;
944
945 error_device_create:
946 spin_lock_irq(&c2port_idr_lock);
947 idr_remove(&c2port_idr, c2dev->id);
948 spin_unlock_irq(&c2port_idr_lock);
949
950 error_idr_alloc:
951 kfree(c2dev);
952
953 return ERR_PTR(ret);
954 }
955 EXPORT_SYMBOL(c2port_device_register);
956
957 void c2port_device_unregister(struct c2port_device *c2dev)
958 {
959 if (!c2dev)
960 return;
961
962 dev_info(c2dev->dev, "C2 port %s removed\n", c2dev->name);
963
964 spin_lock_irq(&c2port_idr_lock);
965 idr_remove(&c2port_idr, c2dev->id);
966 spin_unlock_irq(&c2port_idr_lock);
967
968 device_destroy(c2port_class, c2dev->id);
969
970 kfree(c2dev);
971 }
972 EXPORT_SYMBOL(c2port_device_unregister);
973
974 /*
975 * Module stuff
976 */
977
978 static int __init c2port_init(void)
979 {
980 printk(KERN_INFO "Silicon Labs C2 port support v. " DRIVER_VERSION
981 " - (C) 2007 Rodolfo Giometti\n");
982
983 c2port_class = class_create(THIS_MODULE, "c2port");
984 if (IS_ERR(c2port_class)) {
985 printk(KERN_ERR "c2port: failed to allocate class\n");
986 return PTR_ERR(c2port_class);
987 }
988 c2port_class->dev_groups = c2port_groups;
989
990 return 0;
991 }
992
993 static void __exit c2port_exit(void)
994 {
995 class_destroy(c2port_class);
996 }
997
998 module_init(c2port_init);
999 module_exit(c2port_exit);
1000
1001 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
1002 MODULE_DESCRIPTION("Silicon Labs C2 port support v. " DRIVER_VERSION);
1003 MODULE_LICENSE("GPL");