2 * Copyright 2008 Extreme Engineering Solutions, Inc.
4 * SPDX-License-Identifier: GPL-2.0
8 * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
9 * and 4 programmable non-volatile GPIO pins.
31 * Write to DS4510, taking page boundaries into account
33 static int ds4510_mem_write(uint8_t chip
, int offset
, uint8_t *buf
, int count
)
39 wrlen
= DS4510_EEPROM_PAGE_SIZE
-
40 DS4510_EEPROM_PAGE_OFFSET(offset
);
43 if (i2c_write(chip
, offset
, 1, &buf
[i
], wrlen
))
47 * This delay isn't needed for SRAM writes but shouldn't delay
48 * things too much, so do it unconditionally for simplicity
50 udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
60 * General read from DS4510
62 static int ds4510_mem_read(uint8_t chip
, int offset
, uint8_t *buf
, int count
)
64 return i2c_read(chip
, offset
, 1, buf
, count
);
68 * Write SEE bit in config register.
69 * nv = 0 - Writes to SEEPROM registers behave like EEPROM
70 * nv = 1 - Writes to SEEPROM registers behave like SRAM
72 static int ds4510_see_write(uint8_t chip
, uint8_t nv
)
76 if (i2c_read(chip
, DS4510_CFG
, 1, &data
, 1))
79 if (nv
) /* Treat SEEPROM bits as EEPROM */
80 data
&= ~DS4510_CFG_SEE
;
81 else /* Treat SEEPROM bits as SRAM */
82 data
|= DS4510_CFG_SEE
;
84 return ds4510_mem_write(chip
, DS4510_CFG
, &data
, 1);
88 * Write de-assertion of reset signal delay
90 static int ds4510_rstdelay_write(uint8_t chip
, uint8_t delay
)
94 if (i2c_read(chip
, DS4510_RSTDELAY
, 1, &data
, 1))
97 data
&= ~DS4510_RSTDELAY_MASK
;
98 data
|= delay
& DS4510_RSTDELAY_MASK
;
100 return ds4510_mem_write(chip
, DS4510_RSTDELAY
, &data
, 1);
104 * Write pullup characteristics of IO pins
106 static int ds4510_pullup_write(uint8_t chip
, uint8_t val
)
108 val
&= DS4510_IO_MASK
;
110 return ds4510_mem_write(chip
, DS4510_PULLUP
, (uint8_t *)&val
, 1);
114 * Read pullup characteristics of IO pins
116 static int ds4510_pullup_read(uint8_t chip
)
120 if (i2c_read(chip
, DS4510_PULLUP
, 1, &val
, 1))
123 return val
& DS4510_IO_MASK
;
127 * Write drive level of IO pins
129 static int ds4510_gpio_write(uint8_t chip
, uint8_t val
)
134 for (i
= 0; i
< DS4510_NUM_IO
; i
++) {
135 if (i2c_read(chip
, DS4510_IO0
- i
, 1, &data
, 1))
138 if (val
& (0x1 << i
))
143 if (ds4510_mem_write(chip
, DS4510_IO0
- i
, &data
, 1))
151 * Read drive level of IO pins
153 static int ds4510_gpio_read(uint8_t chip
)
159 for (i
= 0; i
< DS4510_NUM_IO
; i
++) {
160 if (i2c_read(chip
, DS4510_IO0
- i
, 1, &data
, 1))
171 * Read physical level of IO pins
173 static int ds4510_gpio_read_val(uint8_t chip
)
177 if (i2c_read(chip
, DS4510_IO_STATUS
, 1, &val
, 1))
180 return val
& DS4510_IO_MASK
;
184 * Display DS4510 information
186 static int ds4510_info(uint8_t chip
)
192 printf("DS4510 @ 0x%x:\n\n", chip
);
194 if (i2c_read(chip
, DS4510_RSTDELAY
, 1, &data
, 1))
196 printf("rstdelay = 0x%x\n\n", data
& DS4510_RSTDELAY_MASK
);
198 if (i2c_read(chip
, DS4510_CFG
, 1, &data
, 1))
200 printf("config = 0x%x\n", data
);
201 printf(" /ready = %d\n", data
& DS4510_CFG_READY
? 1 : 0);
202 printf(" trip pt = %d\n", data
& DS4510_CFG_TRIP_POINT
? 1 : 0);
203 printf(" rst sts = %d\n", data
& DS4510_CFG_RESET
? 1 : 0);
204 printf(" /see = %d\n", data
& DS4510_CFG_SEE
? 1 : 0);
205 printf(" swrst = %d\n\n", data
& DS4510_CFG_SWRST
? 1 : 0);
207 printf("gpio pins: 3210\n");
208 printf("---------------\n");
211 tmp
= ds4510_pullup_read(chip
);
214 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
215 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
219 tmp
= ds4510_gpio_read(chip
);
222 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
223 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
227 tmp
= ds4510_gpio_read_val(chip
);
230 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
231 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
237 cmd_tbl_t cmd_ds4510
[] = {
238 U_BOOT_CMD_MKENT(device
, 3, 0, (void *)DS4510_CMD_DEVICE
, "", ""),
239 U_BOOT_CMD_MKENT(nv
, 3, 0, (void *)DS4510_CMD_NV
, "", ""),
240 U_BOOT_CMD_MKENT(output
, 4, 0, (void *)DS4510_CMD_OUTPUT
, "", ""),
241 U_BOOT_CMD_MKENT(input
, 3, 0, (void *)DS4510_CMD_INPUT
, "", ""),
242 U_BOOT_CMD_MKENT(pullup
, 4, 0, (void *)DS4510_CMD_PULLUP
, "", ""),
243 U_BOOT_CMD_MKENT(info
, 2, 0, (void *)DS4510_CMD_INFO
, "", ""),
244 U_BOOT_CMD_MKENT(rstdelay
, 3, 0, (void *)DS4510_CMD_RSTDELAY
, "", ""),
245 U_BOOT_CMD_MKENT(eeprom
, 6, 0, (void *)DS4510_CMD_EEPROM
, "", ""),
246 U_BOOT_CMD_MKENT(seeprom
, 6, 0, (void *)DS4510_CMD_SEEPROM
, "", ""),
247 U_BOOT_CMD_MKENT(sram
, 6, 0, (void *)DS4510_CMD_SRAM
, "", ""),
250 int do_ds4510(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
252 static uint8_t chip
= 0x51;
261 int (*rw_func
)(uint8_t, int, uint8_t *, int);
263 c
= find_cmd_tbl(argv
[1], cmd_ds4510
, ARRAY_SIZE(cmd_ds4510
));
265 /* All commands but "device" require 'maxargs' arguments */
266 if (!c
|| !((argc
== (c
->maxargs
)) ||
267 (((int)c
->cmd
== DS4510_CMD_DEVICE
) &&
268 (argc
== (c
->maxargs
- 1))))) {
269 return cmd_usage(cmdtp
);
272 /* arg2 used as chip addr and pin number */
274 ul_arg2
= simple_strtoul(argv
[2], NULL
, 16);
276 /* arg3 used as output/pullup value */
278 ul_arg3
= simple_strtoul(argv
[3], NULL
, 16);
280 switch ((int)c
->cmd
) {
281 case DS4510_CMD_DEVICE
:
284 printf("Current device address: 0x%x\n", chip
);
287 return ds4510_see_write(chip
, ul_arg2
);
288 case DS4510_CMD_OUTPUT
:
289 tmp
= ds4510_gpio_read(chip
);
293 tmp
|= (1 << ul_arg2
);
295 tmp
&= ~(1 << ul_arg2
);
296 return ds4510_gpio_write(chip
, tmp
);
297 case DS4510_CMD_INPUT
:
298 tmp
= ds4510_gpio_read_val(chip
);
301 return (tmp
& (1 << ul_arg2
)) != 0;
302 case DS4510_CMD_PULLUP
:
303 tmp
= ds4510_pullup_read(chip
);
307 tmp
|= (1 << ul_arg2
);
309 tmp
&= ~(1 << ul_arg2
);
310 return ds4510_pullup_write(chip
, tmp
);
311 case DS4510_CMD_INFO
:
312 return ds4510_info(chip
);
313 case DS4510_CMD_RSTDELAY
:
314 return ds4510_rstdelay_write(chip
, ul_arg2
);
315 case DS4510_CMD_EEPROM
:
316 end
= DS4510_EEPROM
+ DS4510_EEPROM_SIZE
;
319 case DS4510_CMD_SEEPROM
:
320 end
= DS4510_SEEPROM
+ DS4510_SEEPROM_SIZE
;
321 off
= DS4510_SEEPROM
;
323 case DS4510_CMD_SRAM
:
324 end
= DS4510_SRAM
+ DS4510_SRAM_SIZE
;
328 /* We should never get here... */
332 /* Only eeprom, seeprom, and sram commands should make it here */
333 if (strcmp(argv
[2], "read") == 0)
334 rw_func
= ds4510_mem_read
;
335 else if (strcmp(argv
[2], "write") == 0)
336 rw_func
= ds4510_mem_write
;
338 return cmd_usage(cmdtp
);
340 addr
= simple_strtoul(argv
[3], NULL
, 16);
341 off
+= simple_strtoul(argv
[4], NULL
, 16);
342 cnt
= simple_strtoul(argv
[5], NULL
, 16);
344 if ((off
+ cnt
) > end
) {
345 printf("ERROR: invalid len\n");
349 return rw_func(chip
, off
, (uint8_t *)addr
, cnt
);
353 ds4510
, 6, 1, do_ds4510
,
354 "ds4510 eeprom/seeprom/sram/gpio access",
356 " - show or set current device address\n"
358 " - display ds4510 info\n"
359 "ds4510 output pin 0|1\n"
360 " - set pin low or high-Z\n"
362 " - read value of pin\n"
363 "ds4510 pullup pin 0|1\n"
364 " - disable/enable pullup on specified pin\n"
366 " - make gpio and seeprom writes volatile/non-volatile"
368 "ds4510 rstdelay 0-3\n"
369 " - set reset output delay"
371 "ds4510 eeprom read addr off cnt\n"
372 "ds4510 eeprom write addr off cnt\n"
373 " - read/write 'cnt' bytes at EEPROM offset 'off'\n"
374 "ds4510 seeprom read addr off cnt\n"
375 "ds4510 seeprom write addr off cnt\n"
376 " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
377 "ds4510 sram read addr off cnt\n"
378 "ds4510 sram write addr off cnt\n"
379 " - read/write 'cnt' bytes at SRAM offset 'off'"