2 * Copyright (c) 2016, NVIDIA CORPORATION.
4 * SPDX-License-Identifier: GPL-2.0
13 #include <asm/arch-tegra/bpmp_abi.h>
14 #include <asm/arch-tegra/ivc.h>
16 #define BPMP_IVC_FRAME_COUNT 1
17 #define BPMP_IVC_FRAME_SIZE 128
19 #define BPMP_FLAG_DO_ACK BIT(0)
20 #define BPMP_FLAG_RING_DOORBELL BIT(1)
22 DECLARE_GLOBAL_DATA_PTR
;
24 struct tegra186_bpmp
{
25 struct mbox_chan mbox
;
29 static int tegra186_bpmp_call(struct udevice
*dev
, int mrq
, void *tx_msg
,
30 int tx_size
, void *rx_msg
, int rx_size
)
32 struct tegra186_bpmp
*priv
= dev_get_priv(dev
);
35 struct mrq_request
*req
;
36 struct mrq_response
*resp
;
39 debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n",
40 __func__
, dev
, mrq
, tx_msg
, tx_size
, rx_msg
, rx_size
, priv
);
42 if ((tx_size
> BPMP_IVC_FRAME_SIZE
) || (rx_size
> BPMP_IVC_FRAME_SIZE
))
45 ret
= tegra_ivc_write_get_next_frame(&priv
->ivc
, &ivc_frame
);
47 error("tegra_ivc_write_get_next_frame() failed: %d\n", ret
);
53 req
->flags
= BPMP_FLAG_DO_ACK
| BPMP_FLAG_RING_DOORBELL
;
54 memcpy(req
+ 1, tx_msg
, tx_size
);
56 ret
= tegra_ivc_write_advance(&priv
->ivc
);
58 error("tegra_ivc_write_advance() failed: %d\n", ret
);
62 start_time
= timer_get_us();
64 ret
= tegra_ivc_channel_notified(&priv
->ivc
);
66 error("tegra_ivc_channel_notified() failed: %d\n", ret
);
70 ret
= tegra_ivc_read_get_next_frame(&priv
->ivc
, &ivc_frame
);
74 /* Timeout 20ms; roughly 10x current max observed duration */
75 if ((timer_get_us() - start_time
) > 20 * 1000) {
76 error("tegra_ivc_read_get_next_frame() timed out (%d)\n",
84 if (!err
&& rx_msg
&& rx_size
)
85 memcpy(rx_msg
, resp
+ 1, rx_size
);
87 ret
= tegra_ivc_read_advance(&priv
->ivc
);
89 error("tegra_ivc_write_advance() failed: %d\n", ret
);
94 error("BPMP responded with error %d\n", err
);
95 /* err isn't a U-Boot error code, so don't that */
103 * The BPMP exposes multiple different services. We create a sub-device for
104 * each separate type of service, since each device must be of the appropriate
107 static int tegra186_bpmp_bind(struct udevice
*dev
)
110 struct udevice
*child
;
112 debug("%s(dev=%p)\n", __func__
, dev
);
114 ret
= device_bind_driver_to_node(dev
, "tegra186_clk", "tegra186_clk",
115 dev_of_offset(dev
), &child
);
119 ret
= device_bind_driver_to_node(dev
, "tegra186_reset",
120 "tegra186_reset", dev_of_offset(dev
),
125 ret
= device_bind_driver_to_node(dev
, "tegra186_power_domain",
126 "tegra186_power_domain",
127 dev_of_offset(dev
), &child
);
131 ret
= dm_scan_fdt_dev(dev
);
138 static ulong
tegra186_bpmp_get_shmem(struct udevice
*dev
, int index
)
141 struct fdtdec_phandle_args args
;
144 ret
= fdtdec_parse_phandle_with_args(gd
->fdt_blob
, dev_of_offset(dev
),
145 "shmem", NULL
, 0, index
, &args
);
147 error("fdtdec_parse_phandle_with_args() failed: %d\n", ret
);
151 reg
= fdtdec_get_addr_size_auto_noparent(gd
->fdt_blob
, args
.node
,
152 "reg", 0, NULL
, true);
153 if (reg
== FDT_ADDR_T_NONE
) {
154 error("fdtdec_get_addr_size_auto_noparent() failed\n");
161 static void tegra186_bpmp_ivc_notify(struct tegra_ivc
*ivc
)
163 struct tegra186_bpmp
*priv
=
164 container_of(ivc
, struct tegra186_bpmp
, ivc
);
167 ret
= mbox_send(&priv
->mbox
, NULL
);
169 error("mbox_send() failed: %d\n", ret
);
172 static int tegra186_bpmp_probe(struct udevice
*dev
)
174 struct tegra186_bpmp
*priv
= dev_get_priv(dev
);
176 ulong tx_base
, rx_base
, start_time
;
178 debug("%s(dev=%p) (priv=%p)\n", __func__
, dev
, priv
);
180 ret
= mbox_get_by_index(dev
, 0, &priv
->mbox
);
182 error("mbox_get_by_index() failed: %d\n", ret
);
186 tx_base
= tegra186_bpmp_get_shmem(dev
, 0);
187 if (IS_ERR_VALUE(tx_base
)) {
188 error("tegra186_bpmp_get_shmem failed for tx_base\n");
191 rx_base
= tegra186_bpmp_get_shmem(dev
, 1);
192 if (IS_ERR_VALUE(rx_base
)) {
193 error("tegra186_bpmp_get_shmem failed for rx_base\n");
196 debug("shmem: rx=%lx, tx=%lx\n", rx_base
, tx_base
);
198 ret
= tegra_ivc_init(&priv
->ivc
, rx_base
, tx_base
, BPMP_IVC_FRAME_COUNT
,
199 BPMP_IVC_FRAME_SIZE
, tegra186_bpmp_ivc_notify
);
201 error("tegra_ivc_init() failed: %d\n", ret
);
205 tegra_ivc_channel_reset(&priv
->ivc
);
206 start_time
= timer_get_us();
208 ret
= tegra_ivc_channel_notified(&priv
->ivc
);
213 if ((timer_get_us() - start_time
) > 100 * 1000) {
214 error("Initial IVC reset timed out (%d)\n", ret
);
223 mbox_free(&priv
->mbox
);
228 static int tegra186_bpmp_remove(struct udevice
*dev
)
230 struct tegra186_bpmp
*priv
= dev_get_priv(dev
);
232 debug("%s(dev=%p) (priv=%p)\n", __func__
, dev
, priv
);
234 mbox_free(&priv
->mbox
);
239 static struct misc_ops tegra186_bpmp_ops
= {
240 .call
= tegra186_bpmp_call
,
243 static const struct udevice_id tegra186_bpmp_ids
[] = {
244 { .compatible
= "nvidia,tegra186-bpmp" },
248 U_BOOT_DRIVER(tegra186_bpmp
) = {
249 .name
= "tegra186_bpmp",
251 .of_match
= tegra186_bpmp_ids
,
252 .bind
= tegra186_bpmp_bind
,
253 .probe
= tegra186_bpmp_probe
,
254 .remove
= tegra186_bpmp_remove
,
255 .ops
= &tegra186_bpmp_ops
,
256 .priv_auto_alloc_size
= sizeof(struct tegra186_bpmp
),