2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <dm/device-internal.h>
20 #include <linux/list.h>
22 #include "mmc_private.h"
24 static struct list_head mmc_devices
;
25 static int cur_dev_num
= -1;
27 __weak
int board_mmc_getwp(struct mmc
*mmc
)
32 int mmc_getwp(struct mmc
*mmc
)
36 wp
= board_mmc_getwp(mmc
);
39 if (mmc
->cfg
->ops
->getwp
)
40 wp
= mmc
->cfg
->ops
->getwp(mmc
);
48 __weak
int board_mmc_getcd(struct mmc
*mmc
)
53 int mmc_send_cmd(struct mmc
*mmc
, struct mmc_cmd
*cmd
, struct mmc_data
*data
)
57 #ifdef CONFIG_MMC_TRACE
61 printf("CMD_SEND:%d\n", cmd
->cmdidx
);
62 printf("\t\tARG\t\t\t 0x%08X\n", cmd
->cmdarg
);
63 ret
= mmc
->cfg
->ops
->send_cmd(mmc
, cmd
, data
);
64 switch (cmd
->resp_type
) {
66 printf("\t\tMMC_RSP_NONE\n");
69 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
73 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
77 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
79 printf("\t\t \t\t 0x%08X \n",
81 printf("\t\t \t\t 0x%08X \n",
83 printf("\t\t \t\t 0x%08X \n",
86 printf("\t\t\t\t\tDUMPING DATA\n");
87 for (i
= 0; i
< 4; i
++) {
89 printf("\t\t\t\t\t%03d - ", i
*4);
90 ptr
= (u8
*)&cmd
->response
[i
];
92 for (j
= 0; j
< 4; j
++)
93 printf("%02X ", *ptr
--);
98 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
102 printf("\t\tERROR MMC rsp not supported\n");
106 ret
= mmc
->cfg
->ops
->send_cmd(mmc
, cmd
, data
);
111 int mmc_send_status(struct mmc
*mmc
, int timeout
)
114 int err
, retries
= 5;
115 #ifdef CONFIG_MMC_TRACE
119 cmd
.cmdidx
= MMC_CMD_SEND_STATUS
;
120 cmd
.resp_type
= MMC_RSP_R1
;
121 if (!mmc_host_is_spi(mmc
))
122 cmd
.cmdarg
= mmc
->rca
<< 16;
125 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
127 if ((cmd
.response
[0] & MMC_STATUS_RDY_FOR_DATA
) &&
128 (cmd
.response
[0] & MMC_STATUS_CURR_STATE
) !=
131 else if (cmd
.response
[0] & MMC_STATUS_MASK
) {
132 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
133 printf("Status Error: 0x%08X\n",
138 } else if (--retries
< 0)
147 #ifdef CONFIG_MMC_TRACE
148 status
= (cmd
.response
[0] & MMC_STATUS_CURR_STATE
) >> 9;
149 printf("CURR STATE:%d\n", status
);
152 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
153 printf("Timeout waiting card ready\n");
157 if (cmd
.response
[0] & MMC_STATUS_SWITCH_ERROR
)
163 int mmc_set_blocklen(struct mmc
*mmc
, int len
)
170 cmd
.cmdidx
= MMC_CMD_SET_BLOCKLEN
;
171 cmd
.resp_type
= MMC_RSP_R1
;
174 return mmc_send_cmd(mmc
, &cmd
, NULL
);
177 struct mmc
*find_mmc_device(int dev_num
)
180 struct list_head
*entry
;
182 list_for_each(entry
, &mmc_devices
) {
183 m
= list_entry(entry
, struct mmc
, link
);
185 if (m
->block_dev
.dev
== dev_num
)
189 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
190 printf("MMC Device %d not found\n", dev_num
);
196 static int mmc_read_blocks(struct mmc
*mmc
, void *dst
, lbaint_t start
,
200 struct mmc_data data
;
203 cmd
.cmdidx
= MMC_CMD_READ_MULTIPLE_BLOCK
;
205 cmd
.cmdidx
= MMC_CMD_READ_SINGLE_BLOCK
;
207 if (mmc
->high_capacity
)
210 cmd
.cmdarg
= start
* mmc
->read_bl_len
;
212 cmd
.resp_type
= MMC_RSP_R1
;
215 data
.blocks
= blkcnt
;
216 data
.blocksize
= mmc
->read_bl_len
;
217 data
.flags
= MMC_DATA_READ
;
219 if (mmc_send_cmd(mmc
, &cmd
, &data
))
223 cmd
.cmdidx
= MMC_CMD_STOP_TRANSMISSION
;
225 cmd
.resp_type
= MMC_RSP_R1b
;
226 if (mmc_send_cmd(mmc
, &cmd
, NULL
)) {
227 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
228 printf("mmc fail to send stop cmd\n");
237 static ulong
mmc_bread(block_dev_desc_t
*block_dev
, lbaint_t start
,
238 lbaint_t blkcnt
, void *dst
)
240 int dev_num
= block_dev
->dev
;
242 lbaint_t cur
, blocks_todo
= blkcnt
;
247 struct mmc
*mmc
= find_mmc_device(dev_num
);
251 err
= mmc_select_hwpart(dev_num
, block_dev
->hwpart
);
255 if ((start
+ blkcnt
) > mmc
->block_dev
.lba
) {
256 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
257 printf("MMC: block number 0x" LBAF
" exceeds max(0x" LBAF
")\n",
258 start
+ blkcnt
, mmc
->block_dev
.lba
);
263 if (mmc_set_blocklen(mmc
, mmc
->read_bl_len
)) {
264 debug("%s: Failed to set blocklen\n", __func__
);
269 cur
= (blocks_todo
> mmc
->cfg
->b_max
) ?
270 mmc
->cfg
->b_max
: blocks_todo
;
271 if (mmc_read_blocks(mmc
, dst
, start
, cur
) != cur
) {
272 debug("%s: Failed to read blocks\n", __func__
);
277 dst
+= cur
* mmc
->read_bl_len
;
278 } while (blocks_todo
> 0);
283 static int mmc_go_idle(struct mmc
*mmc
)
290 cmd
.cmdidx
= MMC_CMD_GO_IDLE_STATE
;
292 cmd
.resp_type
= MMC_RSP_NONE
;
294 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
304 static int sd_send_op_cond(struct mmc
*mmc
)
311 cmd
.cmdidx
= MMC_CMD_APP_CMD
;
312 cmd
.resp_type
= MMC_RSP_R1
;
315 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
320 cmd
.cmdidx
= SD_CMD_APP_SEND_OP_COND
;
321 cmd
.resp_type
= MMC_RSP_R3
;
324 * Most cards do not answer if some reserved bits
325 * in the ocr are set. However, Some controller
326 * can set bit 7 (reserved for low voltages), but
327 * how to manage low voltages SD card is not yet
330 cmd
.cmdarg
= mmc_host_is_spi(mmc
) ? 0 :
331 (mmc
->cfg
->voltages
& 0xff8000);
333 if (mmc
->version
== SD_VERSION_2
)
334 cmd
.cmdarg
|= OCR_HCS
;
336 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
341 if (cmd
.response
[0] & OCR_BUSY
)
350 if (mmc
->version
!= SD_VERSION_2
)
351 mmc
->version
= SD_VERSION_1_0
;
353 if (mmc_host_is_spi(mmc
)) { /* read OCR for spi */
354 cmd
.cmdidx
= MMC_CMD_SPI_READ_OCR
;
355 cmd
.resp_type
= MMC_RSP_R3
;
358 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
364 mmc
->ocr
= cmd
.response
[0];
366 mmc
->high_capacity
= ((mmc
->ocr
& OCR_HCS
) == OCR_HCS
);
372 static int mmc_send_op_cond_iter(struct mmc
*mmc
, int use_arg
)
377 cmd
.cmdidx
= MMC_CMD_SEND_OP_COND
;
378 cmd
.resp_type
= MMC_RSP_R3
;
380 if (use_arg
&& !mmc_host_is_spi(mmc
))
381 cmd
.cmdarg
= OCR_HCS
|
382 (mmc
->cfg
->voltages
&
383 (mmc
->ocr
& OCR_VOLTAGE_MASK
)) |
384 (mmc
->ocr
& OCR_ACCESS_MODE
);
386 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
389 mmc
->ocr
= cmd
.response
[0];
393 static int mmc_send_op_cond(struct mmc
*mmc
)
397 /* Some cards seem to need this */
400 /* Asking to the card its capabilities */
401 for (i
= 0; i
< 2; i
++) {
402 err
= mmc_send_op_cond_iter(mmc
, i
!= 0);
406 /* exit if not busy (flag seems to be inverted) */
407 if (mmc
->ocr
& OCR_BUSY
)
410 mmc
->op_cond_pending
= 1;
414 static int mmc_complete_op_cond(struct mmc
*mmc
)
421 mmc
->op_cond_pending
= 0;
422 if (!(mmc
->ocr
& OCR_BUSY
)) {
423 start
= get_timer(0);
425 err
= mmc_send_op_cond_iter(mmc
, 1);
428 if (mmc
->ocr
& OCR_BUSY
)
430 if (get_timer(start
) > timeout
)
436 if (mmc_host_is_spi(mmc
)) { /* read OCR for spi */
437 cmd
.cmdidx
= MMC_CMD_SPI_READ_OCR
;
438 cmd
.resp_type
= MMC_RSP_R3
;
441 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
446 mmc
->ocr
= cmd
.response
[0];
449 mmc
->version
= MMC_VERSION_UNKNOWN
;
451 mmc
->high_capacity
= ((mmc
->ocr
& OCR_HCS
) == OCR_HCS
);
458 static int mmc_send_ext_csd(struct mmc
*mmc
, u8
*ext_csd
)
461 struct mmc_data data
;
464 /* Get the Card Status Register */
465 cmd
.cmdidx
= MMC_CMD_SEND_EXT_CSD
;
466 cmd
.resp_type
= MMC_RSP_R1
;
469 data
.dest
= (char *)ext_csd
;
471 data
.blocksize
= MMC_MAX_BLOCK_LEN
;
472 data
.flags
= MMC_DATA_READ
;
474 err
= mmc_send_cmd(mmc
, &cmd
, &data
);
480 static int mmc_switch(struct mmc
*mmc
, u8 set
, u8 index
, u8 value
)
486 cmd
.cmdidx
= MMC_CMD_SWITCH
;
487 cmd
.resp_type
= MMC_RSP_R1b
;
488 cmd
.cmdarg
= (MMC_SWITCH_MODE_WRITE_BYTE
<< 24) |
492 ret
= mmc_send_cmd(mmc
, &cmd
, NULL
);
494 /* Waiting for the ready status */
496 ret
= mmc_send_status(mmc
, timeout
);
502 static int mmc_change_freq(struct mmc
*mmc
)
504 ALLOC_CACHE_ALIGN_BUFFER(u8
, ext_csd
, MMC_MAX_BLOCK_LEN
);
510 if (mmc_host_is_spi(mmc
))
513 /* Only version 4 supports high-speed */
514 if (mmc
->version
< MMC_VERSION_4
)
517 mmc
->card_caps
|= MMC_MODE_4BIT
| MMC_MODE_8BIT
;
519 err
= mmc_send_ext_csd(mmc
, ext_csd
);
524 cardtype
= ext_csd
[EXT_CSD_CARD_TYPE
] & 0xf;
526 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_HS_TIMING
, 1);
529 return err
== SWITCH_ERR
? 0 : err
;
531 /* Now check to see that it worked */
532 err
= mmc_send_ext_csd(mmc
, ext_csd
);
537 /* No high-speed support */
538 if (!ext_csd
[EXT_CSD_HS_TIMING
])
541 /* High Speed is set, there are two types: 52MHz and 26MHz */
542 if (cardtype
& EXT_CSD_CARD_TYPE_52
) {
543 if (cardtype
& EXT_CSD_CARD_TYPE_DDR_1_8V
)
544 mmc
->card_caps
|= MMC_MODE_DDR_52MHz
;
545 mmc
->card_caps
|= MMC_MODE_HS_52MHz
| MMC_MODE_HS
;
547 mmc
->card_caps
|= MMC_MODE_HS
;
553 static int mmc_set_capacity(struct mmc
*mmc
, int part_num
)
557 mmc
->capacity
= mmc
->capacity_user
;
561 mmc
->capacity
= mmc
->capacity_boot
;
564 mmc
->capacity
= mmc
->capacity_rpmb
;
570 mmc
->capacity
= mmc
->capacity_gp
[part_num
- 4];
576 mmc
->block_dev
.lba
= lldiv(mmc
->capacity
, mmc
->read_bl_len
);
581 int mmc_select_hwpart(int dev_num
, int hwpart
)
583 struct mmc
*mmc
= find_mmc_device(dev_num
);
589 if (mmc
->block_dev
.hwpart
== hwpart
)
592 if (mmc
->part_config
== MMCPART_NOAVAILABLE
) {
593 printf("Card doesn't support part_switch\n");
597 ret
= mmc_switch_part(dev_num
, hwpart
);
605 int mmc_switch_part(int dev_num
, unsigned int part_num
)
607 struct mmc
*mmc
= find_mmc_device(dev_num
);
613 ret
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_PART_CONF
,
614 (mmc
->part_config
& ~PART_ACCESS_MASK
)
615 | (part_num
& PART_ACCESS_MASK
));
618 * Set the capacity if the switch succeeded or was intended
619 * to return to representing the raw device.
621 if ((ret
== 0) || ((ret
== -ENODEV
) && (part_num
== 0))) {
622 ret
= mmc_set_capacity(mmc
, part_num
);
623 mmc
->block_dev
.hwpart
= part_num
;
629 int mmc_hwpart_config(struct mmc
*mmc
,
630 const struct mmc_hwpart_conf
*conf
,
631 enum mmc_hwpart_conf_mode mode
)
637 u32 max_enh_size_mult
;
638 u32 tot_enh_size_mult
= 0;
641 ALLOC_CACHE_ALIGN_BUFFER(u8
, ext_csd
, MMC_MAX_BLOCK_LEN
);
643 if (mode
< MMC_HWPART_CONF_CHECK
|| mode
> MMC_HWPART_CONF_COMPLETE
)
646 if (IS_SD(mmc
) || (mmc
->version
< MMC_VERSION_4_41
)) {
647 printf("eMMC >= 4.4 required for enhanced user data area\n");
651 if (!(mmc
->part_support
& PART_SUPPORT
)) {
652 printf("Card does not support partitioning\n");
656 if (!mmc
->hc_wp_grp_size
) {
657 printf("Card does not define HC WP group size\n");
661 /* check partition alignment and total enhanced size */
662 if (conf
->user
.enh_size
) {
663 if (conf
->user
.enh_size
% mmc
->hc_wp_grp_size
||
664 conf
->user
.enh_start
% mmc
->hc_wp_grp_size
) {
665 printf("User data enhanced area not HC WP group "
669 part_attrs
|= EXT_CSD_ENH_USR
;
670 enh_size_mult
= conf
->user
.enh_size
/ mmc
->hc_wp_grp_size
;
671 if (mmc
->high_capacity
) {
672 enh_start_addr
= conf
->user
.enh_start
;
674 enh_start_addr
= (conf
->user
.enh_start
<< 9);
680 tot_enh_size_mult
+= enh_size_mult
;
682 for (pidx
= 0; pidx
< 4; pidx
++) {
683 if (conf
->gp_part
[pidx
].size
% mmc
->hc_wp_grp_size
) {
684 printf("GP%i partition not HC WP group size "
685 "aligned\n", pidx
+1);
688 gp_size_mult
[pidx
] = conf
->gp_part
[pidx
].size
/ mmc
->hc_wp_grp_size
;
689 if (conf
->gp_part
[pidx
].size
&& conf
->gp_part
[pidx
].enhanced
) {
690 part_attrs
|= EXT_CSD_ENH_GP(pidx
);
691 tot_enh_size_mult
+= gp_size_mult
[pidx
];
695 if (part_attrs
&& ! (mmc
->part_support
& ENHNCD_SUPPORT
)) {
696 printf("Card does not support enhanced attribute\n");
700 err
= mmc_send_ext_csd(mmc
, ext_csd
);
705 (ext_csd
[EXT_CSD_MAX_ENH_SIZE_MULT
+2] << 16) +
706 (ext_csd
[EXT_CSD_MAX_ENH_SIZE_MULT
+1] << 8) +
707 ext_csd
[EXT_CSD_MAX_ENH_SIZE_MULT
];
708 if (tot_enh_size_mult
> max_enh_size_mult
) {
709 printf("Total enhanced size exceeds maximum (%u > %u)\n",
710 tot_enh_size_mult
, max_enh_size_mult
);
714 /* The default value of EXT_CSD_WR_REL_SET is device
715 * dependent, the values can only be changed if the
716 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
717 * changed only once and before partitioning is completed. */
718 wr_rel_set
= ext_csd
[EXT_CSD_WR_REL_SET
];
719 if (conf
->user
.wr_rel_change
) {
720 if (conf
->user
.wr_rel_set
)
721 wr_rel_set
|= EXT_CSD_WR_DATA_REL_USR
;
723 wr_rel_set
&= ~EXT_CSD_WR_DATA_REL_USR
;
725 for (pidx
= 0; pidx
< 4; pidx
++) {
726 if (conf
->gp_part
[pidx
].wr_rel_change
) {
727 if (conf
->gp_part
[pidx
].wr_rel_set
)
728 wr_rel_set
|= EXT_CSD_WR_DATA_REL_GP(pidx
);
730 wr_rel_set
&= ~EXT_CSD_WR_DATA_REL_GP(pidx
);
734 if (wr_rel_set
!= ext_csd
[EXT_CSD_WR_REL_SET
] &&
735 !(ext_csd
[EXT_CSD_WR_REL_PARAM
] & EXT_CSD_HS_CTRL_REL
)) {
736 puts("Card does not support host controlled partition write "
737 "reliability settings\n");
741 if (ext_csd
[EXT_CSD_PARTITION_SETTING
] &
742 EXT_CSD_PARTITION_SETTING_COMPLETED
) {
743 printf("Card already partitioned\n");
747 if (mode
== MMC_HWPART_CONF_CHECK
)
750 /* Partitioning requires high-capacity size definitions */
751 if (!(ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] & 0x01)) {
752 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
753 EXT_CSD_ERASE_GROUP_DEF
, 1);
758 ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] = 1;
760 /* update erase group size to be high-capacity */
761 mmc
->erase_grp_size
=
762 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
] * 1024;
766 /* all OK, write the configuration */
767 for (i
= 0; i
< 4; i
++) {
768 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
769 EXT_CSD_ENH_START_ADDR
+i
,
770 (enh_start_addr
>> (i
*8)) & 0xFF);
774 for (i
= 0; i
< 3; i
++) {
775 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
776 EXT_CSD_ENH_SIZE_MULT
+i
,
777 (enh_size_mult
>> (i
*8)) & 0xFF);
781 for (pidx
= 0; pidx
< 4; pidx
++) {
782 for (i
= 0; i
< 3; i
++) {
783 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
784 EXT_CSD_GP_SIZE_MULT
+pidx
*3+i
,
785 (gp_size_mult
[pidx
] >> (i
*8)) & 0xFF);
790 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
791 EXT_CSD_PARTITIONS_ATTRIBUTE
, part_attrs
);
795 if (mode
== MMC_HWPART_CONF_SET
)
798 /* The WR_REL_SET is a write-once register but shall be
799 * written before setting PART_SETTING_COMPLETED. As it is
800 * write-once we can only write it when completing the
802 if (wr_rel_set
!= ext_csd
[EXT_CSD_WR_REL_SET
]) {
803 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
804 EXT_CSD_WR_REL_SET
, wr_rel_set
);
809 /* Setting PART_SETTING_COMPLETED confirms the partition
810 * configuration but it only becomes effective after power
811 * cycle, so we do not adjust the partition related settings
812 * in the mmc struct. */
814 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
815 EXT_CSD_PARTITION_SETTING
,
816 EXT_CSD_PARTITION_SETTING_COMPLETED
);
823 int mmc_getcd(struct mmc
*mmc
)
827 cd
= board_mmc_getcd(mmc
);
830 if (mmc
->cfg
->ops
->getcd
)
831 cd
= mmc
->cfg
->ops
->getcd(mmc
);
839 static int sd_switch(struct mmc
*mmc
, int mode
, int group
, u8 value
, u8
*resp
)
842 struct mmc_data data
;
844 /* Switch the frequency */
845 cmd
.cmdidx
= SD_CMD_SWITCH_FUNC
;
846 cmd
.resp_type
= MMC_RSP_R1
;
847 cmd
.cmdarg
= (mode
<< 31) | 0xffffff;
848 cmd
.cmdarg
&= ~(0xf << (group
* 4));
849 cmd
.cmdarg
|= value
<< (group
* 4);
851 data
.dest
= (char *)resp
;
854 data
.flags
= MMC_DATA_READ
;
856 return mmc_send_cmd(mmc
, &cmd
, &data
);
860 static int sd_change_freq(struct mmc
*mmc
)
864 ALLOC_CACHE_ALIGN_BUFFER(uint
, scr
, 2);
865 ALLOC_CACHE_ALIGN_BUFFER(uint
, switch_status
, 16);
866 struct mmc_data data
;
871 if (mmc_host_is_spi(mmc
))
874 /* Read the SCR to find out if this card supports higher speeds */
875 cmd
.cmdidx
= MMC_CMD_APP_CMD
;
876 cmd
.resp_type
= MMC_RSP_R1
;
877 cmd
.cmdarg
= mmc
->rca
<< 16;
879 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
884 cmd
.cmdidx
= SD_CMD_APP_SEND_SCR
;
885 cmd
.resp_type
= MMC_RSP_R1
;
891 data
.dest
= (char *)scr
;
894 data
.flags
= MMC_DATA_READ
;
896 err
= mmc_send_cmd(mmc
, &cmd
, &data
);
905 mmc
->scr
[0] = __be32_to_cpu(scr
[0]);
906 mmc
->scr
[1] = __be32_to_cpu(scr
[1]);
908 switch ((mmc
->scr
[0] >> 24) & 0xf) {
910 mmc
->version
= SD_VERSION_1_0
;
913 mmc
->version
= SD_VERSION_1_10
;
916 mmc
->version
= SD_VERSION_2
;
917 if ((mmc
->scr
[0] >> 15) & 0x1)
918 mmc
->version
= SD_VERSION_3
;
921 mmc
->version
= SD_VERSION_1_0
;
925 if (mmc
->scr
[0] & SD_DATA_4BIT
)
926 mmc
->card_caps
|= MMC_MODE_4BIT
;
928 /* Version 1.0 doesn't support switching */
929 if (mmc
->version
== SD_VERSION_1_0
)
934 err
= sd_switch(mmc
, SD_SWITCH_CHECK
, 0, 1,
935 (u8
*)switch_status
);
940 /* The high-speed function is busy. Try again */
941 if (!(__be32_to_cpu(switch_status
[7]) & SD_HIGHSPEED_BUSY
))
945 /* If high-speed isn't supported, we return */
946 if (!(__be32_to_cpu(switch_status
[3]) & SD_HIGHSPEED_SUPPORTED
))
950 * If the host doesn't support SD_HIGHSPEED, do not switch card to
951 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
952 * This can avoid furthur problem when the card runs in different
953 * mode between the host.
955 if (!((mmc
->cfg
->host_caps
& MMC_MODE_HS_52MHz
) &&
956 (mmc
->cfg
->host_caps
& MMC_MODE_HS
)))
959 err
= sd_switch(mmc
, SD_SWITCH_SWITCH
, 0, 1, (u8
*)switch_status
);
964 if ((__be32_to_cpu(switch_status
[4]) & 0x0f000000) == 0x01000000)
965 mmc
->card_caps
|= MMC_MODE_HS
;
970 /* frequency bases */
971 /* divided by 10 to be nice to platforms without floating point */
972 static const int fbase
[] = {
979 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
980 * to platforms without floating point.
982 static const int multipliers
[] = {
1001 static void mmc_set_ios(struct mmc
*mmc
)
1003 if (mmc
->cfg
->ops
->set_ios
)
1004 mmc
->cfg
->ops
->set_ios(mmc
);
1007 void mmc_set_clock(struct mmc
*mmc
, uint clock
)
1009 if (clock
> mmc
->cfg
->f_max
)
1010 clock
= mmc
->cfg
->f_max
;
1012 if (clock
< mmc
->cfg
->f_min
)
1013 clock
= mmc
->cfg
->f_min
;
1020 static void mmc_set_bus_width(struct mmc
*mmc
, uint width
)
1022 mmc
->bus_width
= width
;
1027 static int mmc_startup(struct mmc
*mmc
)
1031 u64 cmult
, csize
, capacity
;
1033 ALLOC_CACHE_ALIGN_BUFFER(u8
, ext_csd
, MMC_MAX_BLOCK_LEN
);
1034 ALLOC_CACHE_ALIGN_BUFFER(u8
, test_csd
, MMC_MAX_BLOCK_LEN
);
1036 bool has_parts
= false;
1037 bool part_completed
;
1039 #ifdef CONFIG_MMC_SPI_CRC_ON
1040 if (mmc_host_is_spi(mmc
)) { /* enable CRC check for spi */
1041 cmd
.cmdidx
= MMC_CMD_SPI_CRC_ON_OFF
;
1042 cmd
.resp_type
= MMC_RSP_R1
;
1044 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1051 /* Put the Card in Identify Mode */
1052 cmd
.cmdidx
= mmc_host_is_spi(mmc
) ? MMC_CMD_SEND_CID
:
1053 MMC_CMD_ALL_SEND_CID
; /* cmd not supported in spi */
1054 cmd
.resp_type
= MMC_RSP_R2
;
1057 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1062 memcpy(mmc
->cid
, cmd
.response
, 16);
1065 * For MMC cards, set the Relative Address.
1066 * For SD cards, get the Relatvie Address.
1067 * This also puts the cards into Standby State
1069 if (!mmc_host_is_spi(mmc
)) { /* cmd not supported in spi */
1070 cmd
.cmdidx
= SD_CMD_SEND_RELATIVE_ADDR
;
1071 cmd
.cmdarg
= mmc
->rca
<< 16;
1072 cmd
.resp_type
= MMC_RSP_R6
;
1074 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1080 mmc
->rca
= (cmd
.response
[0] >> 16) & 0xffff;
1083 /* Get the Card-Specific Data */
1084 cmd
.cmdidx
= MMC_CMD_SEND_CSD
;
1085 cmd
.resp_type
= MMC_RSP_R2
;
1086 cmd
.cmdarg
= mmc
->rca
<< 16;
1088 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1090 /* Waiting for the ready status */
1091 mmc_send_status(mmc
, timeout
);
1096 mmc
->csd
[0] = cmd
.response
[0];
1097 mmc
->csd
[1] = cmd
.response
[1];
1098 mmc
->csd
[2] = cmd
.response
[2];
1099 mmc
->csd
[3] = cmd
.response
[3];
1101 if (mmc
->version
== MMC_VERSION_UNKNOWN
) {
1102 int version
= (cmd
.response
[0] >> 26) & 0xf;
1106 mmc
->version
= MMC_VERSION_1_2
;
1109 mmc
->version
= MMC_VERSION_1_4
;
1112 mmc
->version
= MMC_VERSION_2_2
;
1115 mmc
->version
= MMC_VERSION_3
;
1118 mmc
->version
= MMC_VERSION_4
;
1121 mmc
->version
= MMC_VERSION_1_2
;
1126 /* divide frequency by 10, since the mults are 10x bigger */
1127 freq
= fbase
[(cmd
.response
[0] & 0x7)];
1128 mult
= multipliers
[((cmd
.response
[0] >> 3) & 0xf)];
1130 mmc
->tran_speed
= freq
* mult
;
1132 mmc
->dsr_imp
= ((cmd
.response
[1] >> 12) & 0x1);
1133 mmc
->read_bl_len
= 1 << ((cmd
.response
[1] >> 16) & 0xf);
1136 mmc
->write_bl_len
= mmc
->read_bl_len
;
1138 mmc
->write_bl_len
= 1 << ((cmd
.response
[3] >> 22) & 0xf);
1140 if (mmc
->high_capacity
) {
1141 csize
= (mmc
->csd
[1] & 0x3f) << 16
1142 | (mmc
->csd
[2] & 0xffff0000) >> 16;
1145 csize
= (mmc
->csd
[1] & 0x3ff) << 2
1146 | (mmc
->csd
[2] & 0xc0000000) >> 30;
1147 cmult
= (mmc
->csd
[2] & 0x00038000) >> 15;
1150 mmc
->capacity_user
= (csize
+ 1) << (cmult
+ 2);
1151 mmc
->capacity_user
*= mmc
->read_bl_len
;
1152 mmc
->capacity_boot
= 0;
1153 mmc
->capacity_rpmb
= 0;
1154 for (i
= 0; i
< 4; i
++)
1155 mmc
->capacity_gp
[i
] = 0;
1157 if (mmc
->read_bl_len
> MMC_MAX_BLOCK_LEN
)
1158 mmc
->read_bl_len
= MMC_MAX_BLOCK_LEN
;
1160 if (mmc
->write_bl_len
> MMC_MAX_BLOCK_LEN
)
1161 mmc
->write_bl_len
= MMC_MAX_BLOCK_LEN
;
1163 if ((mmc
->dsr_imp
) && (0xffffffff != mmc
->dsr
)) {
1164 cmd
.cmdidx
= MMC_CMD_SET_DSR
;
1165 cmd
.cmdarg
= (mmc
->dsr
& 0xffff) << 16;
1166 cmd
.resp_type
= MMC_RSP_NONE
;
1167 if (mmc_send_cmd(mmc
, &cmd
, NULL
))
1168 printf("MMC: SET_DSR failed\n");
1171 /* Select the card, and put it into Transfer Mode */
1172 if (!mmc_host_is_spi(mmc
)) { /* cmd not supported in spi */
1173 cmd
.cmdidx
= MMC_CMD_SELECT_CARD
;
1174 cmd
.resp_type
= MMC_RSP_R1
;
1175 cmd
.cmdarg
= mmc
->rca
<< 16;
1176 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1183 * For SD, its erase group is always one sector
1185 mmc
->erase_grp_size
= 1;
1186 mmc
->part_config
= MMCPART_NOAVAILABLE
;
1187 if (!IS_SD(mmc
) && (mmc
->version
>= MMC_VERSION_4
)) {
1188 /* check ext_csd version and capacity */
1189 err
= mmc_send_ext_csd(mmc
, ext_csd
);
1192 if (ext_csd
[EXT_CSD_REV
] >= 2) {
1194 * According to the JEDEC Standard, the value of
1195 * ext_csd's capacity is valid if the value is more
1198 capacity
= ext_csd
[EXT_CSD_SEC_CNT
] << 0
1199 | ext_csd
[EXT_CSD_SEC_CNT
+ 1] << 8
1200 | ext_csd
[EXT_CSD_SEC_CNT
+ 2] << 16
1201 | ext_csd
[EXT_CSD_SEC_CNT
+ 3] << 24;
1202 capacity
*= MMC_MAX_BLOCK_LEN
;
1203 if ((capacity
>> 20) > 2 * 1024)
1204 mmc
->capacity_user
= capacity
;
1207 switch (ext_csd
[EXT_CSD_REV
]) {
1209 mmc
->version
= MMC_VERSION_4_1
;
1212 mmc
->version
= MMC_VERSION_4_2
;
1215 mmc
->version
= MMC_VERSION_4_3
;
1218 mmc
->version
= MMC_VERSION_4_41
;
1221 mmc
->version
= MMC_VERSION_4_5
;
1224 mmc
->version
= MMC_VERSION_5_0
;
1228 /* The partition data may be non-zero but it is only
1229 * effective if PARTITION_SETTING_COMPLETED is set in
1230 * EXT_CSD, so ignore any data if this bit is not set,
1231 * except for enabling the high-capacity group size
1232 * definition (see below). */
1233 part_completed
= !!(ext_csd
[EXT_CSD_PARTITION_SETTING
] &
1234 EXT_CSD_PARTITION_SETTING_COMPLETED
);
1236 /* store the partition info of emmc */
1237 mmc
->part_support
= ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
];
1238 if ((ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
] & PART_SUPPORT
) ||
1239 ext_csd
[EXT_CSD_BOOT_MULT
])
1240 mmc
->part_config
= ext_csd
[EXT_CSD_PART_CONF
];
1241 if (part_completed
&&
1242 (ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
] & ENHNCD_SUPPORT
))
1243 mmc
->part_attr
= ext_csd
[EXT_CSD_PARTITIONS_ATTRIBUTE
];
1245 mmc
->capacity_boot
= ext_csd
[EXT_CSD_BOOT_MULT
] << 17;
1247 mmc
->capacity_rpmb
= ext_csd
[EXT_CSD_RPMB_MULT
] << 17;
1249 for (i
= 0; i
< 4; i
++) {
1250 int idx
= EXT_CSD_GP_SIZE_MULT
+ i
* 3;
1251 uint mult
= (ext_csd
[idx
+ 2] << 16) +
1252 (ext_csd
[idx
+ 1] << 8) + ext_csd
[idx
];
1255 if (!part_completed
)
1257 mmc
->capacity_gp
[i
] = mult
;
1258 mmc
->capacity_gp
[i
] *=
1259 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
];
1260 mmc
->capacity_gp
[i
] *= ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
];
1261 mmc
->capacity_gp
[i
] <<= 19;
1264 if (part_completed
) {
1265 mmc
->enh_user_size
=
1266 (ext_csd
[EXT_CSD_ENH_SIZE_MULT
+2] << 16) +
1267 (ext_csd
[EXT_CSD_ENH_SIZE_MULT
+1] << 8) +
1268 ext_csd
[EXT_CSD_ENH_SIZE_MULT
];
1269 mmc
->enh_user_size
*= ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
];
1270 mmc
->enh_user_size
*= ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
];
1271 mmc
->enh_user_size
<<= 19;
1272 mmc
->enh_user_start
=
1273 (ext_csd
[EXT_CSD_ENH_START_ADDR
+3] << 24) +
1274 (ext_csd
[EXT_CSD_ENH_START_ADDR
+2] << 16) +
1275 (ext_csd
[EXT_CSD_ENH_START_ADDR
+1] << 8) +
1276 ext_csd
[EXT_CSD_ENH_START_ADDR
];
1277 if (mmc
->high_capacity
)
1278 mmc
->enh_user_start
<<= 9;
1282 * Host needs to enable ERASE_GRP_DEF bit if device is
1283 * partitioned. This bit will be lost every time after a reset
1284 * or power off. This will affect erase size.
1288 if ((ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
] & PART_SUPPORT
) &&
1289 (ext_csd
[EXT_CSD_PARTITIONS_ATTRIBUTE
] & PART_ENH_ATTRIB
))
1292 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
1293 EXT_CSD_ERASE_GROUP_DEF
, 1);
1298 ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] = 1;
1301 if (ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] & 0x01) {
1302 /* Read out group size from ext_csd */
1303 mmc
->erase_grp_size
=
1304 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
] * 1024;
1306 * if high capacity and partition setting completed
1307 * SEC_COUNT is valid even if it is smaller than 2 GiB
1308 * JEDEC Standard JESD84-B45, 6.2.4
1310 if (mmc
->high_capacity
&& part_completed
) {
1311 capacity
= (ext_csd
[EXT_CSD_SEC_CNT
]) |
1312 (ext_csd
[EXT_CSD_SEC_CNT
+ 1] << 8) |
1313 (ext_csd
[EXT_CSD_SEC_CNT
+ 2] << 16) |
1314 (ext_csd
[EXT_CSD_SEC_CNT
+ 3] << 24);
1315 capacity
*= MMC_MAX_BLOCK_LEN
;
1316 mmc
->capacity_user
= capacity
;
1319 /* Calculate the group size from the csd value. */
1320 int erase_gsz
, erase_gmul
;
1321 erase_gsz
= (mmc
->csd
[2] & 0x00007c00) >> 10;
1322 erase_gmul
= (mmc
->csd
[2] & 0x000003e0) >> 5;
1323 mmc
->erase_grp_size
= (erase_gsz
+ 1)
1327 mmc
->hc_wp_grp_size
= 1024
1328 * ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
]
1329 * ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
];
1331 mmc
->wr_rel_set
= ext_csd
[EXT_CSD_WR_REL_SET
];
1334 err
= mmc_set_capacity(mmc
, mmc
->block_dev
.hwpart
);
1339 err
= sd_change_freq(mmc
);
1341 err
= mmc_change_freq(mmc
);
1346 /* Restrict card's capabilities by what the host can do */
1347 mmc
->card_caps
&= mmc
->cfg
->host_caps
;
1350 if (mmc
->card_caps
& MMC_MODE_4BIT
) {
1351 cmd
.cmdidx
= MMC_CMD_APP_CMD
;
1352 cmd
.resp_type
= MMC_RSP_R1
;
1353 cmd
.cmdarg
= mmc
->rca
<< 16;
1355 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1359 cmd
.cmdidx
= SD_CMD_APP_SET_BUS_WIDTH
;
1360 cmd
.resp_type
= MMC_RSP_R1
;
1362 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1366 mmc_set_bus_width(mmc
, 4);
1369 if (mmc
->card_caps
& MMC_MODE_HS
)
1370 mmc
->tran_speed
= 50000000;
1372 mmc
->tran_speed
= 25000000;
1373 } else if (mmc
->version
>= MMC_VERSION_4
) {
1374 /* Only version 4 of MMC supports wider bus widths */
1377 /* An array of possible bus widths in order of preference */
1378 static unsigned ext_csd_bits
[] = {
1379 EXT_CSD_DDR_BUS_WIDTH_8
,
1380 EXT_CSD_DDR_BUS_WIDTH_4
,
1381 EXT_CSD_BUS_WIDTH_8
,
1382 EXT_CSD_BUS_WIDTH_4
,
1383 EXT_CSD_BUS_WIDTH_1
,
1386 /* An array to map CSD bus widths to host cap bits */
1387 static unsigned ext_to_hostcaps
[] = {
1388 [EXT_CSD_DDR_BUS_WIDTH_4
] =
1389 MMC_MODE_DDR_52MHz
| MMC_MODE_4BIT
,
1390 [EXT_CSD_DDR_BUS_WIDTH_8
] =
1391 MMC_MODE_DDR_52MHz
| MMC_MODE_8BIT
,
1392 [EXT_CSD_BUS_WIDTH_4
] = MMC_MODE_4BIT
,
1393 [EXT_CSD_BUS_WIDTH_8
] = MMC_MODE_8BIT
,
1396 /* An array to map chosen bus width to an integer */
1397 static unsigned widths
[] = {
1401 for (idx
=0; idx
< ARRAY_SIZE(ext_csd_bits
); idx
++) {
1402 unsigned int extw
= ext_csd_bits
[idx
];
1403 unsigned int caps
= ext_to_hostcaps
[extw
];
1406 * If the bus width is still not changed,
1407 * don't try to set the default again.
1408 * Otherwise, recover from switch attempts
1409 * by switching to 1-bit bus width.
1411 if (extw
== EXT_CSD_BUS_WIDTH_1
&&
1412 mmc
->bus_width
== 1) {
1418 * Check to make sure the card and controller support
1419 * these capabilities
1421 if ((mmc
->card_caps
& caps
) != caps
)
1424 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
1425 EXT_CSD_BUS_WIDTH
, extw
);
1430 mmc
->ddr_mode
= (caps
& MMC_MODE_DDR_52MHz
) ? 1 : 0;
1431 mmc_set_bus_width(mmc
, widths
[idx
]);
1433 err
= mmc_send_ext_csd(mmc
, test_csd
);
1438 /* Only compare read only fields */
1439 if (ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
]
1440 == test_csd
[EXT_CSD_PARTITIONING_SUPPORT
] &&
1441 ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
]
1442 == test_csd
[EXT_CSD_HC_WP_GRP_SIZE
] &&
1443 ext_csd
[EXT_CSD_REV
]
1444 == test_csd
[EXT_CSD_REV
] &&
1445 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
]
1446 == test_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
] &&
1447 memcmp(&ext_csd
[EXT_CSD_SEC_CNT
],
1448 &test_csd
[EXT_CSD_SEC_CNT
], 4) == 0)
1457 if (mmc
->card_caps
& MMC_MODE_HS
) {
1458 if (mmc
->card_caps
& MMC_MODE_HS_52MHz
)
1459 mmc
->tran_speed
= 52000000;
1461 mmc
->tran_speed
= 26000000;
1465 mmc_set_clock(mmc
, mmc
->tran_speed
);
1467 /* Fix the block length for DDR mode */
1468 if (mmc
->ddr_mode
) {
1469 mmc
->read_bl_len
= MMC_MAX_BLOCK_LEN
;
1470 mmc
->write_bl_len
= MMC_MAX_BLOCK_LEN
;
1473 /* fill in device description */
1474 mmc
->block_dev
.lun
= 0;
1475 mmc
->block_dev
.hwpart
= 0;
1476 mmc
->block_dev
.type
= 0;
1477 mmc
->block_dev
.blksz
= mmc
->read_bl_len
;
1478 mmc
->block_dev
.log2blksz
= LOG2(mmc
->block_dev
.blksz
);
1479 mmc
->block_dev
.lba
= lldiv(mmc
->capacity
, mmc
->read_bl_len
);
1480 #if !defined(CONFIG_SPL_BUILD) || \
1481 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1482 !defined(CONFIG_USE_TINY_PRINTF))
1483 sprintf(mmc
->block_dev
.vendor
, "Man %06x Snr %04x%04x",
1484 mmc
->cid
[0] >> 24, (mmc
->cid
[2] & 0xffff),
1485 (mmc
->cid
[3] >> 16) & 0xffff);
1486 sprintf(mmc
->block_dev
.product
, "%c%c%c%c%c%c", mmc
->cid
[0] & 0xff,
1487 (mmc
->cid
[1] >> 24), (mmc
->cid
[1] >> 16) & 0xff,
1488 (mmc
->cid
[1] >> 8) & 0xff, mmc
->cid
[1] & 0xff,
1489 (mmc
->cid
[2] >> 24) & 0xff);
1490 sprintf(mmc
->block_dev
.revision
, "%d.%d", (mmc
->cid
[2] >> 20) & 0xf,
1491 (mmc
->cid
[2] >> 16) & 0xf);
1493 mmc
->block_dev
.vendor
[0] = 0;
1494 mmc
->block_dev
.product
[0] = 0;
1495 mmc
->block_dev
.revision
[0] = 0;
1497 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1498 init_part(&mmc
->block_dev
);
1504 static int mmc_send_if_cond(struct mmc
*mmc
)
1509 cmd
.cmdidx
= SD_CMD_SEND_IF_COND
;
1510 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1511 cmd
.cmdarg
= ((mmc
->cfg
->voltages
& 0xff8000) != 0) << 8 | 0xaa;
1512 cmd
.resp_type
= MMC_RSP_R7
;
1514 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1519 if ((cmd
.response
[0] & 0xff) != 0xaa)
1520 return UNUSABLE_ERR
;
1522 mmc
->version
= SD_VERSION_2
;
1527 /* not used any more */
1528 int __deprecated
mmc_register(struct mmc
*mmc
)
1530 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1531 printf("%s is deprecated! use mmc_create() instead.\n", __func__
);
1536 struct mmc
*mmc_create(const struct mmc_config
*cfg
, void *priv
)
1540 /* quick validation */
1541 if (cfg
== NULL
|| cfg
->ops
== NULL
|| cfg
->ops
->send_cmd
== NULL
||
1542 cfg
->f_min
== 0 || cfg
->f_max
== 0 || cfg
->b_max
== 0)
1545 mmc
= calloc(1, sizeof(*mmc
));
1552 /* the following chunk was mmc_register() */
1554 /* Setup dsr related values */
1556 mmc
->dsr
= 0xffffffff;
1557 /* Setup the universal parts of the block interface just once */
1558 mmc
->block_dev
.if_type
= IF_TYPE_MMC
;
1559 mmc
->block_dev
.dev
= cur_dev_num
++;
1560 mmc
->block_dev
.removable
= 1;
1561 mmc
->block_dev
.block_read
= mmc_bread
;
1562 mmc
->block_dev
.block_write
= mmc_bwrite
;
1563 mmc
->block_dev
.block_erase
= mmc_berase
;
1565 /* setup initial part type */
1566 mmc
->block_dev
.part_type
= mmc
->cfg
->part_type
;
1568 INIT_LIST_HEAD(&mmc
->link
);
1570 list_add_tail(&mmc
->link
, &mmc_devices
);
1575 void mmc_destroy(struct mmc
*mmc
)
1577 /* only freeing memory for now */
1581 #ifdef CONFIG_PARTITIONS
1582 block_dev_desc_t
*mmc_get_dev(int dev
)
1584 struct mmc
*mmc
= find_mmc_device(dev
);
1585 if (!mmc
|| mmc_init(mmc
))
1588 return &mmc
->block_dev
;
1592 /* board-specific MMC power initializations. */
1593 __weak
void board_mmc_power_init(void)
1597 int mmc_start_init(struct mmc
*mmc
)
1601 /* we pretend there's no card when init is NULL */
1602 if (mmc_getcd(mmc
) == 0 || mmc
->cfg
->ops
->init
== NULL
) {
1604 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1605 printf("MMC: no card present\n");
1613 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1614 mmc_adapter_card_type_ident();
1616 board_mmc_power_init();
1618 /* made sure it's not NULL earlier */
1619 err
= mmc
->cfg
->ops
->init(mmc
);
1625 mmc_set_bus_width(mmc
, 1);
1626 mmc_set_clock(mmc
, 1);
1628 /* Reset the Card */
1629 err
= mmc_go_idle(mmc
);
1634 /* The internal partition reset to user partition(0) at every CMD0*/
1635 mmc
->block_dev
.hwpart
= 0;
1637 /* Test for SD version 2 */
1638 err
= mmc_send_if_cond(mmc
);
1640 /* Now try to get the SD card's operating condition */
1641 err
= sd_send_op_cond(mmc
);
1643 /* If the command timed out, we check for an MMC card */
1644 if (err
== TIMEOUT
) {
1645 err
= mmc_send_op_cond(mmc
);
1648 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1649 printf("Card did not respond to voltage select!\n");
1651 return UNUSABLE_ERR
;
1656 mmc
->init_in_progress
= 1;
1661 static int mmc_complete_init(struct mmc
*mmc
)
1665 mmc
->init_in_progress
= 0;
1666 if (mmc
->op_cond_pending
)
1667 err
= mmc_complete_op_cond(mmc
);
1670 err
= mmc_startup(mmc
);
1678 int mmc_init(struct mmc
*mmc
)
1686 start
= get_timer(0);
1688 if (!mmc
->init_in_progress
)
1689 err
= mmc_start_init(mmc
);
1692 err
= mmc_complete_init(mmc
);
1693 debug("%s: %d, time %lu\n", __func__
, err
, get_timer(start
));
1697 int mmc_set_dsr(struct mmc
*mmc
, u16 val
)
1703 /* CPU-specific MMC initializations */
1704 __weak
int cpu_mmc_init(bd_t
*bis
)
1709 /* board-specific MMC initializations. */
1710 __weak
int board_mmc_init(bd_t
*bis
)
1715 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1717 void print_mmc_devices(char separator
)
1720 struct list_head
*entry
;
1723 list_for_each(entry
, &mmc_devices
) {
1724 m
= list_entry(entry
, struct mmc
, link
);
1727 mmc_type
= IS_SD(m
) ? "SD" : "eMMC";
1731 printf("%s: %d", m
->cfg
->name
, m
->block_dev
.dev
);
1733 printf(" (%s)", mmc_type
);
1735 if (entry
->next
!= &mmc_devices
) {
1736 printf("%c", separator
);
1737 if (separator
!= '\n')
1746 void print_mmc_devices(char separator
) { }
1749 int get_mmc_num(void)
1754 void mmc_set_preinit(struct mmc
*mmc
, int preinit
)
1756 mmc
->preinit
= preinit
;
1759 static void do_preinit(void)
1762 struct list_head
*entry
;
1764 list_for_each(entry
, &mmc_devices
) {
1765 m
= list_entry(entry
, struct mmc
, link
);
1767 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1768 mmc_set_preinit(m
, 1);
1775 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1776 static int mmc_probe(bd_t
*bis
)
1780 #elif defined(CONFIG_DM_MMC)
1781 static int mmc_probe(bd_t
*bis
)
1785 struct udevice
*dev
;
1787 ret
= uclass_get(UCLASS_MMC
, &uc
);
1792 * Try to add them in sequence order. Really with driver model we
1793 * should allow holes, but the current MMC list does not allow that.
1794 * So if we request 0, 1, 3 we will get 0, 1, 2.
1796 for (i
= 0; ; i
++) {
1797 ret
= uclass_get_device_by_seq(UCLASS_MMC
, i
, &dev
);
1801 uclass_foreach_dev(dev
, uc
) {
1802 ret
= device_probe(dev
);
1804 printf("%s - probe failed: %d\n", dev
->name
, ret
);
1810 static int mmc_probe(bd_t
*bis
)
1812 if (board_mmc_init(bis
) < 0)
1819 int mmc_initialize(bd_t
*bis
)
1821 static int initialized
= 0;
1823 if (initialized
) /* Avoid initializing mmc multiple times */
1827 INIT_LIST_HEAD (&mmc_devices
);
1830 ret
= mmc_probe(bis
);
1834 #ifndef CONFIG_SPL_BUILD
1835 print_mmc_devices(',');
1842 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1844 * This function changes the size of boot partition and the size of rpmb
1845 * partition present on EMMC devices.
1848 * struct *mmc: pointer for the mmc device strcuture
1849 * bootsize: size of boot partition
1850 * rpmbsize: size of rpmb partition
1852 * Returns 0 on success.
1855 int mmc_boot_partition_size_change(struct mmc
*mmc
, unsigned long bootsize
,
1856 unsigned long rpmbsize
)
1861 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1862 cmd
.cmdidx
= MMC_CMD_RES_MAN
;
1863 cmd
.resp_type
= MMC_RSP_R1b
;
1864 cmd
.cmdarg
= MMC_CMD62_ARG1
;
1866 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1868 debug("mmc_boot_partition_size_change: Error1 = %d\n", err
);
1872 /* Boot partition changing mode */
1873 cmd
.cmdidx
= MMC_CMD_RES_MAN
;
1874 cmd
.resp_type
= MMC_RSP_R1b
;
1875 cmd
.cmdarg
= MMC_CMD62_ARG2
;
1877 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1879 debug("mmc_boot_partition_size_change: Error2 = %d\n", err
);
1882 /* boot partition size is multiple of 128KB */
1883 bootsize
= (bootsize
* 1024) / 128;
1885 /* Arg: boot partition size */
1886 cmd
.cmdidx
= MMC_CMD_RES_MAN
;
1887 cmd
.resp_type
= MMC_RSP_R1b
;
1888 cmd
.cmdarg
= bootsize
;
1890 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1892 debug("mmc_boot_partition_size_change: Error3 = %d\n", err
);
1895 /* RPMB partition size is multiple of 128KB */
1896 rpmbsize
= (rpmbsize
* 1024) / 128;
1897 /* Arg: RPMB partition size */
1898 cmd
.cmdidx
= MMC_CMD_RES_MAN
;
1899 cmd
.resp_type
= MMC_RSP_R1b
;
1900 cmd
.cmdarg
= rpmbsize
;
1902 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1904 debug("mmc_boot_partition_size_change: Error4 = %d\n", err
);
1911 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1912 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1915 * Returns 0 on success.
1917 int mmc_set_boot_bus_width(struct mmc
*mmc
, u8 width
, u8 reset
, u8 mode
)
1921 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_BOOT_BUS_WIDTH
,
1922 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode
) |
1923 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset
) |
1924 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width
));
1932 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1933 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1936 * Returns 0 on success.
1938 int mmc_set_part_conf(struct mmc
*mmc
, u8 ack
, u8 part_num
, u8 access
)
1942 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_PART_CONF
,
1943 EXT_CSD_BOOT_ACK(ack
) |
1944 EXT_CSD_BOOT_PART_NUM(part_num
) |
1945 EXT_CSD_PARTITION_ACCESS(access
));
1953 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1954 * for enable. Note that this is a write-once field for non-zero values.
1956 * Returns 0 on success.
1958 int mmc_set_rst_n_function(struct mmc
*mmc
, u8 enable
)
1960 return mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_RST_N_FUNCTION
,