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dm: mmc: Move mmc_switch_part() above its callers
[people/ms/u-boot.git] / drivers / mmc / mmc.c
1 /*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #include <config.h>
11 #include <common.h>
12 #include <command.h>
13 #include <dm.h>
14 #include <dm/device-internal.h>
15 #include <errno.h>
16 #include <mmc.h>
17 #include <part.h>
18 #include <malloc.h>
19 #include <memalign.h>
20 #include <linux/list.h>
21 #include <div64.h>
22 #include "mmc_private.h"
23
24 static struct list_head mmc_devices;
25 static int cur_dev_num = -1;
26
27 __weak int board_mmc_getwp(struct mmc *mmc)
28 {
29 return -1;
30 }
31
32 int mmc_getwp(struct mmc *mmc)
33 {
34 int wp;
35
36 wp = board_mmc_getwp(mmc);
37
38 if (wp < 0) {
39 if (mmc->cfg->ops->getwp)
40 wp = mmc->cfg->ops->getwp(mmc);
41 else
42 wp = 0;
43 }
44
45 return wp;
46 }
47
48 __weak int board_mmc_getcd(struct mmc *mmc)
49 {
50 return -1;
51 }
52
53 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
54 {
55 int ret;
56
57 #ifdef CONFIG_MMC_TRACE
58 int i;
59 u8 *ptr;
60
61 printf("CMD_SEND:%d\n", cmd->cmdidx);
62 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
63 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
64 if (ret) {
65 printf("\t\tRET\t\t\t %d\n", ret);
66 } else {
67 switch (cmd->resp_type) {
68 case MMC_RSP_NONE:
69 printf("\t\tMMC_RSP_NONE\n");
70 break;
71 case MMC_RSP_R1:
72 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
73 cmd->response[0]);
74 break;
75 case MMC_RSP_R1b:
76 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
77 cmd->response[0]);
78 break;
79 case MMC_RSP_R2:
80 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
81 cmd->response[0]);
82 printf("\t\t \t\t 0x%08X \n",
83 cmd->response[1]);
84 printf("\t\t \t\t 0x%08X \n",
85 cmd->response[2]);
86 printf("\t\t \t\t 0x%08X \n",
87 cmd->response[3]);
88 printf("\n");
89 printf("\t\t\t\t\tDUMPING DATA\n");
90 for (i = 0; i < 4; i++) {
91 int j;
92 printf("\t\t\t\t\t%03d - ", i*4);
93 ptr = (u8 *)&cmd->response[i];
94 ptr += 3;
95 for (j = 0; j < 4; j++)
96 printf("%02X ", *ptr--);
97 printf("\n");
98 }
99 break;
100 case MMC_RSP_R3:
101 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
102 cmd->response[0]);
103 break;
104 default:
105 printf("\t\tERROR MMC rsp not supported\n");
106 break;
107 }
108 }
109 #else
110 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
111 #endif
112 return ret;
113 }
114
115 int mmc_send_status(struct mmc *mmc, int timeout)
116 {
117 struct mmc_cmd cmd;
118 int err, retries = 5;
119 #ifdef CONFIG_MMC_TRACE
120 int status;
121 #endif
122
123 cmd.cmdidx = MMC_CMD_SEND_STATUS;
124 cmd.resp_type = MMC_RSP_R1;
125 if (!mmc_host_is_spi(mmc))
126 cmd.cmdarg = mmc->rca << 16;
127
128 while (1) {
129 err = mmc_send_cmd(mmc, &cmd, NULL);
130 if (!err) {
131 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
132 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
133 MMC_STATE_PRG)
134 break;
135 else if (cmd.response[0] & MMC_STATUS_MASK) {
136 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
137 printf("Status Error: 0x%08X\n",
138 cmd.response[0]);
139 #endif
140 return COMM_ERR;
141 }
142 } else if (--retries < 0)
143 return err;
144
145 if (timeout-- <= 0)
146 break;
147
148 udelay(1000);
149 }
150
151 #ifdef CONFIG_MMC_TRACE
152 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
153 printf("CURR STATE:%d\n", status);
154 #endif
155 if (timeout <= 0) {
156 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
157 printf("Timeout waiting card ready\n");
158 #endif
159 return TIMEOUT;
160 }
161 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
162 return SWITCH_ERR;
163
164 return 0;
165 }
166
167 int mmc_set_blocklen(struct mmc *mmc, int len)
168 {
169 struct mmc_cmd cmd;
170
171 if (mmc->ddr_mode)
172 return 0;
173
174 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
175 cmd.resp_type = MMC_RSP_R1;
176 cmd.cmdarg = len;
177
178 return mmc_send_cmd(mmc, &cmd, NULL);
179 }
180
181 struct mmc *find_mmc_device(int dev_num)
182 {
183 struct mmc *m;
184 struct list_head *entry;
185
186 list_for_each(entry, &mmc_devices) {
187 m = list_entry(entry, struct mmc, link);
188
189 if (m->block_dev.devnum == dev_num)
190 return m;
191 }
192
193 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
194 printf("MMC Device %d not found\n", dev_num);
195 #endif
196
197 return NULL;
198 }
199
200 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
201 lbaint_t blkcnt)
202 {
203 struct mmc_cmd cmd;
204 struct mmc_data data;
205
206 if (blkcnt > 1)
207 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
208 else
209 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
210
211 if (mmc->high_capacity)
212 cmd.cmdarg = start;
213 else
214 cmd.cmdarg = start * mmc->read_bl_len;
215
216 cmd.resp_type = MMC_RSP_R1;
217
218 data.dest = dst;
219 data.blocks = blkcnt;
220 data.blocksize = mmc->read_bl_len;
221 data.flags = MMC_DATA_READ;
222
223 if (mmc_send_cmd(mmc, &cmd, &data))
224 return 0;
225
226 if (blkcnt > 1) {
227 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
228 cmd.cmdarg = 0;
229 cmd.resp_type = MMC_RSP_R1b;
230 if (mmc_send_cmd(mmc, &cmd, NULL)) {
231 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
232 printf("mmc fail to send stop cmd\n");
233 #endif
234 return 0;
235 }
236 }
237
238 return blkcnt;
239 }
240
241 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
242 lbaint_t blkcnt, void *dst)
243 {
244 int dev_num = block_dev->devnum;
245 int err;
246 lbaint_t cur, blocks_todo = blkcnt;
247
248 if (blkcnt == 0)
249 return 0;
250
251 struct mmc *mmc = find_mmc_device(dev_num);
252 if (!mmc)
253 return 0;
254
255 err = mmc_select_hwpart(dev_num, block_dev->hwpart);
256 if (err < 0)
257 return 0;
258
259 if ((start + blkcnt) > mmc->block_dev.lba) {
260 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
261 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
262 start + blkcnt, mmc->block_dev.lba);
263 #endif
264 return 0;
265 }
266
267 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
268 debug("%s: Failed to set blocklen\n", __func__);
269 return 0;
270 }
271
272 do {
273 cur = (blocks_todo > mmc->cfg->b_max) ?
274 mmc->cfg->b_max : blocks_todo;
275 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
276 debug("%s: Failed to read blocks\n", __func__);
277 return 0;
278 }
279 blocks_todo -= cur;
280 start += cur;
281 dst += cur * mmc->read_bl_len;
282 } while (blocks_todo > 0);
283
284 return blkcnt;
285 }
286
287 static int mmc_go_idle(struct mmc *mmc)
288 {
289 struct mmc_cmd cmd;
290 int err;
291
292 udelay(1000);
293
294 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
295 cmd.cmdarg = 0;
296 cmd.resp_type = MMC_RSP_NONE;
297
298 err = mmc_send_cmd(mmc, &cmd, NULL);
299
300 if (err)
301 return err;
302
303 udelay(2000);
304
305 return 0;
306 }
307
308 static int sd_send_op_cond(struct mmc *mmc)
309 {
310 int timeout = 1000;
311 int err;
312 struct mmc_cmd cmd;
313
314 while (1) {
315 cmd.cmdidx = MMC_CMD_APP_CMD;
316 cmd.resp_type = MMC_RSP_R1;
317 cmd.cmdarg = 0;
318
319 err = mmc_send_cmd(mmc, &cmd, NULL);
320
321 if (err)
322 return err;
323
324 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
325 cmd.resp_type = MMC_RSP_R3;
326
327 /*
328 * Most cards do not answer if some reserved bits
329 * in the ocr are set. However, Some controller
330 * can set bit 7 (reserved for low voltages), but
331 * how to manage low voltages SD card is not yet
332 * specified.
333 */
334 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
335 (mmc->cfg->voltages & 0xff8000);
336
337 if (mmc->version == SD_VERSION_2)
338 cmd.cmdarg |= OCR_HCS;
339
340 err = mmc_send_cmd(mmc, &cmd, NULL);
341
342 if (err)
343 return err;
344
345 if (cmd.response[0] & OCR_BUSY)
346 break;
347
348 if (timeout-- <= 0)
349 return UNUSABLE_ERR;
350
351 udelay(1000);
352 }
353
354 if (mmc->version != SD_VERSION_2)
355 mmc->version = SD_VERSION_1_0;
356
357 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
358 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
359 cmd.resp_type = MMC_RSP_R3;
360 cmd.cmdarg = 0;
361
362 err = mmc_send_cmd(mmc, &cmd, NULL);
363
364 if (err)
365 return err;
366 }
367
368 mmc->ocr = cmd.response[0];
369
370 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
371 mmc->rca = 0;
372
373 return 0;
374 }
375
376 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
377 {
378 struct mmc_cmd cmd;
379 int err;
380
381 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
382 cmd.resp_type = MMC_RSP_R3;
383 cmd.cmdarg = 0;
384 if (use_arg && !mmc_host_is_spi(mmc))
385 cmd.cmdarg = OCR_HCS |
386 (mmc->cfg->voltages &
387 (mmc->ocr & OCR_VOLTAGE_MASK)) |
388 (mmc->ocr & OCR_ACCESS_MODE);
389
390 err = mmc_send_cmd(mmc, &cmd, NULL);
391 if (err)
392 return err;
393 mmc->ocr = cmd.response[0];
394 return 0;
395 }
396
397 static int mmc_send_op_cond(struct mmc *mmc)
398 {
399 int err, i;
400
401 /* Some cards seem to need this */
402 mmc_go_idle(mmc);
403
404 /* Asking to the card its capabilities */
405 for (i = 0; i < 2; i++) {
406 err = mmc_send_op_cond_iter(mmc, i != 0);
407 if (err)
408 return err;
409
410 /* exit if not busy (flag seems to be inverted) */
411 if (mmc->ocr & OCR_BUSY)
412 break;
413 }
414 mmc->op_cond_pending = 1;
415 return 0;
416 }
417
418 static int mmc_complete_op_cond(struct mmc *mmc)
419 {
420 struct mmc_cmd cmd;
421 int timeout = 1000;
422 uint start;
423 int err;
424
425 mmc->op_cond_pending = 0;
426 if (!(mmc->ocr & OCR_BUSY)) {
427 start = get_timer(0);
428 while (1) {
429 err = mmc_send_op_cond_iter(mmc, 1);
430 if (err)
431 return err;
432 if (mmc->ocr & OCR_BUSY)
433 break;
434 if (get_timer(start) > timeout)
435 return UNUSABLE_ERR;
436 udelay(100);
437 }
438 }
439
440 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
441 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
442 cmd.resp_type = MMC_RSP_R3;
443 cmd.cmdarg = 0;
444
445 err = mmc_send_cmd(mmc, &cmd, NULL);
446
447 if (err)
448 return err;
449
450 mmc->ocr = cmd.response[0];
451 }
452
453 mmc->version = MMC_VERSION_UNKNOWN;
454
455 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
456 mmc->rca = 1;
457
458 return 0;
459 }
460
461
462 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
463 {
464 struct mmc_cmd cmd;
465 struct mmc_data data;
466 int err;
467
468 /* Get the Card Status Register */
469 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
470 cmd.resp_type = MMC_RSP_R1;
471 cmd.cmdarg = 0;
472
473 data.dest = (char *)ext_csd;
474 data.blocks = 1;
475 data.blocksize = MMC_MAX_BLOCK_LEN;
476 data.flags = MMC_DATA_READ;
477
478 err = mmc_send_cmd(mmc, &cmd, &data);
479
480 return err;
481 }
482
483
484 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
485 {
486 struct mmc_cmd cmd;
487 int timeout = 1000;
488 int ret;
489
490 cmd.cmdidx = MMC_CMD_SWITCH;
491 cmd.resp_type = MMC_RSP_R1b;
492 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
493 (index << 16) |
494 (value << 8);
495
496 ret = mmc_send_cmd(mmc, &cmd, NULL);
497
498 /* Waiting for the ready status */
499 if (!ret)
500 ret = mmc_send_status(mmc, timeout);
501
502 return ret;
503
504 }
505
506 static int mmc_change_freq(struct mmc *mmc)
507 {
508 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
509 char cardtype;
510 int err;
511
512 mmc->card_caps = 0;
513
514 if (mmc_host_is_spi(mmc))
515 return 0;
516
517 /* Only version 4 supports high-speed */
518 if (mmc->version < MMC_VERSION_4)
519 return 0;
520
521 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
522
523 err = mmc_send_ext_csd(mmc, ext_csd);
524
525 if (err)
526 return err;
527
528 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
529
530 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
531
532 if (err)
533 return err == SWITCH_ERR ? 0 : err;
534
535 /* Now check to see that it worked */
536 err = mmc_send_ext_csd(mmc, ext_csd);
537
538 if (err)
539 return err;
540
541 /* No high-speed support */
542 if (!ext_csd[EXT_CSD_HS_TIMING])
543 return 0;
544
545 /* High Speed is set, there are two types: 52MHz and 26MHz */
546 if (cardtype & EXT_CSD_CARD_TYPE_52) {
547 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
548 mmc->card_caps |= MMC_MODE_DDR_52MHz;
549 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
550 } else {
551 mmc->card_caps |= MMC_MODE_HS;
552 }
553
554 return 0;
555 }
556
557 static int mmc_set_capacity(struct mmc *mmc, int part_num)
558 {
559 switch (part_num) {
560 case 0:
561 mmc->capacity = mmc->capacity_user;
562 break;
563 case 1:
564 case 2:
565 mmc->capacity = mmc->capacity_boot;
566 break;
567 case 3:
568 mmc->capacity = mmc->capacity_rpmb;
569 break;
570 case 4:
571 case 5:
572 case 6:
573 case 7:
574 mmc->capacity = mmc->capacity_gp[part_num - 4];
575 break;
576 default:
577 return -1;
578 }
579
580 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
581
582 return 0;
583 }
584
585 int mmc_switch_part(int dev_num, unsigned int part_num)
586 {
587 struct mmc *mmc = find_mmc_device(dev_num);
588 int ret;
589
590 if (!mmc)
591 return -1;
592
593 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
594 (mmc->part_config & ~PART_ACCESS_MASK)
595 | (part_num & PART_ACCESS_MASK));
596
597 /*
598 * Set the capacity if the switch succeeded or was intended
599 * to return to representing the raw device.
600 */
601 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
602 ret = mmc_set_capacity(mmc, part_num);
603 mmc->block_dev.hwpart = part_num;
604 }
605
606 return ret;
607 }
608
609 int mmc_select_hwpart(int dev_num, int hwpart)
610 {
611 struct mmc *mmc = find_mmc_device(dev_num);
612 int ret;
613
614 if (!mmc)
615 return -ENODEV;
616
617 if (mmc->block_dev.hwpart == hwpart)
618 return 0;
619
620 if (mmc->part_config == MMCPART_NOAVAILABLE)
621 return -EMEDIUMTYPE;
622
623 ret = mmc_switch_part(dev_num, hwpart);
624 if (ret)
625 return ret;
626
627 return 0;
628 }
629
630 int mmc_hwpart_config(struct mmc *mmc,
631 const struct mmc_hwpart_conf *conf,
632 enum mmc_hwpart_conf_mode mode)
633 {
634 u8 part_attrs = 0;
635 u32 enh_size_mult;
636 u32 enh_start_addr;
637 u32 gp_size_mult[4];
638 u32 max_enh_size_mult;
639 u32 tot_enh_size_mult = 0;
640 u8 wr_rel_set;
641 int i, pidx, err;
642 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
643
644 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
645 return -EINVAL;
646
647 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
648 printf("eMMC >= 4.4 required for enhanced user data area\n");
649 return -EMEDIUMTYPE;
650 }
651
652 if (!(mmc->part_support & PART_SUPPORT)) {
653 printf("Card does not support partitioning\n");
654 return -EMEDIUMTYPE;
655 }
656
657 if (!mmc->hc_wp_grp_size) {
658 printf("Card does not define HC WP group size\n");
659 return -EMEDIUMTYPE;
660 }
661
662 /* check partition alignment and total enhanced size */
663 if (conf->user.enh_size) {
664 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
665 conf->user.enh_start % mmc->hc_wp_grp_size) {
666 printf("User data enhanced area not HC WP group "
667 "size aligned\n");
668 return -EINVAL;
669 }
670 part_attrs |= EXT_CSD_ENH_USR;
671 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
672 if (mmc->high_capacity) {
673 enh_start_addr = conf->user.enh_start;
674 } else {
675 enh_start_addr = (conf->user.enh_start << 9);
676 }
677 } else {
678 enh_size_mult = 0;
679 enh_start_addr = 0;
680 }
681 tot_enh_size_mult += enh_size_mult;
682
683 for (pidx = 0; pidx < 4; pidx++) {
684 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
685 printf("GP%i partition not HC WP group size "
686 "aligned\n", pidx+1);
687 return -EINVAL;
688 }
689 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
690 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
691 part_attrs |= EXT_CSD_ENH_GP(pidx);
692 tot_enh_size_mult += gp_size_mult[pidx];
693 }
694 }
695
696 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
697 printf("Card does not support enhanced attribute\n");
698 return -EMEDIUMTYPE;
699 }
700
701 err = mmc_send_ext_csd(mmc, ext_csd);
702 if (err)
703 return err;
704
705 max_enh_size_mult =
706 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
707 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
708 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
709 if (tot_enh_size_mult > max_enh_size_mult) {
710 printf("Total enhanced size exceeds maximum (%u > %u)\n",
711 tot_enh_size_mult, max_enh_size_mult);
712 return -EMEDIUMTYPE;
713 }
714
715 /* The default value of EXT_CSD_WR_REL_SET is device
716 * dependent, the values can only be changed if the
717 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
718 * changed only once and before partitioning is completed. */
719 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
720 if (conf->user.wr_rel_change) {
721 if (conf->user.wr_rel_set)
722 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
723 else
724 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
725 }
726 for (pidx = 0; pidx < 4; pidx++) {
727 if (conf->gp_part[pidx].wr_rel_change) {
728 if (conf->gp_part[pidx].wr_rel_set)
729 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
730 else
731 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
732 }
733 }
734
735 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
736 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
737 puts("Card does not support host controlled partition write "
738 "reliability settings\n");
739 return -EMEDIUMTYPE;
740 }
741
742 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
743 EXT_CSD_PARTITION_SETTING_COMPLETED) {
744 printf("Card already partitioned\n");
745 return -EPERM;
746 }
747
748 if (mode == MMC_HWPART_CONF_CHECK)
749 return 0;
750
751 /* Partitioning requires high-capacity size definitions */
752 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
753 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
754 EXT_CSD_ERASE_GROUP_DEF, 1);
755
756 if (err)
757 return err;
758
759 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
760
761 /* update erase group size to be high-capacity */
762 mmc->erase_grp_size =
763 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
764
765 }
766
767 /* all OK, write the configuration */
768 for (i = 0; i < 4; i++) {
769 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
770 EXT_CSD_ENH_START_ADDR+i,
771 (enh_start_addr >> (i*8)) & 0xFF);
772 if (err)
773 return err;
774 }
775 for (i = 0; i < 3; i++) {
776 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
777 EXT_CSD_ENH_SIZE_MULT+i,
778 (enh_size_mult >> (i*8)) & 0xFF);
779 if (err)
780 return err;
781 }
782 for (pidx = 0; pidx < 4; pidx++) {
783 for (i = 0; i < 3; i++) {
784 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
785 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
786 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
787 if (err)
788 return err;
789 }
790 }
791 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
792 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
793 if (err)
794 return err;
795
796 if (mode == MMC_HWPART_CONF_SET)
797 return 0;
798
799 /* The WR_REL_SET is a write-once register but shall be
800 * written before setting PART_SETTING_COMPLETED. As it is
801 * write-once we can only write it when completing the
802 * partitioning. */
803 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
804 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
805 EXT_CSD_WR_REL_SET, wr_rel_set);
806 if (err)
807 return err;
808 }
809
810 /* Setting PART_SETTING_COMPLETED confirms the partition
811 * configuration but it only becomes effective after power
812 * cycle, so we do not adjust the partition related settings
813 * in the mmc struct. */
814
815 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
816 EXT_CSD_PARTITION_SETTING,
817 EXT_CSD_PARTITION_SETTING_COMPLETED);
818 if (err)
819 return err;
820
821 return 0;
822 }
823
824 int mmc_getcd(struct mmc *mmc)
825 {
826 int cd;
827
828 cd = board_mmc_getcd(mmc);
829
830 if (cd < 0) {
831 if (mmc->cfg->ops->getcd)
832 cd = mmc->cfg->ops->getcd(mmc);
833 else
834 cd = 1;
835 }
836
837 return cd;
838 }
839
840 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
841 {
842 struct mmc_cmd cmd;
843 struct mmc_data data;
844
845 /* Switch the frequency */
846 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
847 cmd.resp_type = MMC_RSP_R1;
848 cmd.cmdarg = (mode << 31) | 0xffffff;
849 cmd.cmdarg &= ~(0xf << (group * 4));
850 cmd.cmdarg |= value << (group * 4);
851
852 data.dest = (char *)resp;
853 data.blocksize = 64;
854 data.blocks = 1;
855 data.flags = MMC_DATA_READ;
856
857 return mmc_send_cmd(mmc, &cmd, &data);
858 }
859
860
861 static int sd_change_freq(struct mmc *mmc)
862 {
863 int err;
864 struct mmc_cmd cmd;
865 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
866 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
867 struct mmc_data data;
868 int timeout;
869
870 mmc->card_caps = 0;
871
872 if (mmc_host_is_spi(mmc))
873 return 0;
874
875 /* Read the SCR to find out if this card supports higher speeds */
876 cmd.cmdidx = MMC_CMD_APP_CMD;
877 cmd.resp_type = MMC_RSP_R1;
878 cmd.cmdarg = mmc->rca << 16;
879
880 err = mmc_send_cmd(mmc, &cmd, NULL);
881
882 if (err)
883 return err;
884
885 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
886 cmd.resp_type = MMC_RSP_R1;
887 cmd.cmdarg = 0;
888
889 timeout = 3;
890
891 retry_scr:
892 data.dest = (char *)scr;
893 data.blocksize = 8;
894 data.blocks = 1;
895 data.flags = MMC_DATA_READ;
896
897 err = mmc_send_cmd(mmc, &cmd, &data);
898
899 if (err) {
900 if (timeout--)
901 goto retry_scr;
902
903 return err;
904 }
905
906 mmc->scr[0] = __be32_to_cpu(scr[0]);
907 mmc->scr[1] = __be32_to_cpu(scr[1]);
908
909 switch ((mmc->scr[0] >> 24) & 0xf) {
910 case 0:
911 mmc->version = SD_VERSION_1_0;
912 break;
913 case 1:
914 mmc->version = SD_VERSION_1_10;
915 break;
916 case 2:
917 mmc->version = SD_VERSION_2;
918 if ((mmc->scr[0] >> 15) & 0x1)
919 mmc->version = SD_VERSION_3;
920 break;
921 default:
922 mmc->version = SD_VERSION_1_0;
923 break;
924 }
925
926 if (mmc->scr[0] & SD_DATA_4BIT)
927 mmc->card_caps |= MMC_MODE_4BIT;
928
929 /* Version 1.0 doesn't support switching */
930 if (mmc->version == SD_VERSION_1_0)
931 return 0;
932
933 timeout = 4;
934 while (timeout--) {
935 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
936 (u8 *)switch_status);
937
938 if (err)
939 return err;
940
941 /* The high-speed function is busy. Try again */
942 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
943 break;
944 }
945
946 /* If high-speed isn't supported, we return */
947 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
948 return 0;
949
950 /*
951 * If the host doesn't support SD_HIGHSPEED, do not switch card to
952 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
953 * This can avoid furthur problem when the card runs in different
954 * mode between the host.
955 */
956 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
957 (mmc->cfg->host_caps & MMC_MODE_HS)))
958 return 0;
959
960 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
961
962 if (err)
963 return err;
964
965 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
966 mmc->card_caps |= MMC_MODE_HS;
967
968 return 0;
969 }
970
971 /* frequency bases */
972 /* divided by 10 to be nice to platforms without floating point */
973 static const int fbase[] = {
974 10000,
975 100000,
976 1000000,
977 10000000,
978 };
979
980 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
981 * to platforms without floating point.
982 */
983 static const int multipliers[] = {
984 0, /* reserved */
985 10,
986 12,
987 13,
988 15,
989 20,
990 25,
991 30,
992 35,
993 40,
994 45,
995 50,
996 55,
997 60,
998 70,
999 80,
1000 };
1001
1002 static void mmc_set_ios(struct mmc *mmc)
1003 {
1004 if (mmc->cfg->ops->set_ios)
1005 mmc->cfg->ops->set_ios(mmc);
1006 }
1007
1008 void mmc_set_clock(struct mmc *mmc, uint clock)
1009 {
1010 if (clock > mmc->cfg->f_max)
1011 clock = mmc->cfg->f_max;
1012
1013 if (clock < mmc->cfg->f_min)
1014 clock = mmc->cfg->f_min;
1015
1016 mmc->clock = clock;
1017
1018 mmc_set_ios(mmc);
1019 }
1020
1021 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1022 {
1023 mmc->bus_width = width;
1024
1025 mmc_set_ios(mmc);
1026 }
1027
1028 static int mmc_startup(struct mmc *mmc)
1029 {
1030 int err, i;
1031 uint mult, freq;
1032 u64 cmult, csize, capacity;
1033 struct mmc_cmd cmd;
1034 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1035 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1036 int timeout = 1000;
1037 bool has_parts = false;
1038 bool part_completed;
1039
1040 #ifdef CONFIG_MMC_SPI_CRC_ON
1041 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1042 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1043 cmd.resp_type = MMC_RSP_R1;
1044 cmd.cmdarg = 1;
1045 err = mmc_send_cmd(mmc, &cmd, NULL);
1046
1047 if (err)
1048 return err;
1049 }
1050 #endif
1051
1052 /* Put the Card in Identify Mode */
1053 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1054 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1055 cmd.resp_type = MMC_RSP_R2;
1056 cmd.cmdarg = 0;
1057
1058 err = mmc_send_cmd(mmc, &cmd, NULL);
1059
1060 if (err)
1061 return err;
1062
1063 memcpy(mmc->cid, cmd.response, 16);
1064
1065 /*
1066 * For MMC cards, set the Relative Address.
1067 * For SD cards, get the Relatvie Address.
1068 * This also puts the cards into Standby State
1069 */
1070 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1071 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1072 cmd.cmdarg = mmc->rca << 16;
1073 cmd.resp_type = MMC_RSP_R6;
1074
1075 err = mmc_send_cmd(mmc, &cmd, NULL);
1076
1077 if (err)
1078 return err;
1079
1080 if (IS_SD(mmc))
1081 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1082 }
1083
1084 /* Get the Card-Specific Data */
1085 cmd.cmdidx = MMC_CMD_SEND_CSD;
1086 cmd.resp_type = MMC_RSP_R2;
1087 cmd.cmdarg = mmc->rca << 16;
1088
1089 err = mmc_send_cmd(mmc, &cmd, NULL);
1090
1091 /* Waiting for the ready status */
1092 mmc_send_status(mmc, timeout);
1093
1094 if (err)
1095 return err;
1096
1097 mmc->csd[0] = cmd.response[0];
1098 mmc->csd[1] = cmd.response[1];
1099 mmc->csd[2] = cmd.response[2];
1100 mmc->csd[3] = cmd.response[3];
1101
1102 if (mmc->version == MMC_VERSION_UNKNOWN) {
1103 int version = (cmd.response[0] >> 26) & 0xf;
1104
1105 switch (version) {
1106 case 0:
1107 mmc->version = MMC_VERSION_1_2;
1108 break;
1109 case 1:
1110 mmc->version = MMC_VERSION_1_4;
1111 break;
1112 case 2:
1113 mmc->version = MMC_VERSION_2_2;
1114 break;
1115 case 3:
1116 mmc->version = MMC_VERSION_3;
1117 break;
1118 case 4:
1119 mmc->version = MMC_VERSION_4;
1120 break;
1121 default:
1122 mmc->version = MMC_VERSION_1_2;
1123 break;
1124 }
1125 }
1126
1127 /* divide frequency by 10, since the mults are 10x bigger */
1128 freq = fbase[(cmd.response[0] & 0x7)];
1129 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1130
1131 mmc->tran_speed = freq * mult;
1132
1133 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1134 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1135
1136 if (IS_SD(mmc))
1137 mmc->write_bl_len = mmc->read_bl_len;
1138 else
1139 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1140
1141 if (mmc->high_capacity) {
1142 csize = (mmc->csd[1] & 0x3f) << 16
1143 | (mmc->csd[2] & 0xffff0000) >> 16;
1144 cmult = 8;
1145 } else {
1146 csize = (mmc->csd[1] & 0x3ff) << 2
1147 | (mmc->csd[2] & 0xc0000000) >> 30;
1148 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1149 }
1150
1151 mmc->capacity_user = (csize + 1) << (cmult + 2);
1152 mmc->capacity_user *= mmc->read_bl_len;
1153 mmc->capacity_boot = 0;
1154 mmc->capacity_rpmb = 0;
1155 for (i = 0; i < 4; i++)
1156 mmc->capacity_gp[i] = 0;
1157
1158 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1159 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1160
1161 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1162 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1163
1164 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1165 cmd.cmdidx = MMC_CMD_SET_DSR;
1166 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1167 cmd.resp_type = MMC_RSP_NONE;
1168 if (mmc_send_cmd(mmc, &cmd, NULL))
1169 printf("MMC: SET_DSR failed\n");
1170 }
1171
1172 /* Select the card, and put it into Transfer Mode */
1173 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1174 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1175 cmd.resp_type = MMC_RSP_R1;
1176 cmd.cmdarg = mmc->rca << 16;
1177 err = mmc_send_cmd(mmc, &cmd, NULL);
1178
1179 if (err)
1180 return err;
1181 }
1182
1183 /*
1184 * For SD, its erase group is always one sector
1185 */
1186 mmc->erase_grp_size = 1;
1187 mmc->part_config = MMCPART_NOAVAILABLE;
1188 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1189 /* check ext_csd version and capacity */
1190 err = mmc_send_ext_csd(mmc, ext_csd);
1191 if (err)
1192 return err;
1193 if (ext_csd[EXT_CSD_REV] >= 2) {
1194 /*
1195 * According to the JEDEC Standard, the value of
1196 * ext_csd's capacity is valid if the value is more
1197 * than 2GB
1198 */
1199 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1200 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1201 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1202 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1203 capacity *= MMC_MAX_BLOCK_LEN;
1204 if ((capacity >> 20) > 2 * 1024)
1205 mmc->capacity_user = capacity;
1206 }
1207
1208 switch (ext_csd[EXT_CSD_REV]) {
1209 case 1:
1210 mmc->version = MMC_VERSION_4_1;
1211 break;
1212 case 2:
1213 mmc->version = MMC_VERSION_4_2;
1214 break;
1215 case 3:
1216 mmc->version = MMC_VERSION_4_3;
1217 break;
1218 case 5:
1219 mmc->version = MMC_VERSION_4_41;
1220 break;
1221 case 6:
1222 mmc->version = MMC_VERSION_4_5;
1223 break;
1224 case 7:
1225 mmc->version = MMC_VERSION_5_0;
1226 break;
1227 }
1228
1229 /* The partition data may be non-zero but it is only
1230 * effective if PARTITION_SETTING_COMPLETED is set in
1231 * EXT_CSD, so ignore any data if this bit is not set,
1232 * except for enabling the high-capacity group size
1233 * definition (see below). */
1234 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1235 EXT_CSD_PARTITION_SETTING_COMPLETED);
1236
1237 /* store the partition info of emmc */
1238 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1239 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1240 ext_csd[EXT_CSD_BOOT_MULT])
1241 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1242 if (part_completed &&
1243 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1244 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1245
1246 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1247
1248 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1249
1250 for (i = 0; i < 4; i++) {
1251 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1252 uint mult = (ext_csd[idx + 2] << 16) +
1253 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1254 if (mult)
1255 has_parts = true;
1256 if (!part_completed)
1257 continue;
1258 mmc->capacity_gp[i] = mult;
1259 mmc->capacity_gp[i] *=
1260 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1261 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1262 mmc->capacity_gp[i] <<= 19;
1263 }
1264
1265 if (part_completed) {
1266 mmc->enh_user_size =
1267 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1268 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1269 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1270 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1271 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1272 mmc->enh_user_size <<= 19;
1273 mmc->enh_user_start =
1274 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1275 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1276 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1277 ext_csd[EXT_CSD_ENH_START_ADDR];
1278 if (mmc->high_capacity)
1279 mmc->enh_user_start <<= 9;
1280 }
1281
1282 /*
1283 * Host needs to enable ERASE_GRP_DEF bit if device is
1284 * partitioned. This bit will be lost every time after a reset
1285 * or power off. This will affect erase size.
1286 */
1287 if (part_completed)
1288 has_parts = true;
1289 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1290 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1291 has_parts = true;
1292 if (has_parts) {
1293 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1294 EXT_CSD_ERASE_GROUP_DEF, 1);
1295
1296 if (err)
1297 return err;
1298 else
1299 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1300 }
1301
1302 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1303 /* Read out group size from ext_csd */
1304 mmc->erase_grp_size =
1305 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1306 /*
1307 * if high capacity and partition setting completed
1308 * SEC_COUNT is valid even if it is smaller than 2 GiB
1309 * JEDEC Standard JESD84-B45, 6.2.4
1310 */
1311 if (mmc->high_capacity && part_completed) {
1312 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1313 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1314 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1315 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1316 capacity *= MMC_MAX_BLOCK_LEN;
1317 mmc->capacity_user = capacity;
1318 }
1319 } else {
1320 /* Calculate the group size from the csd value. */
1321 int erase_gsz, erase_gmul;
1322 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1323 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1324 mmc->erase_grp_size = (erase_gsz + 1)
1325 * (erase_gmul + 1);
1326 }
1327
1328 mmc->hc_wp_grp_size = 1024
1329 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1330 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1331
1332 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1333 }
1334
1335 err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
1336 if (err)
1337 return err;
1338
1339 if (IS_SD(mmc))
1340 err = sd_change_freq(mmc);
1341 else
1342 err = mmc_change_freq(mmc);
1343
1344 if (err)
1345 return err;
1346
1347 /* Restrict card's capabilities by what the host can do */
1348 mmc->card_caps &= mmc->cfg->host_caps;
1349
1350 if (IS_SD(mmc)) {
1351 if (mmc->card_caps & MMC_MODE_4BIT) {
1352 cmd.cmdidx = MMC_CMD_APP_CMD;
1353 cmd.resp_type = MMC_RSP_R1;
1354 cmd.cmdarg = mmc->rca << 16;
1355
1356 err = mmc_send_cmd(mmc, &cmd, NULL);
1357 if (err)
1358 return err;
1359
1360 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1361 cmd.resp_type = MMC_RSP_R1;
1362 cmd.cmdarg = 2;
1363 err = mmc_send_cmd(mmc, &cmd, NULL);
1364 if (err)
1365 return err;
1366
1367 mmc_set_bus_width(mmc, 4);
1368 }
1369
1370 if (mmc->card_caps & MMC_MODE_HS)
1371 mmc->tran_speed = 50000000;
1372 else
1373 mmc->tran_speed = 25000000;
1374 } else if (mmc->version >= MMC_VERSION_4) {
1375 /* Only version 4 of MMC supports wider bus widths */
1376 int idx;
1377
1378 /* An array of possible bus widths in order of preference */
1379 static unsigned ext_csd_bits[] = {
1380 EXT_CSD_DDR_BUS_WIDTH_8,
1381 EXT_CSD_DDR_BUS_WIDTH_4,
1382 EXT_CSD_BUS_WIDTH_8,
1383 EXT_CSD_BUS_WIDTH_4,
1384 EXT_CSD_BUS_WIDTH_1,
1385 };
1386
1387 /* An array to map CSD bus widths to host cap bits */
1388 static unsigned ext_to_hostcaps[] = {
1389 [EXT_CSD_DDR_BUS_WIDTH_4] =
1390 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1391 [EXT_CSD_DDR_BUS_WIDTH_8] =
1392 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1393 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1394 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1395 };
1396
1397 /* An array to map chosen bus width to an integer */
1398 static unsigned widths[] = {
1399 8, 4, 8, 4, 1,
1400 };
1401
1402 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1403 unsigned int extw = ext_csd_bits[idx];
1404 unsigned int caps = ext_to_hostcaps[extw];
1405
1406 /*
1407 * If the bus width is still not changed,
1408 * don't try to set the default again.
1409 * Otherwise, recover from switch attempts
1410 * by switching to 1-bit bus width.
1411 */
1412 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1413 mmc->bus_width == 1) {
1414 err = 0;
1415 break;
1416 }
1417
1418 /*
1419 * Check to make sure the card and controller support
1420 * these capabilities
1421 */
1422 if ((mmc->card_caps & caps) != caps)
1423 continue;
1424
1425 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1426 EXT_CSD_BUS_WIDTH, extw);
1427
1428 if (err)
1429 continue;
1430
1431 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1432 mmc_set_bus_width(mmc, widths[idx]);
1433
1434 err = mmc_send_ext_csd(mmc, test_csd);
1435
1436 if (err)
1437 continue;
1438
1439 /* Only compare read only fields */
1440 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1441 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1442 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1443 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1444 ext_csd[EXT_CSD_REV]
1445 == test_csd[EXT_CSD_REV] &&
1446 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1447 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1448 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1449 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1450 break;
1451 else
1452 err = SWITCH_ERR;
1453 }
1454
1455 if (err)
1456 return err;
1457
1458 if (mmc->card_caps & MMC_MODE_HS) {
1459 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1460 mmc->tran_speed = 52000000;
1461 else
1462 mmc->tran_speed = 26000000;
1463 }
1464 }
1465
1466 mmc_set_clock(mmc, mmc->tran_speed);
1467
1468 /* Fix the block length for DDR mode */
1469 if (mmc->ddr_mode) {
1470 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1471 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1472 }
1473
1474 /* fill in device description */
1475 mmc->block_dev.lun = 0;
1476 mmc->block_dev.hwpart = 0;
1477 mmc->block_dev.type = 0;
1478 mmc->block_dev.blksz = mmc->read_bl_len;
1479 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1480 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1481 #if !defined(CONFIG_SPL_BUILD) || \
1482 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1483 !defined(CONFIG_USE_TINY_PRINTF))
1484 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1485 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1486 (mmc->cid[3] >> 16) & 0xffff);
1487 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1488 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1489 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1490 (mmc->cid[2] >> 24) & 0xff);
1491 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1492 (mmc->cid[2] >> 16) & 0xf);
1493 #else
1494 mmc->block_dev.vendor[0] = 0;
1495 mmc->block_dev.product[0] = 0;
1496 mmc->block_dev.revision[0] = 0;
1497 #endif
1498 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1499 part_init(&mmc->block_dev);
1500 #endif
1501
1502 return 0;
1503 }
1504
1505 static int mmc_send_if_cond(struct mmc *mmc)
1506 {
1507 struct mmc_cmd cmd;
1508 int err;
1509
1510 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1511 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1512 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1513 cmd.resp_type = MMC_RSP_R7;
1514
1515 err = mmc_send_cmd(mmc, &cmd, NULL);
1516
1517 if (err)
1518 return err;
1519
1520 if ((cmd.response[0] & 0xff) != 0xaa)
1521 return UNUSABLE_ERR;
1522 else
1523 mmc->version = SD_VERSION_2;
1524
1525 return 0;
1526 }
1527
1528 /* not used any more */
1529 int __deprecated mmc_register(struct mmc *mmc)
1530 {
1531 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1532 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1533 #endif
1534 return -1;
1535 }
1536
1537 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1538 {
1539 struct mmc *mmc;
1540
1541 /* quick validation */
1542 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1543 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1544 return NULL;
1545
1546 mmc = calloc(1, sizeof(*mmc));
1547 if (mmc == NULL)
1548 return NULL;
1549
1550 mmc->cfg = cfg;
1551 mmc->priv = priv;
1552
1553 /* the following chunk was mmc_register() */
1554
1555 /* Setup dsr related values */
1556 mmc->dsr_imp = 0;
1557 mmc->dsr = 0xffffffff;
1558 /* Setup the universal parts of the block interface just once */
1559 mmc->block_dev.if_type = IF_TYPE_MMC;
1560 mmc->block_dev.devnum = cur_dev_num++;
1561 mmc->block_dev.removable = 1;
1562 mmc->block_dev.block_read = mmc_bread;
1563 mmc->block_dev.block_write = mmc_bwrite;
1564 mmc->block_dev.block_erase = mmc_berase;
1565
1566 /* setup initial part type */
1567 mmc->block_dev.part_type = mmc->cfg->part_type;
1568
1569 INIT_LIST_HEAD(&mmc->link);
1570
1571 list_add_tail(&mmc->link, &mmc_devices);
1572
1573 return mmc;
1574 }
1575
1576 void mmc_destroy(struct mmc *mmc)
1577 {
1578 /* only freeing memory for now */
1579 free(mmc);
1580 }
1581
1582 static int mmc_get_dev(int dev, struct blk_desc **descp)
1583 {
1584 struct mmc *mmc = find_mmc_device(dev);
1585 int ret;
1586
1587 if (!mmc)
1588 return -ENODEV;
1589 ret = mmc_init(mmc);
1590 if (ret)
1591 return ret;
1592
1593 *descp = &mmc->block_dev;
1594
1595 return 0;
1596 }
1597
1598 /* board-specific MMC power initializations. */
1599 __weak void board_mmc_power_init(void)
1600 {
1601 }
1602
1603 int mmc_start_init(struct mmc *mmc)
1604 {
1605 int err;
1606
1607 /* we pretend there's no card when init is NULL */
1608 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1609 mmc->has_init = 0;
1610 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1611 printf("MMC: no card present\n");
1612 #endif
1613 return NO_CARD_ERR;
1614 }
1615
1616 if (mmc->has_init)
1617 return 0;
1618
1619 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1620 mmc_adapter_card_type_ident();
1621 #endif
1622 board_mmc_power_init();
1623
1624 /* made sure it's not NULL earlier */
1625 err = mmc->cfg->ops->init(mmc);
1626
1627 if (err)
1628 return err;
1629
1630 mmc->ddr_mode = 0;
1631 mmc_set_bus_width(mmc, 1);
1632 mmc_set_clock(mmc, 1);
1633
1634 /* Reset the Card */
1635 err = mmc_go_idle(mmc);
1636
1637 if (err)
1638 return err;
1639
1640 /* The internal partition reset to user partition(0) at every CMD0*/
1641 mmc->block_dev.hwpart = 0;
1642
1643 /* Test for SD version 2 */
1644 err = mmc_send_if_cond(mmc);
1645
1646 /* Now try to get the SD card's operating condition */
1647 err = sd_send_op_cond(mmc);
1648
1649 /* If the command timed out, we check for an MMC card */
1650 if (err == TIMEOUT) {
1651 err = mmc_send_op_cond(mmc);
1652
1653 if (err) {
1654 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1655 printf("Card did not respond to voltage select!\n");
1656 #endif
1657 return UNUSABLE_ERR;
1658 }
1659 }
1660
1661 if (!err)
1662 mmc->init_in_progress = 1;
1663
1664 return err;
1665 }
1666
1667 static int mmc_complete_init(struct mmc *mmc)
1668 {
1669 int err = 0;
1670
1671 mmc->init_in_progress = 0;
1672 if (mmc->op_cond_pending)
1673 err = mmc_complete_op_cond(mmc);
1674
1675 if (!err)
1676 err = mmc_startup(mmc);
1677 if (err)
1678 mmc->has_init = 0;
1679 else
1680 mmc->has_init = 1;
1681 return err;
1682 }
1683
1684 int mmc_init(struct mmc *mmc)
1685 {
1686 int err = 0;
1687 unsigned start;
1688
1689 if (mmc->has_init)
1690 return 0;
1691
1692 start = get_timer(0);
1693
1694 if (!mmc->init_in_progress)
1695 err = mmc_start_init(mmc);
1696
1697 if (!err)
1698 err = mmc_complete_init(mmc);
1699 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1700 return err;
1701 }
1702
1703 int mmc_set_dsr(struct mmc *mmc, u16 val)
1704 {
1705 mmc->dsr = val;
1706 return 0;
1707 }
1708
1709 /* CPU-specific MMC initializations */
1710 __weak int cpu_mmc_init(bd_t *bis)
1711 {
1712 return -1;
1713 }
1714
1715 /* board-specific MMC initializations. */
1716 __weak int board_mmc_init(bd_t *bis)
1717 {
1718 return -1;
1719 }
1720
1721 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1722
1723 void print_mmc_devices(char separator)
1724 {
1725 struct mmc *m;
1726 struct list_head *entry;
1727 char *mmc_type;
1728
1729 list_for_each(entry, &mmc_devices) {
1730 m = list_entry(entry, struct mmc, link);
1731
1732 if (m->has_init)
1733 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1734 else
1735 mmc_type = NULL;
1736
1737 printf("%s: %d", m->cfg->name, m->block_dev.devnum);
1738 if (mmc_type)
1739 printf(" (%s)", mmc_type);
1740
1741 if (entry->next != &mmc_devices) {
1742 printf("%c", separator);
1743 if (separator != '\n')
1744 puts (" ");
1745 }
1746 }
1747
1748 printf("\n");
1749 }
1750
1751 #else
1752 void print_mmc_devices(char separator) { }
1753 #endif
1754
1755 int get_mmc_num(void)
1756 {
1757 return cur_dev_num;
1758 }
1759
1760 void mmc_set_preinit(struct mmc *mmc, int preinit)
1761 {
1762 mmc->preinit = preinit;
1763 }
1764
1765 static void do_preinit(void)
1766 {
1767 struct mmc *m;
1768 struct list_head *entry;
1769
1770 list_for_each(entry, &mmc_devices) {
1771 m = list_entry(entry, struct mmc, link);
1772
1773 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1774 mmc_set_preinit(m, 1);
1775 #endif
1776 if (m->preinit)
1777 mmc_start_init(m);
1778 }
1779 }
1780
1781 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1782 static int mmc_probe(bd_t *bis)
1783 {
1784 return 0;
1785 }
1786 #elif defined(CONFIG_DM_MMC)
1787 static int mmc_probe(bd_t *bis)
1788 {
1789 int ret, i;
1790 struct uclass *uc;
1791 struct udevice *dev;
1792
1793 ret = uclass_get(UCLASS_MMC, &uc);
1794 if (ret)
1795 return ret;
1796
1797 /*
1798 * Try to add them in sequence order. Really with driver model we
1799 * should allow holes, but the current MMC list does not allow that.
1800 * So if we request 0, 1, 3 we will get 0, 1, 2.
1801 */
1802 for (i = 0; ; i++) {
1803 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1804 if (ret == -ENODEV)
1805 break;
1806 }
1807 uclass_foreach_dev(dev, uc) {
1808 ret = device_probe(dev);
1809 if (ret)
1810 printf("%s - probe failed: %d\n", dev->name, ret);
1811 }
1812
1813 return 0;
1814 }
1815 #else
1816 static int mmc_probe(bd_t *bis)
1817 {
1818 if (board_mmc_init(bis) < 0)
1819 cpu_mmc_init(bis);
1820
1821 return 0;
1822 }
1823 #endif
1824
1825 int mmc_initialize(bd_t *bis)
1826 {
1827 static int initialized = 0;
1828 int ret;
1829 if (initialized) /* Avoid initializing mmc multiple times */
1830 return 0;
1831 initialized = 1;
1832
1833 INIT_LIST_HEAD (&mmc_devices);
1834 cur_dev_num = 0;
1835
1836 ret = mmc_probe(bis);
1837 if (ret)
1838 return ret;
1839
1840 #ifndef CONFIG_SPL_BUILD
1841 print_mmc_devices(',');
1842 #endif
1843
1844 do_preinit();
1845 return 0;
1846 }
1847
1848 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1849 /*
1850 * This function changes the size of boot partition and the size of rpmb
1851 * partition present on EMMC devices.
1852 *
1853 * Input Parameters:
1854 * struct *mmc: pointer for the mmc device strcuture
1855 * bootsize: size of boot partition
1856 * rpmbsize: size of rpmb partition
1857 *
1858 * Returns 0 on success.
1859 */
1860
1861 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1862 unsigned long rpmbsize)
1863 {
1864 int err;
1865 struct mmc_cmd cmd;
1866
1867 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1868 cmd.cmdidx = MMC_CMD_RES_MAN;
1869 cmd.resp_type = MMC_RSP_R1b;
1870 cmd.cmdarg = MMC_CMD62_ARG1;
1871
1872 err = mmc_send_cmd(mmc, &cmd, NULL);
1873 if (err) {
1874 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1875 return err;
1876 }
1877
1878 /* Boot partition changing mode */
1879 cmd.cmdidx = MMC_CMD_RES_MAN;
1880 cmd.resp_type = MMC_RSP_R1b;
1881 cmd.cmdarg = MMC_CMD62_ARG2;
1882
1883 err = mmc_send_cmd(mmc, &cmd, NULL);
1884 if (err) {
1885 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1886 return err;
1887 }
1888 /* boot partition size is multiple of 128KB */
1889 bootsize = (bootsize * 1024) / 128;
1890
1891 /* Arg: boot partition size */
1892 cmd.cmdidx = MMC_CMD_RES_MAN;
1893 cmd.resp_type = MMC_RSP_R1b;
1894 cmd.cmdarg = bootsize;
1895
1896 err = mmc_send_cmd(mmc, &cmd, NULL);
1897 if (err) {
1898 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1899 return err;
1900 }
1901 /* RPMB partition size is multiple of 128KB */
1902 rpmbsize = (rpmbsize * 1024) / 128;
1903 /* Arg: RPMB partition size */
1904 cmd.cmdidx = MMC_CMD_RES_MAN;
1905 cmd.resp_type = MMC_RSP_R1b;
1906 cmd.cmdarg = rpmbsize;
1907
1908 err = mmc_send_cmd(mmc, &cmd, NULL);
1909 if (err) {
1910 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1911 return err;
1912 }
1913 return 0;
1914 }
1915
1916 /*
1917 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1918 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1919 * and BOOT_MODE.
1920 *
1921 * Returns 0 on success.
1922 */
1923 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1924 {
1925 int err;
1926
1927 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1928 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1929 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1930 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1931
1932 if (err)
1933 return err;
1934 return 0;
1935 }
1936
1937 /*
1938 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1939 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1940 * PARTITION_ACCESS.
1941 *
1942 * Returns 0 on success.
1943 */
1944 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1945 {
1946 int err;
1947
1948 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1949 EXT_CSD_BOOT_ACK(ack) |
1950 EXT_CSD_BOOT_PART_NUM(part_num) |
1951 EXT_CSD_PARTITION_ACCESS(access));
1952
1953 if (err)
1954 return err;
1955 return 0;
1956 }
1957
1958 /*
1959 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1960 * for enable. Note that this is a write-once field for non-zero values.
1961 *
1962 * Returns 0 on success.
1963 */
1964 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1965 {
1966 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1967 enable);
1968 }
1969 #endif
1970
1971 U_BOOT_LEGACY_BLK(mmc) = {
1972 .if_typename = "mmc",
1973 .if_type = IF_TYPE_MMC,
1974 .max_devs = -1,
1975 .get_dev = mmc_get_dev,
1976 };
"Das U-Boot" Source Tree