2 * Andestech ATFSDC010 SD/MMC driver
5 * Rick Chen, NDS32 Software Engineering, rick@andestech.com
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <dt-structs.h>
19 #include <linux/err.h>
20 #include <faraday/ftsdc010.h>
21 #include "ftsdc010_mci.h"
23 DECLARE_GLOBAL_DATA_PTR
;
25 #if CONFIG_IS_ENABLED(OF_PLATDATA)
28 bool cap_mmc_highspeed
;
29 bool cap_sd_highspeed
;
30 fdt32_t clock_freq_min_max
[2];
31 struct phandle_2_cell clocks
[4];
38 #if CONFIG_IS_ENABLED(OF_PLATDATA)
39 struct nds_mmc dtplat
;
41 struct mmc_config cfg
;
47 struct ftsdc010_chip chip
;
53 static int nds32_mmc_ofdata_to_platdata(struct udevice
*dev
)
55 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
56 struct ftsdc_priv
*priv
= dev_get_priv(dev
);
57 struct ftsdc010_chip
*chip
= &priv
->chip
;
58 chip
->name
= dev
->name
;
59 chip
->ioaddr
= (void *)devfdt_get_addr(dev
);
60 chip
->buswidth
= fdtdec_get_int(gd
->fdt_blob
, dev_of_offset(dev
),
63 priv
->fifo_depth
= fdtdec_get_int(gd
->fdt_blob
, dev_of_offset(dev
),
65 priv
->fifo_mode
= fdtdec_get_bool(gd
->fdt_blob
, dev_of_offset(dev
),
67 if (fdtdec_get_int_array(gd
->fdt_blob
, dev_of_offset(dev
),
68 "clock-freq-min-max", priv
->minmax
, 2)) {
69 int val
= fdtdec_get_int(gd
->fdt_blob
, dev_of_offset(dev
),
70 "max-frequency", -EINVAL
);
74 priv
->minmax
[0] = 400000; /* 400 kHz */
75 priv
->minmax
[1] = val
;
77 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
81 chip
->sclk
= priv
->minmax
[1];
82 chip
->regs
= chip
->ioaddr
;
86 static int nds32_mmc_probe(struct udevice
*dev
)
88 struct nds_mmc_plat
*plat
= dev_get_platdata(dev
);
89 struct mmc_uclass_priv
*upriv
= dev_get_uclass_priv(dev
);
90 struct ftsdc_priv
*priv
= dev_get_priv(dev
);
91 struct ftsdc010_chip
*chip
= &priv
->chip
;
92 struct udevice
*pwr_dev __maybe_unused
;
93 #if CONFIG_IS_ENABLED(OF_PLATDATA)
95 struct nds_mmc
*dtplat
= &plat
->dtplat
;
96 chip
->name
= dev
->name
;
97 chip
->ioaddr
= map_sysmem(dtplat
->reg
[0], dtplat
->reg
[1]);
98 chip
->buswidth
= dtplat
->bus_width
;
101 memcpy(priv
->minmax
, dtplat
->clock_freq_min_max
, sizeof(priv
->minmax
));
102 ret
= clk_get_by_index_platdata(dev
, 0, dtplat
->clocks
, &priv
->clk
);
106 ftsdc_setup_cfg(&plat
->cfg
, dev
->name
, chip
->buswidth
, chip
->caps
,
107 priv
->minmax
[1] , priv
->minmax
[0]);
108 chip
->mmc
= &plat
->mmc
;
109 chip
->mmc
->priv
= &priv
->chip
;
110 chip
->mmc
->dev
= dev
;
111 upriv
->mmc
= chip
->mmc
;
112 return ftsdc010_probe(dev
);
115 static int nds32_mmc_bind(struct udevice
*dev
)
117 struct nds_mmc_plat
*plat
= dev_get_platdata(dev
);
118 return ftsdc010_bind(dev
, &plat
->mmc
, &plat
->cfg
);
121 static const struct udevice_id nds32_mmc_ids
[] = {
122 { .compatible
= "andestech,atsdc010" },
126 U_BOOT_DRIVER(nds32_mmc_drv
) = {
129 .of_match
= nds32_mmc_ids
,
130 .ofdata_to_platdata
= nds32_mmc_ofdata_to_platdata
,
131 .ops
= &dm_ftsdc010_ops
,
132 .bind
= nds32_mmc_bind
,
133 .probe
= nds32_mmc_probe
,
134 .priv_auto_alloc_size
= sizeof(struct ftsdc_priv
),
135 .platdata_auto_alloc_size
= sizeof(struct nds_mmc_plat
),