drivers/mmc/pxa_mmc_gen.c

   1 /*
   2  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
   3  *
   4  * Loosely based on the old code and Linux's PXA MMC driver
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #include <config.h>
  23 #include <common.h>
  24 #include <malloc.h>
  25
  26 #include <mmc.h>
  27 #include <asm/errno.h>
  28 #include <asm/arch/hardware.h>
  29 #include <asm/arch/regs-mmc.h>
  30 #include <asm/io.h>
  31
  32 /* PXAMMC Generic default config for various CPUs */
  33 #if defined(CONFIG_CPU_PXA25X)
  34 #define PXAMMC_FIFO_SIZE        1
  35 #define PXAMMC_MIN_SPEED        312500
  36 #define PXAMMC_MAX_SPEED        20000000
  37 #define PXAMMC_HOST_CAPS        (0)
  38 #elif defined(CONFIG_CPU_PXA27X)
  39 #define PXAMMC_CRC_SKIP
  40 #define PXAMMC_FIFO_SIZE        32
  41 #define PXAMMC_MIN_SPEED        304000
  42 #define PXAMMC_MAX_SPEED        19500000
  43 #define PXAMMC_HOST_CAPS        (MMC_MODE_4BIT)
  44 #elif defined(CONFIG_CPU_MONAHANS)
  45 #define PXAMMC_FIFO_SIZE        32
  46 #define PXAMMC_MIN_SPEED        304000
  47 #define PXAMMC_MAX_SPEED        26000000
  48 #define PXAMMC_HOST_CAPS        (MMC_MODE_4BIT | MMC_MODE_HS)
  49 #else
  50 #error "This CPU isn't supported by PXA MMC!"
  51 #endif
  52
  53 #define MMC_STAT_ERRORS                                                 \
  54         (MMC_STAT_RES_CRC_ERROR | MMC_STAT_SPI_READ_ERROR_TOKEN |       \
  55         MMC_STAT_CRC_READ_ERROR | MMC_STAT_TIME_OUT_RESPONSE |          \
  56         MMC_STAT_READ_TIME_OUT | MMC_STAT_CRC_WRITE_ERROR)
  57
  58 /* 1 millisecond (in wait cycles below it's 100 x 10uS waits) */
  59 #define PXA_MMC_TIMEOUT 100
  60
  61 struct pxa_mmc_priv {
  62         struct pxa_mmc_regs *regs;
  63 };
  64
  65 /* Wait for bit to be set */
  66 static int pxa_mmc_wait(struct mmc *mmc, uint32_t mask)
  67 {
  68         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
  69         struct pxa_mmc_regs *regs = priv->regs;
  70         unsigned int timeout = PXA_MMC_TIMEOUT;
  71
  72         /* Wait for bit to be set */
  73         while (--timeout) {
  74                 if (readl(&regs->stat) & mask)
  75                         break;
  76                 udelay(10);
  77         }
  78
  79         if (!timeout)
  80                 return -ETIMEDOUT;
  81
  82         return 0;
  83 }
  84
  85 static int pxa_mmc_stop_clock(struct mmc *mmc)
  86 {
  87         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
  88         struct pxa_mmc_regs *regs = priv->regs;
  89         unsigned int timeout = PXA_MMC_TIMEOUT;
  90
  91         /* If the clock aren't running, exit */
  92         if (!(readl(&regs->stat) & MMC_STAT_CLK_EN))
  93                 return 0;
  94
  95         /* Tell the controller to turn off the clock */
  96         writel(MMC_STRPCL_STOP_CLK, &regs->strpcl);
  97
  98         /* Wait until the clock are off */
  99         while (--timeout) {
 100                 if (!(readl(&regs->stat) & MMC_STAT_CLK_EN))
 101                         break;
 102                 udelay(10);
 103         }
 104
 105         /* The clock refused to stop, scream and die a painful death */
 106         if (!timeout)
 107                 return -ETIMEDOUT;
 108
 109         /* The clock stopped correctly */
 110         return 0;
 111 }
 112
 113 static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 114                                 uint32_t cmdat)
 115 {
 116         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 117         struct pxa_mmc_regs *regs = priv->regs;
 118         int ret;
 119
 120         /* The card can send a "busy" response */
 121         if (cmd->resp_type & MMC_RSP_BUSY)
 122                 cmdat |= MMC_CMDAT_BUSY;
 123
 124         /* Inform the controller about response type */
 125         switch (cmd->resp_type) {
 126         case MMC_RSP_R1:
 127         case MMC_RSP_R1b:
 128                 cmdat |= MMC_CMDAT_R1;
 129                 break;
 130         case MMC_RSP_R2:
 131                 cmdat |= MMC_CMDAT_R2;
 132                 break;
 133         case MMC_RSP_R3:
 134                 cmdat |= MMC_CMDAT_R3;
 135                 break;
 136         default:
 137                 break;
 138         }
 139
 140         /* Load command and it's arguments into the controller */
 141         writel(cmd->cmdidx, &regs->cmd);
 142         writel(cmd->cmdarg >> 16, &regs->argh);
 143         writel(cmd->cmdarg & 0xffff, &regs->argl);
 144         writel(cmdat, &regs->cmdat);
 145
 146         /* Start the controller clock and wait until they are started */
 147         writel(MMC_STRPCL_START_CLK, &regs->strpcl);
 148
 149         ret = pxa_mmc_wait(mmc, MMC_STAT_CLK_EN);
 150         if (ret)
 151                 return ret;
 152
 153         /* Correct and happy end */
 154         return 0;
 155 }
 156
 157 static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd)
 158 {
 159         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 160         struct pxa_mmc_regs *regs = priv->regs;
 161         uint32_t a, b, c;
 162         int i;
 163         int stat;
 164
 165         /* Read the controller status */
 166         stat = readl(&regs->stat);
 167
 168         /*
 169          * Linux says:
 170          * Did I mention this is Sick.  We always need to
 171          * discard the upper 8 bits of the first 16-bit word.
 172          */
 173         a = readl(&regs->res) & 0xffff;
 174         for (i = 0; i < 4; i++) {
 175                 b = readl(&regs->res) & 0xffff;
 176                 c = readl(&regs->res) & 0xffff;
 177                 cmd->response[i] = (a << 24) | (b << 8) | (c >> 8);
 178                 a = c;
 179         }
 180
 181         /* The command response didn't arrive */
 182         if (stat & MMC_STAT_TIME_OUT_RESPONSE)
 183                 return -ETIMEDOUT;
 184         else if (stat & MMC_STAT_RES_CRC_ERROR
 185                         && cmd->resp_type & MMC_RSP_CRC) {
 186 #ifdef  PXAMMC_CRC_SKIP
 187                 if (cmd->resp_type & MMC_RSP_136
 188                                 && cmd->response[0] & (1 << 31))
 189                         printf("Ignoring CRC, this may be dangerous!\n");
 190                 else
 191 #endif
 192                 return -EILSEQ;
 193         }
 194
 195         /* The command response was successfully read */
 196         return 0;
 197 }
 198
 199 static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data)
 200 {
 201         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 202         struct pxa_mmc_regs *regs = priv->regs;
 203         uint32_t len;
 204         uint32_t *buf = (uint32_t *)data->dest;
 205         int size;
 206         int ret;
 207
 208         len = data->blocks * data->blocksize;
 209
 210         while (len) {
 211                 /* The controller has data ready */
 212                 if (readl(&regs->i_reg) & MMC_I_REG_RXFIFO_RD_REQ) {
 213                         size = min(len, PXAMMC_FIFO_SIZE);
 214                         len -= size;
 215                         size /= 4;
 216
 217                         /* Read data into the buffer */
 218                         while (size--)
 219                                 *buf++ = readl(&regs->rxfifo);
 220
 221                 }
 222
 223                 if (readl(&regs->stat) & MMC_STAT_ERRORS)
 224                         return -EIO;
 225         }
 226
 227         /* Wait for the transmission-done interrupt */
 228         ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE);
 229         if (ret)
 230                 return ret;
 231
 232         return 0;
 233 }
 234
 235 static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data)
 236 {
 237         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 238         struct pxa_mmc_regs *regs = priv->regs;
 239         uint32_t len;
 240         uint32_t *buf = (uint32_t *)data->src;
 241         int size;
 242         int ret;
 243
 244         len = data->blocks * data->blocksize;
 245
 246         while (len) {
 247                 /* The controller is ready to receive data */
 248                 if (readl(&regs->i_reg) & MMC_I_REG_TXFIFO_WR_REQ) {
 249                         size = min(len, PXAMMC_FIFO_SIZE);
 250                         len -= size;
 251                         size /= 4;
 252
 253                         while (size--)
 254                                 writel(*buf++, &regs->txfifo);
 255
 256                         if (min(len, PXAMMC_FIFO_SIZE) < 32)
 257                                 writel(MMC_PRTBUF_BUF_PART_FULL, &regs->prtbuf);
 258                 }
 259
 260                 if (readl(&regs->stat) & MMC_STAT_ERRORS)
 261                         return -EIO;
 262         }
 263
 264         /* Wait for the transmission-done interrupt */
 265         ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE);
 266         if (ret)
 267                 return ret;
 268
 269         /* Wait until the data are really written to the card */
 270         ret = pxa_mmc_wait(mmc, MMC_STAT_PRG_DONE);
 271         if (ret)
 272                 return ret;
 273
 274         return 0;
 275 }
 276
 277 static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd,
 278                                 struct mmc_data *data)
 279 {
 280         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 281         struct pxa_mmc_regs *regs = priv->regs;
 282         uint32_t cmdat = 0;
 283         int ret;
 284
 285         /* Stop the controller */
 286         ret = pxa_mmc_stop_clock(mmc);
 287         if (ret)
 288                 return ret;
 289
 290         /* If we're doing data transfer, configure the controller accordingly */
 291         if (data) {
 292                 writel(data->blocks, &regs->nob);
 293                 writel(data->blocksize, &regs->blklen);
 294                 /* This delay can be optimized, but stick with max value */
 295                 writel(0xffff, &regs->rdto);
 296                 cmdat |= MMC_CMDAT_DATA_EN;
 297                 if (data->flags & MMC_DATA_WRITE)
 298                         cmdat |= MMC_CMDAT_WRITE;
 299         }
 300
 301         /* Run in 4bit mode if the card can do it */
 302         if (mmc->bus_width == 4)
 303                 cmdat |= MMC_CMDAT_SD_4DAT;
 304
 305         /* Execute the command */
 306         ret = pxa_mmc_start_cmd(mmc, cmd, cmdat);
 307         if (ret)
 308                 return ret;
 309
 310         /* Wait until the command completes */
 311         ret = pxa_mmc_wait(mmc, MMC_STAT_END_CMD_RES);
 312         if (ret)
 313                 return ret;
 314
 315         /* Read back the result */
 316         ret = pxa_mmc_cmd_done(mmc, cmd);
 317         if (ret)
 318                 return ret;
 319
 320         /* In case there was a data transfer scheduled, do it */
 321         if (data) {
 322                 if (data->flags & MMC_DATA_WRITE)
 323                         pxa_mmc_do_write_xfer(mmc, data);
 324                 else
 325                         pxa_mmc_do_read_xfer(mmc, data);
 326         }
 327
 328         return 0;
 329 }
 330
 331 static void pxa_mmc_set_ios(struct mmc *mmc)
 332 {
 333         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 334         struct pxa_mmc_regs *regs = priv->regs;
 335         uint32_t tmp;
 336         uint32_t pxa_mmc_clock;
 337
 338         if (!mmc->clock) {
 339                 pxa_mmc_stop_clock(mmc);
 340                 return;
 341         }
 342
 343         /* PXA3xx can do 26MHz with special settings. */
 344         if (mmc->clock == 26000000) {
 345                 writel(0x7, &regs->clkrt);
 346                 return;
 347         }
 348
 349         /* Set clock to the card the usual way. */
 350         pxa_mmc_clock = 0;
 351         tmp = mmc->f_max / mmc->clock;
 352         tmp += tmp % 2;
 353
 354         while (tmp > 1) {
 355                 pxa_mmc_clock++;
 356                 tmp >>= 1;
 357         }
 358
 359         writel(pxa_mmc_clock, &regs->clkrt);
 360 }
 361
 362 static int pxa_mmc_init(struct mmc *mmc)
 363 {
 364         struct pxa_mmc_priv *priv = (struct pxa_mmc_priv *)mmc->priv;
 365         struct pxa_mmc_regs *regs = priv->regs;
 366
 367         /* Make sure the clock are stopped */
 368         pxa_mmc_stop_clock(mmc);
 369
 370         /* Turn off SPI mode */
 371         writel(0, &regs->spi);
 372
 373         /* Set up maximum timeout to wait for command response */
 374         writel(MMC_RES_TO_MAX_MASK, &regs->resto);
 375
 376         /* Mask all interrupts */
 377         writel(~(MMC_I_MASK_TXFIFO_WR_REQ | MMC_I_MASK_RXFIFO_RD_REQ),
 378                 &regs->i_mask);
 379         return 0;
 380 }
 381
 382 int pxa_mmc_register(int card_index)
 383 {
 384         struct mmc *mmc;
 385         struct pxa_mmc_priv *priv;
 386         uint32_t reg;
 387         int ret = -ENOMEM;
 388
 389         mmc = malloc(sizeof(struct mmc));
 390         if (!mmc)
 391                 goto err0;
 392
 393         priv = malloc(sizeof(struct pxa_mmc_priv));
 394         if (!priv)
 395                 goto err1;
 396
 397         switch (card_index) {
 398         case 0:
 399                 priv->regs = (struct pxa_mmc_regs *)MMC0_BASE;
 400                 break;
 401         case 1:
 402                 priv->regs = (struct pxa_mmc_regs *)MMC1_BASE;
 403                 break;
 404         default:
 405                 printf("PXA MMC: Invalid MMC controller ID (card_index = %d)\n",
 406                         card_index);
 407                 goto err2;
 408         }
 409
 410         mmc->priv = priv;
 411
 412         sprintf(mmc->name, "PXA MMC");
 413         mmc->send_cmd   = pxa_mmc_request;
 414         mmc->set_ios    = pxa_mmc_set_ios;
 415         mmc->init       = pxa_mmc_init;
 416         mmc->getcd      = NULL;
 417
 418         mmc->voltages   = MMC_VDD_32_33 | MMC_VDD_33_34;
 419         mmc->f_max      = PXAMMC_MAX_SPEED;
 420         mmc->f_min      = PXAMMC_MIN_SPEED;
 421         mmc->host_caps  = PXAMMC_HOST_CAPS;
 422
 423         mmc->b_max = 0;
 424
 425 #ifndef CONFIG_CPU_MONAHANS     /* PXA2xx */
 426         reg = readl(CKEN);
 427         reg |= CKEN12_MMC;
 428         writel(reg, CKEN);
 429 #else                           /* PXA3xx */
 430         reg = readl(CKENA);
 431         reg |= CKENA_12_MMC0 | CKENA_13_MMC1;
 432         writel(reg, CKENA);
 433 #endif
 434
 435         mmc_register(mmc);
 436
 437         return 0;
 438
 439 err2:
 440         free(priv);
 441 err1:
 442         free(mmc);
 443 err0:
 444         return ret;
 445 }