2 * Copyright (c) 2013 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <dt-structs.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/periph.h>
19 #include <linux/err.h>
21 DECLARE_GLOBAL_DATA_PTR
;
23 struct rockchip_mmc_plat
{
24 #if CONFIG_IS_ENABLED(OF_PLATDATA)
25 struct dtd_rockchip_rk3288_dw_mshc dtplat
;
27 struct mmc_config cfg
;
31 struct rockchip_dwmmc_priv
{
33 struct dwmci_host host
;
39 static uint
rockchip_dwmmc_get_mmc_clk(struct dwmci_host
*host
, uint freq
)
41 struct udevice
*dev
= host
->priv
;
42 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
45 ret
= clk_set_rate(&priv
->clk
, freq
);
47 debug("%s: err=%d\n", __func__
, ret
);
54 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice
*dev
)
56 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
57 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
58 struct dwmci_host
*host
= &priv
->host
;
60 host
->name
= dev
->name
;
61 host
->ioaddr
= (void *)dev_get_addr(dev
);
62 host
->buswidth
= fdtdec_get_int(gd
->fdt_blob
, dev
->of_offset
,
64 host
->get_mmc_clk
= rockchip_dwmmc_get_mmc_clk
;
67 /* use non-removeable as sdcard and emmc as judgement */
68 if (fdtdec_get_bool(gd
->fdt_blob
, dev
->of_offset
, "non-removable"))
73 priv
->fifo_depth
= fdtdec_get_int(gd
->fdt_blob
, dev
->of_offset
,
75 if (priv
->fifo_depth
< 0)
77 priv
->fifo_mode
= fdtdec_get_bool(gd
->fdt_blob
, dev
->of_offset
,
79 if (fdtdec_get_int_array(gd
->fdt_blob
, dev
->of_offset
,
80 "clock-freq-min-max", priv
->minmax
, 2))
86 static int rockchip_dwmmc_probe(struct udevice
*dev
)
88 struct rockchip_mmc_plat
*plat
= dev_get_platdata(dev
);
89 struct mmc_uclass_priv
*upriv
= dev_get_uclass_priv(dev
);
90 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
91 struct dwmci_host
*host
= &priv
->host
;
92 struct udevice
*pwr_dev __maybe_unused
;
95 #if CONFIG_IS_ENABLED(OF_PLATDATA)
96 struct dtd_rockchip_rk3288_dw_mshc
*dtplat
= &plat
->dtplat
;
98 host
->name
= dev
->name
;
99 host
->ioaddr
= map_sysmem(dtplat
->reg
[0], dtplat
->reg
[1]);
100 host
->buswidth
= dtplat
->bus_width
;
101 host
->get_mmc_clk
= rockchip_dwmmc_get_mmc_clk
;
104 priv
->fifo_depth
= dtplat
->fifo_depth
;
106 memcpy(priv
->minmax
, dtplat
->clock_freq_min_max
, sizeof(priv
->minmax
));
108 ret
= clk_get_by_index_platdata(dev
, 0, dtplat
->clocks
, &priv
->clk
);
112 ret
= clk_get_by_index(dev
, 0, &priv
->clk
);
116 host
->fifoth_val
= MSIZE(0x2) |
117 RX_WMARK(priv
->fifo_depth
/ 2 - 1) |
118 TX_WMARK(priv
->fifo_depth
/ 2);
120 host
->fifo_mode
= priv
->fifo_mode
;
123 /* Enable power if needed */
124 ret
= uclass_get_device_by_phandle(UCLASS_PWRSEQ
, dev
, "mmc-pwrseq",
127 ret
= pwrseq_set_power(pwr_dev
, true);
132 dwmci_setup_cfg(&plat
->cfg
, dev
->name
, host
->buswidth
, host
->caps
,
133 priv
->minmax
[1], priv
->minmax
[0]);
134 host
->mmc
= &plat
->mmc
;
135 host
->mmc
->priv
= &priv
->host
;
136 host
->mmc
->dev
= dev
;
137 upriv
->mmc
= host
->mmc
;
139 return dwmci_probe(dev
);
142 static int rockchip_dwmmc_bind(struct udevice
*dev
)
144 struct rockchip_mmc_plat
*plat
= dev_get_platdata(dev
);
146 return dwmci_bind(dev
, &plat
->mmc
, &plat
->cfg
);
149 static const struct udevice_id rockchip_dwmmc_ids
[] = {
150 { .compatible
= "rockchip,rk3288-dw-mshc" },
154 U_BOOT_DRIVER(rockchip_dwmmc_drv
) = {
155 .name
= "rockchip_rk3288_dw_mshc",
157 .of_match
= rockchip_dwmmc_ids
,
158 .ofdata_to_platdata
= rockchip_dwmmc_ofdata_to_platdata
,
159 .ops
= &dm_dwmci_ops
,
160 .bind
= rockchip_dwmmc_bind
,
161 .probe
= rockchip_dwmmc_probe
,
162 .priv_auto_alloc_size
= sizeof(struct rockchip_dwmmc_priv
),
163 .platdata_auto_alloc_size
= sizeof(struct rockchip_mmc_plat
),
167 static int rockchip_dwmmc_pwrseq_set_power(struct udevice
*dev
, bool enable
)
169 struct gpio_desc reset
;
172 ret
= gpio_request_by_name(dev
, "reset-gpios", 0, &reset
, GPIOD_IS_OUT
);
175 dm_gpio_set_value(&reset
, 1);
177 dm_gpio_set_value(&reset
, 0);
183 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops
= {
184 .set_power
= rockchip_dwmmc_pwrseq_set_power
,
187 static const struct udevice_id rockchip_dwmmc_pwrseq_ids
[] = {
188 { .compatible
= "mmc-pwrseq-emmc" },
192 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv
) = {
193 .name
= "mmc_pwrseq_emmc",
195 .of_match
= rockchip_dwmmc_pwrseq_ids
,
196 .ops
= &rockchip_dwmmc_pwrseq_ops
,