2 * Copyright (c) 2013 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/clock.h>
16 #include <asm/arch/periph.h>
17 #include <linux/err.h>
19 DECLARE_GLOBAL_DATA_PTR
;
21 struct rockchip_dwmmc_priv
{
24 struct dwmci_host host
;
27 static uint
rockchip_dwmmc_get_mmc_clk(struct dwmci_host
*host
, uint freq
)
29 struct udevice
*dev
= host
->priv
;
30 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
33 ret
= clk_set_periph_rate(priv
->clk
, priv
->periph
, freq
);
35 debug("%s: err=%d\n", __func__
, ret
);
42 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice
*dev
)
44 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
45 struct dwmci_host
*host
= &priv
->host
;
47 host
->name
= dev
->name
;
48 host
->ioaddr
= (void *)dev_get_addr(dev
);
49 host
->buswidth
= fdtdec_get_int(gd
->fdt_blob
, dev
->of_offset
,
51 host
->get_mmc_clk
= rockchip_dwmmc_get_mmc_clk
;
54 /* use non-removeable as sdcard and emmc as judgement */
55 if (fdtdec_get_bool(gd
->fdt_blob
, dev
->of_offset
, "non-removable"))
63 static int rockchip_dwmmc_probe(struct udevice
*dev
)
65 struct mmc_uclass_priv
*upriv
= dev_get_uclass_priv(dev
);
66 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
67 struct dwmci_host
*host
= &priv
->host
;
68 struct udevice
*pwr_dev __maybe_unused
;
73 ret
= clk_get_by_index(dev
, 0, &priv
->clk
);
78 if (fdtdec_get_int_array(gd
->fdt_blob
, dev
->of_offset
,
79 "clock-freq-min-max", minmax
, 2))
82 fifo_depth
= fdtdec_get_int(gd
->fdt_blob
, dev
->of_offset
,
87 host
->fifoth_val
= MSIZE(0x2) |
88 RX_WMARK(fifo_depth
/ 2 - 1) | TX_WMARK(fifo_depth
/ 2);
90 if (fdtdec_get_bool(gd
->fdt_blob
, dev
->of_offset
, "fifo-mode"))
91 host
->fifo_mode
= true;
94 /* Enable power if needed */
95 ret
= uclass_get_device_by_phandle(UCLASS_PWRSEQ
, dev
, "mmc-pwrseq",
98 ret
= pwrseq_set_power(pwr_dev
, true);
103 ret
= add_dwmci(host
, minmax
[1], minmax
[0]);
107 upriv
->mmc
= host
->mmc
;
112 static const struct udevice_id rockchip_dwmmc_ids
[] = {
113 { .compatible
= "rockchip,rk3288-dw-mshc" },
117 U_BOOT_DRIVER(rockchip_dwmmc_drv
) = {
118 .name
= "rockchip_dwmmc",
120 .of_match
= rockchip_dwmmc_ids
,
121 .ofdata_to_platdata
= rockchip_dwmmc_ofdata_to_platdata
,
122 .probe
= rockchip_dwmmc_probe
,
123 .priv_auto_alloc_size
= sizeof(struct rockchip_dwmmc_priv
),
127 static int rockchip_dwmmc_pwrseq_set_power(struct udevice
*dev
, bool enable
)
129 struct gpio_desc reset
;
132 ret
= gpio_request_by_name(dev
, "reset-gpios", 0, &reset
, GPIOD_IS_OUT
);
135 dm_gpio_set_value(&reset
, 1);
137 dm_gpio_set_value(&reset
, 0);
143 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops
= {
144 .set_power
= rockchip_dwmmc_pwrseq_set_power
,
147 static const struct udevice_id rockchip_dwmmc_pwrseq_ids
[] = {
148 { .compatible
= "mmc-pwrseq-emmc" },
152 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv
) = {
153 .name
= "mmc_pwrseq_emmc",
155 .of_match
= rockchip_dwmmc_pwrseq_ids
,
156 .ops
= &rockchip_dwmmc_pwrseq_ops
,