2 * Copyright (c) 2013 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/clock.h>
16 #include <asm/arch/periph.h>
17 #include <linux/err.h>
19 DECLARE_GLOBAL_DATA_PTR
;
21 struct rockchip_mmc_plat
{
22 struct mmc_config cfg
;
26 struct rockchip_dwmmc_priv
{
28 struct dwmci_host host
;
31 static uint
rockchip_dwmmc_get_mmc_clk(struct dwmci_host
*host
, uint freq
)
33 struct udevice
*dev
= host
->priv
;
34 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
37 ret
= clk_set_rate(&priv
->clk
, freq
);
39 debug("%s: err=%d\n", __func__
, ret
);
46 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice
*dev
)
48 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
49 struct dwmci_host
*host
= &priv
->host
;
51 host
->name
= dev
->name
;
52 host
->ioaddr
= (void *)dev_get_addr(dev
);
53 host
->buswidth
= fdtdec_get_int(gd
->fdt_blob
, dev
->of_offset
,
55 host
->get_mmc_clk
= rockchip_dwmmc_get_mmc_clk
;
58 /* use non-removeable as sdcard and emmc as judgement */
59 if (fdtdec_get_bool(gd
->fdt_blob
, dev
->of_offset
, "non-removable"))
67 static int rockchip_dwmmc_probe(struct udevice
*dev
)
70 struct rockchip_mmc_plat
*plat
= dev_get_platdata(dev
);
72 struct mmc_uclass_priv
*upriv
= dev_get_uclass_priv(dev
);
73 struct rockchip_dwmmc_priv
*priv
= dev_get_priv(dev
);
74 struct dwmci_host
*host
= &priv
->host
;
75 struct udevice
*pwr_dev __maybe_unused
;
80 ret
= clk_get_by_index(dev
, 0, &priv
->clk
);
84 if (fdtdec_get_int_array(gd
->fdt_blob
, dev
->of_offset
,
85 "clock-freq-min-max", minmax
, 2))
88 fifo_depth
= fdtdec_get_int(gd
->fdt_blob
, dev
->of_offset
,
93 host
->fifoth_val
= MSIZE(0x2) |
94 RX_WMARK(fifo_depth
/ 2 - 1) | TX_WMARK(fifo_depth
/ 2);
96 if (fdtdec_get_bool(gd
->fdt_blob
, dev
->of_offset
, "fifo-mode"))
97 host
->fifo_mode
= true;
100 /* Enable power if needed */
101 ret
= uclass_get_device_by_phandle(UCLASS_PWRSEQ
, dev
, "mmc-pwrseq",
104 ret
= pwrseq_set_power(pwr_dev
, true);
110 dwmci_setup_cfg(&plat
->cfg
, dev
->name
, host
->buswidth
, host
->caps
,
111 minmax
[1], minmax
[0]);
112 host
->mmc
= &plat
->mmc
;
114 ret
= add_dwmci(host
, minmax
[1], minmax
[0]);
119 host
->mmc
->priv
= &priv
->host
;
120 host
->mmc
->dev
= dev
;
121 upriv
->mmc
= host
->mmc
;
126 static int rockchip_dwmmc_bind(struct udevice
*dev
)
129 struct rockchip_mmc_plat
*plat
= dev_get_platdata(dev
);
132 ret
= dwmci_bind(dev
, &plat
->mmc
, &plat
->cfg
);
140 static const struct udevice_id rockchip_dwmmc_ids
[] = {
141 { .compatible
= "rockchip,rk3288-dw-mshc" },
145 U_BOOT_DRIVER(rockchip_dwmmc_drv
) = {
146 .name
= "rockchip_dwmmc",
148 .of_match
= rockchip_dwmmc_ids
,
149 .ofdata_to_platdata
= rockchip_dwmmc_ofdata_to_platdata
,
150 .bind
= rockchip_dwmmc_bind
,
151 .probe
= rockchip_dwmmc_probe
,
152 .priv_auto_alloc_size
= sizeof(struct rockchip_dwmmc_priv
),
153 .platdata_auto_alloc_size
= sizeof(struct rockchip_mmc_plat
),
157 static int rockchip_dwmmc_pwrseq_set_power(struct udevice
*dev
, bool enable
)
159 struct gpio_desc reset
;
162 ret
= gpio_request_by_name(dev
, "reset-gpios", 0, &reset
, GPIOD_IS_OUT
);
165 dm_gpio_set_value(&reset
, 1);
167 dm_gpio_set_value(&reset
, 0);
173 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops
= {
174 .set_power
= rockchip_dwmmc_pwrseq_set_power
,
177 static const struct udevice_id rockchip_dwmmc_pwrseq_ids
[] = {
178 { .compatible
= "mmc-pwrseq-emmc" },
182 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv
) = {
183 .name
= "mmc_pwrseq_emmc",
185 .of_match
= rockchip_dwmmc_pwrseq_ids
,
186 .ops
= &rockchip_dwmmc_pwrseq_ops
,