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MX31: add accessor function to get a gpio
[people/ms/u-boot.git] / drivers / mtd / cfi_flash.c
1 /*
2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 *
8 * Copyright (C) 2004
9 * Ed Okerson
10 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33
34 /* The DEBUG define must be before common to enable debugging */
35 /* #define DEBUG */
36
37 #include <common.h>
38 #include <asm/processor.h>
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #include <mtd/cfi_flash.h>
43
44 /*
45 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
51 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 *
61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
63 */
64
65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST
66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
67 #endif
68
69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
70 static uint flash_verbose = 1;
71
72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
75 #else
76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
77 #endif
78
79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
80
81 /*
82 * Check if chip width is defined. If not, start detecting with 8bit.
83 */
84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
86 #endif
87
88 static void __flash_write8(u8 value, void *addr)
89 {
90 __raw_writeb(value, addr);
91 }
92
93 static void __flash_write16(u16 value, void *addr)
94 {
95 __raw_writew(value, addr);
96 }
97
98 static void __flash_write32(u32 value, void *addr)
99 {
100 __raw_writel(value, addr);
101 }
102
103 static void __flash_write64(u64 value, void *addr)
104 {
105 /* No architectures currently implement __raw_writeq() */
106 *(volatile u64 *)addr = value;
107 }
108
109 static u8 __flash_read8(void *addr)
110 {
111 return __raw_readb(addr);
112 }
113
114 static u16 __flash_read16(void *addr)
115 {
116 return __raw_readw(addr);
117 }
118
119 static u32 __flash_read32(void *addr)
120 {
121 return __raw_readl(addr);
122 }
123
124 static u64 __flash_read64(void *addr)
125 {
126 /* No architectures currently implement __raw_readq() */
127 return *(volatile u64 *)addr;
128 }
129
130 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
131 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
132 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
133 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
134 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
135 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
136 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
137 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
138 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
139 #else
140 #define flash_write8 __flash_write8
141 #define flash_write16 __flash_write16
142 #define flash_write32 __flash_write32
143 #define flash_write64 __flash_write64
144 #define flash_read8 __flash_read8
145 #define flash_read16 __flash_read16
146 #define flash_read32 __flash_read32
147 #define flash_read64 __flash_read64
148 #endif
149
150 /*-----------------------------------------------------------------------
151 */
152 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
153 flash_info_t *flash_get_info(ulong base)
154 {
155 int i;
156 flash_info_t * info = 0;
157
158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
159 info = & flash_info[i];
160 if (info->size && info->start[0] <= base &&
161 base <= info->start[0] + info->size - 1)
162 break;
163 }
164
165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
166 }
167 #endif
168
169 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
170 {
171 if (sect != (info->sector_count - 1))
172 return info->start[sect + 1] - info->start[sect];
173 else
174 return info->start[0] + info->size - info->start[sect];
175 }
176
177 /*-----------------------------------------------------------------------
178 * create an address based on the offset and the port width
179 */
180 static inline void *
181 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
182 {
183 unsigned int byte_offset = offset * info->portwidth;
184
185 return (void *)(info->start[sect] + byte_offset);
186 }
187
188 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
189 unsigned int offset, void *addr)
190 {
191 }
192
193 /*-----------------------------------------------------------------------
194 * make a proper sized command based on the port and chip widths
195 */
196 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
197 {
198 int i;
199 int cword_offset;
200 int cp_offset;
201 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
202 u32 cmd_le = cpu_to_le32(cmd);
203 #endif
204 uchar val;
205 uchar *cp = (uchar *) cmdbuf;
206
207 for (i = info->portwidth; i > 0; i--){
208 cword_offset = (info->portwidth-i)%info->chipwidth;
209 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
210 cp_offset = info->portwidth - i;
211 val = *((uchar*)&cmd_le + cword_offset);
212 #else
213 cp_offset = i - 1;
214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
215 #endif
216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
217 }
218 }
219
220 #ifdef DEBUG
221 /*-----------------------------------------------------------------------
222 * Debug support
223 */
224 static void print_longlong (char *str, unsigned long long data)
225 {
226 int i;
227 char *cp;
228
229 cp = (char *) &data;
230 for (i = 0; i < 8; i++)
231 sprintf (&str[i * 2], "%2.2x", *cp++);
232 }
233
234 static void flash_printqry (struct cfi_qry *qry)
235 {
236 u8 *p = (u8 *)qry;
237 int x, y;
238
239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
240 debug("%02x : ", x);
241 for (y = 0; y < 16; y++)
242 debug("%2.2x ", p[x + y]);
243 debug(" ");
244 for (y = 0; y < 16; y++) {
245 unsigned char c = p[x + y];
246 if (c >= 0x20 && c <= 0x7e)
247 debug("%c", c);
248 else
249 debug(".");
250 }
251 debug("\n");
252 }
253 }
254 #endif
255
256
257 /*-----------------------------------------------------------------------
258 * read a character at a port width address
259 */
260 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
261 {
262 uchar *cp;
263 uchar retval;
264
265 cp = flash_map (info, 0, offset);
266 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
267 retval = flash_read8(cp);
268 #else
269 retval = flash_read8(cp + info->portwidth - 1);
270 #endif
271 flash_unmap (info, 0, offset, cp);
272 return retval;
273 }
274
275 /*-----------------------------------------------------------------------
276 * read a word at a port width address, assume 16bit bus
277 */
278 static inline ushort flash_read_word (flash_info_t * info, uint offset)
279 {
280 ushort *addr, retval;
281
282 addr = flash_map (info, 0, offset);
283 retval = flash_read16 (addr);
284 flash_unmap (info, 0, offset, addr);
285 return retval;
286 }
287
288
289 /*-----------------------------------------------------------------------
290 * read a long word by picking the least significant byte of each maximum
291 * port size word. Swap for ppc format.
292 */
293 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
294 uint offset)
295 {
296 uchar *addr;
297 ulong retval;
298
299 #ifdef DEBUG
300 int x;
301 #endif
302 addr = flash_map (info, sect, offset);
303
304 #ifdef DEBUG
305 debug ("long addr is at %p info->portwidth = %d\n", addr,
306 info->portwidth);
307 for (x = 0; x < 4 * info->portwidth; x++) {
308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
309 }
310 #endif
311 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
312 retval = ((flash_read8(addr) << 16) |
313 (flash_read8(addr + info->portwidth) << 24) |
314 (flash_read8(addr + 2 * info->portwidth)) |
315 (flash_read8(addr + 3 * info->portwidth) << 8));
316 #else
317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
318 (flash_read8(addr + info->portwidth - 1) << 16) |
319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
320 (flash_read8(addr + 3 * info->portwidth - 1)));
321 #endif
322 flash_unmap(info, sect, offset, addr);
323
324 return retval;
325 }
326
327 /*
328 * Write a proper sized command to the correct address
329 */
330 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
331 uint offset, u32 cmd)
332 {
333
334 void *addr;
335 cfiword_t cword;
336
337 addr = flash_map (info, sect, offset);
338 flash_make_cmd (info, cmd, &cword);
339 switch (info->portwidth) {
340 case FLASH_CFI_8BIT:
341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
343 flash_write8(cword.c, addr);
344 break;
345 case FLASH_CFI_16BIT:
346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
347 cmd, cword.w,
348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
349 flash_write16(cword.w, addr);
350 break;
351 case FLASH_CFI_32BIT:
352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
353 cmd, cword.l,
354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
355 flash_write32(cword.l, addr);
356 break;
357 case FLASH_CFI_64BIT:
358 #ifdef DEBUG
359 {
360 char str[20];
361
362 print_longlong (str, cword.ll);
363
364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
365 addr, cmd, str,
366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
367 }
368 #endif
369 flash_write64(cword.ll, addr);
370 break;
371 }
372
373 /* Ensure all the instructions are fully finished */
374 sync();
375
376 flash_unmap(info, sect, offset, addr);
377 }
378
379 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
380 {
381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
383 }
384
385 /*-----------------------------------------------------------------------
386 */
387 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
388 uint offset, uchar cmd)
389 {
390 void *addr;
391 cfiword_t cword;
392 int retval;
393
394 addr = flash_map (info, sect, offset);
395 flash_make_cmd (info, cmd, &cword);
396
397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
398 switch (info->portwidth) {
399 case FLASH_CFI_8BIT:
400 debug ("is= %x %x\n", flash_read8(addr), cword.c);
401 retval = (flash_read8(addr) == cword.c);
402 break;
403 case FLASH_CFI_16BIT:
404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
405 retval = (flash_read16(addr) == cword.w);
406 break;
407 case FLASH_CFI_32BIT:
408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
409 retval = (flash_read32(addr) == cword.l);
410 break;
411 case FLASH_CFI_64BIT:
412 #ifdef DEBUG
413 {
414 char str1[20];
415 char str2[20];
416
417 print_longlong (str1, flash_read64(addr));
418 print_longlong (str2, cword.ll);
419 debug ("is= %s %s\n", str1, str2);
420 }
421 #endif
422 retval = (flash_read64(addr) == cword.ll);
423 break;
424 default:
425 retval = 0;
426 break;
427 }
428 flash_unmap(info, sect, offset, addr);
429
430 return retval;
431 }
432
433 /*-----------------------------------------------------------------------
434 */
435 static int flash_isset (flash_info_t * info, flash_sect_t sect,
436 uint offset, uchar cmd)
437 {
438 void *addr;
439 cfiword_t cword;
440 int retval;
441
442 addr = flash_map (info, sect, offset);
443 flash_make_cmd (info, cmd, &cword);
444 switch (info->portwidth) {
445 case FLASH_CFI_8BIT:
446 retval = ((flash_read8(addr) & cword.c) == cword.c);
447 break;
448 case FLASH_CFI_16BIT:
449 retval = ((flash_read16(addr) & cword.w) == cword.w);
450 break;
451 case FLASH_CFI_32BIT:
452 retval = ((flash_read32(addr) & cword.l) == cword.l);
453 break;
454 case FLASH_CFI_64BIT:
455 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
456 break;
457 default:
458 retval = 0;
459 break;
460 }
461 flash_unmap(info, sect, offset, addr);
462
463 return retval;
464 }
465
466 /*-----------------------------------------------------------------------
467 */
468 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
469 uint offset, uchar cmd)
470 {
471 void *addr;
472 cfiword_t cword;
473 int retval;
474
475 addr = flash_map (info, sect, offset);
476 flash_make_cmd (info, cmd, &cword);
477 switch (info->portwidth) {
478 case FLASH_CFI_8BIT:
479 retval = flash_read8(addr) != flash_read8(addr);
480 break;
481 case FLASH_CFI_16BIT:
482 retval = flash_read16(addr) != flash_read16(addr);
483 break;
484 case FLASH_CFI_32BIT:
485 retval = flash_read32(addr) != flash_read32(addr);
486 break;
487 case FLASH_CFI_64BIT:
488 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
489 (flash_read32(addr+4) != flash_read32(addr+4)) );
490 break;
491 default:
492 retval = 0;
493 break;
494 }
495 flash_unmap(info, sect, offset, addr);
496
497 return retval;
498 }
499
500 /*
501 * flash_is_busy - check to see if the flash is busy
502 *
503 * This routine checks the status of the chip and returns true if the
504 * chip is busy.
505 */
506 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
507 {
508 int retval;
509
510 switch (info->vendor) {
511 case CFI_CMDSET_INTEL_PROG_REGIONS:
512 case CFI_CMDSET_INTEL_STANDARD:
513 case CFI_CMDSET_INTEL_EXTENDED:
514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
515 break;
516 case CFI_CMDSET_AMD_STANDARD:
517 case CFI_CMDSET_AMD_EXTENDED:
518 #ifdef CONFIG_FLASH_CFI_LEGACY
519 case CFI_CMDSET_AMD_LEGACY:
520 #endif
521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
522 break;
523 default:
524 retval = 0;
525 }
526 debug ("flash_is_busy: %d\n", retval);
527 return retval;
528 }
529
530 /*-----------------------------------------------------------------------
531 * wait for XSR.7 to be set. Time out with an error if it does not.
532 * This routine does not set the flash to read-array mode.
533 */
534 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
535 ulong tout, char *prompt)
536 {
537 ulong start;
538
539 #if CONFIG_SYS_HZ != 1000
540 if ((ulong)CONFIG_SYS_HZ > 100000)
541 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
542 else
543 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
544 #endif
545
546 /* Wait for command completion */
547 reset_timer();
548 start = get_timer (0);
549 while (flash_is_busy (info, sector)) {
550 if (get_timer (start) > tout) {
551 printf ("Flash %s timeout at address %lx data %lx\n",
552 prompt, info->start[sector],
553 flash_read_long (info, sector, 0));
554 flash_write_cmd (info, sector, 0, info->cmd_reset);
555 return ERR_TIMOUT;
556 }
557 udelay (1); /* also triggers watchdog */
558 }
559 return ERR_OK;
560 }
561
562 /*-----------------------------------------------------------------------
563 * Wait for XSR.7 to be set, if it times out print an error, otherwise
564 * do a full status check.
565 *
566 * This routine sets the flash to read-array mode.
567 */
568 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
569 ulong tout, char *prompt)
570 {
571 int retcode;
572
573 retcode = flash_status_check (info, sector, tout, prompt);
574 switch (info->vendor) {
575 case CFI_CMDSET_INTEL_PROG_REGIONS:
576 case CFI_CMDSET_INTEL_EXTENDED:
577 case CFI_CMDSET_INTEL_STANDARD:
578 if ((retcode != ERR_OK)
579 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
580 retcode = ERR_INVAL;
581 printf ("Flash %s error at address %lx\n", prompt,
582 info->start[sector]);
583 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
584 FLASH_STATUS_PSLBS)) {
585 puts ("Command Sequence Error.\n");
586 } else if (flash_isset (info, sector, 0,
587 FLASH_STATUS_ECLBS)) {
588 puts ("Block Erase Error.\n");
589 retcode = ERR_NOT_ERASED;
590 } else if (flash_isset (info, sector, 0,
591 FLASH_STATUS_PSLBS)) {
592 puts ("Locking Error\n");
593 }
594 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
595 puts ("Block locked.\n");
596 retcode = ERR_PROTECTED;
597 }
598 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
599 puts ("Vpp Low Error.\n");
600 }
601 flash_write_cmd (info, sector, 0, info->cmd_reset);
602 break;
603 default:
604 break;
605 }
606 return retcode;
607 }
608
609 static int use_flash_status_poll(flash_info_t *info)
610 {
611 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
612 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
613 info->vendor == CFI_CMDSET_AMD_STANDARD)
614 return 1;
615 #endif
616 return 0;
617 }
618
619 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
620 ulong tout, char *prompt)
621 {
622 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
623 ulong start;
624 int ready;
625
626 #if CONFIG_SYS_HZ != 1000
627 if ((ulong)CONFIG_SYS_HZ > 100000)
628 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
629 else
630 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
631 #endif
632
633 /* Wait for command completion */
634 reset_timer();
635 start = get_timer(0);
636 while (1) {
637 switch (info->portwidth) {
638 case FLASH_CFI_8BIT:
639 ready = flash_read8(dst) == flash_read8(src);
640 break;
641 case FLASH_CFI_16BIT:
642 ready = flash_read16(dst) == flash_read16(src);
643 break;
644 case FLASH_CFI_32BIT:
645 ready = flash_read32(dst) == flash_read32(src);
646 break;
647 case FLASH_CFI_64BIT:
648 ready = flash_read64(dst) == flash_read64(src);
649 break;
650 default:
651 ready = 0;
652 break;
653 }
654 if (ready)
655 break;
656 if (get_timer(start) > tout) {
657 printf("Flash %s timeout at address %lx data %lx\n",
658 prompt, (ulong)dst, (ulong)flash_read8(dst));
659 return ERR_TIMOUT;
660 }
661 udelay(1); /* also triggers watchdog */
662 }
663 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
664 return ERR_OK;
665 }
666
667 /*-----------------------------------------------------------------------
668 */
669 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
670 {
671 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
672 unsigned short w;
673 unsigned int l;
674 unsigned long long ll;
675 #endif
676
677 switch (info->portwidth) {
678 case FLASH_CFI_8BIT:
679 cword->c = c;
680 break;
681 case FLASH_CFI_16BIT:
682 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
683 w = c;
684 w <<= 8;
685 cword->w = (cword->w >> 8) | w;
686 #else
687 cword->w = (cword->w << 8) | c;
688 #endif
689 break;
690 case FLASH_CFI_32BIT:
691 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
692 l = c;
693 l <<= 24;
694 cword->l = (cword->l >> 8) | l;
695 #else
696 cword->l = (cword->l << 8) | c;
697 #endif
698 break;
699 case FLASH_CFI_64BIT:
700 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
701 ll = c;
702 ll <<= 56;
703 cword->ll = (cword->ll >> 8) | ll;
704 #else
705 cword->ll = (cword->ll << 8) | c;
706 #endif
707 break;
708 }
709 }
710
711 /*
712 * Loop through the sector table starting from the previously found sector.
713 * Searches forwards or backwards, dependent on the passed address.
714 */
715 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
716 {
717 static flash_sect_t saved_sector = 0; /* previously found sector */
718 flash_sect_t sector = saved_sector;
719
720 while ((info->start[sector] < addr)
721 && (sector < info->sector_count - 1))
722 sector++;
723 while ((info->start[sector] > addr) && (sector > 0))
724 /*
725 * also decrements the sector in case of an overshot
726 * in the first loop
727 */
728 sector--;
729
730 saved_sector = sector;
731 return sector;
732 }
733
734 /*-----------------------------------------------------------------------
735 */
736 static int flash_write_cfiword (flash_info_t * info, ulong dest,
737 cfiword_t cword)
738 {
739 void *dstaddr = (void *)dest;
740 int flag;
741 flash_sect_t sect = 0;
742 char sect_found = 0;
743
744 /* Check if Flash is (sufficiently) erased */
745 switch (info->portwidth) {
746 case FLASH_CFI_8BIT:
747 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
748 break;
749 case FLASH_CFI_16BIT:
750 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
751 break;
752 case FLASH_CFI_32BIT:
753 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
754 break;
755 case FLASH_CFI_64BIT:
756 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
757 break;
758 default:
759 flag = 0;
760 break;
761 }
762 if (!flag)
763 return ERR_NOT_ERASED;
764
765 /* Disable interrupts which might cause a timeout here */
766 flag = disable_interrupts ();
767
768 switch (info->vendor) {
769 case CFI_CMDSET_INTEL_PROG_REGIONS:
770 case CFI_CMDSET_INTEL_EXTENDED:
771 case CFI_CMDSET_INTEL_STANDARD:
772 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
773 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
774 break;
775 case CFI_CMDSET_AMD_EXTENDED:
776 case CFI_CMDSET_AMD_STANDARD:
777 sect = find_sector(info, dest);
778 flash_unlock_seq (info, sect);
779 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
780 sect_found = 1;
781 break;
782 #ifdef CONFIG_FLASH_CFI_LEGACY
783 case CFI_CMDSET_AMD_LEGACY:
784 sect = find_sector(info, dest);
785 flash_unlock_seq (info, 0);
786 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
787 sect_found = 1;
788 break;
789 #endif
790 }
791
792 switch (info->portwidth) {
793 case FLASH_CFI_8BIT:
794 flash_write8(cword.c, dstaddr);
795 break;
796 case FLASH_CFI_16BIT:
797 flash_write16(cword.w, dstaddr);
798 break;
799 case FLASH_CFI_32BIT:
800 flash_write32(cword.l, dstaddr);
801 break;
802 case FLASH_CFI_64BIT:
803 flash_write64(cword.ll, dstaddr);
804 break;
805 }
806
807 /* re-enable interrupts if necessary */
808 if (flag)
809 enable_interrupts ();
810
811 if (!sect_found)
812 sect = find_sector (info, dest);
813
814 if (use_flash_status_poll(info))
815 return flash_status_poll(info, &cword, dstaddr,
816 info->write_tout, "write");
817 else
818 return flash_full_status_check(info, sect,
819 info->write_tout, "write");
820 }
821
822 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
823
824 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
825 int len)
826 {
827 flash_sect_t sector;
828 int cnt;
829 int retcode;
830 void *src = cp;
831 void *dst = (void *)dest;
832 void *dst2 = dst;
833 int flag = 0;
834 uint offset = 0;
835 unsigned int shift;
836 uchar write_cmd;
837
838 switch (info->portwidth) {
839 case FLASH_CFI_8BIT:
840 shift = 0;
841 break;
842 case FLASH_CFI_16BIT:
843 shift = 1;
844 break;
845 case FLASH_CFI_32BIT:
846 shift = 2;
847 break;
848 case FLASH_CFI_64BIT:
849 shift = 3;
850 break;
851 default:
852 retcode = ERR_INVAL;
853 goto out_unmap;
854 }
855
856 cnt = len >> shift;
857
858 while ((cnt-- > 0) && (flag == 0)) {
859 switch (info->portwidth) {
860 case FLASH_CFI_8BIT:
861 flag = ((flash_read8(dst2) & flash_read8(src)) ==
862 flash_read8(src));
863 src += 1, dst2 += 1;
864 break;
865 case FLASH_CFI_16BIT:
866 flag = ((flash_read16(dst2) & flash_read16(src)) ==
867 flash_read16(src));
868 src += 2, dst2 += 2;
869 break;
870 case FLASH_CFI_32BIT:
871 flag = ((flash_read32(dst2) & flash_read32(src)) ==
872 flash_read32(src));
873 src += 4, dst2 += 4;
874 break;
875 case FLASH_CFI_64BIT:
876 flag = ((flash_read64(dst2) & flash_read64(src)) ==
877 flash_read64(src));
878 src += 8, dst2 += 8;
879 break;
880 }
881 }
882 if (!flag) {
883 retcode = ERR_NOT_ERASED;
884 goto out_unmap;
885 }
886
887 src = cp;
888 sector = find_sector (info, dest);
889
890 switch (info->vendor) {
891 case CFI_CMDSET_INTEL_PROG_REGIONS:
892 case CFI_CMDSET_INTEL_STANDARD:
893 case CFI_CMDSET_INTEL_EXTENDED:
894 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
895 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
896 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
897 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
898 flash_write_cmd (info, sector, 0, write_cmd);
899 retcode = flash_status_check (info, sector,
900 info->buffer_write_tout,
901 "write to buffer");
902 if (retcode == ERR_OK) {
903 /* reduce the number of loops by the width of
904 * the port */
905 cnt = len >> shift;
906 flash_write_cmd (info, sector, 0, cnt - 1);
907 while (cnt-- > 0) {
908 switch (info->portwidth) {
909 case FLASH_CFI_8BIT:
910 flash_write8(flash_read8(src), dst);
911 src += 1, dst += 1;
912 break;
913 case FLASH_CFI_16BIT:
914 flash_write16(flash_read16(src), dst);
915 src += 2, dst += 2;
916 break;
917 case FLASH_CFI_32BIT:
918 flash_write32(flash_read32(src), dst);
919 src += 4, dst += 4;
920 break;
921 case FLASH_CFI_64BIT:
922 flash_write64(flash_read64(src), dst);
923 src += 8, dst += 8;
924 break;
925 default:
926 retcode = ERR_INVAL;
927 goto out_unmap;
928 }
929 }
930 flash_write_cmd (info, sector, 0,
931 FLASH_CMD_WRITE_BUFFER_CONFIRM);
932 retcode = flash_full_status_check (
933 info, sector, info->buffer_write_tout,
934 "buffer write");
935 }
936
937 break;
938
939 case CFI_CMDSET_AMD_STANDARD:
940 case CFI_CMDSET_AMD_EXTENDED:
941 flash_unlock_seq(info,0);
942
943 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
944 offset = ((unsigned long)dst - info->start[sector]) >> shift;
945 #endif
946 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
947 cnt = len >> shift;
948 flash_write_cmd(info, sector, offset, cnt - 1);
949
950 switch (info->portwidth) {
951 case FLASH_CFI_8BIT:
952 while (cnt-- > 0) {
953 flash_write8(flash_read8(src), dst);
954 src += 1, dst += 1;
955 }
956 break;
957 case FLASH_CFI_16BIT:
958 while (cnt-- > 0) {
959 flash_write16(flash_read16(src), dst);
960 src += 2, dst += 2;
961 }
962 break;
963 case FLASH_CFI_32BIT:
964 while (cnt-- > 0) {
965 flash_write32(flash_read32(src), dst);
966 src += 4, dst += 4;
967 }
968 break;
969 case FLASH_CFI_64BIT:
970 while (cnt-- > 0) {
971 flash_write64(flash_read64(src), dst);
972 src += 8, dst += 8;
973 }
974 break;
975 default:
976 retcode = ERR_INVAL;
977 goto out_unmap;
978 }
979
980 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
981 if (use_flash_status_poll(info))
982 retcode = flash_status_poll(info, src - (1 << shift),
983 dst - (1 << shift),
984 info->buffer_write_tout,
985 "buffer write");
986 else
987 retcode = flash_full_status_check(info, sector,
988 info->buffer_write_tout,
989 "buffer write");
990 break;
991
992 default:
993 debug ("Unknown Command Set\n");
994 retcode = ERR_INVAL;
995 break;
996 }
997
998 out_unmap:
999 return retcode;
1000 }
1001 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1002
1003
1004 /*-----------------------------------------------------------------------
1005 */
1006 int flash_erase (flash_info_t * info, int s_first, int s_last)
1007 {
1008 int rcode = 0;
1009 int prot;
1010 flash_sect_t sect;
1011 int st;
1012
1013 if (info->flash_id != FLASH_MAN_CFI) {
1014 puts ("Can't erase unknown flash type - aborted\n");
1015 return 1;
1016 }
1017 if ((s_first < 0) || (s_first > s_last)) {
1018 puts ("- no sectors to erase\n");
1019 return 1;
1020 }
1021
1022 prot = 0;
1023 for (sect = s_first; sect <= s_last; ++sect) {
1024 if (info->protect[sect]) {
1025 prot++;
1026 }
1027 }
1028 if (prot) {
1029 printf ("- Warning: %d protected sectors will not be erased!\n",
1030 prot);
1031 } else if (flash_verbose) {
1032 putc ('\n');
1033 }
1034
1035
1036 for (sect = s_first; sect <= s_last; sect++) {
1037 if (info->protect[sect] == 0) { /* not protected */
1038 switch (info->vendor) {
1039 case CFI_CMDSET_INTEL_PROG_REGIONS:
1040 case CFI_CMDSET_INTEL_STANDARD:
1041 case CFI_CMDSET_INTEL_EXTENDED:
1042 flash_write_cmd (info, sect, 0,
1043 FLASH_CMD_CLEAR_STATUS);
1044 flash_write_cmd (info, sect, 0,
1045 FLASH_CMD_BLOCK_ERASE);
1046 flash_write_cmd (info, sect, 0,
1047 FLASH_CMD_ERASE_CONFIRM);
1048 break;
1049 case CFI_CMDSET_AMD_STANDARD:
1050 case CFI_CMDSET_AMD_EXTENDED:
1051 flash_unlock_seq (info, sect);
1052 flash_write_cmd (info, sect,
1053 info->addr_unlock1,
1054 AMD_CMD_ERASE_START);
1055 flash_unlock_seq (info, sect);
1056 flash_write_cmd (info, sect, 0,
1057 AMD_CMD_ERASE_SECTOR);
1058 break;
1059 #ifdef CONFIG_FLASH_CFI_LEGACY
1060 case CFI_CMDSET_AMD_LEGACY:
1061 flash_unlock_seq (info, 0);
1062 flash_write_cmd (info, 0, info->addr_unlock1,
1063 AMD_CMD_ERASE_START);
1064 flash_unlock_seq (info, 0);
1065 flash_write_cmd (info, sect, 0,
1066 AMD_CMD_ERASE_SECTOR);
1067 break;
1068 #endif
1069 default:
1070 debug ("Unkown flash vendor %d\n",
1071 info->vendor);
1072 break;
1073 }
1074
1075 if (use_flash_status_poll(info)) {
1076 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1077 void *dest;
1078 dest = flash_map(info, sect, 0);
1079 st = flash_status_poll(info, &cword, dest,
1080 info->erase_blk_tout, "erase");
1081 flash_unmap(info, sect, 0, dest);
1082 } else
1083 st = flash_full_status_check(info, sect,
1084 info->erase_blk_tout,
1085 "erase");
1086 if (st)
1087 rcode = 1;
1088 else if (flash_verbose)
1089 putc ('.');
1090 }
1091 }
1092
1093 if (flash_verbose)
1094 puts (" done\n");
1095
1096 return rcode;
1097 }
1098
1099 /*-----------------------------------------------------------------------
1100 */
1101 void flash_print_info (flash_info_t * info)
1102 {
1103 int i;
1104
1105 if (info->flash_id != FLASH_MAN_CFI) {
1106 puts ("missing or unknown FLASH type\n");
1107 return;
1108 }
1109
1110 printf ("%s FLASH (%d x %d)",
1111 info->name,
1112 (info->portwidth << 3), (info->chipwidth << 3));
1113 if (info->size < 1024*1024)
1114 printf (" Size: %ld kB in %d Sectors\n",
1115 info->size >> 10, info->sector_count);
1116 else
1117 printf (" Size: %ld MB in %d Sectors\n",
1118 info->size >> 20, info->sector_count);
1119 printf (" ");
1120 switch (info->vendor) {
1121 case CFI_CMDSET_INTEL_PROG_REGIONS:
1122 printf ("Intel Prog Regions");
1123 break;
1124 case CFI_CMDSET_INTEL_STANDARD:
1125 printf ("Intel Standard");
1126 break;
1127 case CFI_CMDSET_INTEL_EXTENDED:
1128 printf ("Intel Extended");
1129 break;
1130 case CFI_CMDSET_AMD_STANDARD:
1131 printf ("AMD Standard");
1132 break;
1133 case CFI_CMDSET_AMD_EXTENDED:
1134 printf ("AMD Extended");
1135 break;
1136 #ifdef CONFIG_FLASH_CFI_LEGACY
1137 case CFI_CMDSET_AMD_LEGACY:
1138 printf ("AMD Legacy");
1139 break;
1140 #endif
1141 default:
1142 printf ("Unknown (%d)", info->vendor);
1143 break;
1144 }
1145 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1146 info->manufacturer_id, info->device_id);
1147 if (info->device_id == 0x7E) {
1148 printf("%04X", info->device_id2);
1149 }
1150 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1151 info->erase_blk_tout,
1152 info->write_tout);
1153 if (info->buffer_size > 1) {
1154 printf (" Buffer write timeout: %ld ms, "
1155 "buffer size: %d bytes\n",
1156 info->buffer_write_tout,
1157 info->buffer_size);
1158 }
1159
1160 puts ("\n Sector Start Addresses:");
1161 for (i = 0; i < info->sector_count; ++i) {
1162 if ((i % 5) == 0)
1163 printf ("\n");
1164 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1165 int k;
1166 int size;
1167 int erased;
1168 volatile unsigned long *flash;
1169
1170 /*
1171 * Check if whole sector is erased
1172 */
1173 size = flash_sector_size(info, i);
1174 erased = 1;
1175 flash = (volatile unsigned long *) info->start[i];
1176 size = size >> 2; /* divide by 4 for longword access */
1177 for (k = 0; k < size; k++) {
1178 if (*flash++ != 0xffffffff) {
1179 erased = 0;
1180 break;
1181 }
1182 }
1183
1184 /* print empty and read-only info */
1185 printf (" %08lX %c %s ",
1186 info->start[i],
1187 erased ? 'E' : ' ',
1188 info->protect[i] ? "RO" : " ");
1189 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1190 printf (" %08lX %s ",
1191 info->start[i],
1192 info->protect[i] ? "RO" : " ");
1193 #endif
1194 }
1195 putc ('\n');
1196 return;
1197 }
1198
1199 /*-----------------------------------------------------------------------
1200 * This is used in a few places in write_buf() to show programming
1201 * progress. Making it a function is nasty because it needs to do side
1202 * effect updates to digit and dots. Repeated code is nasty too, so
1203 * we define it once here.
1204 */
1205 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1206 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1207 if (flash_verbose) { \
1208 dots -= dots_sub; \
1209 if ((scale > 0) && (dots <= 0)) { \
1210 if ((digit % 5) == 0) \
1211 printf ("%d", digit / 5); \
1212 else \
1213 putc ('.'); \
1214 digit--; \
1215 dots += scale; \
1216 } \
1217 }
1218 #else
1219 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1220 #endif
1221
1222 /*-----------------------------------------------------------------------
1223 * Copy memory to flash, returns:
1224 * 0 - OK
1225 * 1 - write timeout
1226 * 2 - Flash not erased
1227 */
1228 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1229 {
1230 ulong wp;
1231 uchar *p;
1232 int aln;
1233 cfiword_t cword;
1234 int i, rc;
1235 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1236 int buffered_size;
1237 #endif
1238 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1239 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1240 int scale = 0;
1241 int dots = 0;
1242
1243 /*
1244 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1245 */
1246 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1247 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1248 CONFIG_FLASH_SHOW_PROGRESS);
1249 }
1250 #endif
1251
1252 /* get lower aligned address */
1253 wp = (addr & ~(info->portwidth - 1));
1254
1255 /* handle unaligned start */
1256 if ((aln = addr - wp) != 0) {
1257 cword.l = 0;
1258 p = (uchar *)wp;
1259 for (i = 0; i < aln; ++i)
1260 flash_add_byte (info, &cword, flash_read8(p + i));
1261
1262 for (; (i < info->portwidth) && (cnt > 0); i++) {
1263 flash_add_byte (info, &cword, *src++);
1264 cnt--;
1265 }
1266 for (; (cnt == 0) && (i < info->portwidth); ++i)
1267 flash_add_byte (info, &cword, flash_read8(p + i));
1268
1269 rc = flash_write_cfiword (info, wp, cword);
1270 if (rc != 0)
1271 return rc;
1272
1273 wp += i;
1274 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1275 }
1276
1277 /* handle the aligned part */
1278 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1279 buffered_size = (info->portwidth / info->chipwidth);
1280 buffered_size *= info->buffer_size;
1281 while (cnt >= info->portwidth) {
1282 /* prohibit buffer write when buffer_size is 1 */
1283 if (info->buffer_size == 1) {
1284 cword.l = 0;
1285 for (i = 0; i < info->portwidth; i++)
1286 flash_add_byte (info, &cword, *src++);
1287 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1288 return rc;
1289 wp += info->portwidth;
1290 cnt -= info->portwidth;
1291 continue;
1292 }
1293
1294 /* write buffer until next buffered_size aligned boundary */
1295 i = buffered_size - (wp % buffered_size);
1296 if (i > cnt)
1297 i = cnt;
1298 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1299 return rc;
1300 i -= i & (info->portwidth - 1);
1301 wp += i;
1302 src += i;
1303 cnt -= i;
1304 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1305 }
1306 #else
1307 while (cnt >= info->portwidth) {
1308 cword.l = 0;
1309 for (i = 0; i < info->portwidth; i++) {
1310 flash_add_byte (info, &cword, *src++);
1311 }
1312 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1313 return rc;
1314 wp += info->portwidth;
1315 cnt -= info->portwidth;
1316 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1317 }
1318 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1319
1320 if (cnt == 0) {
1321 return (0);
1322 }
1323
1324 /*
1325 * handle unaligned tail bytes
1326 */
1327 cword.l = 0;
1328 p = (uchar *)wp;
1329 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1330 flash_add_byte (info, &cword, *src++);
1331 --cnt;
1332 }
1333 for (; i < info->portwidth; ++i)
1334 flash_add_byte (info, &cword, flash_read8(p + i));
1335
1336 return flash_write_cfiword (info, wp, cword);
1337 }
1338
1339 /*-----------------------------------------------------------------------
1340 */
1341 #ifdef CONFIG_SYS_FLASH_PROTECTION
1342
1343 int flash_real_protect (flash_info_t * info, long sector, int prot)
1344 {
1345 int retcode = 0;
1346
1347 switch (info->vendor) {
1348 case CFI_CMDSET_INTEL_PROG_REGIONS:
1349 case CFI_CMDSET_INTEL_STANDARD:
1350 case CFI_CMDSET_INTEL_EXTENDED:
1351 flash_write_cmd (info, sector, 0,
1352 FLASH_CMD_CLEAR_STATUS);
1353 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1354 if (prot)
1355 flash_write_cmd (info, sector, 0,
1356 FLASH_CMD_PROTECT_SET);
1357 else
1358 flash_write_cmd (info, sector, 0,
1359 FLASH_CMD_PROTECT_CLEAR);
1360 break;
1361 case CFI_CMDSET_AMD_EXTENDED:
1362 case CFI_CMDSET_AMD_STANDARD:
1363 /* U-Boot only checks the first byte */
1364 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1365 if (prot) {
1366 flash_unlock_seq (info, 0);
1367 flash_write_cmd (info, 0,
1368 info->addr_unlock1,
1369 ATM_CMD_SOFTLOCK_START);
1370 flash_unlock_seq (info, 0);
1371 flash_write_cmd (info, sector, 0,
1372 ATM_CMD_LOCK_SECT);
1373 } else {
1374 flash_write_cmd (info, 0,
1375 info->addr_unlock1,
1376 AMD_CMD_UNLOCK_START);
1377 if (info->device_id == ATM_ID_BV6416)
1378 flash_write_cmd (info, sector,
1379 0, ATM_CMD_UNLOCK_SECT);
1380 }
1381 }
1382 break;
1383 #ifdef CONFIG_FLASH_CFI_LEGACY
1384 case CFI_CMDSET_AMD_LEGACY:
1385 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1386 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1387 if (prot)
1388 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1389 else
1390 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1391 #endif
1392 };
1393
1394 if ((retcode =
1395 flash_full_status_check (info, sector, info->erase_blk_tout,
1396 prot ? "protect" : "unprotect")) == 0) {
1397
1398 info->protect[sector] = prot;
1399
1400 /*
1401 * On some of Intel's flash chips (marked via legacy_unlock)
1402 * unprotect unprotects all locking.
1403 */
1404 if ((prot == 0) && (info->legacy_unlock)) {
1405 flash_sect_t i;
1406
1407 for (i = 0; i < info->sector_count; i++) {
1408 if (info->protect[i])
1409 flash_real_protect (info, i, 1);
1410 }
1411 }
1412 }
1413 return retcode;
1414 }
1415
1416 /*-----------------------------------------------------------------------
1417 * flash_read_user_serial - read the OneTimeProgramming cells
1418 */
1419 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1420 int len)
1421 {
1422 uchar *src;
1423 uchar *dst;
1424
1425 dst = buffer;
1426 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1427 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1428 memcpy (dst, src + offset, len);
1429 flash_write_cmd (info, 0, 0, info->cmd_reset);
1430 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1431 }
1432
1433 /*
1434 * flash_read_factory_serial - read the device Id from the protection area
1435 */
1436 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1437 int len)
1438 {
1439 uchar *src;
1440
1441 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1442 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1443 memcpy (buffer, src + offset, len);
1444 flash_write_cmd (info, 0, 0, info->cmd_reset);
1445 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1446 }
1447
1448 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1449
1450 /*-----------------------------------------------------------------------
1451 * Reverse the order of the erase regions in the CFI QRY structure.
1452 * This is needed for chips that are either a) correctly detected as
1453 * top-boot, or b) buggy.
1454 */
1455 static void cfi_reverse_geometry(struct cfi_qry *qry)
1456 {
1457 unsigned int i, j;
1458 u32 tmp;
1459
1460 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1461 tmp = qry->erase_region_info[i];
1462 qry->erase_region_info[i] = qry->erase_region_info[j];
1463 qry->erase_region_info[j] = tmp;
1464 }
1465 }
1466
1467 /*-----------------------------------------------------------------------
1468 * read jedec ids from device and set corresponding fields in info struct
1469 *
1470 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1471 *
1472 */
1473 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1474 {
1475 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1476 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1477 udelay(1000); /* some flash are slow to respond */
1478 info->manufacturer_id = flash_read_uchar (info,
1479 FLASH_OFFSET_MANUFACTURER_ID);
1480 info->device_id = flash_read_uchar (info,
1481 FLASH_OFFSET_DEVICE_ID);
1482 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1483 }
1484
1485 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1486 {
1487 info->cmd_reset = FLASH_CMD_RESET;
1488
1489 cmdset_intel_read_jedec_ids(info);
1490 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1491
1492 #ifdef CONFIG_SYS_FLASH_PROTECTION
1493 /* read legacy lock/unlock bit from intel flash */
1494 if (info->ext_addr) {
1495 info->legacy_unlock = flash_read_uchar (info,
1496 info->ext_addr + 5) & 0x08;
1497 }
1498 #endif
1499
1500 return 0;
1501 }
1502
1503 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1504 {
1505 ushort bankId = 0;
1506 uchar manuId;
1507
1508 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1509 flash_unlock_seq(info, 0);
1510 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1511 udelay(1000); /* some flash are slow to respond */
1512
1513 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1514 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1515 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1516 bankId += 0x100;
1517 manuId = flash_read_uchar (info,
1518 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1519 }
1520 info->manufacturer_id = manuId;
1521
1522 switch (info->chipwidth){
1523 case FLASH_CFI_8BIT:
1524 info->device_id = flash_read_uchar (info,
1525 FLASH_OFFSET_DEVICE_ID);
1526 if (info->device_id == 0x7E) {
1527 /* AMD 3-byte (expanded) device ids */
1528 info->device_id2 = flash_read_uchar (info,
1529 FLASH_OFFSET_DEVICE_ID2);
1530 info->device_id2 <<= 8;
1531 info->device_id2 |= flash_read_uchar (info,
1532 FLASH_OFFSET_DEVICE_ID3);
1533 }
1534 break;
1535 case FLASH_CFI_16BIT:
1536 info->device_id = flash_read_word (info,
1537 FLASH_OFFSET_DEVICE_ID);
1538 break;
1539 default:
1540 break;
1541 }
1542 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1543 }
1544
1545 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1546 {
1547 info->cmd_reset = AMD_CMD_RESET;
1548
1549 cmdset_amd_read_jedec_ids(info);
1550 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1551
1552 return 0;
1553 }
1554
1555 #ifdef CONFIG_FLASH_CFI_LEGACY
1556 static void flash_read_jedec_ids (flash_info_t * info)
1557 {
1558 info->manufacturer_id = 0;
1559 info->device_id = 0;
1560 info->device_id2 = 0;
1561
1562 switch (info->vendor) {
1563 case CFI_CMDSET_INTEL_PROG_REGIONS:
1564 case CFI_CMDSET_INTEL_STANDARD:
1565 case CFI_CMDSET_INTEL_EXTENDED:
1566 cmdset_intel_read_jedec_ids(info);
1567 break;
1568 case CFI_CMDSET_AMD_STANDARD:
1569 case CFI_CMDSET_AMD_EXTENDED:
1570 cmdset_amd_read_jedec_ids(info);
1571 break;
1572 default:
1573 break;
1574 }
1575 }
1576
1577 /*-----------------------------------------------------------------------
1578 * Call board code to request info about non-CFI flash.
1579 * board_flash_get_legacy needs to fill in at least:
1580 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1581 */
1582 static int flash_detect_legacy(phys_addr_t base, int banknum)
1583 {
1584 flash_info_t *info = &flash_info[banknum];
1585
1586 if (board_flash_get_legacy(base, banknum, info)) {
1587 /* board code may have filled info completely. If not, we
1588 use JEDEC ID probing. */
1589 if (!info->vendor) {
1590 int modes[] = {
1591 CFI_CMDSET_AMD_STANDARD,
1592 CFI_CMDSET_INTEL_STANDARD
1593 };
1594 int i;
1595
1596 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1597 info->vendor = modes[i];
1598 info->start[0] =
1599 (ulong)map_physmem(base,
1600 info->portwidth,
1601 MAP_NOCACHE);
1602 if (info->portwidth == FLASH_CFI_8BIT
1603 && info->interface == FLASH_CFI_X8X16) {
1604 info->addr_unlock1 = 0x2AAA;
1605 info->addr_unlock2 = 0x5555;
1606 } else {
1607 info->addr_unlock1 = 0x5555;
1608 info->addr_unlock2 = 0x2AAA;
1609 }
1610 flash_read_jedec_ids(info);
1611 debug("JEDEC PROBE: ID %x %x %x\n",
1612 info->manufacturer_id,
1613 info->device_id,
1614 info->device_id2);
1615 if (jedec_flash_match(info, info->start[0]))
1616 break;
1617 else
1618 unmap_physmem((void *)info->start[0],
1619 MAP_NOCACHE);
1620 }
1621 }
1622
1623 switch(info->vendor) {
1624 case CFI_CMDSET_INTEL_PROG_REGIONS:
1625 case CFI_CMDSET_INTEL_STANDARD:
1626 case CFI_CMDSET_INTEL_EXTENDED:
1627 info->cmd_reset = FLASH_CMD_RESET;
1628 break;
1629 case CFI_CMDSET_AMD_STANDARD:
1630 case CFI_CMDSET_AMD_EXTENDED:
1631 case CFI_CMDSET_AMD_LEGACY:
1632 info->cmd_reset = AMD_CMD_RESET;
1633 break;
1634 }
1635 info->flash_id = FLASH_MAN_CFI;
1636 return 1;
1637 }
1638 return 0; /* use CFI */
1639 }
1640 #else
1641 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1642 {
1643 return 0; /* use CFI */
1644 }
1645 #endif
1646
1647 /*-----------------------------------------------------------------------
1648 * detect if flash is compatible with the Common Flash Interface (CFI)
1649 * http://www.jedec.org/download/search/jesd68.pdf
1650 */
1651 static void flash_read_cfi (flash_info_t *info, void *buf,
1652 unsigned int start, size_t len)
1653 {
1654 u8 *p = buf;
1655 unsigned int i;
1656
1657 for (i = 0; i < len; i++)
1658 p[i] = flash_read_uchar(info, start + i);
1659 }
1660
1661 void __flash_cmd_reset(flash_info_t *info)
1662 {
1663 /*
1664 * We do not yet know what kind of commandset to use, so we issue
1665 * the reset command in both Intel and AMD variants, in the hope
1666 * that AMD flash roms ignore the Intel command.
1667 */
1668 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1669 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1670 }
1671 void flash_cmd_reset(flash_info_t *info)
1672 __attribute__((weak,alias("__flash_cmd_reset")));
1673
1674 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1675 {
1676 int cfi_offset;
1677
1678 /* Issue FLASH reset command */
1679 flash_cmd_reset(info);
1680
1681 for (cfi_offset=0;
1682 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1683 cfi_offset++) {
1684 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1685 FLASH_CMD_CFI);
1686 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1687 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1688 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1689 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1690 sizeof(struct cfi_qry));
1691 info->interface = le16_to_cpu(qry->interface_desc);
1692
1693 info->cfi_offset = flash_offset_cfi[cfi_offset];
1694 debug ("device interface is %d\n",
1695 info->interface);
1696 debug ("found port %d chip %d ",
1697 info->portwidth, info->chipwidth);
1698 debug ("port %d bits chip %d bits\n",
1699 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1700 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1701
1702 /* calculate command offsets as in the Linux driver */
1703 info->addr_unlock1 = 0x555;
1704 info->addr_unlock2 = 0x2aa;
1705
1706 /*
1707 * modify the unlock address if we are
1708 * in compatibility mode
1709 */
1710 if ( /* x8/x16 in x8 mode */
1711 ((info->chipwidth == FLASH_CFI_BY8) &&
1712 (info->interface == FLASH_CFI_X8X16)) ||
1713 /* x16/x32 in x16 mode */
1714 ((info->chipwidth == FLASH_CFI_BY16) &&
1715 (info->interface == FLASH_CFI_X16X32)))
1716 {
1717 info->addr_unlock1 = 0xaaa;
1718 info->addr_unlock2 = 0x555;
1719 }
1720
1721 info->name = "CFI conformant";
1722 return 1;
1723 }
1724 }
1725
1726 return 0;
1727 }
1728
1729 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1730 {
1731 debug ("flash detect cfi\n");
1732
1733 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1734 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1735 for (info->chipwidth = FLASH_CFI_BY8;
1736 info->chipwidth <= info->portwidth;
1737 info->chipwidth <<= 1)
1738 if (__flash_detect_cfi(info, qry))
1739 return 1;
1740 }
1741 debug ("not found\n");
1742 return 0;
1743 }
1744
1745 /*
1746 * Manufacturer-specific quirks. Add workarounds for geometry
1747 * reversal, etc. here.
1748 */
1749 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1750 {
1751 /* check if flash geometry needs reversal */
1752 if (qry->num_erase_regions > 1) {
1753 /* reverse geometry if top boot part */
1754 if (info->cfi_version < 0x3131) {
1755 /* CFI < 1.1, try to guess from device id */
1756 if ((info->device_id & 0x80) != 0)
1757 cfi_reverse_geometry(qry);
1758 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1759 /* CFI >= 1.1, deduct from top/bottom flag */
1760 /* note: ext_addr is valid since cfi_version > 0 */
1761 cfi_reverse_geometry(qry);
1762 }
1763 }
1764 }
1765
1766 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1767 {
1768 int reverse_geometry = 0;
1769
1770 /* Check the "top boot" bit in the PRI */
1771 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1772 reverse_geometry = 1;
1773
1774 /* AT49BV6416(T) list the erase regions in the wrong order.
1775 * However, the device ID is identical with the non-broken
1776 * AT49BV642D they differ in the high byte.
1777 */
1778 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1779 reverse_geometry = !reverse_geometry;
1780
1781 if (reverse_geometry)
1782 cfi_reverse_geometry(qry);
1783 }
1784
1785 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1786 {
1787 /* check if flash geometry needs reversal */
1788 if (qry->num_erase_regions > 1) {
1789 /* reverse geometry if top boot part */
1790 if (info->cfi_version < 0x3131) {
1791 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1792 if (info->device_id == 0x22CA ||
1793 info->device_id == 0x2256) {
1794 cfi_reverse_geometry(qry);
1795 }
1796 }
1797 }
1798 }
1799
1800 /*
1801 * The following code cannot be run from FLASH!
1802 *
1803 */
1804 ulong flash_get_size (phys_addr_t base, int banknum)
1805 {
1806 flash_info_t *info = &flash_info[banknum];
1807 int i, j;
1808 flash_sect_t sect_cnt;
1809 phys_addr_t sector;
1810 unsigned long tmp;
1811 int size_ratio;
1812 uchar num_erase_regions;
1813 int erase_region_size;
1814 int erase_region_count;
1815 struct cfi_qry qry;
1816
1817 memset(&qry, 0, sizeof(qry));
1818
1819 info->ext_addr = 0;
1820 info->cfi_version = 0;
1821 #ifdef CONFIG_SYS_FLASH_PROTECTION
1822 info->legacy_unlock = 0;
1823 #endif
1824
1825 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1826
1827 if (flash_detect_cfi (info, &qry)) {
1828 info->vendor = le16_to_cpu(qry.p_id);
1829 info->ext_addr = le16_to_cpu(qry.p_adr);
1830 num_erase_regions = qry.num_erase_regions;
1831
1832 if (info->ext_addr) {
1833 info->cfi_version = (ushort) flash_read_uchar (info,
1834 info->ext_addr + 3) << 8;
1835 info->cfi_version |= (ushort) flash_read_uchar (info,
1836 info->ext_addr + 4);
1837 }
1838
1839 #ifdef DEBUG
1840 flash_printqry (&qry);
1841 #endif
1842
1843 switch (info->vendor) {
1844 case CFI_CMDSET_INTEL_PROG_REGIONS:
1845 case CFI_CMDSET_INTEL_STANDARD:
1846 case CFI_CMDSET_INTEL_EXTENDED:
1847 cmdset_intel_init(info, &qry);
1848 break;
1849 case CFI_CMDSET_AMD_STANDARD:
1850 case CFI_CMDSET_AMD_EXTENDED:
1851 cmdset_amd_init(info, &qry);
1852 break;
1853 default:
1854 printf("CFI: Unknown command set 0x%x\n",
1855 info->vendor);
1856 /*
1857 * Unfortunately, this means we don't know how
1858 * to get the chip back to Read mode. Might
1859 * as well try an Intel-style reset...
1860 */
1861 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1862 return 0;
1863 }
1864
1865 /* Do manufacturer-specific fixups */
1866 switch (info->manufacturer_id) {
1867 case 0x0001:
1868 flash_fixup_amd(info, &qry);
1869 break;
1870 case 0x001f:
1871 flash_fixup_atmel(info, &qry);
1872 break;
1873 case 0x0020:
1874 flash_fixup_stm(info, &qry);
1875 break;
1876 }
1877
1878 debug ("manufacturer is %d\n", info->vendor);
1879 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1880 debug ("device id is 0x%x\n", info->device_id);
1881 debug ("device id2 is 0x%x\n", info->device_id2);
1882 debug ("cfi version is 0x%04x\n", info->cfi_version);
1883
1884 size_ratio = info->portwidth / info->chipwidth;
1885 /* if the chip is x8/x16 reduce the ratio by half */
1886 if ((info->interface == FLASH_CFI_X8X16)
1887 && (info->chipwidth == FLASH_CFI_BY8)) {
1888 size_ratio >>= 1;
1889 }
1890 debug ("size_ratio %d port %d bits chip %d bits\n",
1891 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1892 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1893 debug ("found %d erase regions\n", num_erase_regions);
1894 sect_cnt = 0;
1895 sector = base;
1896 for (i = 0; i < num_erase_regions; i++) {
1897 if (i > NUM_ERASE_REGIONS) {
1898 printf ("%d erase regions found, only %d used\n",
1899 num_erase_regions, NUM_ERASE_REGIONS);
1900 break;
1901 }
1902
1903 tmp = le32_to_cpu(qry.erase_region_info[i]);
1904 debug("erase region %u: 0x%08lx\n", i, tmp);
1905
1906 erase_region_count = (tmp & 0xffff) + 1;
1907 tmp >>= 16;
1908 erase_region_size =
1909 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1910 debug ("erase_region_count = %d erase_region_size = %d\n",
1911 erase_region_count, erase_region_size);
1912 for (j = 0; j < erase_region_count; j++) {
1913 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1914 printf("ERROR: too many flash sectors\n");
1915 break;
1916 }
1917 info->start[sect_cnt] =
1918 (ulong)map_physmem(sector,
1919 info->portwidth,
1920 MAP_NOCACHE);
1921 sector += (erase_region_size * size_ratio);
1922
1923 /*
1924 * Only read protection status from
1925 * supported devices (intel...)
1926 */
1927 switch (info->vendor) {
1928 case CFI_CMDSET_INTEL_PROG_REGIONS:
1929 case CFI_CMDSET_INTEL_EXTENDED:
1930 case CFI_CMDSET_INTEL_STANDARD:
1931 info->protect[sect_cnt] =
1932 flash_isset (info, sect_cnt,
1933 FLASH_OFFSET_PROTECT,
1934 FLASH_STATUS_PROTECT);
1935 break;
1936 default:
1937 /* default: not protected */
1938 info->protect[sect_cnt] = 0;
1939 }
1940
1941 sect_cnt++;
1942 }
1943 }
1944
1945 info->sector_count = sect_cnt;
1946 info->size = 1 << qry.dev_size;
1947 /* multiply the size by the number of chips */
1948 info->size *= size_ratio;
1949 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1950 tmp = 1 << qry.block_erase_timeout_typ;
1951 info->erase_blk_tout = tmp *
1952 (1 << qry.block_erase_timeout_max);
1953 tmp = (1 << qry.buf_write_timeout_typ) *
1954 (1 << qry.buf_write_timeout_max);
1955
1956 /* round up when converting to ms */
1957 info->buffer_write_tout = (tmp + 999) / 1000;
1958 tmp = (1 << qry.word_write_timeout_typ) *
1959 (1 << qry.word_write_timeout_max);
1960 /* round up when converting to ms */
1961 info->write_tout = (tmp + 999) / 1000;
1962 info->flash_id = FLASH_MAN_CFI;
1963 if ((info->interface == FLASH_CFI_X8X16) &&
1964 (info->chipwidth == FLASH_CFI_BY8)) {
1965 /* XXX - Need to test on x8/x16 in parallel. */
1966 info->portwidth >>= 1;
1967 }
1968
1969 flash_write_cmd (info, 0, 0, info->cmd_reset);
1970 }
1971
1972 return (info->size);
1973 }
1974
1975 void flash_set_verbose(uint v)
1976 {
1977 flash_verbose = v;
1978 }
1979
1980 /*-----------------------------------------------------------------------
1981 */
1982 unsigned long flash_init (void)
1983 {
1984 unsigned long size = 0;
1985 int i;
1986 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
1987 struct apl_s {
1988 ulong start;
1989 ulong size;
1990 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
1991 #endif
1992
1993 #ifdef CONFIG_SYS_FLASH_PROTECTION
1994 /* read environment from EEPROM */
1995 char s[64];
1996 getenv_r ("unlock", s, sizeof(s));
1997 #endif
1998
1999 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
2000
2001 /* Init: no FLASHes known */
2002 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2003 flash_info[i].flash_id = FLASH_UNKNOWN;
2004
2005 if (!flash_detect_legacy (BANK_BASE(i), i))
2006 flash_get_size (BANK_BASE(i), i);
2007 size += flash_info[i].size;
2008 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2009 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2010 printf ("## Unknown FLASH on Bank %d "
2011 "- Size = 0x%08lx = %ld MB\n",
2012 i+1, flash_info[i].size,
2013 flash_info[i].size << 20);
2014 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2015 }
2016 #ifdef CONFIG_SYS_FLASH_PROTECTION
2017 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2018 /*
2019 * Only the U-Boot image and it's environment
2020 * is protected, all other sectors are
2021 * unprotected (unlocked) if flash hardware
2022 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2023 * and the environment variable "unlock" is
2024 * set to "yes".
2025 */
2026 if (flash_info[i].legacy_unlock) {
2027 int k;
2028
2029 /*
2030 * Disable legacy_unlock temporarily,
2031 * since flash_real_protect would
2032 * relock all other sectors again
2033 * otherwise.
2034 */
2035 flash_info[i].legacy_unlock = 0;
2036
2037 /*
2038 * Legacy unlocking (e.g. Intel J3) ->
2039 * unlock only one sector. This will
2040 * unlock all sectors.
2041 */
2042 flash_real_protect (&flash_info[i], 0, 0);
2043
2044 flash_info[i].legacy_unlock = 1;
2045
2046 /*
2047 * Manually mark other sectors as
2048 * unlocked (unprotected)
2049 */
2050 for (k = 1; k < flash_info[i].sector_count; k++)
2051 flash_info[i].protect[k] = 0;
2052 } else {
2053 /*
2054 * No legancy unlocking -> unlock all sectors
2055 */
2056 flash_protect (FLAG_PROTECT_CLEAR,
2057 flash_info[i].start[0],
2058 flash_info[i].start[0]
2059 + flash_info[i].size - 1,
2060 &flash_info[i]);
2061 }
2062 }
2063 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2064 }
2065
2066 /* Monitor protection ON by default */
2067 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2068 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2069 flash_protect (FLAG_PROTECT_SET,
2070 CONFIG_SYS_MONITOR_BASE,
2071 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2072 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2073 #endif
2074
2075 /* Environment protection ON by default */
2076 #ifdef CONFIG_ENV_IS_IN_FLASH
2077 flash_protect (FLAG_PROTECT_SET,
2078 CONFIG_ENV_ADDR,
2079 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2080 flash_get_info(CONFIG_ENV_ADDR));
2081 #endif
2082
2083 /* Redundant environment protection ON by default */
2084 #ifdef CONFIG_ENV_ADDR_REDUND
2085 flash_protect (FLAG_PROTECT_SET,
2086 CONFIG_ENV_ADDR_REDUND,
2087 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2088 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2089 #endif
2090
2091 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2092 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2093 debug("autoprotecting from %08x to %08x\n",
2094 apl[i].start, apl[i].start + apl[i].size - 1);
2095 flash_protect (FLAG_PROTECT_SET,
2096 apl[i].start,
2097 apl[i].start + apl[i].size - 1,
2098 flash_get_info(apl[i].start));
2099 }
2100 #endif
2101
2102 #ifdef CONFIG_FLASH_CFI_MTD
2103 cfi_mtd_init();
2104 #endif
2105
2106 return (size);
2107 }
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