2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * SPDX-License-Identifier: GPL-2.0+
17 /* The DEBUG define must be before common to enable debugging */
21 #include <asm/processor.h>
23 #include <asm/byteorder.h>
24 #include <asm/unaligned.h>
25 #include <environment.h>
26 #include <mtd/cfi_flash.h>
30 * This file implements a Common Flash Interface (CFI) driver for
33 * The width of the port and the width of the chips are determined at
34 * initialization. These widths are used to calculate the address for
35 * access CFI data structures.
38 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
39 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
40 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
41 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
42 * AMD CFI Specification, Release 2.0 December 1, 2001
43 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
44 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
46 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
47 * reading and writing ... (yes there is such a Hardware).
50 static uint flash_offset_cfi
[2] = { FLASH_OFFSET_CFI
, FLASH_OFFSET_CFI_ALT
};
51 #ifdef CONFIG_FLASH_CFI_MTD
52 static uint flash_verbose
= 1;
54 #define flash_verbose 1
57 flash_info_t flash_info
[CFI_MAX_FLASH_BANKS
]; /* FLASH chips info */
60 * Check if chip width is defined. If not, start detecting with 8bit.
62 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
63 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
67 * 0xffff is an undefined value for the configuration register. When
68 * this value is returned, the configuration register shall not be
69 * written at all (default mode).
71 static u16
cfi_flash_config_reg(int i
)
73 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
74 return ((u16
[])CONFIG_SYS_CFI_FLASH_CONFIG_REGS
)[i
];
80 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
81 int cfi_flash_num_flash_banks
= CONFIG_SYS_MAX_FLASH_BANKS_DETECT
;
84 static phys_addr_t
__cfi_flash_bank_addr(int i
)
86 return ((phys_addr_t
[])CONFIG_SYS_FLASH_BANKS_LIST
)[i
];
88 phys_addr_t
cfi_flash_bank_addr(int i
)
89 __attribute__((weak
, alias("__cfi_flash_bank_addr")));
91 static unsigned long __cfi_flash_bank_size(int i
)
93 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
94 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES
)[i
];
99 unsigned long cfi_flash_bank_size(int i
)
100 __attribute__((weak
, alias("__cfi_flash_bank_size")));
102 static void __flash_write8(u8 value
, void *addr
)
104 __raw_writeb(value
, addr
);
107 static void __flash_write16(u16 value
, void *addr
)
109 __raw_writew(value
, addr
);
112 static void __flash_write32(u32 value
, void *addr
)
114 __raw_writel(value
, addr
);
117 static void __flash_write64(u64 value
, void *addr
)
119 /* No architectures currently implement __raw_writeq() */
120 *(volatile u64
*)addr
= value
;
123 static u8
__flash_read8(void *addr
)
125 return __raw_readb(addr
);
128 static u16
__flash_read16(void *addr
)
130 return __raw_readw(addr
);
133 static u32
__flash_read32(void *addr
)
135 return __raw_readl(addr
);
138 static u64
__flash_read64(void *addr
)
140 /* No architectures currently implement __raw_readq() */
141 return *(volatile u64
*)addr
;
144 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
145 void flash_write8(u8 value
, void *addr
)__attribute__((weak
, alias("__flash_write8")));
146 void flash_write16(u16 value
, void *addr
)__attribute__((weak
, alias("__flash_write16")));
147 void flash_write32(u32 value
, void *addr
)__attribute__((weak
, alias("__flash_write32")));
148 void flash_write64(u64 value
, void *addr
)__attribute__((weak
, alias("__flash_write64")));
149 u8
flash_read8(void *addr
)__attribute__((weak
, alias("__flash_read8")));
150 u16
flash_read16(void *addr
)__attribute__((weak
, alias("__flash_read16")));
151 u32
flash_read32(void *addr
)__attribute__((weak
, alias("__flash_read32")));
152 u64
flash_read64(void *addr
)__attribute__((weak
, alias("__flash_read64")));
154 #define flash_write8 __flash_write8
155 #define flash_write16 __flash_write16
156 #define flash_write32 __flash_write32
157 #define flash_write64 __flash_write64
158 #define flash_read8 __flash_read8
159 #define flash_read16 __flash_read16
160 #define flash_read32 __flash_read32
161 #define flash_read64 __flash_read64
164 /*-----------------------------------------------------------------------
166 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
167 flash_info_t
*flash_get_info(ulong base
)
172 for (i
= 0; i
< CONFIG_SYS_MAX_FLASH_BANKS
; i
++) {
173 info
= &flash_info
[i
];
174 if (info
->size
&& info
->start
[0] <= base
&&
175 base
<= info
->start
[0] + info
->size
- 1)
183 unsigned long flash_sector_size(flash_info_t
*info
, flash_sect_t sect
)
185 if (sect
!= (info
->sector_count
- 1))
186 return info
->start
[sect
+ 1] - info
->start
[sect
];
188 return info
->start
[0] + info
->size
- info
->start
[sect
];
191 /*-----------------------------------------------------------------------
192 * create an address based on the offset and the port width
195 flash_map (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
197 unsigned int byte_offset
= offset
* info
->portwidth
;
199 return (void *)(info
->start
[sect
] + byte_offset
);
202 static inline void flash_unmap(flash_info_t
*info
, flash_sect_t sect
,
203 unsigned int offset
, void *addr
)
207 /*-----------------------------------------------------------------------
208 * make a proper sized command based on the port and chip widths
210 static void flash_make_cmd(flash_info_t
*info
, u32 cmd
, void *cmdbuf
)
215 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
216 u32 cmd_le
= cpu_to_le32(cmd
);
219 uchar
*cp
= (uchar
*) cmdbuf
;
221 for (i
= info
->portwidth
; i
> 0; i
--){
222 cword_offset
= (info
->portwidth
-i
)%info
->chipwidth
;
223 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
224 cp_offset
= info
->portwidth
- i
;
225 val
= *((uchar
*)&cmd_le
+ cword_offset
);
228 val
= *((uchar
*)&cmd
+ sizeof(u32
) - cword_offset
- 1);
230 cp
[cp_offset
] = (cword_offset
>= sizeof(u32
)) ? 0x00 : val
;
235 /*-----------------------------------------------------------------------
238 static void print_longlong (char *str
, unsigned long long data
)
244 for (i
= 0; i
< 8; i
++)
245 sprintf (&str
[i
* 2], "%2.2x", *cp
++);
248 static void flash_printqry (struct cfi_qry
*qry
)
253 for (x
= 0; x
< sizeof(struct cfi_qry
); x
+= 16) {
255 for (y
= 0; y
< 16; y
++)
256 debug("%2.2x ", p
[x
+ y
]);
258 for (y
= 0; y
< 16; y
++) {
259 unsigned char c
= p
[x
+ y
];
260 if (c
>= 0x20 && c
<= 0x7e)
271 /*-----------------------------------------------------------------------
272 * read a character at a port width address
274 static inline uchar
flash_read_uchar (flash_info_t
* info
, uint offset
)
279 cp
= flash_map (info
, 0, offset
);
280 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
281 retval
= flash_read8(cp
);
283 retval
= flash_read8(cp
+ info
->portwidth
- 1);
285 flash_unmap (info
, 0, offset
, cp
);
289 /*-----------------------------------------------------------------------
290 * read a word at a port width address, assume 16bit bus
292 static inline ushort
flash_read_word (flash_info_t
* info
, uint offset
)
294 ushort
*addr
, retval
;
296 addr
= flash_map (info
, 0, offset
);
297 retval
= flash_read16 (addr
);
298 flash_unmap (info
, 0, offset
, addr
);
303 /*-----------------------------------------------------------------------
304 * read a long word by picking the least significant byte of each maximum
305 * port size word. Swap for ppc format.
307 static ulong
flash_read_long (flash_info_t
* info
, flash_sect_t sect
,
316 addr
= flash_map (info
, sect
, offset
);
319 debug ("long addr is at %p info->portwidth = %d\n", addr
,
321 for (x
= 0; x
< 4 * info
->portwidth
; x
++) {
322 debug ("addr[%x] = 0x%x\n", x
, flash_read8(addr
+ x
));
325 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
326 retval
= ((flash_read8(addr
) << 16) |
327 (flash_read8(addr
+ info
->portwidth
) << 24) |
328 (flash_read8(addr
+ 2 * info
->portwidth
)) |
329 (flash_read8(addr
+ 3 * info
->portwidth
) << 8));
331 retval
= ((flash_read8(addr
+ 2 * info
->portwidth
- 1) << 24) |
332 (flash_read8(addr
+ info
->portwidth
- 1) << 16) |
333 (flash_read8(addr
+ 4 * info
->portwidth
- 1) << 8) |
334 (flash_read8(addr
+ 3 * info
->portwidth
- 1)));
336 flash_unmap(info
, sect
, offset
, addr
);
342 * Write a proper sized command to the correct address
344 void flash_write_cmd (flash_info_t
* info
, flash_sect_t sect
,
345 uint offset
, u32 cmd
)
351 addr
= flash_map (info
, sect
, offset
);
352 flash_make_cmd (info
, cmd
, &cword
);
353 switch (info
->portwidth
) {
355 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr
, cmd
,
356 cword
.c
, info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
357 flash_write8(cword
.c
, addr
);
359 case FLASH_CFI_16BIT
:
360 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr
,
362 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
363 flash_write16(cword
.w
, addr
);
365 case FLASH_CFI_32BIT
:
366 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr
,
368 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
369 flash_write32(cword
.l
, addr
);
371 case FLASH_CFI_64BIT
:
376 print_longlong (str
, cword
.ll
);
378 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
380 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
383 flash_write64(cword
.ll
, addr
);
387 /* Ensure all the instructions are fully finished */
390 flash_unmap(info
, sect
, offset
, addr
);
393 static void flash_unlock_seq (flash_info_t
* info
, flash_sect_t sect
)
395 flash_write_cmd (info
, sect
, info
->addr_unlock1
, AMD_CMD_UNLOCK_START
);
396 flash_write_cmd (info
, sect
, info
->addr_unlock2
, AMD_CMD_UNLOCK_ACK
);
399 /*-----------------------------------------------------------------------
401 static int flash_isequal (flash_info_t
* info
, flash_sect_t sect
,
402 uint offset
, uchar cmd
)
408 addr
= flash_map (info
, sect
, offset
);
409 flash_make_cmd (info
, cmd
, &cword
);
411 debug ("is= cmd %x(%c) addr %p ", cmd
, cmd
, addr
);
412 switch (info
->portwidth
) {
414 debug ("is= %x %x\n", flash_read8(addr
), cword
.c
);
415 retval
= (flash_read8(addr
) == cword
.c
);
417 case FLASH_CFI_16BIT
:
418 debug ("is= %4.4x %4.4x\n", flash_read16(addr
), cword
.w
);
419 retval
= (flash_read16(addr
) == cword
.w
);
421 case FLASH_CFI_32BIT
:
422 debug ("is= %8.8x %8.8lx\n", flash_read32(addr
), cword
.l
);
423 retval
= (flash_read32(addr
) == cword
.l
);
425 case FLASH_CFI_64BIT
:
431 print_longlong (str1
, flash_read64(addr
));
432 print_longlong (str2
, cword
.ll
);
433 debug ("is= %s %s\n", str1
, str2
);
436 retval
= (flash_read64(addr
) == cword
.ll
);
442 flash_unmap(info
, sect
, offset
, addr
);
447 /*-----------------------------------------------------------------------
449 static int flash_isset (flash_info_t
* info
, flash_sect_t sect
,
450 uint offset
, uchar cmd
)
456 addr
= flash_map (info
, sect
, offset
);
457 flash_make_cmd (info
, cmd
, &cword
);
458 switch (info
->portwidth
) {
460 retval
= ((flash_read8(addr
) & cword
.c
) == cword
.c
);
462 case FLASH_CFI_16BIT
:
463 retval
= ((flash_read16(addr
) & cword
.w
) == cword
.w
);
465 case FLASH_CFI_32BIT
:
466 retval
= ((flash_read32(addr
) & cword
.l
) == cword
.l
);
468 case FLASH_CFI_64BIT
:
469 retval
= ((flash_read64(addr
) & cword
.ll
) == cword
.ll
);
475 flash_unmap(info
, sect
, offset
, addr
);
480 /*-----------------------------------------------------------------------
482 static int flash_toggle (flash_info_t
* info
, flash_sect_t sect
,
483 uint offset
, uchar cmd
)
489 addr
= flash_map (info
, sect
, offset
);
490 flash_make_cmd (info
, cmd
, &cword
);
491 switch (info
->portwidth
) {
493 retval
= flash_read8(addr
) != flash_read8(addr
);
495 case FLASH_CFI_16BIT
:
496 retval
= flash_read16(addr
) != flash_read16(addr
);
498 case FLASH_CFI_32BIT
:
499 retval
= flash_read32(addr
) != flash_read32(addr
);
501 case FLASH_CFI_64BIT
:
502 retval
= ( (flash_read32( addr
) != flash_read32( addr
)) ||
503 (flash_read32(addr
+4) != flash_read32(addr
+4)) );
509 flash_unmap(info
, sect
, offset
, addr
);
515 * flash_is_busy - check to see if the flash is busy
517 * This routine checks the status of the chip and returns true if the
520 static int flash_is_busy (flash_info_t
* info
, flash_sect_t sect
)
524 switch (info
->vendor
) {
525 case CFI_CMDSET_INTEL_PROG_REGIONS
:
526 case CFI_CMDSET_INTEL_STANDARD
:
527 case CFI_CMDSET_INTEL_EXTENDED
:
528 retval
= !flash_isset (info
, sect
, 0, FLASH_STATUS_DONE
);
530 case CFI_CMDSET_AMD_STANDARD
:
531 case CFI_CMDSET_AMD_EXTENDED
:
532 #ifdef CONFIG_FLASH_CFI_LEGACY
533 case CFI_CMDSET_AMD_LEGACY
:
535 retval
= flash_toggle (info
, sect
, 0, AMD_STATUS_TOGGLE
);
540 debug ("flash_is_busy: %d\n", retval
);
544 /*-----------------------------------------------------------------------
545 * wait for XSR.7 to be set. Time out with an error if it does not.
546 * This routine does not set the flash to read-array mode.
548 static int flash_status_check (flash_info_t
* info
, flash_sect_t sector
,
549 ulong tout
, char *prompt
)
553 #if CONFIG_SYS_HZ != 1000
554 if ((ulong
)CONFIG_SYS_HZ
> 100000)
555 tout
*= (ulong
)CONFIG_SYS_HZ
/ 1000; /* for a big HZ, avoid overflow */
557 tout
= DIV_ROUND_UP(tout
* (ulong
)CONFIG_SYS_HZ
, 1000);
560 /* Wait for command completion */
561 #ifdef CONFIG_SYS_LOW_RES_TIMER
564 start
= get_timer (0);
566 while (flash_is_busy (info
, sector
)) {
567 if (get_timer (start
) > tout
) {
568 printf ("Flash %s timeout at address %lx data %lx\n",
569 prompt
, info
->start
[sector
],
570 flash_read_long (info
, sector
, 0));
571 flash_write_cmd (info
, sector
, 0, info
->cmd_reset
);
575 udelay (1); /* also triggers watchdog */
580 /*-----------------------------------------------------------------------
581 * Wait for XSR.7 to be set, if it times out print an error, otherwise
582 * do a full status check.
584 * This routine sets the flash to read-array mode.
586 static int flash_full_status_check (flash_info_t
* info
, flash_sect_t sector
,
587 ulong tout
, char *prompt
)
591 retcode
= flash_status_check (info
, sector
, tout
, prompt
);
592 switch (info
->vendor
) {
593 case CFI_CMDSET_INTEL_PROG_REGIONS
:
594 case CFI_CMDSET_INTEL_EXTENDED
:
595 case CFI_CMDSET_INTEL_STANDARD
:
596 if ((retcode
!= ERR_OK
)
597 && !flash_isequal (info
, sector
, 0, FLASH_STATUS_DONE
)) {
599 printf ("Flash %s error at address %lx\n", prompt
,
600 info
->start
[sector
]);
601 if (flash_isset (info
, sector
, 0, FLASH_STATUS_ECLBS
|
602 FLASH_STATUS_PSLBS
)) {
603 puts ("Command Sequence Error.\n");
604 } else if (flash_isset (info
, sector
, 0,
605 FLASH_STATUS_ECLBS
)) {
606 puts ("Block Erase Error.\n");
607 retcode
= ERR_NOT_ERASED
;
608 } else if (flash_isset (info
, sector
, 0,
609 FLASH_STATUS_PSLBS
)) {
610 puts ("Locking Error\n");
612 if (flash_isset (info
, sector
, 0, FLASH_STATUS_DPS
)) {
613 puts ("Block locked.\n");
614 retcode
= ERR_PROTECTED
;
616 if (flash_isset (info
, sector
, 0, FLASH_STATUS_VPENS
))
617 puts ("Vpp Low Error.\n");
619 flash_write_cmd (info
, sector
, 0, info
->cmd_reset
);
628 static int use_flash_status_poll(flash_info_t
*info
)
630 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
631 if (info
->vendor
== CFI_CMDSET_AMD_EXTENDED
||
632 info
->vendor
== CFI_CMDSET_AMD_STANDARD
)
638 static int flash_status_poll(flash_info_t
*info
, void *src
, void *dst
,
639 ulong tout
, char *prompt
)
641 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
645 #if CONFIG_SYS_HZ != 1000
646 if ((ulong
)CONFIG_SYS_HZ
> 100000)
647 tout
*= (ulong
)CONFIG_SYS_HZ
/ 1000; /* for a big HZ, avoid overflow */
649 tout
= DIV_ROUND_UP(tout
* (ulong
)CONFIG_SYS_HZ
, 1000);
652 /* Wait for command completion */
653 #ifdef CONFIG_SYS_LOW_RES_TIMER
656 start
= get_timer(0);
659 switch (info
->portwidth
) {
661 ready
= flash_read8(dst
) == flash_read8(src
);
663 case FLASH_CFI_16BIT
:
664 ready
= flash_read16(dst
) == flash_read16(src
);
666 case FLASH_CFI_32BIT
:
667 ready
= flash_read32(dst
) == flash_read32(src
);
669 case FLASH_CFI_64BIT
:
670 ready
= flash_read64(dst
) == flash_read64(src
);
678 if (get_timer(start
) > tout
) {
679 printf("Flash %s timeout at address %lx data %lx\n",
680 prompt
, (ulong
)dst
, (ulong
)flash_read8(dst
));
683 udelay(1); /* also triggers watchdog */
685 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
689 /*-----------------------------------------------------------------------
691 static void flash_add_byte (flash_info_t
* info
, cfiword_t
* cword
, uchar c
)
693 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
696 unsigned long long ll
;
699 switch (info
->portwidth
) {
703 case FLASH_CFI_16BIT
:
704 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
707 cword
->w
= (cword
->w
>> 8) | w
;
709 cword
->w
= (cword
->w
<< 8) | c
;
712 case FLASH_CFI_32BIT
:
713 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
716 cword
->l
= (cword
->l
>> 8) | l
;
718 cword
->l
= (cword
->l
<< 8) | c
;
721 case FLASH_CFI_64BIT
:
722 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
725 cword
->ll
= (cword
->ll
>> 8) | ll
;
727 cword
->ll
= (cword
->ll
<< 8) | c
;
734 * Loop through the sector table starting from the previously found sector.
735 * Searches forwards or backwards, dependent on the passed address.
737 static flash_sect_t
find_sector (flash_info_t
* info
, ulong addr
)
739 static flash_sect_t saved_sector
; /* previously found sector */
740 static flash_info_t
*saved_info
; /* previously used flash bank */
741 flash_sect_t sector
= saved_sector
;
743 if ((info
!= saved_info
) || (sector
>= info
->sector_count
))
746 while ((info
->start
[sector
] < addr
)
747 && (sector
< info
->sector_count
- 1))
749 while ((info
->start
[sector
] > addr
) && (sector
> 0))
751 * also decrements the sector in case of an overshot
756 saved_sector
= sector
;
761 /*-----------------------------------------------------------------------
763 static int flash_write_cfiword (flash_info_t
* info
, ulong dest
,
766 void *dstaddr
= (void *)dest
;
768 flash_sect_t sect
= 0;
771 /* Check if Flash is (sufficiently) erased */
772 switch (info
->portwidth
) {
774 flag
= ((flash_read8(dstaddr
) & cword
.c
) == cword
.c
);
776 case FLASH_CFI_16BIT
:
777 flag
= ((flash_read16(dstaddr
) & cword
.w
) == cword
.w
);
779 case FLASH_CFI_32BIT
:
780 flag
= ((flash_read32(dstaddr
) & cword
.l
) == cword
.l
);
782 case FLASH_CFI_64BIT
:
783 flag
= ((flash_read64(dstaddr
) & cword
.ll
) == cword
.ll
);
790 return ERR_NOT_ERASED
;
792 /* Disable interrupts which might cause a timeout here */
793 flag
= disable_interrupts ();
795 switch (info
->vendor
) {
796 case CFI_CMDSET_INTEL_PROG_REGIONS
:
797 case CFI_CMDSET_INTEL_EXTENDED
:
798 case CFI_CMDSET_INTEL_STANDARD
:
799 flash_write_cmd (info
, 0, 0, FLASH_CMD_CLEAR_STATUS
);
800 flash_write_cmd (info
, 0, 0, FLASH_CMD_WRITE
);
802 case CFI_CMDSET_AMD_EXTENDED
:
803 case CFI_CMDSET_AMD_STANDARD
:
804 sect
= find_sector(info
, dest
);
805 flash_unlock_seq (info
, sect
);
806 flash_write_cmd (info
, sect
, info
->addr_unlock1
, AMD_CMD_WRITE
);
809 #ifdef CONFIG_FLASH_CFI_LEGACY
810 case CFI_CMDSET_AMD_LEGACY
:
811 sect
= find_sector(info
, dest
);
812 flash_unlock_seq (info
, 0);
813 flash_write_cmd (info
, 0, info
->addr_unlock1
, AMD_CMD_WRITE
);
819 switch (info
->portwidth
) {
821 flash_write8(cword
.c
, dstaddr
);
823 case FLASH_CFI_16BIT
:
824 flash_write16(cword
.w
, dstaddr
);
826 case FLASH_CFI_32BIT
:
827 flash_write32(cword
.l
, dstaddr
);
829 case FLASH_CFI_64BIT
:
830 flash_write64(cword
.ll
, dstaddr
);
834 /* re-enable interrupts if necessary */
836 enable_interrupts ();
839 sect
= find_sector (info
, dest
);
841 if (use_flash_status_poll(info
))
842 return flash_status_poll(info
, &cword
, dstaddr
,
843 info
->write_tout
, "write");
845 return flash_full_status_check(info
, sect
,
846 info
->write_tout
, "write");
849 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
851 static int flash_write_cfibuffer (flash_info_t
* info
, ulong dest
, uchar
* cp
,
858 void *dst
= (void *)dest
;
865 switch (info
->portwidth
) {
869 case FLASH_CFI_16BIT
:
872 case FLASH_CFI_32BIT
:
875 case FLASH_CFI_64BIT
:
885 while ((cnt
-- > 0) && (flag
== 1)) {
886 switch (info
->portwidth
) {
888 flag
= ((flash_read8(dst2
) & flash_read8(src
)) ==
892 case FLASH_CFI_16BIT
:
893 flag
= ((flash_read16(dst2
) & flash_read16(src
)) ==
897 case FLASH_CFI_32BIT
:
898 flag
= ((flash_read32(dst2
) & flash_read32(src
)) ==
902 case FLASH_CFI_64BIT
:
903 flag
= ((flash_read64(dst2
) & flash_read64(src
)) ==
910 retcode
= ERR_NOT_ERASED
;
915 sector
= find_sector (info
, dest
);
917 switch (info
->vendor
) {
918 case CFI_CMDSET_INTEL_PROG_REGIONS
:
919 case CFI_CMDSET_INTEL_STANDARD
:
920 case CFI_CMDSET_INTEL_EXTENDED
:
921 write_cmd
= (info
->vendor
== CFI_CMDSET_INTEL_PROG_REGIONS
) ?
922 FLASH_CMD_WRITE_BUFFER_PROG
: FLASH_CMD_WRITE_TO_BUFFER
;
923 flash_write_cmd (info
, sector
, 0, FLASH_CMD_CLEAR_STATUS
);
924 flash_write_cmd (info
, sector
, 0, FLASH_CMD_READ_STATUS
);
925 flash_write_cmd (info
, sector
, 0, write_cmd
);
926 retcode
= flash_status_check (info
, sector
,
927 info
->buffer_write_tout
,
929 if (retcode
== ERR_OK
) {
930 /* reduce the number of loops by the width of
933 flash_write_cmd (info
, sector
, 0, cnt
- 1);
935 switch (info
->portwidth
) {
937 flash_write8(flash_read8(src
), dst
);
940 case FLASH_CFI_16BIT
:
941 flash_write16(flash_read16(src
), dst
);
944 case FLASH_CFI_32BIT
:
945 flash_write32(flash_read32(src
), dst
);
948 case FLASH_CFI_64BIT
:
949 flash_write64(flash_read64(src
), dst
);
957 flash_write_cmd (info
, sector
, 0,
958 FLASH_CMD_WRITE_BUFFER_CONFIRM
);
959 retcode
= flash_full_status_check (
960 info
, sector
, info
->buffer_write_tout
,
966 case CFI_CMDSET_AMD_STANDARD
:
967 case CFI_CMDSET_AMD_EXTENDED
:
968 flash_unlock_seq(info
,0);
970 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
971 offset
= ((unsigned long)dst
- info
->start
[sector
]) >> shift
;
973 flash_write_cmd(info
, sector
, offset
, AMD_CMD_WRITE_TO_BUFFER
);
975 flash_write_cmd(info
, sector
, offset
, cnt
- 1);
977 switch (info
->portwidth
) {
980 flash_write8(flash_read8(src
), dst
);
984 case FLASH_CFI_16BIT
:
986 flash_write16(flash_read16(src
), dst
);
990 case FLASH_CFI_32BIT
:
992 flash_write32(flash_read32(src
), dst
);
996 case FLASH_CFI_64BIT
:
998 flash_write64(flash_read64(src
), dst
);
1003 retcode
= ERR_INVAL
;
1007 flash_write_cmd (info
, sector
, 0, AMD_CMD_WRITE_BUFFER_CONFIRM
);
1008 if (use_flash_status_poll(info
))
1009 retcode
= flash_status_poll(info
, src
- (1 << shift
),
1011 info
->buffer_write_tout
,
1014 retcode
= flash_full_status_check(info
, sector
,
1015 info
->buffer_write_tout
,
1020 debug ("Unknown Command Set\n");
1021 retcode
= ERR_INVAL
;
1028 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1031 /*-----------------------------------------------------------------------
1033 int flash_erase (flash_info_t
* info
, int s_first
, int s_last
)
1040 if (info
->flash_id
!= FLASH_MAN_CFI
) {
1041 puts ("Can't erase unknown flash type - aborted\n");
1044 if ((s_first
< 0) || (s_first
> s_last
)) {
1045 puts ("- no sectors to erase\n");
1050 for (sect
= s_first
; sect
<= s_last
; ++sect
) {
1051 if (info
->protect
[sect
]) {
1056 printf ("- Warning: %d protected sectors will not be erased!\n",
1058 } else if (flash_verbose
) {
1063 for (sect
= s_first
; sect
<= s_last
; sect
++) {
1069 if (info
->protect
[sect
] == 0) { /* not protected */
1070 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1077 * Check if whole sector is erased
1079 size
= flash_sector_size(info
, sect
);
1081 flash
= (u32
*)info
->start
[sect
];
1082 /* divide by 4 for longword access */
1084 for (k
= 0; k
< size
; k
++) {
1085 if (flash_read32(flash
++) != 0xffffffff) {
1096 switch (info
->vendor
) {
1097 case CFI_CMDSET_INTEL_PROG_REGIONS
:
1098 case CFI_CMDSET_INTEL_STANDARD
:
1099 case CFI_CMDSET_INTEL_EXTENDED
:
1100 flash_write_cmd (info
, sect
, 0,
1101 FLASH_CMD_CLEAR_STATUS
);
1102 flash_write_cmd (info
, sect
, 0,
1103 FLASH_CMD_BLOCK_ERASE
);
1104 flash_write_cmd (info
, sect
, 0,
1105 FLASH_CMD_ERASE_CONFIRM
);
1107 case CFI_CMDSET_AMD_STANDARD
:
1108 case CFI_CMDSET_AMD_EXTENDED
:
1109 flash_unlock_seq (info
, sect
);
1110 flash_write_cmd (info
, sect
,
1112 AMD_CMD_ERASE_START
);
1113 flash_unlock_seq (info
, sect
);
1114 flash_write_cmd (info
, sect
, 0,
1115 info
->cmd_erase_sector
);
1117 #ifdef CONFIG_FLASH_CFI_LEGACY
1118 case CFI_CMDSET_AMD_LEGACY
:
1119 flash_unlock_seq (info
, 0);
1120 flash_write_cmd (info
, 0, info
->addr_unlock1
,
1121 AMD_CMD_ERASE_START
);
1122 flash_unlock_seq (info
, 0);
1123 flash_write_cmd (info
, sect
, 0,
1124 AMD_CMD_ERASE_SECTOR
);
1128 debug ("Unkown flash vendor %d\n",
1133 if (use_flash_status_poll(info
)) {
1136 cword
.ll
= 0xffffffffffffffffULL
;
1137 dest
= flash_map(info
, sect
, 0);
1138 st
= flash_status_poll(info
, &cword
, dest
,
1139 info
->erase_blk_tout
, "erase");
1140 flash_unmap(info
, sect
, 0, dest
);
1142 st
= flash_full_status_check(info
, sect
,
1143 info
->erase_blk_tout
,
1147 else if (flash_verbose
)
1158 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1159 static int sector_erased(flash_info_t
*info
, int i
)
1166 * Check if whole sector is erased
1168 size
= flash_sector_size(info
, i
);
1169 flash
= (u32
*)info
->start
[i
];
1170 /* divide by 4 for longword access */
1173 for (k
= 0; k
< size
; k
++) {
1174 if (flash_read32(flash
++) != 0xffffffff)
1175 return 0; /* not erased */
1178 return 1; /* erased */
1180 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1182 void flash_print_info (flash_info_t
* info
)
1186 if (info
->flash_id
!= FLASH_MAN_CFI
) {
1187 puts ("missing or unknown FLASH type\n");
1191 printf ("%s flash (%d x %d)",
1193 (info
->portwidth
<< 3), (info
->chipwidth
<< 3));
1194 if (info
->size
< 1024*1024)
1195 printf (" Size: %ld kB in %d Sectors\n",
1196 info
->size
>> 10, info
->sector_count
);
1198 printf (" Size: %ld MB in %d Sectors\n",
1199 info
->size
>> 20, info
->sector_count
);
1201 switch (info
->vendor
) {
1202 case CFI_CMDSET_INTEL_PROG_REGIONS
:
1203 printf ("Intel Prog Regions");
1205 case CFI_CMDSET_INTEL_STANDARD
:
1206 printf ("Intel Standard");
1208 case CFI_CMDSET_INTEL_EXTENDED
:
1209 printf ("Intel Extended");
1211 case CFI_CMDSET_AMD_STANDARD
:
1212 printf ("AMD Standard");
1214 case CFI_CMDSET_AMD_EXTENDED
:
1215 printf ("AMD Extended");
1217 #ifdef CONFIG_FLASH_CFI_LEGACY
1218 case CFI_CMDSET_AMD_LEGACY
:
1219 printf ("AMD Legacy");
1223 printf ("Unknown (%d)", info
->vendor
);
1226 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1227 info
->manufacturer_id
);
1228 printf (info
->chipwidth
== FLASH_CFI_16BIT
? "%04X" : "%02X",
1230 if ((info
->device_id
& 0xff) == 0x7E) {
1231 printf(info
->chipwidth
== FLASH_CFI_16BIT
? "%04X" : "%02X",
1234 if ((info
->vendor
== CFI_CMDSET_AMD_STANDARD
) && (info
->legacy_unlock
))
1235 printf("\n Advanced Sector Protection (PPB) enabled");
1236 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1237 info
->erase_blk_tout
,
1239 if (info
->buffer_size
> 1) {
1240 printf (" Buffer write timeout: %ld ms, "
1241 "buffer size: %d bytes\n",
1242 info
->buffer_write_tout
,
1246 puts ("\n Sector Start Addresses:");
1247 for (i
= 0; i
< info
->sector_count
; ++i
) {
1252 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1253 /* print empty and read-only info */
1254 printf (" %08lX %c %s ",
1256 sector_erased(info
, i
) ? 'E' : ' ',
1257 info
->protect
[i
] ? "RO" : " ");
1258 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1259 printf (" %08lX %s ",
1261 info
->protect
[i
] ? "RO" : " ");
1268 /*-----------------------------------------------------------------------
1269 * This is used in a few places in write_buf() to show programming
1270 * progress. Making it a function is nasty because it needs to do side
1271 * effect updates to digit and dots. Repeated code is nasty too, so
1272 * we define it once here.
1274 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1275 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1276 if (flash_verbose) { \
1278 if ((scale > 0) && (dots <= 0)) { \
1279 if ((digit % 5) == 0) \
1280 printf ("%d", digit / 5); \
1288 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1291 /*-----------------------------------------------------------------------
1292 * Copy memory to flash, returns:
1295 * 2 - Flash not erased
1297 int write_buff (flash_info_t
* info
, uchar
* src
, ulong addr
, ulong cnt
)
1304 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1307 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1308 int digit
= CONFIG_FLASH_SHOW_PROGRESS
;
1313 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1315 if (cnt
>= CONFIG_FLASH_SHOW_PROGRESS
) {
1316 scale
= (int)((cnt
+ CONFIG_FLASH_SHOW_PROGRESS
- 1) /
1317 CONFIG_FLASH_SHOW_PROGRESS
);
1321 /* get lower aligned address */
1322 wp
= (addr
& ~(info
->portwidth
- 1));
1324 /* handle unaligned start */
1325 if ((aln
= addr
- wp
) != 0) {
1328 for (i
= 0; i
< aln
; ++i
)
1329 flash_add_byte (info
, &cword
, flash_read8(p
+ i
));
1331 for (; (i
< info
->portwidth
) && (cnt
> 0); i
++) {
1332 flash_add_byte (info
, &cword
, *src
++);
1335 for (; (cnt
== 0) && (i
< info
->portwidth
); ++i
)
1336 flash_add_byte (info
, &cword
, flash_read8(p
+ i
));
1338 rc
= flash_write_cfiword (info
, wp
, cword
);
1343 FLASH_SHOW_PROGRESS(scale
, dots
, digit
, i
);
1346 /* handle the aligned part */
1347 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1348 buffered_size
= (info
->portwidth
/ info
->chipwidth
);
1349 buffered_size
*= info
->buffer_size
;
1350 while (cnt
>= info
->portwidth
) {
1351 /* prohibit buffer write when buffer_size is 1 */
1352 if (info
->buffer_size
== 1) {
1354 for (i
= 0; i
< info
->portwidth
; i
++)
1355 flash_add_byte (info
, &cword
, *src
++);
1356 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
1358 wp
+= info
->portwidth
;
1359 cnt
-= info
->portwidth
;
1363 /* write buffer until next buffered_size aligned boundary */
1364 i
= buffered_size
- (wp
% buffered_size
);
1367 if ((rc
= flash_write_cfibuffer (info
, wp
, src
, i
)) != ERR_OK
)
1369 i
-= i
& (info
->portwidth
- 1);
1373 FLASH_SHOW_PROGRESS(scale
, dots
, digit
, i
);
1374 /* Only check every once in a while */
1375 if ((cnt
& 0xFFFF) < buffered_size
&& ctrlc())
1379 while (cnt
>= info
->portwidth
) {
1381 for (i
= 0; i
< info
->portwidth
; i
++) {
1382 flash_add_byte (info
, &cword
, *src
++);
1384 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
1386 wp
+= info
->portwidth
;
1387 cnt
-= info
->portwidth
;
1388 FLASH_SHOW_PROGRESS(scale
, dots
, digit
, info
->portwidth
);
1389 /* Only check every once in a while */
1390 if ((cnt
& 0xFFFF) < info
->portwidth
&& ctrlc())
1393 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1400 * handle unaligned tail bytes
1404 for (i
= 0; (i
< info
->portwidth
) && (cnt
> 0); ++i
) {
1405 flash_add_byte (info
, &cword
, *src
++);
1408 for (; i
< info
->portwidth
; ++i
)
1409 flash_add_byte (info
, &cword
, flash_read8(p
+ i
));
1411 return flash_write_cfiword (info
, wp
, cword
);
1414 static inline int manufact_match(flash_info_t
*info
, u32 manu
)
1416 return info
->manufacturer_id
== ((manu
& FLASH_VENDMASK
) >> 16);
1419 /*-----------------------------------------------------------------------
1421 #ifdef CONFIG_SYS_FLASH_PROTECTION
1423 static int cfi_protect_bugfix(flash_info_t
*info
, long sector
, int prot
)
1425 if (manufact_match(info
, INTEL_MANUFACT
)
1426 && info
->device_id
== NUMONYX_256MBIT
) {
1429 * "Numonyx Axcell P33/P30 Specification Update" :)
1431 flash_write_cmd(info
, sector
, 0, FLASH_CMD_READ_ID
);
1432 if (!flash_isequal(info
, sector
, FLASH_OFFSET_PROTECT
,
1435 * cmd must come before FLASH_CMD_PROTECT + 20us
1436 * Disable interrupts which might cause a timeout here.
1438 int flag
= disable_interrupts();
1442 cmd
= FLASH_CMD_PROTECT_SET
;
1444 cmd
= FLASH_CMD_PROTECT_CLEAR
;
1445 flash_write_cmd(info
, sector
, 0,
1447 flash_write_cmd(info
, sector
, 0, cmd
);
1448 /* re-enable interrupts if necessary */
1450 enable_interrupts();
1457 int flash_real_protect (flash_info_t
* info
, long sector
, int prot
)
1461 switch (info
->vendor
) {
1462 case CFI_CMDSET_INTEL_PROG_REGIONS
:
1463 case CFI_CMDSET_INTEL_STANDARD
:
1464 case CFI_CMDSET_INTEL_EXTENDED
:
1465 if (!cfi_protect_bugfix(info
, sector
, prot
)) {
1466 flash_write_cmd(info
, sector
, 0,
1467 FLASH_CMD_CLEAR_STATUS
);
1468 flash_write_cmd(info
, sector
, 0,
1471 flash_write_cmd(info
, sector
, 0,
1472 FLASH_CMD_PROTECT_SET
);
1474 flash_write_cmd(info
, sector
, 0,
1475 FLASH_CMD_PROTECT_CLEAR
);
1479 case CFI_CMDSET_AMD_EXTENDED
:
1480 case CFI_CMDSET_AMD_STANDARD
:
1481 /* U-Boot only checks the first byte */
1482 if (manufact_match(info
, ATM_MANUFACT
)) {
1484 flash_unlock_seq (info
, 0);
1485 flash_write_cmd (info
, 0,
1487 ATM_CMD_SOFTLOCK_START
);
1488 flash_unlock_seq (info
, 0);
1489 flash_write_cmd (info
, sector
, 0,
1492 flash_write_cmd (info
, 0,
1494 AMD_CMD_UNLOCK_START
);
1495 if (info
->device_id
== ATM_ID_BV6416
)
1496 flash_write_cmd (info
, sector
,
1497 0, ATM_CMD_UNLOCK_SECT
);
1500 if (info
->legacy_unlock
) {
1501 int flag
= disable_interrupts();
1504 flash_unlock_seq(info
, 0);
1505 flash_write_cmd(info
, 0, info
->addr_unlock1
,
1506 AMD_CMD_SET_PPB_ENTRY
);
1507 lock_flag
= flash_isset(info
, sector
, 0, 0x01);
1510 flash_write_cmd(info
, sector
, 0,
1511 AMD_CMD_PPB_LOCK_BC1
);
1512 flash_write_cmd(info
, sector
, 0,
1513 AMD_CMD_PPB_LOCK_BC2
);
1515 debug("sector %ld %slocked\n", sector
,
1516 lock_flag
? "" : "already ");
1519 debug("unlock %ld\n", sector
);
1520 flash_write_cmd(info
, 0, 0,
1521 AMD_CMD_PPB_UNLOCK_BC1
);
1522 flash_write_cmd(info
, 0, 0,
1523 AMD_CMD_PPB_UNLOCK_BC2
);
1525 debug("sector %ld %sunlocked\n", sector
,
1526 !lock_flag
? "" : "already ");
1529 enable_interrupts();
1531 if (flash_status_check(info
, sector
,
1532 info
->erase_blk_tout
,
1533 prot
? "protect" : "unprotect"))
1534 printf("status check error\n");
1536 flash_write_cmd(info
, 0, 0,
1537 AMD_CMD_SET_PPB_EXIT_BC1
);
1538 flash_write_cmd(info
, 0, 0,
1539 AMD_CMD_SET_PPB_EXIT_BC2
);
1542 #ifdef CONFIG_FLASH_CFI_LEGACY
1543 case CFI_CMDSET_AMD_LEGACY
:
1544 flash_write_cmd (info
, sector
, 0, FLASH_CMD_CLEAR_STATUS
);
1545 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT
);
1547 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT_SET
);
1549 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT_CLEAR
);
1554 * Flash needs to be in status register read mode for
1555 * flash_full_status_check() to work correctly
1557 flash_write_cmd(info
, sector
, 0, FLASH_CMD_READ_STATUS
);
1559 flash_full_status_check (info
, sector
, info
->erase_blk_tout
,
1560 prot
? "protect" : "unprotect")) == 0) {
1562 info
->protect
[sector
] = prot
;
1565 * On some of Intel's flash chips (marked via legacy_unlock)
1566 * unprotect unprotects all locking.
1568 if ((prot
== 0) && (info
->legacy_unlock
)) {
1571 for (i
= 0; i
< info
->sector_count
; i
++) {
1572 if (info
->protect
[i
])
1573 flash_real_protect (info
, i
, 1);
1580 /*-----------------------------------------------------------------------
1581 * flash_read_user_serial - read the OneTimeProgramming cells
1583 void flash_read_user_serial (flash_info_t
* info
, void *buffer
, int offset
,
1590 src
= flash_map (info
, 0, FLASH_OFFSET_USER_PROTECTION
);
1591 flash_write_cmd (info
, 0, 0, FLASH_CMD_READ_ID
);
1592 memcpy (dst
, src
+ offset
, len
);
1593 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
1595 flash_unmap(info
, 0, FLASH_OFFSET_USER_PROTECTION
, src
);
1599 * flash_read_factory_serial - read the device Id from the protection area
1601 void flash_read_factory_serial (flash_info_t
* info
, void *buffer
, int offset
,
1606 src
= flash_map (info
, 0, FLASH_OFFSET_INTEL_PROTECTION
);
1607 flash_write_cmd (info
, 0, 0, FLASH_CMD_READ_ID
);
1608 memcpy (buffer
, src
+ offset
, len
);
1609 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
1611 flash_unmap(info
, 0, FLASH_OFFSET_INTEL_PROTECTION
, src
);
1614 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1616 /*-----------------------------------------------------------------------
1617 * Reverse the order of the erase regions in the CFI QRY structure.
1618 * This is needed for chips that are either a) correctly detected as
1619 * top-boot, or b) buggy.
1621 static void cfi_reverse_geometry(struct cfi_qry
*qry
)
1626 for (i
= 0, j
= qry
->num_erase_regions
- 1; i
< j
; i
++, j
--) {
1627 tmp
= get_unaligned(&(qry
->erase_region_info
[i
]));
1628 put_unaligned(get_unaligned(&(qry
->erase_region_info
[j
])),
1629 &(qry
->erase_region_info
[i
]));
1630 put_unaligned(tmp
, &(qry
->erase_region_info
[j
]));
1634 /*-----------------------------------------------------------------------
1635 * read jedec ids from device and set corresponding fields in info struct
1637 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1640 static void cmdset_intel_read_jedec_ids(flash_info_t
*info
)
1642 flash_write_cmd(info
, 0, 0, FLASH_CMD_RESET
);
1644 flash_write_cmd(info
, 0, 0, FLASH_CMD_READ_ID
);
1645 udelay(1000); /* some flash are slow to respond */
1646 info
->manufacturer_id
= flash_read_uchar (info
,
1647 FLASH_OFFSET_MANUFACTURER_ID
);
1648 info
->device_id
= (info
->chipwidth
== FLASH_CFI_16BIT
) ?
1649 flash_read_word (info
, FLASH_OFFSET_DEVICE_ID
) :
1650 flash_read_uchar (info
, FLASH_OFFSET_DEVICE_ID
);
1651 flash_write_cmd(info
, 0, 0, FLASH_CMD_RESET
);
1654 static int cmdset_intel_init(flash_info_t
*info
, struct cfi_qry
*qry
)
1656 info
->cmd_reset
= FLASH_CMD_RESET
;
1658 cmdset_intel_read_jedec_ids(info
);
1659 flash_write_cmd(info
, 0, info
->cfi_offset
, FLASH_CMD_CFI
);
1661 #ifdef CONFIG_SYS_FLASH_PROTECTION
1662 /* read legacy lock/unlock bit from intel flash */
1663 if (info
->ext_addr
) {
1664 info
->legacy_unlock
= flash_read_uchar (info
,
1665 info
->ext_addr
+ 5) & 0x08;
1672 static void cmdset_amd_read_jedec_ids(flash_info_t
*info
)
1677 flash_write_cmd(info
, 0, 0, AMD_CMD_RESET
);
1678 flash_unlock_seq(info
, 0);
1679 flash_write_cmd(info
, 0, info
->addr_unlock1
, FLASH_CMD_READ_ID
);
1680 udelay(1000); /* some flash are slow to respond */
1682 manuId
= flash_read_uchar (info
, FLASH_OFFSET_MANUFACTURER_ID
);
1683 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1684 while (manuId
== FLASH_CONTINUATION_CODE
&& bankId
< 0x800) {
1686 manuId
= flash_read_uchar (info
,
1687 bankId
| FLASH_OFFSET_MANUFACTURER_ID
);
1689 info
->manufacturer_id
= manuId
;
1691 switch (info
->chipwidth
){
1692 case FLASH_CFI_8BIT
:
1693 info
->device_id
= flash_read_uchar (info
,
1694 FLASH_OFFSET_DEVICE_ID
);
1695 if (info
->device_id
== 0x7E) {
1696 /* AMD 3-byte (expanded) device ids */
1697 info
->device_id2
= flash_read_uchar (info
,
1698 FLASH_OFFSET_DEVICE_ID2
);
1699 info
->device_id2
<<= 8;
1700 info
->device_id2
|= flash_read_uchar (info
,
1701 FLASH_OFFSET_DEVICE_ID3
);
1704 case FLASH_CFI_16BIT
:
1705 info
->device_id
= flash_read_word (info
,
1706 FLASH_OFFSET_DEVICE_ID
);
1707 if ((info
->device_id
& 0xff) == 0x7E) {
1708 /* AMD 3-byte (expanded) device ids */
1709 info
->device_id2
= flash_read_uchar (info
,
1710 FLASH_OFFSET_DEVICE_ID2
);
1711 info
->device_id2
<<= 8;
1712 info
->device_id2
|= flash_read_uchar (info
,
1713 FLASH_OFFSET_DEVICE_ID3
);
1719 flash_write_cmd(info
, 0, 0, AMD_CMD_RESET
);
1723 static int cmdset_amd_init(flash_info_t
*info
, struct cfi_qry
*qry
)
1725 info
->cmd_reset
= AMD_CMD_RESET
;
1726 info
->cmd_erase_sector
= AMD_CMD_ERASE_SECTOR
;
1728 cmdset_amd_read_jedec_ids(info
);
1729 flash_write_cmd(info
, 0, info
->cfi_offset
, FLASH_CMD_CFI
);
1731 #ifdef CONFIG_SYS_FLASH_PROTECTION
1732 if (info
->ext_addr
) {
1733 /* read sector protect/unprotect scheme (at 0x49) */
1734 if (flash_read_uchar(info
, info
->ext_addr
+ 9) == 0x8)
1735 info
->legacy_unlock
= 1;
1742 #ifdef CONFIG_FLASH_CFI_LEGACY
1743 static void flash_read_jedec_ids (flash_info_t
* info
)
1745 info
->manufacturer_id
= 0;
1746 info
->device_id
= 0;
1747 info
->device_id2
= 0;
1749 switch (info
->vendor
) {
1750 case CFI_CMDSET_INTEL_PROG_REGIONS
:
1751 case CFI_CMDSET_INTEL_STANDARD
:
1752 case CFI_CMDSET_INTEL_EXTENDED
:
1753 cmdset_intel_read_jedec_ids(info
);
1755 case CFI_CMDSET_AMD_STANDARD
:
1756 case CFI_CMDSET_AMD_EXTENDED
:
1757 cmdset_amd_read_jedec_ids(info
);
1764 /*-----------------------------------------------------------------------
1765 * Call board code to request info about non-CFI flash.
1766 * board_flash_get_legacy needs to fill in at least:
1767 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1769 static int flash_detect_legacy(phys_addr_t base
, int banknum
)
1771 flash_info_t
*info
= &flash_info
[banknum
];
1773 if (board_flash_get_legacy(base
, banknum
, info
)) {
1774 /* board code may have filled info completely. If not, we
1775 use JEDEC ID probing. */
1776 if (!info
->vendor
) {
1778 CFI_CMDSET_AMD_STANDARD
,
1779 CFI_CMDSET_INTEL_STANDARD
1783 for (i
= 0; i
< ARRAY_SIZE(modes
); i
++) {
1784 info
->vendor
= modes
[i
];
1786 (ulong
)map_physmem(base
,
1789 if (info
->portwidth
== FLASH_CFI_8BIT
1790 && info
->interface
== FLASH_CFI_X8X16
) {
1791 info
->addr_unlock1
= 0x2AAA;
1792 info
->addr_unlock2
= 0x5555;
1794 info
->addr_unlock1
= 0x5555;
1795 info
->addr_unlock2
= 0x2AAA;
1797 flash_read_jedec_ids(info
);
1798 debug("JEDEC PROBE: ID %x %x %x\n",
1799 info
->manufacturer_id
,
1802 if (jedec_flash_match(info
, info
->start
[0]))
1805 unmap_physmem((void *)info
->start
[0],
1810 switch(info
->vendor
) {
1811 case CFI_CMDSET_INTEL_PROG_REGIONS
:
1812 case CFI_CMDSET_INTEL_STANDARD
:
1813 case CFI_CMDSET_INTEL_EXTENDED
:
1814 info
->cmd_reset
= FLASH_CMD_RESET
;
1816 case CFI_CMDSET_AMD_STANDARD
:
1817 case CFI_CMDSET_AMD_EXTENDED
:
1818 case CFI_CMDSET_AMD_LEGACY
:
1819 info
->cmd_reset
= AMD_CMD_RESET
;
1822 info
->flash_id
= FLASH_MAN_CFI
;
1825 return 0; /* use CFI */
1828 static inline int flash_detect_legacy(phys_addr_t base
, int banknum
)
1830 return 0; /* use CFI */
1834 /*-----------------------------------------------------------------------
1835 * detect if flash is compatible with the Common Flash Interface (CFI)
1836 * http://www.jedec.org/download/search/jesd68.pdf
1838 static void flash_read_cfi (flash_info_t
*info
, void *buf
,
1839 unsigned int start
, size_t len
)
1844 for (i
= 0; i
< len
; i
++)
1845 p
[i
] = flash_read_uchar(info
, start
+ i
);
1848 static void __flash_cmd_reset(flash_info_t
*info
)
1851 * We do not yet know what kind of commandset to use, so we issue
1852 * the reset command in both Intel and AMD variants, in the hope
1853 * that AMD flash roms ignore the Intel command.
1855 flash_write_cmd(info
, 0, 0, AMD_CMD_RESET
);
1857 flash_write_cmd(info
, 0, 0, FLASH_CMD_RESET
);
1859 void flash_cmd_reset(flash_info_t
*info
)
1860 __attribute__((weak
,alias("__flash_cmd_reset")));
1862 static int __flash_detect_cfi (flash_info_t
* info
, struct cfi_qry
*qry
)
1866 /* Issue FLASH reset command */
1867 flash_cmd_reset(info
);
1869 for (cfi_offset
= 0; cfi_offset
< ARRAY_SIZE(flash_offset_cfi
);
1871 flash_write_cmd (info
, 0, flash_offset_cfi
[cfi_offset
],
1873 if (flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
, 'Q')
1874 && flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
+ 1, 'R')
1875 && flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
+ 2, 'Y')) {
1876 flash_read_cfi(info
, qry
, FLASH_OFFSET_CFI_RESP
,
1877 sizeof(struct cfi_qry
));
1878 info
->interface
= le16_to_cpu(qry
->interface_desc
);
1880 info
->cfi_offset
= flash_offset_cfi
[cfi_offset
];
1881 debug ("device interface is %d\n",
1883 debug ("found port %d chip %d ",
1884 info
->portwidth
, info
->chipwidth
);
1885 debug ("port %d bits chip %d bits\n",
1886 info
->portwidth
<< CFI_FLASH_SHIFT_WIDTH
,
1887 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
1889 /* calculate command offsets as in the Linux driver */
1890 info
->addr_unlock1
= 0x555;
1891 info
->addr_unlock2
= 0x2aa;
1894 * modify the unlock address if we are
1895 * in compatibility mode
1897 if ( /* x8/x16 in x8 mode */
1898 ((info
->chipwidth
== FLASH_CFI_BY8
) &&
1899 (info
->interface
== FLASH_CFI_X8X16
)) ||
1900 /* x16/x32 in x16 mode */
1901 ((info
->chipwidth
== FLASH_CFI_BY16
) &&
1902 (info
->interface
== FLASH_CFI_X16X32
)))
1904 info
->addr_unlock1
= 0xaaa;
1905 info
->addr_unlock2
= 0x555;
1908 info
->name
= "CFI conformant";
1916 static int flash_detect_cfi (flash_info_t
* info
, struct cfi_qry
*qry
)
1918 debug ("flash detect cfi\n");
1920 for (info
->portwidth
= CONFIG_SYS_FLASH_CFI_WIDTH
;
1921 info
->portwidth
<= FLASH_CFI_64BIT
; info
->portwidth
<<= 1) {
1922 for (info
->chipwidth
= FLASH_CFI_BY8
;
1923 info
->chipwidth
<= info
->portwidth
;
1924 info
->chipwidth
<<= 1)
1925 if (__flash_detect_cfi(info
, qry
))
1928 debug ("not found\n");
1933 * Manufacturer-specific quirks. Add workarounds for geometry
1934 * reversal, etc. here.
1936 static void flash_fixup_amd(flash_info_t
*info
, struct cfi_qry
*qry
)
1938 /* check if flash geometry needs reversal */
1939 if (qry
->num_erase_regions
> 1) {
1940 /* reverse geometry if top boot part */
1941 if (info
->cfi_version
< 0x3131) {
1942 /* CFI < 1.1, try to guess from device id */
1943 if ((info
->device_id
& 0x80) != 0)
1944 cfi_reverse_geometry(qry
);
1945 } else if (flash_read_uchar(info
, info
->ext_addr
+ 0xf) == 3) {
1946 /* CFI >= 1.1, deduct from top/bottom flag */
1947 /* note: ext_addr is valid since cfi_version > 0 */
1948 cfi_reverse_geometry(qry
);
1953 static void flash_fixup_atmel(flash_info_t
*info
, struct cfi_qry
*qry
)
1955 int reverse_geometry
= 0;
1957 /* Check the "top boot" bit in the PRI */
1958 if (info
->ext_addr
&& !(flash_read_uchar(info
, info
->ext_addr
+ 6) & 1))
1959 reverse_geometry
= 1;
1961 /* AT49BV6416(T) list the erase regions in the wrong order.
1962 * However, the device ID is identical with the non-broken
1963 * AT49BV642D they differ in the high byte.
1965 if (info
->device_id
== 0xd6 || info
->device_id
== 0xd2)
1966 reverse_geometry
= !reverse_geometry
;
1968 if (reverse_geometry
)
1969 cfi_reverse_geometry(qry
);
1972 static void flash_fixup_stm(flash_info_t
*info
, struct cfi_qry
*qry
)
1974 /* check if flash geometry needs reversal */
1975 if (qry
->num_erase_regions
> 1) {
1976 /* reverse geometry if top boot part */
1977 if (info
->cfi_version
< 0x3131) {
1978 /* CFI < 1.1, guess by device id */
1979 if (info
->device_id
== 0x22CA || /* M29W320DT */
1980 info
->device_id
== 0x2256 || /* M29W320ET */
1981 info
->device_id
== 0x22D7) { /* M29W800DT */
1982 cfi_reverse_geometry(qry
);
1984 } else if (flash_read_uchar(info
, info
->ext_addr
+ 0xf) == 3) {
1985 /* CFI >= 1.1, deduct from top/bottom flag */
1986 /* note: ext_addr is valid since cfi_version > 0 */
1987 cfi_reverse_geometry(qry
);
1992 static void flash_fixup_sst(flash_info_t
*info
, struct cfi_qry
*qry
)
1995 * SST, for many recent nor parallel flashes, says they are
1996 * CFI-conformant. This is not true, since qry struct.
1997 * reports a std. AMD command set (0x0002), while SST allows to
1998 * erase two different sector sizes for the same memory.
1999 * 64KB sector (SST call it block) needs 0x30 to be erased.
2000 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2001 * Since CFI query detect the 4KB number of sectors, users expects
2002 * a sector granularity of 4KB, and it is here set.
2004 if (info
->device_id
== 0x5D23 || /* SST39VF3201B */
2005 info
->device_id
== 0x5C23) { /* SST39VF3202B */
2006 /* set sector granularity to 4KB */
2007 info
->cmd_erase_sector
=0x50;
2011 static void flash_fixup_num(flash_info_t
*info
, struct cfi_qry
*qry
)
2014 * The M29EW devices seem to report the CFI information wrong
2015 * when it's in 8 bit mode.
2016 * There's an app note from Numonyx on this issue.
2017 * So adjust the buffer size for M29EW while operating in 8-bit mode
2019 if (((qry
->max_buf_write_size
) > 0x8) &&
2020 (info
->device_id
== 0x7E) &&
2021 (info
->device_id2
== 0x2201 ||
2022 info
->device_id2
== 0x2301 ||
2023 info
->device_id2
== 0x2801 ||
2024 info
->device_id2
== 0x4801)) {
2025 debug("Adjusted buffer size on Numonyx flash"
2026 " M29EW family in 8 bit mode\n");
2027 qry
->max_buf_write_size
= 0x8;
2032 * The following code cannot be run from FLASH!
2035 ulong
flash_get_size (phys_addr_t base
, int banknum
)
2037 flash_info_t
*info
= &flash_info
[banknum
];
2039 flash_sect_t sect_cnt
;
2043 uchar num_erase_regions
;
2044 int erase_region_size
;
2045 int erase_region_count
;
2047 unsigned long max_size
;
2049 memset(&qry
, 0, sizeof(qry
));
2052 info
->cfi_version
= 0;
2053 #ifdef CONFIG_SYS_FLASH_PROTECTION
2054 info
->legacy_unlock
= 0;
2057 info
->start
[0] = (ulong
)map_physmem(base
, info
->portwidth
, MAP_NOCACHE
);
2059 if (flash_detect_cfi (info
, &qry
)) {
2060 info
->vendor
= le16_to_cpu(get_unaligned(&(qry
.p_id
)));
2061 info
->ext_addr
= le16_to_cpu(get_unaligned(&(qry
.p_adr
)));
2062 num_erase_regions
= qry
.num_erase_regions
;
2064 if (info
->ext_addr
) {
2065 info
->cfi_version
= (ushort
) flash_read_uchar (info
,
2066 info
->ext_addr
+ 3) << 8;
2067 info
->cfi_version
|= (ushort
) flash_read_uchar (info
,
2068 info
->ext_addr
+ 4);
2072 flash_printqry (&qry
);
2075 switch (info
->vendor
) {
2076 case CFI_CMDSET_INTEL_PROG_REGIONS
:
2077 case CFI_CMDSET_INTEL_STANDARD
:
2078 case CFI_CMDSET_INTEL_EXTENDED
:
2079 cmdset_intel_init(info
, &qry
);
2081 case CFI_CMDSET_AMD_STANDARD
:
2082 case CFI_CMDSET_AMD_EXTENDED
:
2083 cmdset_amd_init(info
, &qry
);
2086 printf("CFI: Unknown command set 0x%x\n",
2089 * Unfortunately, this means we don't know how
2090 * to get the chip back to Read mode. Might
2091 * as well try an Intel-style reset...
2093 flash_write_cmd(info
, 0, 0, FLASH_CMD_RESET
);
2097 /* Do manufacturer-specific fixups */
2098 switch (info
->manufacturer_id
) {
2099 case 0x0001: /* AMD */
2100 case 0x0037: /* AMIC */
2101 flash_fixup_amd(info
, &qry
);
2104 flash_fixup_atmel(info
, &qry
);
2107 flash_fixup_stm(info
, &qry
);
2109 case 0x00bf: /* SST */
2110 flash_fixup_sst(info
, &qry
);
2112 case 0x0089: /* Numonyx */
2113 flash_fixup_num(info
, &qry
);
2117 debug ("manufacturer is %d\n", info
->vendor
);
2118 debug ("manufacturer id is 0x%x\n", info
->manufacturer_id
);
2119 debug ("device id is 0x%x\n", info
->device_id
);
2120 debug ("device id2 is 0x%x\n", info
->device_id2
);
2121 debug ("cfi version is 0x%04x\n", info
->cfi_version
);
2123 size_ratio
= info
->portwidth
/ info
->chipwidth
;
2124 /* if the chip is x8/x16 reduce the ratio by half */
2125 if ((info
->interface
== FLASH_CFI_X8X16
)
2126 && (info
->chipwidth
== FLASH_CFI_BY8
)) {
2129 debug ("size_ratio %d port %d bits chip %d bits\n",
2130 size_ratio
, info
->portwidth
<< CFI_FLASH_SHIFT_WIDTH
,
2131 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
2132 info
->size
= 1 << qry
.dev_size
;
2133 /* multiply the size by the number of chips */
2134 info
->size
*= size_ratio
;
2135 max_size
= cfi_flash_bank_size(banknum
);
2136 if (max_size
&& (info
->size
> max_size
)) {
2137 debug("[truncated from %ldMiB]", info
->size
>> 20);
2138 info
->size
= max_size
;
2140 debug ("found %d erase regions\n", num_erase_regions
);
2143 for (i
= 0; i
< num_erase_regions
; i
++) {
2144 if (i
> NUM_ERASE_REGIONS
) {
2145 printf ("%d erase regions found, only %d used\n",
2146 num_erase_regions
, NUM_ERASE_REGIONS
);
2150 tmp
= le32_to_cpu(get_unaligned(
2151 &(qry
.erase_region_info
[i
])));
2152 debug("erase region %u: 0x%08lx\n", i
, tmp
);
2154 erase_region_count
= (tmp
& 0xffff) + 1;
2157 (tmp
& 0xffff) ? ((tmp
& 0xffff) * 256) : 128;
2158 debug ("erase_region_count = %d erase_region_size = %d\n",
2159 erase_region_count
, erase_region_size
);
2160 for (j
= 0; j
< erase_region_count
; j
++) {
2161 if (sector
- base
>= info
->size
)
2163 if (sect_cnt
>= CONFIG_SYS_MAX_FLASH_SECT
) {
2164 printf("ERROR: too many flash sectors\n");
2167 info
->start
[sect_cnt
] =
2168 (ulong
)map_physmem(sector
,
2171 sector
+= (erase_region_size
* size_ratio
);
2174 * Only read protection status from
2175 * supported devices (intel...)
2177 switch (info
->vendor
) {
2178 case CFI_CMDSET_INTEL_PROG_REGIONS
:
2179 case CFI_CMDSET_INTEL_EXTENDED
:
2180 case CFI_CMDSET_INTEL_STANDARD
:
2182 * Set flash to read-id mode. Otherwise
2183 * reading protected status is not
2186 flash_write_cmd(info
, sect_cnt
, 0,
2188 info
->protect
[sect_cnt
] =
2189 flash_isset (info
, sect_cnt
,
2190 FLASH_OFFSET_PROTECT
,
2191 FLASH_STATUS_PROTECT
);
2193 case CFI_CMDSET_AMD_EXTENDED
:
2194 case CFI_CMDSET_AMD_STANDARD
:
2195 if (!info
->legacy_unlock
) {
2196 /* default: not protected */
2197 info
->protect
[sect_cnt
] = 0;
2201 /* Read protection (PPB) from sector */
2202 flash_write_cmd(info
, 0, 0,
2204 flash_unlock_seq(info
, 0);
2205 flash_write_cmd(info
, 0,
2208 info
->protect
[sect_cnt
] =
2211 FLASH_OFFSET_PROTECT
,
2212 FLASH_STATUS_PROTECT
);
2215 /* default: not protected */
2216 info
->protect
[sect_cnt
] = 0;
2223 info
->sector_count
= sect_cnt
;
2224 info
->buffer_size
= 1 << le16_to_cpu(qry
.max_buf_write_size
);
2225 tmp
= 1 << qry
.block_erase_timeout_typ
;
2226 info
->erase_blk_tout
= tmp
*
2227 (1 << qry
.block_erase_timeout_max
);
2228 tmp
= (1 << qry
.buf_write_timeout_typ
) *
2229 (1 << qry
.buf_write_timeout_max
);
2231 /* round up when converting to ms */
2232 info
->buffer_write_tout
= (tmp
+ 999) / 1000;
2233 tmp
= (1 << qry
.word_write_timeout_typ
) *
2234 (1 << qry
.word_write_timeout_max
);
2235 /* round up when converting to ms */
2236 info
->write_tout
= (tmp
+ 999) / 1000;
2237 info
->flash_id
= FLASH_MAN_CFI
;
2238 if ((info
->interface
== FLASH_CFI_X8X16
) &&
2239 (info
->chipwidth
== FLASH_CFI_BY8
)) {
2240 /* XXX - Need to test on x8/x16 in parallel. */
2241 info
->portwidth
>>= 1;
2244 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
2247 return (info
->size
);
2250 #ifdef CONFIG_FLASH_CFI_MTD
2251 void flash_set_verbose(uint v
)
2257 static void cfi_flash_set_config_reg(u32 base
, u16 val
)
2259 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2261 * Only set this config register if really defined
2262 * to a valid value (0xffff is invalid)
2268 * Set configuration register. Data is "encrypted" in the 16 lower
2271 flash_write16(FLASH_CMD_SETUP
, (void *)(base
+ (val
<< 1)));
2272 flash_write16(FLASH_CMD_SET_CR_CONFIRM
, (void *)(base
+ (val
<< 1)));
2275 * Finally issue reset-command to bring device back to
2278 flash_write16(FLASH_CMD_RESET
, (void *)base
);
2282 /*-----------------------------------------------------------------------
2285 void flash_protect_default(void)
2287 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2292 } apl
[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST
;
2295 /* Monitor protection ON by default */
2296 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2297 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2298 flash_protect(FLAG_PROTECT_SET
,
2299 CONFIG_SYS_MONITOR_BASE
,
2300 CONFIG_SYS_MONITOR_BASE
+ monitor_flash_len
- 1,
2301 flash_get_info(CONFIG_SYS_MONITOR_BASE
));
2304 /* Environment protection ON by default */
2305 #ifdef CONFIG_ENV_IS_IN_FLASH
2306 flash_protect(FLAG_PROTECT_SET
,
2308 CONFIG_ENV_ADDR
+ CONFIG_ENV_SECT_SIZE
- 1,
2309 flash_get_info(CONFIG_ENV_ADDR
));
2312 /* Redundant environment protection ON by default */
2313 #ifdef CONFIG_ENV_ADDR_REDUND
2314 flash_protect(FLAG_PROTECT_SET
,
2315 CONFIG_ENV_ADDR_REDUND
,
2316 CONFIG_ENV_ADDR_REDUND
+ CONFIG_ENV_SECT_SIZE
- 1,
2317 flash_get_info(CONFIG_ENV_ADDR_REDUND
));
2320 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2321 for (i
= 0; i
< ARRAY_SIZE(apl
); i
++) {
2322 debug("autoprotecting from %08lx to %08lx\n",
2323 apl
[i
].start
, apl
[i
].start
+ apl
[i
].size
- 1);
2324 flash_protect(FLAG_PROTECT_SET
,
2326 apl
[i
].start
+ apl
[i
].size
- 1,
2327 flash_get_info(apl
[i
].start
));
2332 unsigned long flash_init (void)
2334 unsigned long size
= 0;
2337 #ifdef CONFIG_SYS_FLASH_PROTECTION
2338 /* read environment from EEPROM */
2340 getenv_f("unlock", s
, sizeof(s
));
2343 /* Init: no FLASHes known */
2344 for (i
= 0; i
< CONFIG_SYS_MAX_FLASH_BANKS
; ++i
) {
2345 flash_info
[i
].flash_id
= FLASH_UNKNOWN
;
2347 /* Optionally write flash configuration register */
2348 cfi_flash_set_config_reg(cfi_flash_bank_addr(i
),
2349 cfi_flash_config_reg(i
));
2351 if (!flash_detect_legacy(cfi_flash_bank_addr(i
), i
))
2352 flash_get_size(cfi_flash_bank_addr(i
), i
);
2353 size
+= flash_info
[i
].size
;
2354 if (flash_info
[i
].flash_id
== FLASH_UNKNOWN
) {
2355 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2356 printf ("## Unknown flash on Bank %d "
2357 "- Size = 0x%08lx = %ld MB\n",
2358 i
+1, flash_info
[i
].size
,
2359 flash_info
[i
].size
>> 20);
2360 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2362 #ifdef CONFIG_SYS_FLASH_PROTECTION
2363 else if ((s
!= NULL
) && (strcmp(s
, "yes") == 0)) {
2365 * Only the U-Boot image and it's environment
2366 * is protected, all other sectors are
2367 * unprotected (unlocked) if flash hardware
2368 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2369 * and the environment variable "unlock" is
2372 if (flash_info
[i
].legacy_unlock
) {
2376 * Disable legacy_unlock temporarily,
2377 * since flash_real_protect would
2378 * relock all other sectors again
2381 flash_info
[i
].legacy_unlock
= 0;
2384 * Legacy unlocking (e.g. Intel J3) ->
2385 * unlock only one sector. This will
2386 * unlock all sectors.
2388 flash_real_protect (&flash_info
[i
], 0, 0);
2390 flash_info
[i
].legacy_unlock
= 1;
2393 * Manually mark other sectors as
2394 * unlocked (unprotected)
2396 for (k
= 1; k
< flash_info
[i
].sector_count
; k
++)
2397 flash_info
[i
].protect
[k
] = 0;
2400 * No legancy unlocking -> unlock all sectors
2402 flash_protect (FLAG_PROTECT_CLEAR
,
2403 flash_info
[i
].start
[0],
2404 flash_info
[i
].start
[0]
2405 + flash_info
[i
].size
- 1,
2409 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2412 flash_protect_default();
2413 #ifdef CONFIG_FLASH_CFI_MTD