3 * Michael Schwingen, <michael@schwingen.org>
5 * based in great part on jedec_probe.c from linux kernel:
6 * (C) 2000 Red Hat. GPL'd.
7 * Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 /* The DEBUG define must be before common to enable debugging */
33 #include <asm/processor.h>
35 #include <asm/byteorder.h>
36 #include <environment.h>
38 #define P_ID_AMD_STD CFI_CMDSET_AMD_LEGACY
41 #define MANUFACTURER_AMD 0x0001
42 #define MANUFACTURER_SST 0x00BF
45 #define AM29DL800BB 0x22C8
46 #define AM29DL800BT 0x224A
48 #define AM29F800BB 0x2258
49 #define AM29F800BT 0x22D6
50 #define AM29LV400BB 0x22BA
51 #define AM29LV400BT 0x22B9
52 #define AM29LV800BB 0x225B
53 #define AM29LV800BT 0x22DA
54 #define AM29LV160DT 0x22C4
55 #define AM29LV160DB 0x2249
56 #define AM29F017D 0x003D
57 #define AM29F016D 0x00AD
58 #define AM29F080 0x00D5
59 #define AM29F040 0x00A4
60 #define AM29LV040B 0x004F
61 #define AM29F032B 0x0041
62 #define AM29F002T 0x00B0
65 #define SST39LF800 0x2781
66 #define SST39LF160 0x2782
67 #define SST39VF1601 0x234b
68 #define SST39LF512 0x00D4
69 #define SST39LF010 0x00D5
70 #define SST39LF020 0x00D6
71 #define SST39LF040 0x00D7
72 #define SST39SF010A 0x00B5
73 #define SST39SF020A 0x00B6
77 * Unlock address sets for AMD command sets.
78 * Intel command sets use the MTD_UADDR_UNNECESSARY.
79 * Each identifier, except MTD_UADDR_UNNECESSARY, and
80 * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
81 * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
82 * initialization need not require initializing all of the
83 * unlock addresses for all bit widths.
86 MTD_UADDR_NOT_SUPPORTED
= 0, /* data width not supported */
87 MTD_UADDR_0x0555_0x02AA
,
88 MTD_UADDR_0x0555_0x0AAA
,
89 MTD_UADDR_0x5555_0x2AAA
,
90 MTD_UADDR_0x0AAA_0x0555
,
91 MTD_UADDR_DONT_CARE
, /* Requires an arbitrary address */
92 MTD_UADDR_UNNECESSARY
, /* Does not require any address */
103 * I don't like the fact that the first entry in unlock_addrs[]
104 * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
105 * should not be used. The problem is that structures with
106 * initializers have extra fields initialized to 0. It is _very_
107 * desireable to have the unlock address entries for unsupported
108 * data widths automatically initialized - that means that
109 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
112 static const struct unlock_addr unlock_addrs
[] = {
113 [MTD_UADDR_NOT_SUPPORTED
] = {
118 [MTD_UADDR_0x0555_0x02AA
] = {
123 [MTD_UADDR_0x0555_0x0AAA
] = {
128 [MTD_UADDR_0x5555_0x2AAA
] = {
133 [MTD_UADDR_0x0AAA_0x0555
] = {
138 [MTD_UADDR_DONT_CARE
] = {
139 .addr1
= 0x0000, /* Doesn't matter which address */
140 .addr2
= 0x0000 /* is used - must be last entry */
143 [MTD_UADDR_UNNECESSARY
] = {
150 struct amd_flash_info
{
155 const int NumEraseRegions
;
157 const __u8 uaddr
[4]; /* unlock addrs for 8, 16, 32, 64 */
158 const ulong regions
[6];
161 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
163 #define SIZE_64KiB 16
164 #define SIZE_128KiB 17
165 #define SIZE_256KiB 18
166 #define SIZE_512KiB 19
172 static const struct amd_flash_info jedec_table
[] = {
173 #ifdef CFG_FLASH_LEGACY_256Kx8
175 .mfr_id
= MANUFACTURER_SST
,
176 .dev_id
= SST39LF020
,
177 .name
= "SST 39LF020",
179 [0] = MTD_UADDR_0x5555_0x2AAA
/* x8 */
181 .DevSize
= SIZE_256KiB
,
182 .CmdSet
= P_ID_AMD_STD
,
185 ERASEINFO(0x01000,64),
189 #ifdef CFG_FLASH_LEGACY_512Kx8
191 .mfr_id
= MANUFACTURER_AMD
,
192 .dev_id
= AM29LV040B
,
193 .name
= "AMD AM29LV040B",
195 [0] = MTD_UADDR_0x0555_0x02AA
/* x8 */
197 .DevSize
= SIZE_512KiB
,
198 .CmdSet
= P_ID_AMD_STD
,
201 ERASEINFO(0x10000,8),
205 .mfr_id
= MANUFACTURER_SST
,
206 .dev_id
= SST39LF040
,
207 .name
= "SST 39LF040",
209 [0] = MTD_UADDR_0x5555_0x2AAA
/* x8 */
211 .DevSize
= SIZE_512KiB
,
212 .CmdSet
= P_ID_AMD_STD
,
215 ERASEINFO(0x01000,128),
222 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
225 static inline void fill_info(flash_info_t
*info
, const struct amd_flash_info
*jedec_entry
, ulong base
)
231 enum uaddr uaddr_idx
;
233 size_ratio
= info
->portwidth
/ info
->chipwidth
;
235 debug("Found JEDEC Flash: %s\n", jedec_entry
->name
);
236 info
->vendor
= jedec_entry
->CmdSet
;
237 /* Todo: do we need device-specific timeouts? */
238 info
->erase_blk_tout
= 30000;
239 info
->buffer_write_tout
= 1000;
240 info
->write_tout
= 100;
241 info
->name
= jedec_entry
->name
;
243 /* copy unlock addresses from device table to CFI info struct. This
244 is just here because the addresses are in the table anyway - if
245 the flash is not detected due to wrong unlock addresses,
246 flash_detect_legacy would have to try all of them before we even
248 switch(info
->chipwidth
) {
250 uaddr_idx
= jedec_entry
->uaddr
[0];
252 case FLASH_CFI_16BIT
:
253 uaddr_idx
= jedec_entry
->uaddr
[1];
255 case FLASH_CFI_32BIT
:
256 uaddr_idx
= jedec_entry
->uaddr
[2];
259 uaddr_idx
= MTD_UADDR_NOT_SUPPORTED
;
263 debug("unlock address index %d\n", uaddr_idx
);
264 info
->addr_unlock1
= unlock_addrs
[uaddr_idx
].addr1
;
265 info
->addr_unlock2
= unlock_addrs
[uaddr_idx
].addr2
;
266 debug("unlock addresses are 0x%x/0x%x\n", info
->addr_unlock1
, info
->addr_unlock2
);
270 for (i
= 0; i
< jedec_entry
->NumEraseRegions
; i
++) {
271 ulong erase_region_size
= jedec_entry
->regions
[i
] >> 8;
272 ulong erase_region_count
= (jedec_entry
->regions
[i
] & 0xff) + 1;
274 total_size
+= erase_region_size
* erase_region_count
;
275 debug ("erase_region_count = %d erase_region_size = %d\n",
276 erase_region_count
, erase_region_size
);
277 for (j
= 0; j
< erase_region_count
; j
++) {
278 if (sect_cnt
>= CFG_MAX_FLASH_SECT
) {
279 printf("ERROR: too many flash sectors\n");
282 info
->start
[sect_cnt
] = base
;
283 base
+= (erase_region_size
* size_ratio
);
287 info
->sector_count
= sect_cnt
;
288 info
->size
= total_size
* size_ratio
;
291 /*-----------------------------------------------------------------------
292 * match jedec ids against table. If a match is found, fill flash_info entry
294 int jedec_flash_match(flash_info_t
*info
, ulong base
)
299 if (info
->chipwidth
== 1)
302 for (i
= 0; i
< ARRAY_SIZE(jedec_table
); i
++) {
303 if ((jedec_table
[i
].mfr_id
& mask
) == (info
->manufacturer_id
& mask
) &&
304 (jedec_table
[i
].dev_id
& mask
) == (info
->device_id
& mask
)) {
305 fill_info(info
, &jedec_table
[i
], base
);