4 * Copyright (C) 2007 MontaVista Software, Inc.
5 * Anton Vorontsov <avorontsov@ru.mvista.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
16 #include <asm/errno.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/fsl_upm.h>
21 static void fsl_upm_start_pattern(struct fsl_upm
*upm
, u32 pat_offset
)
23 clrsetbits_be32(upm
->mxmr
, MxMR_MAD_MSK
, MxMR_OP_RUNP
| pat_offset
);
24 (void)in_be32(upm
->mxmr
);
27 static void fsl_upm_end_pattern(struct fsl_upm
*upm
)
29 clrbits_be32(upm
->mxmr
, MxMR_OP_RUNP
);
31 while (in_be32(upm
->mxmr
) & MxMR_OP_RUNP
)
35 static void fsl_upm_run_pattern(struct fsl_upm
*upm
, int width
,
36 void __iomem
*io_addr
, u32 mar
)
38 out_be32(upm
->mar
, mar
);
39 (void)in_be32(upm
->mar
);
45 out_be16(io_addr
, 0x0);
48 out_be32(io_addr
, 0x0);
53 static void fun_wait(struct fsl_upm_nand
*fun
)
56 while (!fun
->dev_ready(fun
->chip_nr
))
57 debug("unexpected busy state\n");
60 * If the R/B pin is not connected, like on the TQM8548,
61 * a short delay is necessary.
67 #if CONFIG_SYS_NAND_MAX_CHIPS > 1
68 static void fun_select_chip(struct mtd_info
*mtd
, int chip_nr
)
70 struct nand_chip
*chip
= mtd
->priv
;
71 struct fsl_upm_nand
*fun
= chip
->priv
;
74 fun
->chip_nr
= chip_nr
;
75 chip
->IO_ADDR_R
= chip
->IO_ADDR_W
=
76 fun
->upm
.io_addr
+ fun
->chip_offset
* chip_nr
;
77 } else if (chip_nr
== -1) {
78 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
83 static void fun_cmd_ctrl(struct mtd_info
*mtd
, int cmd
, unsigned int ctrl
)
85 struct nand_chip
*chip
= mtd
->priv
;
86 struct fsl_upm_nand
*fun
= chip
->priv
;
87 void __iomem
*io_addr
;
90 if (!(ctrl
& fun
->last_ctrl
)) {
91 fsl_upm_end_pattern(&fun
->upm
);
93 if (cmd
== NAND_CMD_NONE
)
96 fun
->last_ctrl
= ctrl
& (NAND_ALE
| NAND_CLE
);
99 if (ctrl
& NAND_CTRL_CHANGE
) {
101 fsl_upm_start_pattern(&fun
->upm
, fun
->upm_addr_offset
);
102 else if (ctrl
& NAND_CLE
)
103 fsl_upm_start_pattern(&fun
->upm
, fun
->upm_cmd_offset
);
106 mar
= cmd
<< (32 - fun
->width
);
107 io_addr
= fun
->upm
.io_addr
;
108 #if CONFIG_SYS_NAND_MAX_CHIPS > 1
109 if (fun
->chip_nr
> 0) {
110 io_addr
+= fun
->chip_offset
* fun
->chip_nr
;
111 if (fun
->upm_mar_chip_offset
)
112 mar
|= fun
->upm_mar_chip_offset
* fun
->chip_nr
;
115 fsl_upm_run_pattern(&fun
->upm
, fun
->width
, io_addr
, mar
);
118 * Some boards/chips needs this. At least the MPC8360E-RDK and
119 * TQM8548 need it. Probably weird chip, because I don't see
120 * any need for this on MPC8555E + Samsung K9F1G08U0A. Usually
121 * here are 0-2 unexpected busy states per block read.
123 if (fun
->wait_flags
& FSL_UPM_WAIT_RUN_PATTERN
)
127 static u8
upm_nand_read_byte(struct mtd_info
*mtd
)
129 struct nand_chip
*chip
= mtd
->priv
;
131 return in_8(chip
->IO_ADDR_R
);
134 static void upm_nand_write_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
137 struct nand_chip
*chip
= mtd
->priv
;
138 struct fsl_upm_nand
*fun
= chip
->priv
;
140 for (i
= 0; i
< len
; i
++) {
141 out_8(chip
->IO_ADDR_W
, buf
[i
]);
142 if (fun
->wait_flags
& FSL_UPM_WAIT_WRITE_BYTE
)
146 if (fun
->wait_flags
& FSL_UPM_WAIT_WRITE_BUFFER
)
150 static void upm_nand_read_buf(struct mtd_info
*mtd
, u_char
*buf
, int len
)
153 struct nand_chip
*chip
= mtd
->priv
;
155 for (i
= 0; i
< len
; i
++)
156 buf
[i
] = in_8(chip
->IO_ADDR_R
);
159 static int upm_nand_verify_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
162 struct nand_chip
*chip
= mtd
->priv
;
164 for (i
= 0; i
< len
; i
++) {
165 if (buf
[i
] != in_8(chip
->IO_ADDR_R
))
172 static int nand_dev_ready(struct mtd_info
*mtd
)
174 struct nand_chip
*chip
= mtd
->priv
;
175 struct fsl_upm_nand
*fun
= chip
->priv
;
177 return fun
->dev_ready(fun
->chip_nr
);
180 int fsl_upm_nand_init(struct nand_chip
*chip
, struct fsl_upm_nand
*fun
)
182 if (fun
->width
!= 8 && fun
->width
!= 16 && fun
->width
!= 32)
185 fun
->last_ctrl
= NAND_CLE
;
188 chip
->chip_delay
= fun
->chip_delay
;
189 chip
->ecc
.mode
= NAND_ECC_SOFT
;
190 chip
->cmd_ctrl
= fun_cmd_ctrl
;
191 #if CONFIG_SYS_NAND_MAX_CHIPS > 1
192 chip
->select_chip
= fun_select_chip
;
194 chip
->read_byte
= upm_nand_read_byte
;
195 chip
->read_buf
= upm_nand_read_buf
;
196 chip
->write_buf
= upm_nand_write_buf
;
197 chip
->verify_buf
= upm_nand_verify_buf
;
199 chip
->dev_ready
= nand_dev_ready
;