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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/mtd/nand/mpc5121_nfc.c
2 * Copyright 2004-2008 Freescale Semiconductor, Inc.
3 * Copyright 2009 Semihalf.
4 * (C) Copyright 2009 Stefan Roese <sr@denx.de>
6 * Based on original driver from Freescale Semiconductor
7 * written by John Rigby <jrigby@freescale.com> on basis
8 * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
9 * Piotr Ziecik <kosmo@semihalf.com>.
11 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/nand_ecc.h>
20 #include <linux/compat.h>
22 #include <asm/errno.h>
24 #include <asm/processor.h>
27 #define DRV_NAME "mpc5121_nfc"
30 #define NFC_RESET_TIMEOUT 1000 /* 1 ms */
31 #define NFC_TIMEOUT 2000 /* 2000 us */
33 /* Addresses for NFC MAIN RAM BUFFER areas */
34 #define NFC_MAIN_AREA(n) ((n) * 0x200)
36 /* Addresses for NFC SPARE BUFFER areas */
37 #define NFC_SPARE_BUFFERS 8
38 #define NFC_SPARE_LEN 0x40
39 #define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN))
41 /* MPC5121 NFC registers */
42 #define NFC_BUF_ADDR 0x1E04
43 #define NFC_FLASH_ADDR 0x1E06
44 #define NFC_FLASH_CMD 0x1E08
45 #define NFC_CONFIG 0x1E0A
46 #define NFC_ECC_STATUS1 0x1E0C
47 #define NFC_ECC_STATUS2 0x1E0E
48 #define NFC_SPAS 0x1E10
49 #define NFC_WRPROT 0x1E12
50 #define NFC_NF_WRPRST 0x1E18
51 #define NFC_CONFIG1 0x1E1A
52 #define NFC_CONFIG2 0x1E1C
53 #define NFC_UNLOCKSTART_BLK0 0x1E20
54 #define NFC_UNLOCKEND_BLK0 0x1E22
55 #define NFC_UNLOCKSTART_BLK1 0x1E24
56 #define NFC_UNLOCKEND_BLK1 0x1E26
57 #define NFC_UNLOCKSTART_BLK2 0x1E28
58 #define NFC_UNLOCKEND_BLK2 0x1E2A
59 #define NFC_UNLOCKSTART_BLK3 0x1E2C
60 #define NFC_UNLOCKEND_BLK3 0x1E2E
62 /* Bit Definitions: NFC_BUF_ADDR */
63 #define NFC_RBA_MASK (7 << 0)
64 #define NFC_ACTIVE_CS_SHIFT 5
65 #define NFC_ACTIVE_CS_MASK (3 << NFC_ACTIVE_CS_SHIFT)
67 /* Bit Definitions: NFC_CONFIG */
68 #define NFC_BLS_UNLOCKED (1 << 1)
70 /* Bit Definitions: NFC_CONFIG1 */
71 #define NFC_ECC_4BIT (1 << 0)
72 #define NFC_FULL_PAGE_DMA (1 << 1)
73 #define NFC_SPARE_ONLY (1 << 2)
74 #define NFC_ECC_ENABLE (1 << 3)
75 #define NFC_INT_MASK (1 << 4)
76 #define NFC_BIG_ENDIAN (1 << 5)
77 #define NFC_RESET (1 << 6)
78 #define NFC_CE (1 << 7)
79 #define NFC_ONE_CYCLE (1 << 8)
80 #define NFC_PPB_32 (0 << 9)
81 #define NFC_PPB_64 (1 << 9)
82 #define NFC_PPB_128 (2 << 9)
83 #define NFC_PPB_256 (3 << 9)
84 #define NFC_PPB_MASK (3 << 9)
85 #define NFC_FULL_PAGE_INT (1 << 11)
87 /* Bit Definitions: NFC_CONFIG2 */
88 #define NFC_COMMAND (1 << 0)
89 #define NFC_ADDRESS (1 << 1)
90 #define NFC_INPUT (1 << 2)
91 #define NFC_OUTPUT (1 << 3)
92 #define NFC_ID (1 << 4)
93 #define NFC_STATUS (1 << 5)
94 #define NFC_CMD_FAIL (1 << 15)
95 #define NFC_INT (1 << 15)
97 /* Bit Definitions: NFC_WRPROT */
98 #define NFC_WPC_LOCK_TIGHT (1 << 0)
99 #define NFC_WPC_LOCK (1 << 1)
100 #define NFC_WPC_UNLOCK (1 << 2)
102 struct mpc5121_nfc_prv
{
104 struct nand_chip chip
;
113 int mpc5121_nfc_chip
= 0;
115 static void mpc5121_nfc_done(struct mtd_info
*mtd
);
117 /* Read NFC register */
118 static inline u16
nfc_read(struct mtd_info
*mtd
, uint reg
)
120 struct nand_chip
*chip
= mtd
->priv
;
121 struct mpc5121_nfc_prv
*prv
= chip
->priv
;
123 return in_be16(prv
->regs
+ reg
);
126 /* Write NFC register */
127 static inline void nfc_write(struct mtd_info
*mtd
, uint reg
, u16 val
)
129 struct nand_chip
*chip
= mtd
->priv
;
130 struct mpc5121_nfc_prv
*prv
= chip
->priv
;
132 out_be16(prv
->regs
+ reg
, val
);
135 /* Set bits in NFC register */
136 static inline void nfc_set(struct mtd_info
*mtd
, uint reg
, u16 bits
)
138 nfc_write(mtd
, reg
, nfc_read(mtd
, reg
) | bits
);
141 /* Clear bits in NFC register */
142 static inline void nfc_clear(struct mtd_info
*mtd
, uint reg
, u16 bits
)
144 nfc_write(mtd
, reg
, nfc_read(mtd
, reg
) & ~bits
);
147 /* Invoke address cycle */
148 static inline void mpc5121_nfc_send_addr(struct mtd_info
*mtd
, u16 addr
)
150 nfc_write(mtd
, NFC_FLASH_ADDR
, addr
);
151 nfc_write(mtd
, NFC_CONFIG2
, NFC_ADDRESS
);
152 mpc5121_nfc_done(mtd
);
155 /* Invoke command cycle */
156 static inline void mpc5121_nfc_send_cmd(struct mtd_info
*mtd
, u16 cmd
)
158 nfc_write(mtd
, NFC_FLASH_CMD
, cmd
);
159 nfc_write(mtd
, NFC_CONFIG2
, NFC_COMMAND
);
160 mpc5121_nfc_done(mtd
);
163 /* Send data from NFC buffers to NAND flash */
164 static inline void mpc5121_nfc_send_prog_page(struct mtd_info
*mtd
)
166 nfc_clear(mtd
, NFC_BUF_ADDR
, NFC_RBA_MASK
);
167 nfc_write(mtd
, NFC_CONFIG2
, NFC_INPUT
);
168 mpc5121_nfc_done(mtd
);
171 /* Receive data from NAND flash */
172 static inline void mpc5121_nfc_send_read_page(struct mtd_info
*mtd
)
174 nfc_clear(mtd
, NFC_BUF_ADDR
, NFC_RBA_MASK
);
175 nfc_write(mtd
, NFC_CONFIG2
, NFC_OUTPUT
);
176 mpc5121_nfc_done(mtd
);
179 /* Receive ID from NAND flash */
180 static inline void mpc5121_nfc_send_read_id(struct mtd_info
*mtd
)
182 nfc_clear(mtd
, NFC_BUF_ADDR
, NFC_RBA_MASK
);
183 nfc_write(mtd
, NFC_CONFIG2
, NFC_ID
);
184 mpc5121_nfc_done(mtd
);
187 /* Receive status from NAND flash */
188 static inline void mpc5121_nfc_send_read_status(struct mtd_info
*mtd
)
190 nfc_clear(mtd
, NFC_BUF_ADDR
, NFC_RBA_MASK
);
191 nfc_write(mtd
, NFC_CONFIG2
, NFC_STATUS
);
192 mpc5121_nfc_done(mtd
);
195 static void mpc5121_nfc_done(struct mtd_info
*mtd
)
197 int max_retries
= NFC_TIMEOUT
;
201 if (nfc_read(mtd
, NFC_CONFIG2
) & NFC_INT
)
206 if (max_retries
<= 0)
207 printk(KERN_WARNING DRV_NAME
208 ": Timeout while waiting for completion.\n");
211 /* Do address cycle(s) */
212 static void mpc5121_nfc_addr_cycle(struct mtd_info
*mtd
, int column
, int page
)
214 struct nand_chip
*chip
= mtd
->priv
;
215 u32 pagemask
= chip
->pagemask
;
218 mpc5121_nfc_send_addr(mtd
, column
);
219 if (mtd
->writesize
> 512)
220 mpc5121_nfc_send_addr(mtd
, column
>> 8);
225 mpc5121_nfc_send_addr(mtd
, page
& 0xFF);
232 /* Control chip select signals */
235 * Selecting the active device:
237 * This is different than the linux version. Switching between chips
238 * is done via board_nand_select_device(). The Linux select_chip
239 * function used here in U-Boot has only 2 valid chip numbers:
245 * Implement it as a weak default, so that boards with a specific
246 * chip-select routine can use their own function.
248 void __mpc5121_nfc_select_chip(struct mtd_info
*mtd
, int chip
)
251 nfc_clear(mtd
, NFC_CONFIG1
, NFC_CE
);
255 nfc_clear(mtd
, NFC_BUF_ADDR
, NFC_ACTIVE_CS_MASK
);
256 nfc_set(mtd
, NFC_BUF_ADDR
, (chip
<< NFC_ACTIVE_CS_SHIFT
) &
258 nfc_set(mtd
, NFC_CONFIG1
, NFC_CE
);
260 void mpc5121_nfc_select_chip(struct mtd_info
*mtd
, int chip
)
261 __attribute__((weak
, alias("__mpc5121_nfc_select_chip")));
263 void board_nand_select_device(struct nand_chip
*nand
, int chip
)
266 * Only save this chip number in global variable here. This
267 * will be used later in mpc5121_nfc_select_chip().
269 mpc5121_nfc_chip
= chip
;
272 /* Read NAND Ready/Busy signal */
273 static int mpc5121_nfc_dev_ready(struct mtd_info
*mtd
)
276 * NFC handles ready/busy signal internally. Therefore, this function
277 * always returns status as ready.
282 /* Write command to NAND flash */
283 static void mpc5121_nfc_command(struct mtd_info
*mtd
, unsigned command
,
284 int column
, int page
)
286 struct nand_chip
*chip
= mtd
->priv
;
287 struct mpc5121_nfc_prv
*prv
= chip
->priv
;
289 prv
->column
= (column
>= 0) ? column
: 0;
293 case NAND_CMD_PAGEPROG
:
294 mpc5121_nfc_send_prog_page(mtd
);
297 * NFC does not support sub-page reads and writes,
298 * so emulate them using full page transfers.
306 command
= NAND_CMD_READ0
;
310 case NAND_CMD_READOOB
:
312 command
= NAND_CMD_READ0
;
317 mpc5121_nfc_command(mtd
, NAND_CMD_READ0
, column
, page
);
321 case NAND_CMD_ERASE1
:
322 case NAND_CMD_ERASE2
:
323 case NAND_CMD_READID
:
324 case NAND_CMD_STATUS
:
332 mpc5121_nfc_send_cmd(mtd
, command
);
333 mpc5121_nfc_addr_cycle(mtd
, column
, page
);
337 if (mtd
->writesize
> 512)
338 mpc5121_nfc_send_cmd(mtd
, NAND_CMD_READSTART
);
339 mpc5121_nfc_send_read_page(mtd
);
342 case NAND_CMD_READID
:
343 mpc5121_nfc_send_read_id(mtd
);
346 case NAND_CMD_STATUS
:
347 mpc5121_nfc_send_read_status(mtd
);
348 if (chip
->options
& NAND_BUSWIDTH_16
)
356 /* Copy data from/to NFC spare buffers. */
357 static void mpc5121_nfc_copy_spare(struct mtd_info
*mtd
, uint offset
,
358 u8
* buffer
, uint size
, int wr
)
360 struct nand_chip
*nand
= mtd
->priv
;
361 struct mpc5121_nfc_prv
*prv
= nand
->priv
;
362 uint o
, s
, sbsize
, blksize
;
365 * NAND spare area is available through NFC spare buffers.
366 * The NFC divides spare area into (page_size / 512) chunks.
367 * Each chunk is placed into separate spare memory area, using
368 * first (spare_size / num_of_chunks) bytes of the buffer.
370 * For NAND device in which the spare area is not divided fully
371 * by the number of chunks, number of used bytes in each spare
372 * buffer is rounded down to the nearest even number of bytes,
373 * and all remaining bytes are added to the last used spare area.
375 * For more information read section 26.6.10 of MPC5121e
376 * Microcontroller Reference Manual, Rev. 3.
379 /* Calculate number of valid bytes in each spare buffer */
380 sbsize
= (mtd
->oobsize
/ (mtd
->writesize
/ 512)) & ~1;
383 /* Calculate spare buffer number */
385 if (s
> NFC_SPARE_BUFFERS
- 1)
386 s
= NFC_SPARE_BUFFERS
- 1;
389 * Calculate offset to requested data block in selected spare
390 * buffer and its size.
392 o
= offset
- (s
* sbsize
);
393 blksize
= min(sbsize
- o
, size
);
396 memcpy_toio(prv
->regs
+ NFC_SPARE_AREA(s
) + o
,
399 memcpy_fromio(buffer
,
400 prv
->regs
+ NFC_SPARE_AREA(s
) + o
,
409 /* Copy data from/to NFC main and spare buffers */
410 static void mpc5121_nfc_buf_copy(struct mtd_info
*mtd
, u_char
* buf
, int len
,
413 struct nand_chip
*chip
= mtd
->priv
;
414 struct mpc5121_nfc_prv
*prv
= chip
->priv
;
415 uint c
= prv
->column
;
418 /* Handle spare area access */
419 if (prv
->spareonly
|| c
>= mtd
->writesize
) {
420 /* Calculate offset from beginning of spare area */
421 if (c
>= mtd
->writesize
)
425 mpc5121_nfc_copy_spare(mtd
, c
, buf
, len
, wr
);
430 * Handle main area access - limit copy length to prevent
431 * crossing main/spare boundary.
433 l
= min((uint
) len
, mtd
->writesize
- c
);
437 memcpy_toio(prv
->regs
+ NFC_MAIN_AREA(0) + c
, buf
, l
);
439 memcpy_fromio(buf
, prv
->regs
+ NFC_MAIN_AREA(0) + c
, l
);
441 /* Handle crossing main/spare boundary */
445 mpc5121_nfc_buf_copy(mtd
, buf
, len
, wr
);
449 /* Read data from NFC buffers */
450 static void mpc5121_nfc_read_buf(struct mtd_info
*mtd
, u_char
* buf
, int len
)
452 mpc5121_nfc_buf_copy(mtd
, buf
, len
, 0);
455 /* Write data to NFC buffers */
456 static void mpc5121_nfc_write_buf(struct mtd_info
*mtd
,
457 const u_char
* buf
, int len
)
459 mpc5121_nfc_buf_copy(mtd
, (u_char
*) buf
, len
, 1);
462 #if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
463 /* Compare buffer with NAND flash */
464 static int mpc5121_nfc_verify_buf(struct mtd_info
*mtd
,
465 const u_char
* buf
, int len
)
471 bsize
= min(len
, 256);
472 mpc5121_nfc_read_buf(mtd
, tmp
, bsize
);
474 if (memcmp(buf
, tmp
, bsize
))
485 /* Read byte from NFC buffers */
486 static u8
mpc5121_nfc_read_byte(struct mtd_info
*mtd
)
490 mpc5121_nfc_read_buf(mtd
, &tmp
, sizeof(tmp
));
495 /* Read word from NFC buffers */
496 static u16
mpc5121_nfc_read_word(struct mtd_info
*mtd
)
500 mpc5121_nfc_read_buf(mtd
, (u_char
*) & tmp
, sizeof(tmp
));
506 * Read NFC configuration from Reset Config Word
508 * NFC is configured during reset in basis of information stored
509 * in Reset Config Word. There is no other way to set NAND block
510 * size, spare size and bus width.
512 static int mpc5121_nfc_read_hw_config(struct mtd_info
*mtd
)
514 immap_t
*im
= (immap_t
*)CONFIG_SYS_IMMR
;
515 struct nand_chip
*chip
= mtd
->priv
;
516 uint rcw_pagesize
= 0;
517 uint rcw_sparesize
= 0;
522 rcwh
= in_be32(&(im
->reset
.rcwh
));
524 /* Bit 6: NFC bus width */
525 rcw_width
= ((rcwh
>> 6) & 0x1) ? 2 : 1;
527 /* Bit 7: NFC Page/Spare size */
528 ps
= (rcwh
>> 7) & 0x1;
530 /* Bits [22:21]: ROM Location */
531 romloc
= (rcwh
>> 21) & 0x3;
533 /* Decode RCW bits */
534 switch ((ps
<< 2) | romloc
) {
557 mtd
->writesize
= rcw_pagesize
;
558 mtd
->oobsize
= rcw_sparesize
;
560 chip
->options
|= NAND_BUSWIDTH_16
;
562 debug(KERN_NOTICE DRV_NAME
": Configured for "
563 "%u-bit NAND, page size %u with %u spare.\n",
564 rcw_width
* 8, rcw_pagesize
, rcw_sparesize
);
568 int board_nand_init(struct nand_chip
*chip
)
570 struct mpc5121_nfc_prv
*prv
;
571 struct mtd_info
*mtd
;
575 static int chip_nr
= 0;
578 * Check SoC revision. This driver supports only NFC
579 * in MPC5121 revision 2.
581 rev
= (mfspr(SPRN_SVR
) >> 4) & 0xF;
583 printk(KERN_ERR DRV_NAME
584 ": SoC revision %u is not supported!\n", rev
);
588 prv
= malloc(sizeof(*prv
));
590 printk(KERN_ERR DRV_NAME
": Memory exhausted!\n");
594 mtd
= &nand_info
[chip_nr
++];
598 /* Read NFC configuration from Reset Config Word */
599 retval
= mpc5121_nfc_read_hw_config(mtd
);
601 printk(KERN_ERR DRV_NAME
": Unable to read NFC config!\n");
605 prv
->regs
= (void __iomem
*)CONFIG_SYS_NAND_BASE
;
606 chip
->dev_ready
= mpc5121_nfc_dev_ready
;
607 chip
->cmdfunc
= mpc5121_nfc_command
;
608 chip
->read_byte
= mpc5121_nfc_read_byte
;
609 chip
->read_word
= mpc5121_nfc_read_word
;
610 chip
->read_buf
= mpc5121_nfc_read_buf
;
611 chip
->write_buf
= mpc5121_nfc_write_buf
;
612 #if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
613 chip
->verify_buf
= mpc5121_nfc_verify_buf
;
615 chip
->select_chip
= mpc5121_nfc_select_chip
;
616 chip
->bbt_options
= NAND_BBT_USE_FLASH
;
617 chip
->ecc
.mode
= NAND_ECC_SOFT
;
619 /* Reset NAND Flash controller */
620 nfc_set(mtd
, NFC_CONFIG1
, NFC_RESET
);
621 while (nfc_read(mtd
, NFC_CONFIG1
) & NFC_RESET
) {
622 if (resettime
++ >= NFC_RESET_TIMEOUT
) {
623 printk(KERN_ERR DRV_NAME
624 ": Timeout while resetting NFC!\n");
632 /* Enable write to NFC memory */
633 nfc_write(mtd
, NFC_CONFIG
, NFC_BLS_UNLOCKED
);
635 /* Enable write to all NAND pages */
636 nfc_write(mtd
, NFC_UNLOCKSTART_BLK0
, 0x0000);
637 nfc_write(mtd
, NFC_UNLOCKEND_BLK0
, 0xFFFF);
638 nfc_write(mtd
, NFC_WRPROT
, NFC_WPC_UNLOCK
);
642 * - Big Endian transfers,
643 * - Interrupt after full page read/write.
645 nfc_write(mtd
, NFC_CONFIG1
, NFC_BIG_ENDIAN
| NFC_INT_MASK
|
648 /* Set spare area size */
649 nfc_write(mtd
, NFC_SPAS
, mtd
->oobsize
>> 1);
651 /* Detect NAND chips */
652 if (nand_scan(mtd
, 1)) {
653 printk(KERN_ERR DRV_NAME
": NAND Flash not found !\n");
658 /* Set erase block size */
659 switch (mtd
->erasesize
/ mtd
->writesize
) {
661 nfc_set(mtd
, NFC_CONFIG1
, NFC_PPB_32
);
665 nfc_set(mtd
, NFC_CONFIG1
, NFC_PPB_64
);
669 nfc_set(mtd
, NFC_CONFIG1
, NFC_PPB_128
);
673 nfc_set(mtd
, NFC_CONFIG1
, NFC_PPB_256
);
677 printk(KERN_ERR DRV_NAME
": Unsupported NAND flash!\n");