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[people/ms/u-boot.git] / drivers / mtd / nand / nand_ecc.c
1 /*
2 * This file contains an ECC algorithm from Toshiba that detects and
3 * corrects 1 bit errors in a 256 byte block of data.
4 *
5 * drivers/mtd/nand/nand_ecc.c
6 *
7 * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
8 * Toshiba America Electronics Components, Inc.
9 *
10 * $Id: nand_ecc.c,v 1.14 2004/06/16 15:34:37 gleixner Exp $
11 *
12 * This file is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 or (at your option) any
15 * later version.
16 *
17 * This file is distributed in the hope that it will be useful, but WITHOUT
18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 * for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this file; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * As a special exception, if other files instantiate templates or use
27 * macros or inline functions from these files, or you compile these
28 * files and link them with other works to produce a work based on these
29 * files, these files do not by themselves cause the resulting work to be
30 * covered by the GNU General Public License. However the source code for
31 * these files must still be made available in accordance with section (3)
32 * of the GNU General Public License.
33 *
34 * This exception does not invalidate any other reasons why a work based on
35 * this file might be covered by the GNU General Public License.
36 */
37
38 #include <common.h>
39
40 #if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
41
42 #include<linux/mtd/mtd.h>
43
44 /*
45 * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(),
46 * only nand_correct_data() is needed
47 */
48
49 #ifndef CONFIG_NAND_SPL
50 /*
51 * Pre-calculated 256-way 1 byte column parity
52 */
53 static const u_char nand_ecc_precalc_table[] = {
54 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
55 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
56 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
57 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
58 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
59 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
60 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
61 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
62 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
63 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
64 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
65 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
66 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
67 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
68 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
69 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
70 };
71
72 /**
73 * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256-byte block
74 * @mtd: MTD block structure
75 * @dat: raw data
76 * @ecc_code: buffer for ECC
77 */
78 int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
79 u_char *ecc_code)
80 {
81 uint8_t idx, reg1, reg2, reg3, tmp1, tmp2;
82 int i;
83
84 /* Initialize variables */
85 reg1 = reg2 = reg3 = 0;
86
87 /* Build up column parity */
88 for(i = 0; i < 256; i++) {
89 /* Get CP0 - CP5 from table */
90 idx = nand_ecc_precalc_table[*dat++];
91 reg1 ^= (idx & 0x3f);
92
93 /* All bit XOR = 1 ? */
94 if (idx & 0x40) {
95 reg3 ^= (uint8_t) i;
96 reg2 ^= ~((uint8_t) i);
97 }
98 }
99
100 /* Create non-inverted ECC code from line parity */
101 tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */
102 tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */
103 tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */
104 tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */
105 tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */
106 tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */
107 tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */
108 tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */
109
110 tmp2 = (reg3 & 0x08) << 4; /* B3 -> B7 */
111 tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */
112 tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */
113 tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */
114 tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */
115 tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */
116 tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */
117 tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
118
119 /* Calculate final ECC code */
120 #ifdef CONFIG_MTD_NAND_ECC_SMC
121 ecc_code[0] = ~tmp2;
122 ecc_code[1] = ~tmp1;
123 #else
124 ecc_code[0] = ~tmp1;
125 ecc_code[1] = ~tmp2;
126 #endif
127 ecc_code[2] = ((~reg1) << 2) | 0x03;
128
129 return 0;
130 }
131 #endif /* CONFIG_NAND_SPL */
132
133 static inline int countbits(uint32_t byte)
134 {
135 int res = 0;
136
137 for (;byte; byte >>= 1)
138 res += byte & 0x01;
139 return res;
140 }
141
142 /**
143 * nand_correct_data - [NAND Interface] Detect and correct bit error(s)
144 * @mtd: MTD block structure
145 * @dat: raw data read from the chip
146 * @read_ecc: ECC from the chip
147 * @calc_ecc: the ECC calculated from raw data
148 *
149 * Detect and correct a 1 bit error for 256 byte block
150 */
151 int nand_correct_data(struct mtd_info *mtd, u_char *dat,
152 u_char *read_ecc, u_char *calc_ecc)
153 {
154 uint8_t s0, s1, s2;
155
156 #ifdef CONFIG_MTD_NAND_ECC_SMC
157 s0 = calc_ecc[0] ^ read_ecc[0];
158 s1 = calc_ecc[1] ^ read_ecc[1];
159 s2 = calc_ecc[2] ^ read_ecc[2];
160 #else
161 s1 = calc_ecc[0] ^ read_ecc[0];
162 s0 = calc_ecc[1] ^ read_ecc[1];
163 s2 = calc_ecc[2] ^ read_ecc[2];
164 #endif
165 if ((s0 | s1 | s2) == 0)
166 return 0;
167
168 /* Check for a single bit error */
169 if( ((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
170 ((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
171 ((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
172
173 uint32_t byteoffs, bitnum;
174
175 byteoffs = (s1 << 0) & 0x80;
176 byteoffs |= (s1 << 1) & 0x40;
177 byteoffs |= (s1 << 2) & 0x20;
178 byteoffs |= (s1 << 3) & 0x10;
179
180 byteoffs |= (s0 >> 4) & 0x08;
181 byteoffs |= (s0 >> 3) & 0x04;
182 byteoffs |= (s0 >> 2) & 0x02;
183 byteoffs |= (s0 >> 1) & 0x01;
184
185 bitnum = (s2 >> 5) & 0x04;
186 bitnum |= (s2 >> 4) & 0x02;
187 bitnum |= (s2 >> 3) & 0x01;
188
189 dat[byteoffs] ^= (1 << bitnum);
190
191 return 1;
192 }
193
194 if(countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 <<16)) == 1)
195 return 1;
196
197 return -1;
198 }
199
200 #endif