2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/mtd/compat.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/onenand.h>
18 #include <asm/errno.h>
21 /* It should access 16-bit instead of 8-bit */
22 static inline void *memcpy_16(void *dst
, const void *src
, unsigned int len
)
34 static const unsigned char ffchars
[] = {
35 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
36 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
37 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
38 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
39 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
40 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
41 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
42 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
46 * onenand_readw - [OneNAND Interface] Read OneNAND register
47 * @param addr address to read
49 * Read OneNAND register
51 static unsigned short onenand_readw(void __iomem
* addr
)
57 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
58 * @param value value to write
59 * @param addr address to write
61 * Write OneNAND register with value
63 static void onenand_writew(unsigned short value
, void __iomem
* addr
)
69 * onenand_block_address - [DEFAULT] Get block address
70 * @param device the device id
71 * @param block the block
72 * @return translated block address if DDP, otherwise same
74 * Setup Start Address 1 Register (F100h)
76 static int onenand_block_address(int device
, int block
)
78 if (device
& ONENAND_DEVICE_IS_DDP
) {
79 /* Device Flash Core select, NAND Flash Block Address */
80 int dfs
= 0, density
, mask
;
82 density
= device
>> ONENAND_DEVICE_DENSITY_SHIFT
;
83 mask
= (1 << (density
+ 6));
88 return (dfs
<< ONENAND_DDP_SHIFT
) | (block
& (mask
- 1));
95 * onenand_bufferram_address - [DEFAULT] Get bufferram address
96 * @param device the device id
97 * @param block the block
98 * @return set DBS value if DDP, otherwise 0
100 * Setup Start Address 2 Register (F101h) for DDP
102 static int onenand_bufferram_address(int device
, int block
)
104 if (device
& ONENAND_DEVICE_IS_DDP
) {
105 /* Device BufferRAM Select */
106 int dbs
= 0, density
, mask
;
108 density
= device
>> ONENAND_DEVICE_DENSITY_SHIFT
;
109 mask
= (1 << (density
+ 6));
114 return (dbs
<< ONENAND_DDP_SHIFT
);
121 * onenand_page_address - [DEFAULT] Get page address
122 * @param page the page address
123 * @param sector the sector address
124 * @return combined page and sector address
126 * Setup Start Address 8 Register (F107h)
128 static int onenand_page_address(int page
, int sector
)
130 /* Flash Page Address, Flash Sector Address */
133 fpa
= page
& ONENAND_FPA_MASK
;
134 fsa
= sector
& ONENAND_FSA_MASK
;
136 return ((fpa
<< ONENAND_FPA_SHIFT
) | fsa
);
140 * onenand_buffer_address - [DEFAULT] Get buffer address
141 * @param dataram1 DataRAM index
142 * @param sectors the sector address
143 * @param count the number of sectors
144 * @return the start buffer value
146 * Setup Start Buffer Register (F200h)
148 static int onenand_buffer_address(int dataram1
, int sectors
, int count
)
152 /* BufferRAM Sector Address */
153 bsa
= sectors
& ONENAND_BSA_MASK
;
156 bsa
|= ONENAND_BSA_DATARAM1
; /* DataRAM1 */
158 bsa
|= ONENAND_BSA_DATARAM0
; /* DataRAM0 */
160 /* BufferRAM Sector Count */
161 bsc
= count
& ONENAND_BSC_MASK
;
163 return ((bsa
<< ONENAND_BSA_SHIFT
) | bsc
);
167 * onenand_command - [DEFAULT] Send command to OneNAND device
168 * @param mtd MTD device structure
169 * @param cmd the command to be sent
170 * @param addr offset to read from or write to
171 * @param len number of bytes to read or write
173 * Send command to OneNAND device. This function is used for middle/large page
174 * devices (1KB/2KB Bytes per page)
176 static int onenand_command(struct mtd_info
*mtd
, int cmd
, loff_t addr
,
179 struct onenand_chip
*this = mtd
->priv
;
180 int value
, readcmd
= 0;
182 /* Now we use page size operation */
183 int sectors
= 4, count
= 4;
185 /* Address translation */
187 case ONENAND_CMD_UNLOCK
:
188 case ONENAND_CMD_LOCK
:
189 case ONENAND_CMD_LOCK_TIGHT
:
194 case ONENAND_CMD_ERASE
:
195 case ONENAND_CMD_BUFFERRAM
:
196 block
= (int)(addr
>> this->erase_shift
);
201 block
= (int)(addr
>> this->erase_shift
);
202 page
= (int)(addr
>> this->page_shift
);
203 page
&= this->page_mask
;
207 /* NOTE: The setting order of the registers is very important! */
208 if (cmd
== ONENAND_CMD_BUFFERRAM
) {
209 /* Select DataRAM for DDP */
210 value
= onenand_bufferram_address(this->device_id
, block
);
211 this->write_word(value
,
212 this->base
+ ONENAND_REG_START_ADDRESS2
);
214 /* Switch to the next data buffer */
215 ONENAND_SET_NEXT_BUFFERRAM(this);
221 /* Write 'DFS, FBA' of Flash */
222 value
= onenand_block_address(this->device_id
, block
);
223 this->write_word(value
,
224 this->base
+ ONENAND_REG_START_ADDRESS1
);
231 case ONENAND_CMD_READ
:
232 case ONENAND_CMD_READOOB
:
233 dataram
= ONENAND_SET_NEXT_BUFFERRAM(this);
238 dataram
= ONENAND_CURRENT_BUFFERRAM(this);
242 /* Write 'FPA, FSA' of Flash */
243 value
= onenand_page_address(page
, sectors
);
244 this->write_word(value
,
245 this->base
+ ONENAND_REG_START_ADDRESS8
);
247 /* Write 'BSA, BSC' of DataRAM */
248 value
= onenand_buffer_address(dataram
, sectors
, count
);
249 this->write_word(value
, this->base
+ ONENAND_REG_START_BUFFER
);
252 /* Select DataRAM for DDP */
254 onenand_bufferram_address(this->device_id
, block
);
255 this->write_word(value
,
257 ONENAND_REG_START_ADDRESS2
);
261 /* Interrupt clear */
262 this->write_word(ONENAND_INT_CLEAR
, this->base
+ ONENAND_REG_INTERRUPT
);
264 this->write_word(cmd
, this->base
+ ONENAND_REG_COMMAND
);
270 * onenand_wait - [DEFAULT] wait until the command is done
271 * @param mtd MTD device structure
272 * @param state state to select the max. timeout value
274 * Wait for command done. This applies to all OneNAND command
275 * Read can take up to 30us, erase up to 2ms and program up to 350us
276 * according to general OneNAND specs
278 static int onenand_wait(struct mtd_info
*mtd
, int state
)
280 struct onenand_chip
*this = mtd
->priv
;
281 unsigned int flags
= ONENAND_INT_MASTER
;
282 unsigned int interrupt
= 0;
283 unsigned int ctrl
, ecc
;
286 interrupt
= this->read_word(this->base
+ ONENAND_REG_INTERRUPT
);
287 if (interrupt
& flags
)
291 ctrl
= this->read_word(this->base
+ ONENAND_REG_CTRL_STATUS
);
293 if (ctrl
& ONENAND_CTRL_ERROR
) {
294 MTDDEBUG (MTD_DEBUG_LEVEL0
,
295 "onenand_wait: controller error = 0x%04x\n", ctrl
);
299 if (ctrl
& ONENAND_CTRL_LOCK
) {
300 MTDDEBUG (MTD_DEBUG_LEVEL0
,
301 "onenand_wait: it's locked error = 0x%04x\n", ctrl
);
305 if (interrupt
& ONENAND_INT_READ
) {
306 ecc
= this->read_word(this->base
+ ONENAND_REG_ECC_STATUS
);
307 if (ecc
& ONENAND_ECC_2BIT_ALL
) {
308 MTDDEBUG (MTD_DEBUG_LEVEL0
,
309 "onenand_wait: ECC error = 0x%04x\n", ecc
);
318 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
319 * @param mtd MTD data structure
320 * @param area BufferRAM area
321 * @return offset given area
323 * Return BufferRAM offset given area
325 static inline int onenand_bufferram_offset(struct mtd_info
*mtd
, int area
)
327 struct onenand_chip
*this = mtd
->priv
;
329 if (ONENAND_CURRENT_BUFFERRAM(this)) {
330 if (area
== ONENAND_DATARAM
)
331 return mtd
->oobblock
;
332 if (area
== ONENAND_SPARERAM
)
340 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
341 * @param mtd MTD data structure
342 * @param area BufferRAM area
343 * @param buffer the databuffer to put/get data
344 * @param offset offset to read from or write to
345 * @param count number of bytes to read/write
347 * Read the BufferRAM area
349 static int onenand_read_bufferram(struct mtd_info
*mtd
, int area
,
350 unsigned char *buffer
, int offset
,
353 struct onenand_chip
*this = mtd
->priv
;
354 void __iomem
*bufferram
;
356 bufferram
= this->base
+ area
;
357 bufferram
+= onenand_bufferram_offset(mtd
, area
);
359 memcpy_16(buffer
, bufferram
+ offset
, count
);
365 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
366 * @param mtd MTD data structure
367 * @param area BufferRAM area
368 * @param buffer the databuffer to put/get data
369 * @param offset offset to read from or write to
370 * @param count number of bytes to read/write
372 * Read the BufferRAM area with Sync. Burst Mode
374 static int onenand_sync_read_bufferram(struct mtd_info
*mtd
, int area
,
375 unsigned char *buffer
, int offset
,
378 struct onenand_chip
*this = mtd
->priv
;
379 void __iomem
*bufferram
;
381 bufferram
= this->base
+ area
;
382 bufferram
+= onenand_bufferram_offset(mtd
, area
);
384 this->mmcontrol(mtd
, ONENAND_SYS_CFG1_SYNC_READ
);
386 memcpy_16(buffer
, bufferram
+ offset
, count
);
388 this->mmcontrol(mtd
, 0);
394 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
395 * @param mtd MTD data structure
396 * @param area BufferRAM area
397 * @param buffer the databuffer to put/get data
398 * @param offset offset to read from or write to
399 * @param count number of bytes to read/write
401 * Write the BufferRAM area
403 static int onenand_write_bufferram(struct mtd_info
*mtd
, int area
,
404 const unsigned char *buffer
, int offset
,
407 struct onenand_chip
*this = mtd
->priv
;
408 void __iomem
*bufferram
;
410 bufferram
= this->base
+ area
;
411 bufferram
+= onenand_bufferram_offset(mtd
, area
);
413 memcpy_16(bufferram
+ offset
, buffer
, count
);
419 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
420 * @param mtd MTD data structure
421 * @param addr address to check
422 * @return 1 if there are valid data, otherwise 0
424 * Check bufferram if there is data we required
426 static int onenand_check_bufferram(struct mtd_info
*mtd
, loff_t addr
)
428 struct onenand_chip
*this = mtd
->priv
;
432 block
= (int)(addr
>> this->erase_shift
);
433 page
= (int)(addr
>> this->page_shift
);
434 page
&= this->page_mask
;
436 i
= ONENAND_CURRENT_BUFFERRAM(this);
438 /* Is there valid data? */
439 if (this->bufferram
[i
].block
== block
&&
440 this->bufferram
[i
].page
== page
&& this->bufferram
[i
].valid
)
447 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
448 * @param mtd MTD data structure
449 * @param addr address to update
450 * @param valid valid flag
452 * Update BufferRAM information
454 static int onenand_update_bufferram(struct mtd_info
*mtd
, loff_t addr
,
457 struct onenand_chip
*this = mtd
->priv
;
461 block
= (int)(addr
>> this->erase_shift
);
462 page
= (int)(addr
>> this->page_shift
);
463 page
&= this->page_mask
;
465 /* Invalidate BufferRAM */
466 for (i
= 0; i
< MAX_BUFFERRAM
; i
++) {
467 if (this->bufferram
[i
].block
== block
&&
468 this->bufferram
[i
].page
== page
)
469 this->bufferram
[i
].valid
= 0;
472 /* Update BufferRAM */
473 i
= ONENAND_CURRENT_BUFFERRAM(this);
474 this->bufferram
[i
].block
= block
;
475 this->bufferram
[i
].page
= page
;
476 this->bufferram
[i
].valid
= valid
;
482 * onenand_get_device - [GENERIC] Get chip for selected access
483 * @param mtd MTD device structure
484 * @param new_state the state which is requested
486 * Get the device and lock it for exclusive access
488 static void onenand_get_device(struct mtd_info
*mtd
, int new_state
)
494 * onenand_release_device - [GENERIC] release chip
495 * @param mtd MTD device structure
497 * Deselect, release chip lock and wake up anyone waiting on the device
499 static void onenand_release_device(struct mtd_info
*mtd
)
505 * onenand_read_ecc - [MTD Interface] Read data with ECC
506 * @param mtd MTD device structure
507 * @param from offset to read from
508 * @param len number of bytes to read
509 * @param retlen pointer to variable to store the number of read bytes
510 * @param buf the databuffer to put data
511 * @param oob_buf filesystem supplied oob data buffer
512 * @param oobsel oob selection structure
514 * OneNAND read with ECC
516 static int onenand_read_ecc(struct mtd_info
*mtd
, loff_t from
, size_t len
,
517 size_t * retlen
, u_char
* buf
,
518 u_char
* oob_buf
, struct nand_oobinfo
*oobsel
)
520 struct onenand_chip
*this = mtd
->priv
;
521 int read
= 0, column
;
525 MTDDEBUG (MTD_DEBUG_LEVEL3
, "onenand_read_ecc: "
526 "from = 0x%08x, len = %i\n",
527 (unsigned int)from
, (int)len
);
529 /* Do not allow reads past end of device */
530 if ((from
+ len
) > mtd
->size
) {
531 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_read_ecc: "
532 "Attempt read beyond end of device\n");
537 /* Grab the lock and see if the device is available */
538 onenand_get_device(mtd
, FL_READING
);
541 thislen
= min_t(int, mtd
->oobblock
, len
- read
);
543 column
= from
& (mtd
->oobblock
- 1);
544 if (column
+ thislen
> mtd
->oobblock
)
545 thislen
= mtd
->oobblock
- column
;
547 if (!onenand_check_bufferram(mtd
, from
)) {
548 this->command(mtd
, ONENAND_CMD_READ
, from
,
550 ret
= this->wait(mtd
, FL_READING
);
551 /* First copy data and check return value for ECC handling */
552 onenand_update_bufferram(mtd
, from
, 1);
555 this->read_bufferram(mtd
, ONENAND_DATARAM
, buf
, column
,
563 MTDDEBUG (MTD_DEBUG_LEVEL0
,
564 "onenand_read_ecc: read failed = %d\n", ret
);
572 /* Deselect and wake up anyone waiting on the device */
573 onenand_release_device(mtd
);
576 * Return success, if no ECC failures, else -EBADMSG
577 * fs driver will take care of that, because
578 * retlen == desired len and result == -EBADMSG
585 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
586 * @param mtd MTD device structure
587 * @param from offset to read from
588 * @param len number of bytes to read
589 * @param retlen pointer to variable to store the number of read bytes
590 * @param buf the databuffer to put data
592 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
594 int onenand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
595 size_t * retlen
, u_char
* buf
)
597 return onenand_read_ecc(mtd
, from
, len
, retlen
, buf
, NULL
, NULL
);
601 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
602 * @param mtd MTD device structure
603 * @param from offset to read from
604 * @param len number of bytes to read
605 * @param retlen pointer to variable to store the number of read bytes
606 * @param buf the databuffer to put data
608 * OneNAND read out-of-band data from the spare area
610 int onenand_read_oob(struct mtd_info
*mtd
, loff_t from
, size_t len
,
611 size_t * retlen
, u_char
* buf
)
613 struct onenand_chip
*this = mtd
->priv
;
614 int read
= 0, thislen
, column
;
617 MTDDEBUG (MTD_DEBUG_LEVEL3
, "onenand_read_oob: "
618 "from = 0x%08x, len = %i\n",
619 (unsigned int)from
, (int)len
);
621 /* Initialize return length value */
624 /* Do not allow reads past end of device */
625 if (unlikely((from
+ len
) > mtd
->size
)) {
626 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_read_oob: "
627 "Attempt read beyond end of device\n");
631 /* Grab the lock and see if the device is available */
632 onenand_get_device(mtd
, FL_READING
);
634 column
= from
& (mtd
->oobsize
- 1);
637 thislen
= mtd
->oobsize
- column
;
638 thislen
= min_t(int, thislen
, len
);
640 this->command(mtd
, ONENAND_CMD_READOOB
, from
, mtd
->oobsize
);
642 onenand_update_bufferram(mtd
, from
, 0);
644 ret
= this->wait(mtd
, FL_READING
);
645 /* First copy data and check return value for ECC handling */
647 this->read_bufferram(mtd
, ONENAND_SPARERAM
, buf
, column
,
655 MTDDEBUG (MTD_DEBUG_LEVEL0
,
656 "onenand_read_oob: read failed = %d\n", ret
);
664 from
+= mtd
->oobblock
;
669 /* Deselect and wake up anyone waiting on the device */
670 onenand_release_device(mtd
);
676 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
678 * onenand_verify_page - [GENERIC] verify the chip contents after a write
679 * @param mtd MTD device structure
680 * @param buf the databuffer to verify
682 * Check DataRAM area directly
684 static int onenand_verify_page(struct mtd_info
*mtd
, u_char
* buf
,
687 struct onenand_chip
*this = mtd
->priv
;
688 void __iomem
*dataram0
, *dataram1
;
691 this->command(mtd
, ONENAND_CMD_READ
, addr
, mtd
->oobblock
);
693 ret
= this->wait(mtd
, FL_READING
);
697 onenand_update_bufferram(mtd
, addr
, 1);
699 /* Check, if the two dataram areas are same */
700 dataram0
= this->base
+ ONENAND_DATARAM
;
701 dataram1
= dataram0
+ mtd
->oobblock
;
703 if (memcmp(dataram0
, dataram1
, mtd
->oobblock
))
709 #define onenand_verify_page(...) (0)
712 #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
715 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
716 * @param mtd MTD device structure
717 * @param to offset to write to
718 * @param len number of bytes to write
719 * @param retlen pointer to variable to store the number of written bytes
720 * @param buf the data to write
721 * @param eccbuf filesystem supplied oob data buffer
722 * @param oobsel oob selection structure
724 * OneNAND write with ECC
726 static int onenand_write_ecc(struct mtd_info
*mtd
, loff_t to
, size_t len
,
727 size_t * retlen
, const u_char
* buf
,
728 u_char
* eccbuf
, struct nand_oobinfo
*oobsel
)
730 struct onenand_chip
*this = mtd
->priv
;
734 MTDDEBUG (MTD_DEBUG_LEVEL3
, "onenand_write_ecc: "
735 "to = 0x%08x, len = %i\n",
736 (unsigned int)to
, (int)len
);
738 /* Initialize retlen, in case of early exit */
741 /* Do not allow writes past end of device */
742 if (unlikely((to
+ len
) > mtd
->size
)) {
743 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_write_ecc: "
744 "Attempt write to past end of device\n");
748 /* Reject writes, which are not page aligned */
749 if (unlikely(NOTALIGNED(to
)) || unlikely(NOTALIGNED(len
))) {
750 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_write_ecc: "
751 "Attempt to write not page aligned data\n");
755 /* Grab the lock and see if the device is available */
756 onenand_get_device(mtd
, FL_WRITING
);
758 /* Loop until all data write */
759 while (written
< len
) {
760 int thislen
= min_t(int, mtd
->oobblock
, len
- written
);
762 this->command(mtd
, ONENAND_CMD_BUFFERRAM
, to
, mtd
->oobblock
);
764 this->write_bufferram(mtd
, ONENAND_DATARAM
, buf
, 0, thislen
);
765 this->write_bufferram(mtd
, ONENAND_SPARERAM
, ffchars
, 0,
768 this->command(mtd
, ONENAND_CMD_PROG
, to
, mtd
->oobblock
);
770 onenand_update_bufferram(mtd
, to
, 1);
772 ret
= this->wait(mtd
, FL_WRITING
);
774 MTDDEBUG (MTD_DEBUG_LEVEL0
,
775 "onenand_write_ecc: write filaed %d\n", ret
);
781 /* Only check verify write turn on */
782 ret
= onenand_verify_page(mtd
, (u_char
*) buf
, to
);
784 MTDDEBUG (MTD_DEBUG_LEVEL0
,
785 "onenand_write_ecc: verify failed %d\n", ret
);
796 /* Deselect and wake up anyone waiting on the device */
797 onenand_release_device(mtd
);
805 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
806 * @param mtd MTD device structure
807 * @param to offset to write to
808 * @param len number of bytes to write
809 * @param retlen pointer to variable to store the number of written bytes
810 * @param buf the data to write
812 * This function simply calls onenand_write_ecc
813 * with oob buffer and oobsel = NULL
815 int onenand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
816 size_t * retlen
, const u_char
* buf
)
818 return onenand_write_ecc(mtd
, to
, len
, retlen
, buf
, NULL
, NULL
);
822 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
823 * @param mtd MTD device structure
824 * @param to offset to write to
825 * @param len number of bytes to write
826 * @param retlen pointer to variable to store the number of written bytes
827 * @param buf the data to write
829 * OneNAND write out-of-band
831 int onenand_write_oob(struct mtd_info
*mtd
, loff_t to
, size_t len
,
832 size_t * retlen
, const u_char
* buf
)
834 struct onenand_chip
*this = mtd
->priv
;
838 MTDDEBUG (MTD_DEBUG_LEVEL3
, "onenand_write_oob: "
839 "to = 0x%08x, len = %i\n",
840 (unsigned int)to
, (int)len
);
842 /* Initialize retlen, in case of early exit */
845 /* Do not allow writes past end of device */
846 if (unlikely((to
+ len
) > mtd
->size
)) {
847 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_write_oob: "
848 "Attempt write to past end of device\n");
852 /* Grab the lock and see if the device is available */
853 onenand_get_device(mtd
, FL_WRITING
);
855 /* Loop until all data write */
856 while (written
< len
) {
857 int thislen
= min_t(int, mtd
->oobsize
, len
- written
);
859 column
= to
& (mtd
->oobsize
- 1);
861 this->command(mtd
, ONENAND_CMD_BUFFERRAM
, to
, mtd
->oobsize
);
863 this->write_bufferram(mtd
, ONENAND_SPARERAM
, ffchars
, 0,
865 this->write_bufferram(mtd
, ONENAND_SPARERAM
, buf
, column
,
868 this->command(mtd
, ONENAND_CMD_PROGOOB
, to
, mtd
->oobsize
);
870 onenand_update_bufferram(mtd
, to
, 0);
872 status
= this->wait(mtd
, FL_WRITING
);
884 /* Deselect and wake up anyone waiting on the device */
885 onenand_release_device(mtd
);
893 * onenand_erase - [MTD Interface] erase block(s)
894 * @param mtd MTD device structure
895 * @param instr erase instruction
897 * Erase one ore more blocks
899 int onenand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
901 struct onenand_chip
*this = mtd
->priv
;
902 unsigned int block_size
;
907 MTDDEBUG (MTD_DEBUG_LEVEL3
, "onenand_erase: start = 0x%08x, len = %i\n",
908 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
910 block_size
= (1 << this->erase_shift
);
912 /* Start address must align on block boundary */
913 if (unlikely(instr
->addr
& (block_size
- 1))) {
914 MTDDEBUG (MTD_DEBUG_LEVEL0
,
915 "onenand_erase: Unaligned address\n");
919 /* Length must align on block boundary */
920 if (unlikely(instr
->len
& (block_size
- 1))) {
921 MTDDEBUG (MTD_DEBUG_LEVEL0
,
922 "onenand_erase: Length not block aligned\n");
926 /* Do not allow erase past end of device */
927 if (unlikely((instr
->len
+ instr
->addr
) > mtd
->size
)) {
928 MTDDEBUG (MTD_DEBUG_LEVEL0
,
929 "onenand_erase: Erase past end of device\n");
933 instr
->fail_addr
= 0xffffffff;
935 /* Grab the lock and see if the device is available */
936 onenand_get_device(mtd
, FL_ERASING
);
938 /* Loop throught the pages */
942 instr
->state
= MTD_ERASING
;
946 /* TODO Check badblock */
948 this->command(mtd
, ONENAND_CMD_ERASE
, addr
, block_size
);
950 ret
= this->wait(mtd
, FL_ERASING
);
951 /* Check, if it is write protected */
954 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_erase: "
955 "Device is write protected!!!\n");
957 MTDDEBUG (MTD_DEBUG_LEVEL0
, "onenand_erase: "
958 "Failed erase, block %d\n",
959 (unsigned)(addr
>> this->erase_shift
));
960 instr
->state
= MTD_ERASE_FAILED
;
961 instr
->fail_addr
= addr
;
969 instr
->state
= MTD_ERASE_DONE
;
973 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
974 /* Do call back function */
976 mtd_erase_callback(instr
);
978 /* Deselect and wake up anyone waiting on the device */
979 onenand_release_device(mtd
);
985 * onenand_sync - [MTD Interface] sync
986 * @param mtd MTD device structure
988 * Sync is actually a wait for chip ready function
990 void onenand_sync(struct mtd_info
*mtd
)
992 MTDDEBUG (MTD_DEBUG_LEVEL3
, "onenand_sync: called\n");
994 /* Grab the lock and see if the device is available */
995 onenand_get_device(mtd
, FL_SYNCING
);
997 /* Release it and go back */
998 onenand_release_device(mtd
);
1002 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1003 * @param mtd MTD device structure
1004 * @param ofs offset relative to mtd start
1006 int onenand_block_isbad(struct mtd_info
*mtd
, loff_t ofs
)
1010 * 1. Bad block table (BBT)
1011 * -> using NAND BBT to support JFFS2
1012 * 2. Bad block management (BBM)
1013 * -> bad block replace scheme
1015 * Currently we do nothing
1021 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1022 * @param mtd MTD device structure
1023 * @param ofs offset relative to mtd start
1025 int onenand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
1032 * onenand_unlock - [MTD Interface] Unlock block(s)
1033 * @param mtd MTD device structure
1034 * @param ofs offset relative to mtd start
1035 * @param len number of bytes to unlock
1037 * Unlock one or more blocks
1039 int onenand_unlock(struct mtd_info
*mtd
, loff_t ofs
, size_t len
)
1041 struct onenand_chip
*this = mtd
->priv
;
1042 int start
, end
, block
, value
, status
;
1044 start
= ofs
>> this->erase_shift
;
1045 end
= len
>> this->erase_shift
;
1047 /* Continuous lock scheme */
1048 if (this->options
& ONENAND_CONT_LOCK
) {
1049 /* Set start block address */
1050 this->write_word(start
,
1051 this->base
+ ONENAND_REG_START_BLOCK_ADDRESS
);
1052 /* Set end block address */
1053 this->write_word(end
- 1,
1054 this->base
+ ONENAND_REG_END_BLOCK_ADDRESS
);
1055 /* Write unlock command */
1056 this->command(mtd
, ONENAND_CMD_UNLOCK
, 0, 0);
1058 /* There's no return value */
1059 this->wait(mtd
, FL_UNLOCKING
);
1062 while (this->read_word(this->base
+ ONENAND_REG_CTRL_STATUS
)
1063 & ONENAND_CTRL_ONGO
)
1066 /* Check lock status */
1067 status
= this->read_word(this->base
+ ONENAND_REG_WP_STATUS
);
1068 if (!(status
& ONENAND_WP_US
))
1069 printk(KERN_ERR
"wp status = 0x%x\n", status
);
1074 /* Block lock scheme */
1075 for (block
= start
; block
< end
; block
++) {
1076 /* Set start block address */
1077 this->write_word(block
,
1078 this->base
+ ONENAND_REG_START_BLOCK_ADDRESS
);
1079 /* Write unlock command */
1080 this->command(mtd
, ONENAND_CMD_UNLOCK
, 0, 0);
1082 /* There's no return value */
1083 this->wait(mtd
, FL_UNLOCKING
);
1086 while (this->read_word(this->base
+ ONENAND_REG_CTRL_STATUS
)
1087 & ONENAND_CTRL_ONGO
)
1090 /* Set block address for read block status */
1091 value
= onenand_block_address(this->device_id
, block
);
1092 this->write_word(value
,
1093 this->base
+ ONENAND_REG_START_ADDRESS1
);
1095 /* Check lock status */
1096 status
= this->read_word(this->base
+ ONENAND_REG_WP_STATUS
);
1097 if (!(status
& ONENAND_WP_US
))
1098 printk(KERN_ERR
"block = %d, wp status = 0x%x\n",
1106 * onenand_print_device_info - Print device ID
1107 * @param device device ID
1111 char * onenand_print_device_info(int device
)
1113 int vcc
, demuxed
, ddp
, density
;
1114 char *dev_info
= malloc(80);
1116 vcc
= device
& ONENAND_DEVICE_VCC_MASK
;
1117 demuxed
= device
& ONENAND_DEVICE_IS_DEMUX
;
1118 ddp
= device
& ONENAND_DEVICE_IS_DDP
;
1119 density
= device
>> ONENAND_DEVICE_DENSITY_SHIFT
;
1120 sprintf(dev_info
, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1121 demuxed
? "" : "Muxed ",
1123 (16 << density
), vcc
? "2.65/3.3" : "1.8", device
);
1128 static const struct onenand_manufacturers onenand_manuf_ids
[] = {
1129 {ONENAND_MFR_SAMSUNG
, "Samsung"},
1130 {ONENAND_MFR_UNKNOWN
, "Unknown"}
1134 * onenand_check_maf - Check manufacturer ID
1135 * @param manuf manufacturer ID
1137 * Check manufacturer ID
1139 static int onenand_check_maf(int manuf
)
1143 for (i
= 0; onenand_manuf_ids
[i
].id
; i
++) {
1144 if (manuf
== onenand_manuf_ids
[i
].id
)
1148 #ifdef ONENAND_DEBUG
1149 printk(KERN_DEBUG
"OneNAND Manufacturer: %s (0x%0x)\n",
1150 onenand_manuf_ids
[i
].name
, manuf
);
1153 return (i
!= ONENAND_MFR_UNKNOWN
);
1157 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1158 * @param mtd MTD device structure
1160 * OneNAND detection method:
1161 * Compare the the values from command with ones from register
1163 static int onenand_probe(struct mtd_info
*mtd
)
1165 struct onenand_chip
*this = mtd
->priv
;
1166 int bram_maf_id
, bram_dev_id
, maf_id
, dev_id
;
1170 /* Send the command for reading device ID from BootRAM */
1171 this->write_word(ONENAND_CMD_READID
, this->base
+ ONENAND_BOOTRAM
);
1173 /* Read manufacturer and device IDs from BootRAM */
1174 bram_maf_id
= this->read_word(this->base
+ ONENAND_BOOTRAM
+ 0x0);
1175 bram_dev_id
= this->read_word(this->base
+ ONENAND_BOOTRAM
+ 0x2);
1177 /* Check manufacturer ID */
1178 if (onenand_check_maf(bram_maf_id
))
1181 /* Reset OneNAND to read default register values */
1182 this->write_word(ONENAND_CMD_RESET
, this->base
+ ONENAND_BOOTRAM
);
1186 for (i
= 0; i
< 10000; i
++) ;
1189 /* Read manufacturer and device IDs from Register */
1190 maf_id
= this->read_word(this->base
+ ONENAND_REG_MANUFACTURER_ID
);
1191 dev_id
= this->read_word(this->base
+ ONENAND_REG_DEVICE_ID
);
1193 /* Check OneNAND device */
1194 if (maf_id
!= bram_maf_id
|| dev_id
!= bram_dev_id
)
1197 /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1198 if (dev_id
& (1 << 9)) {
1199 printk("Not yet support Flex-OneNAND\n");
1203 /* Flash device information */
1204 mtd
->name
= onenand_print_device_info(dev_id
);
1205 this->device_id
= dev_id
;
1207 density
= dev_id
>> ONENAND_DEVICE_DENSITY_SHIFT
;
1208 this->chipsize
= (16 << density
) << 20;
1210 /* OneNAND page size & block size */
1211 /* The data buffer size is equal to page size */
1213 this->read_word(this->base
+ ONENAND_REG_DATA_BUFFER_SIZE
);
1214 mtd
->oobsize
= mtd
->oobblock
>> 5;
1215 /* Pagers per block is always 64 in OneNAND */
1216 mtd
->erasesize
= mtd
->oobblock
<< 6;
1218 this->erase_shift
= ffs(mtd
->erasesize
) - 1;
1219 this->page_shift
= ffs(mtd
->oobblock
) - 1;
1220 this->ppb_shift
= (this->erase_shift
- this->page_shift
);
1221 this->page_mask
= (mtd
->erasesize
/ mtd
->oobblock
) - 1;
1223 /* REVIST: Multichip handling */
1225 mtd
->size
= this->chipsize
;
1228 version_id
= this->read_word(this->base
+ ONENAND_REG_VERSION_ID
);
1229 #ifdef ONENAND_DEBUG
1230 printk(KERN_DEBUG
"OneNAND version = 0x%04x\n", version_id
);
1234 if (density
<= ONENAND_DEVICE_DENSITY_512Mb
&&
1235 !(version_id
>> ONENAND_VERSION_PROCESS_SHIFT
)) {
1236 printk(KERN_INFO
"Lock scheme is Continues Lock\n");
1237 this->options
|= ONENAND_CONT_LOCK
;
1240 mtd
->erase
= onenand_erase
;
1241 mtd
->read
= onenand_read
;
1242 mtd
->write
= onenand_write
;
1243 mtd
->read_ecc
= onenand_read_ecc
;
1244 mtd
->write_ecc
= onenand_write_ecc
;
1245 mtd
->read_oob
= onenand_read_oob
;
1246 mtd
->write_oob
= onenand_write_oob
;
1247 mtd
->sync
= onenand_sync
;
1248 mtd
->block_isbad
= onenand_block_isbad
;
1249 mtd
->block_markbad
= onenand_block_markbad
;
1255 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1256 * @param mtd MTD device structure
1257 * @param maxchips Number of chips to scan for
1259 * This fills out all the not initialized function pointers
1260 * with the defaults.
1261 * The flash ID is read and the mtd/chip structures are
1262 * filled with the appropriate values.
1264 int onenand_scan(struct mtd_info
*mtd
, int maxchips
)
1266 struct onenand_chip
*this = mtd
->priv
;
1268 if (!this->read_word
)
1269 this->read_word
= onenand_readw
;
1270 if (!this->write_word
)
1271 this->write_word
= onenand_writew
;
1274 this->command
= onenand_command
;
1276 this->wait
= onenand_wait
;
1278 if (!this->read_bufferram
)
1279 this->read_bufferram
= onenand_read_bufferram
;
1280 if (!this->write_bufferram
)
1281 this->write_bufferram
= onenand_write_bufferram
;
1283 if (onenand_probe(mtd
))
1286 /* Set Sync. Burst Read after probing */
1287 if (this->mmcontrol
) {
1288 printk(KERN_INFO
"OneNAND Sync. Burst Read support\n");
1289 this->read_bufferram
= onenand_sync_read_bufferram
;
1292 onenand_unlock(mtd
, 0, mtd
->size
);
1294 return onenand_default_bbt(mtd
);
1298 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1299 * @param mtd MTD device structure
1301 void onenand_release(struct mtd_info
*mtd
)