]> git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/mtd/spi/spi_flash_ids.c
sf: Rename sf_params.c to spi_flash_ids.c
[people/ms/u-boot.git] / drivers / mtd / spi / spi_flash_ids.c
1 /*
2 * SPI Flash ID's.
3 *
4 * Copyright (C) 2016 Jagan Teki <jagan@openedev.com>
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #include <common.h>
11 #include <spi.h>
12 #include <spi_flash.h>
13
14 #include "sf_internal.h"
15
16 /* Used when the "_ext_id" is two bytes at most */
17 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
18 .id = { \
19 ((_jedec_id) >> 16) & 0xff, \
20 ((_jedec_id) >> 8) & 0xff, \
21 (_jedec_id) & 0xff, \
22 ((_ext_id) >> 8) & 0xff, \
23 (_ext_id) & 0xff, \
24 }, \
25 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
26 .sector_size = (_sector_size), \
27 .n_sectors = (_n_sectors), \
28 .page_size = 256, \
29 .flags = (_flags),
30
31 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
32 .id = { \
33 ((_jedec_id) >> 16) & 0xff, \
34 ((_jedec_id) >> 8) & 0xff, \
35 (_jedec_id) & 0xff, \
36 ((_ext_id) >> 16) & 0xff, \
37 ((_ext_id) >> 8) & 0xff, \
38 (_ext_id) & 0xff, \
39 }, \
40 .id_len = 6, \
41 .sector_size = (_sector_size), \
42 .n_sectors = (_n_sectors), \
43 .page_size = 256, \
44 .flags = (_flags),
45
46 const struct spi_flash_info spi_flash_ids[] = {
47 #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
48 {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
49 {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
50 {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
51 {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
52 {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
53 {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
54 {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
55 {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
56 {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
57 {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
58 #endif
59 #ifdef CONFIG_SPI_FLASH_EON /* EON */
60 {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
61 {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
62 {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
63 {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
64 #endif
65 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
66 {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
67 {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
68 #endif
69 #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
70 {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
71 {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
72 {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
73 #endif
74 #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
75 {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
76 {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
77 {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
78 {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
79 {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
80 {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
81 {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
82 {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
83 {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
84 {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
85 #endif
86 #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
87 {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
88 {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
89 {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
90 {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
91 {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
92 {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
93 {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) },
94 {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) },
95 {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) },
96 {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) },
97 {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) },
98 {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
99 {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
100 {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
101 {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
102 {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
103 {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
104 {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
105 {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
106 #endif
107 #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
108 {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
109 {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
110 {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
111 {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
112 {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
113 {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
114 {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
115 {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
116 {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
117 {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
118 {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
119 {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
120 {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
121 {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
122 {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
123 {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
124 {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
125 {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
126 {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
127 {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
128 {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
129 {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
130 {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
131 {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
132 #endif
133 #ifdef CONFIG_SPI_FLASH_SST /* SST */
134 {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
135 {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
136 {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) },
137 {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) },
138 {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
139 {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) },
140 {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) },
141 {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) },
142 {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
143 {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
144 {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
145 #endif
146 #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
147 {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
148 {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
149 {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
150 {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
151 {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
152 {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
153 {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
154 {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
155 {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
156 {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
157 {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
158 {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
159 {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
160 {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
161 {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
162 {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
163 {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
164 {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
165 #endif
166 {}, /* Empty entry to terminate the list */
167 /*
168 * Note:
169 * Below paired flash devices has similar spi_flash params.
170 * (S25FL129P_64K, S25FL128S_64K)
171 * (W25Q80BL, W25Q80BV)
172 * (W25Q16CL, W25Q16DV)
173 * (W25Q32BV, W25Q32FV_SPI)
174 * (W25Q64CV, W25Q64FV_SPI)
175 * (W25Q128BV, W25Q128FV_SPI)
176 * (W25Q32DW, W25Q32FV_QPI)
177 * (W25Q64DW, W25Q64FV_QPI)
178 * (W25Q128FW, W25Q128FV_QPI)
179 */
180 };