2 * Copyright (C) 2009 BuS Elektronik GmbH & Co. KG
3 * Jens Scharsig (esw@bus-elektronik.de)
6 * Author : Hamid Ikdoumi (Atmel)
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/at91_emac.h>
15 #include <asm/arch/clk.h>
16 #include <asm/arch/at91_pio.h>
21 #include <linux/mii.h>
26 #if (CONFIG_SYS_RX_ETH_BUFFER > 1024)
27 #error AT91 EMAC supports max 1024 RX buffers. \
28 Please decrease the CONFIG_SYS_RX_ETH_BUFFER value
31 #ifndef CONFIG_DRIVER_AT91EMAC_PHYADDR
32 #define CONFIG_DRIVER_AT91EMAC_PHYADDR 0
35 /* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
36 #if (AT91C_MASTER_CLOCK > 80000000)
37 #define HCLK_DIV AT91_EMAC_CFG_MCLK_64
38 #elif (AT91C_MASTER_CLOCK > 40000000)
39 #define HCLK_DIV AT91_EMAC_CFG_MCLK_32
40 #elif (AT91C_MASTER_CLOCK > 20000000)
41 #define HCLK_DIV AT91_EMAC_CFG_MCLK_16
43 #define HCLK_DIV AT91_EMAC_CFG_MCLK_8
47 #define DEBUG_AT91EMAC 1
49 #define DEBUG_AT91EMAC 0
53 #define DEBUG_AT91PHY 1
55 #define DEBUG_AT91PHY 0
58 #ifndef CONFIG_DRIVER_AT91EMAC_QUIET
64 #define RBF_ADDR 0xfffffffc
65 #define RBF_OWNER (1<<0)
66 #define RBF_WRAP (1<<1)
67 #define RBF_BROADCAST (1<<31)
68 #define RBF_MULTICAST (1<<30)
69 #define RBF_UNICAST (1<<29)
70 #define RBF_EXTERNAL (1<<28)
71 #define RBF_UNKNOWN (1<<27)
72 #define RBF_SIZE 0x07ff
73 #define RBF_LOCAL4 (1<<26)
74 #define RBF_LOCAL3 (1<<25)
75 #define RBF_LOCAL2 (1<<24)
76 #define RBF_LOCAL1 (1<<23)
78 #define RBF_FRAMEMAX CONFIG_SYS_RX_ETH_BUFFER
79 #define RBF_FRAMELEN 0x600
82 unsigned long addr
, size
;
86 rbf_t rbfdt
[RBF_FRAMEMAX
];
87 unsigned long rbindex
;
90 void at91emac_EnableMDIO(at91_emac_t
*at91mac
)
92 /* Mac CTRL reg set for MDIO enable */
93 writel(readl(&at91mac
->ctl
) | AT91_EMAC_CTL_MPE
, &at91mac
->ctl
);
96 void at91emac_DisableMDIO(at91_emac_t
*at91mac
)
98 /* Mac CTRL reg set for MDIO disable */
99 writel(readl(&at91mac
->ctl
) & ~AT91_EMAC_CTL_MPE
, &at91mac
->ctl
);
102 int at91emac_read(at91_emac_t
*at91mac
, unsigned char addr
,
103 unsigned char reg
, unsigned short *value
)
105 unsigned long netstat
;
106 at91emac_EnableMDIO(at91mac
);
108 writel(AT91_EMAC_MAN_HIGH
| AT91_EMAC_MAN_RW_R
|
109 AT91_EMAC_MAN_REGA(reg
) | AT91_EMAC_MAN_CODE_802_3
|
110 AT91_EMAC_MAN_PHYA(addr
),
114 netstat
= readl(&at91mac
->sr
);
115 debug_cond(DEBUG_AT91PHY
, "poll SR %08lx\n", netstat
);
116 } while (!(netstat
& AT91_EMAC_SR_IDLE
));
118 *value
= readl(&at91mac
->man
) & AT91_EMAC_MAN_DATA_MASK
;
120 at91emac_DisableMDIO(at91mac
);
122 debug_cond(DEBUG_AT91PHY
,
123 "AT91PHY read %p REG(%d)=%x\n", at91mac
, reg
, *value
);
128 int at91emac_write(at91_emac_t
*at91mac
, unsigned char addr
,
129 unsigned char reg
, unsigned short value
)
131 unsigned long netstat
;
132 debug_cond(DEBUG_AT91PHY
,
133 "AT91PHY write %p REG(%d)=%p\n", at91mac
, reg
, &value
);
135 at91emac_EnableMDIO(at91mac
);
137 writel(AT91_EMAC_MAN_HIGH
| AT91_EMAC_MAN_RW_W
|
138 AT91_EMAC_MAN_REGA(reg
) | AT91_EMAC_MAN_CODE_802_3
|
139 AT91_EMAC_MAN_PHYA(addr
) | (value
& AT91_EMAC_MAN_DATA_MASK
),
143 netstat
= readl(&at91mac
->sr
);
144 debug_cond(DEBUG_AT91PHY
, "poll SR %08lx\n", netstat
);
145 } while (!(netstat
& AT91_EMAC_SR_IDLE
));
147 at91emac_DisableMDIO(at91mac
);
152 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
154 at91_emac_t
*get_emacbase_by_name(const char *devname
)
156 struct eth_device
*netdev
;
158 netdev
= eth_get_dev_by_name(devname
);
159 return (at91_emac_t
*) netdev
->iobase
;
162 int at91emac_mii_read(struct mii_dev
*bus
, int addr
, int devad
, int reg
)
164 unsigned short value
= 0;
167 emac
= get_emacbase_by_name(bus
->name
);
168 at91emac_read(emac
, addr
, reg
, &value
);
173 int at91emac_mii_write(struct mii_dev
*bus
, int addr
, int devad
, int reg
,
178 emac
= get_emacbase_by_name(bus
->name
);
179 at91emac_write(emac
, addr
, reg
, value
);
185 static int at91emac_phy_reset(struct eth_device
*netdev
)
191 emac
= (at91_emac_t
*) netdev
->iobase
;
193 adv
= ADVERTISE_CSMA
| ADVERTISE_ALL
;
194 at91emac_write(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
196 debug_cond(VERBOSEP
, "%s: Starting autonegotiation...\n", netdev
->name
);
197 at91emac_write(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
, MII_BMCR
,
198 (BMCR_ANENABLE
| BMCR_ANRESTART
));
200 for (i
= 0; i
< 30000; i
++) {
201 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
203 if (status
& BMSR_ANEGCOMPLETE
)
208 if (status
& BMSR_ANEGCOMPLETE
) {
210 "%s: Autonegotiation complete\n", netdev
->name
);
212 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
213 netdev
->name
, status
);
219 static int at91emac_phy_init(struct eth_device
*netdev
)
221 u16 phy_id
, status
, adv
, lpa
;
222 int media
, speed
, duplex
;
226 emac
= (at91_emac_t
*) netdev
->iobase
;
228 /* Check if the PHY is up to snuff... */
229 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
230 MII_PHYSID1
, &phy_id
);
231 if (phy_id
== 0xffff) {
232 printf("%s: No PHY present\n", netdev
->name
);
236 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
239 if (!(status
& BMSR_LSTATUS
)) {
240 /* Try to re-negotiate if we don't have link already. */
241 if (at91emac_phy_reset(netdev
))
244 for (i
= 0; i
< 100000 / 100; i
++) {
245 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
247 if (status
& BMSR_LSTATUS
)
252 if (!(status
& BMSR_LSTATUS
)) {
253 debug_cond(VERBOSEP
, "%s: link down\n", netdev
->name
);
256 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
257 MII_ADVERTISE
, &adv
);
258 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
,
260 media
= mii_nway_result(lpa
& adv
);
261 speed
= (media
& (ADVERTISE_100FULL
| ADVERTISE_100HALF
)
263 duplex
= (media
& ADVERTISE_FULL
) ? 1 : 0;
264 debug_cond(VERBOSEP
, "%s: link up, %sMbps %s-duplex\n",
266 speed
? "100" : "10",
267 duplex
? "full" : "half");
272 int at91emac_UpdateLinkSpeed(at91_emac_t
*emac
)
274 unsigned short stat1
;
276 at91emac_read(emac
, CONFIG_DRIVER_AT91EMAC_PHYADDR
, MII_BMSR
, &stat1
);
278 if (!(stat1
& BMSR_LSTATUS
)) /* link status up? */
281 if (stat1
& BMSR_100FULL
) {
282 /*set Emac for 100BaseTX and Full Duplex */
283 writel(readl(&emac
->cfg
) |
284 AT91_EMAC_CFG_SPD
| AT91_EMAC_CFG_FD
,
289 if (stat1
& BMSR_10FULL
) {
290 /*set MII for 10BaseT and Full Duplex */
291 writel((readl(&emac
->cfg
) &
292 ~(AT91_EMAC_CFG_SPD
| AT91_EMAC_CFG_FD
)
293 ) | AT91_EMAC_CFG_FD
,
298 if (stat1
& BMSR_100HALF
) {
299 /*set MII for 100BaseTX and Half Duplex */
300 writel((readl(&emac
->cfg
) &
301 ~(AT91_EMAC_CFG_SPD
| AT91_EMAC_CFG_FD
)
302 ) | AT91_EMAC_CFG_SPD
,
307 if (stat1
& BMSR_10HALF
) {
308 /*set MII for 10BaseT and Half Duplex */
309 writel((readl(&emac
->cfg
) &
310 ~(AT91_EMAC_CFG_SPD
| AT91_EMAC_CFG_FD
)),
317 static int at91emac_init(struct eth_device
*netdev
, bd_t
*bd
)
323 at91_pio_t
*pio
= (at91_pio_t
*) ATMEL_BASE_PIO
;
325 emac
= (at91_emac_t
*) netdev
->iobase
;
326 dev
= (emac_device
*) netdev
->priv
;
328 /* PIO Disable Register */
329 value
= ATMEL_PMX_AA_EMDIO
| ATMEL_PMX_AA_EMDC
|
330 ATMEL_PMX_AA_ERXER
| ATMEL_PMX_AA_ERX1
|
331 ATMEL_PMX_AA_ERX0
| ATMEL_PMX_AA_ECRS
|
332 ATMEL_PMX_AA_ETX1
| ATMEL_PMX_AA_ETX0
|
333 ATMEL_PMX_AA_ETXEN
| ATMEL_PMX_AA_EREFCK
;
335 writel(value
, &pio
->pioa
.pdr
);
336 writel(value
, &pio
->pioa
.mux
.pio2
.asr
);
339 value
= ATMEL_PMX_BA_ERXCK
;
341 value
= ATMEL_PMX_BA_ERXCK
| ATMEL_PMX_BA_ECOL
|
342 ATMEL_PMX_BA_ERXDV
| ATMEL_PMX_BA_ERX3
|
343 ATMEL_PMX_BA_ERX2
| ATMEL_PMX_BA_ETXER
|
344 ATMEL_PMX_BA_ETX3
| ATMEL_PMX_BA_ETX2
;
346 writel(value
, &pio
->piob
.pdr
);
347 writel(value
, &pio
->piob
.mux
.pio2
.bsr
);
349 at91_periph_clk_enable(ATMEL_ID_EMAC
);
351 writel(readl(&emac
->ctl
) | AT91_EMAC_CTL_CSR
, &emac
->ctl
);
353 /* Init Ethernet buffers */
354 for (i
= 0; i
< RBF_FRAMEMAX
; i
++) {
355 dev
->rbfdt
[i
].addr
= (unsigned long) net_rx_packets
[i
];
356 dev
->rbfdt
[i
].size
= 0;
358 dev
->rbfdt
[RBF_FRAMEMAX
- 1].addr
|= RBF_WRAP
;
360 writel((u32
) &(dev
->rbfdt
[0]), &emac
->rbqp
);
362 writel(readl(&emac
->rsr
) &
363 ~(AT91_EMAC_RSR_OVR
| AT91_EMAC_RSR_REC
| AT91_EMAC_RSR_BNA
),
366 value
= AT91_EMAC_CFG_CAF
| AT91_EMAC_CFG_NBC
|
369 value
|= AT91_EMAC_CFG_RMII
;
371 writel(value
, &emac
->cfg
);
373 writel(readl(&emac
->ctl
) | AT91_EMAC_CTL_TE
| AT91_EMAC_CTL_RE
,
376 if (!at91emac_phy_init(netdev
)) {
377 at91emac_UpdateLinkSpeed(emac
);
383 static void at91emac_halt(struct eth_device
*netdev
)
387 emac
= (at91_emac_t
*) netdev
->iobase
;
388 writel(readl(&emac
->ctl
) & ~(AT91_EMAC_CTL_TE
| AT91_EMAC_CTL_RE
),
390 debug_cond(DEBUG_AT91EMAC
, "halt MAC\n");
393 static int at91emac_send(struct eth_device
*netdev
, void *packet
, int length
)
397 emac
= (at91_emac_t
*) netdev
->iobase
;
399 while (!(readl(&emac
->tsr
) & AT91_EMAC_TSR_BNQ
))
401 writel((u32
) packet
, &emac
->tar
);
402 writel(AT91_EMAC_TCR_LEN(length
), &emac
->tcr
);
403 while (AT91_EMAC_TCR_LEN(readl(&emac
->tcr
)))
405 debug_cond(DEBUG_AT91EMAC
, "Send %d\n", length
);
406 writel(readl(&emac
->tsr
) | AT91_EMAC_TSR_COMP
, &emac
->tsr
);
410 static int at91emac_recv(struct eth_device
*netdev
)
417 emac
= (at91_emac_t
*) netdev
->iobase
;
418 dev
= (emac_device
*) netdev
->priv
;
420 rbfp
= &dev
->rbfdt
[dev
->rbindex
];
421 while (rbfp
->addr
& RBF_OWNER
) {
422 size
= rbfp
->size
& RBF_SIZE
;
423 net_process_received_packet(net_rx_packets
[dev
->rbindex
], size
);
425 debug_cond(DEBUG_AT91EMAC
, "Recv[%ld]: %d bytes @ %lx\n",
426 dev
->rbindex
, size
, rbfp
->addr
);
428 rbfp
->addr
&= ~RBF_OWNER
;
430 if (dev
->rbindex
< (RBF_FRAMEMAX
-1))
435 rbfp
= &(dev
->rbfdt
[dev
->rbindex
]);
436 if (!(rbfp
->addr
& RBF_OWNER
))
437 writel(readl(&emac
->rsr
) | AT91_EMAC_RSR_REC
,
441 if (readl(&emac
->isr
) & AT91_EMAC_IxR_RBNA
) {
442 /* EMAC silicon bug 41.3.1 workaround 1 */
443 writel(readl(&emac
->ctl
) & ~AT91_EMAC_CTL_RE
, &emac
->ctl
);
444 writel(readl(&emac
->ctl
) | AT91_EMAC_CTL_RE
, &emac
->ctl
);
446 printf("%s: reset receiver (EMAC dead lock bug)\n",
452 static int at91emac_write_hwaddr(struct eth_device
*netdev
)
455 emac
= (at91_emac_t
*) netdev
->iobase
;
457 at91_periph_clk_enable(ATMEL_ID_EMAC
);
459 debug_cond(DEBUG_AT91EMAC
,
460 "init MAC-ADDR %02x:%02x:%02x:%02x:%02x:%02x\n",
461 netdev
->enetaddr
[5], netdev
->enetaddr
[4], netdev
->enetaddr
[3],
462 netdev
->enetaddr
[2], netdev
->enetaddr
[1], netdev
->enetaddr
[0]);
463 writel( (netdev
->enetaddr
[0] | netdev
->enetaddr
[1] << 8 |
464 netdev
->enetaddr
[2] << 16 | netdev
->enetaddr
[3] << 24),
466 writel((netdev
->enetaddr
[4] | netdev
->enetaddr
[5] << 8), &emac
->sa2h
);
467 debug_cond(DEBUG_AT91EMAC
, "init MAC-ADDR %x%x\n",
468 readl(&emac
->sa2h
), readl(&emac
->sa2l
));
472 int at91emac_register(bd_t
*bis
, unsigned long iobase
)
475 emac_device
*emacfix
;
476 struct eth_device
*dev
;
479 iobase
= ATMEL_BASE_EMAC
;
480 emac
= malloc(sizeof(*emac
)+512);
483 dev
= malloc(sizeof(*dev
));
488 /* alignment as per Errata (64 bytes) is insufficient! */
489 emacfix
= (emac_device
*) (((unsigned long) emac
+ 0x1ff) & 0xFFFFFE00);
490 memset(emacfix
, 0, sizeof(emac_device
));
492 memset(dev
, 0, sizeof(*dev
));
493 strcpy(dev
->name
, "emac");
494 dev
->iobase
= iobase
;
496 dev
->init
= at91emac_init
;
497 dev
->halt
= at91emac_halt
;
498 dev
->send
= at91emac_send
;
499 dev
->recv
= at91emac_recv
;
500 dev
->write_hwaddr
= at91emac_write_hwaddr
;
504 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
506 struct mii_dev
*mdiodev
= mdio_alloc();
509 strncpy(mdiodev
->name
, dev
->name
, MDIO_NAME_LEN
);
510 mdiodev
->read
= at91emac_mii_read
;
511 mdiodev
->write
= at91emac_mii_write
;
513 retval
= mdio_register(mdiodev
);