]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/net/ax88180.c
2 * ax88180: ASIX AX88180 Non-PCI Gigabit Ethernet u-boot driver
4 * This program is free software; you can distribute it and/or modify
5 * it under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 * This program is distributed in the hope it will be useful, but
8 * WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
10 * See the GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307,
18 * ========================================================================
19 * ASIX AX88180 Non-PCI 16/32-bit Gigabit Ethernet Linux Driver
21 * The AX88180 Ethernet controller is a high performance and highly
22 * integrated local CPU bus Ethernet controller with embedded 40K bytes
23 * SRAM and supports both 16-bit and 32-bit SRAM-Like interfaces for any
25 * The AX88180 is a single chip 10/100/1000Mbps Gigabit Ethernet
26 * controller that supports both MII and RGMII interfaces and is
27 * compliant to IEEE 802.3, IEEE 802.3u and IEEE 802.3z standards.
29 * Please visit ASIX's web site (http://www.asix.com.tw) for more
32 * Module Name : ax88180.c
35 * 09/06/2006 : New release for AX88180 US2 chip.
36 * 07/07/2008 : Fix up the coding style and using inline functions
38 * ========================================================================
44 #include <linux/mii.h>
48 * ===========================================================================
49 * Local SubProgram Declaration
50 * ===========================================================================
52 static void ax88180_rx_handler (struct eth_device
*dev
);
53 static int ax88180_phy_initial (struct eth_device
*dev
);
54 static void ax88180_media_config (struct eth_device
*dev
);
55 static unsigned long get_CicadaPHY_media_mode (struct eth_device
*dev
);
56 static unsigned long get_MarvellPHY_media_mode (struct eth_device
*dev
);
57 static unsigned short ax88180_mdio_read (struct eth_device
*dev
,
58 unsigned long regaddr
);
59 static void ax88180_mdio_write (struct eth_device
*dev
,
60 unsigned long regaddr
, unsigned short regdata
);
63 * ===========================================================================
64 * Local SubProgram Bodies
65 * ===========================================================================
67 static int ax88180_mdio_check_complete (struct eth_device
*dev
)
70 unsigned short tmpval
;
72 /* MDIO read/write should not take more than 10 ms */
74 tmpval
= INW (dev
, MDIOCTRL
);
75 if (((tmpval
& READ_PHY
) == 0) && ((tmpval
& WRITE_PHY
) == 0))
83 ax88180_mdio_read (struct eth_device
*dev
, unsigned long regaddr
)
85 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
86 unsigned long tmpval
= 0;
88 OUTW (dev
, (READ_PHY
| (regaddr
<< 8) | priv
->PhyAddr
), MDIOCTRL
);
90 if (ax88180_mdio_check_complete (dev
))
91 tmpval
= INW (dev
, MDIODP
);
93 printf ("Failed to read PHY register!\n");
95 return (unsigned short)(tmpval
& 0xFFFF);
99 ax88180_mdio_write (struct eth_device
*dev
, unsigned long regaddr
,
100 unsigned short regdata
)
102 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
104 OUTW (dev
, regdata
, MDIODP
);
106 OUTW (dev
, (WRITE_PHY
| (regaddr
<< 8) | priv
->PhyAddr
), MDIOCTRL
);
108 if (!ax88180_mdio_check_complete (dev
))
109 printf ("Failed to write PHY register!\n");
112 static int ax88180_phy_reset (struct eth_device
*dev
)
114 unsigned short delay_cnt
= 500;
116 ax88180_mdio_write (dev
, MII_BMCR
, (BMCR_RESET
| BMCR_ANENABLE
));
118 /* Wait for the reset to complete, or time out (500 ms) */
119 while (ax88180_mdio_read (dev
, MII_BMCR
) & BMCR_RESET
) {
121 if (--delay_cnt
== 0) {
122 printf ("Failed to reset PHY!\n");
130 static void ax88180_mac_reset (struct eth_device
*dev
)
132 unsigned long tmpval
;
136 unsigned short offset
, value
;
139 MISC
, MISC_NORMAL
}, {
140 RXINDICATOR
, DEFAULT_RXINDICATOR
}, {
141 TXCMD
, DEFAULT_TXCMD
}, {
142 TXBS
, DEFAULT_TXBS
}, {
143 TXDES0
, DEFAULT_TXDES0
}, {
144 TXDES1
, DEFAULT_TXDES1
}, {
145 TXDES2
, DEFAULT_TXDES2
}, {
146 TXDES3
, DEFAULT_TXDES3
}, {
147 TXCFG
, DEFAULT_TXCFG
}, {
148 MACCFG2
, DEFAULT_MACCFG2
}, {
149 MACCFG3
, DEFAULT_MACCFG3
}, {
150 TXLEN
, DEFAULT_TXLEN
}, {
151 RXBTHD0
, DEFAULT_RXBTHD0
}, {
152 RXBTHD1
, DEFAULT_RXBTHD1
}, {
153 RXFULTHD
, DEFAULT_RXFULTHD
}, {
154 DOGTHD0
, DEFAULT_DOGTHD0
}, {
155 DOGTHD1
, DEFAULT_DOGTHD1
},};
157 OUTW (dev
, MISC_RESET_MAC
, MISC
);
158 tmpval
= INW (dev
, MISC
);
160 for (i
= 0; i
< ARRAY_SIZE(program_seq
); i
++)
161 OUTW (dev
, program_seq
[i
].value
, program_seq
[i
].offset
);
164 static int ax88180_poll_tx_complete (struct eth_device
*dev
)
166 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
167 unsigned long tmpval
, txbs_txdp
;
168 int TimeOutCnt
= 10000;
170 txbs_txdp
= 1 << priv
->NextTxDesc
;
172 while (TimeOutCnt
--) {
174 tmpval
= INW (dev
, TXBS
);
176 if ((tmpval
& txbs_txdp
) == 0)
188 static void ax88180_rx_handler (struct eth_device
*dev
)
190 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
191 unsigned long data_size
;
192 unsigned short rxcurt_ptr
, rxbound_ptr
, next_ptr
;
194 #if defined (CONFIG_DRIVER_AX88180_16BIT)
195 unsigned short *rxdata
= (unsigned short *)net_rx_packets
[0];
197 unsigned long *rxdata
= (unsigned long *)net_rx_packets
[0];
199 unsigned short count
;
201 rxcurt_ptr
= INW (dev
, RXCURT
);
202 rxbound_ptr
= INW (dev
, RXBOUND
);
203 next_ptr
= (rxbound_ptr
+ 1) & RX_PAGE_NUM_MASK
;
205 debug ("ax88180: RX original RXBOUND=0x%04x,"
206 " RXCURT=0x%04x\n", rxbound_ptr
, rxcurt_ptr
);
208 while (next_ptr
!= rxcurt_ptr
) {
210 OUTW (dev
, RX_START_READ
, RXINDICATOR
);
212 data_size
= READ_RXBUF (dev
) & 0xFFFF;
214 if ((data_size
== 0) || (data_size
> MAX_RX_SIZE
)) {
216 OUTW (dev
, RX_STOP_READ
, RXINDICATOR
);
218 ax88180_mac_reset (dev
);
219 printf ("ax88180: Invalid Rx packet length!"
220 " (len=0x%04lx)\n", data_size
);
222 debug ("ax88180: RX RXBOUND=0x%04x,"
223 "RXCURT=0x%04x\n", rxbound_ptr
, rxcurt_ptr
);
227 rxbound_ptr
+= (((data_size
+ 0xF) & 0xFFF0) >> 4) + 1;
228 rxbound_ptr
&= RX_PAGE_NUM_MASK
;
230 /* Comput access times */
231 count
= (data_size
+ priv
->PadSize
) >> priv
->BusWidth
;
233 for (i
= 0; i
< count
; i
++) {
234 *(rxdata
+ i
) = READ_RXBUF (dev
);
237 OUTW (dev
, RX_STOP_READ
, RXINDICATOR
);
239 /* Pass the packet up to the protocol layers. */
240 net_process_received_packet(net_rx_packets
[0], data_size
);
242 OUTW (dev
, rxbound_ptr
, RXBOUND
);
244 rxcurt_ptr
= INW (dev
, RXCURT
);
245 rxbound_ptr
= INW (dev
, RXBOUND
);
246 next_ptr
= (rxbound_ptr
+ 1) & RX_PAGE_NUM_MASK
;
248 debug ("ax88180: RX updated RXBOUND=0x%04x,"
249 "RXCURT=0x%04x\n", rxbound_ptr
, rxcurt_ptr
);
255 static int ax88180_phy_initial (struct eth_device
*dev
)
257 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
258 unsigned long tmp_regval
;
259 unsigned short phyaddr
;
261 /* Search for first avaliable PHY chipset */
262 #ifdef CONFIG_PHY_ADDR
263 phyaddr
= CONFIG_PHY_ADDR
;
265 for (phyaddr
= 0; phyaddr
< 32; ++phyaddr
)
268 priv
->PhyAddr
= phyaddr
;
269 priv
->PhyID0
= ax88180_mdio_read(dev
, MII_PHYSID1
);
270 priv
->PhyID1
= ax88180_mdio_read(dev
, MII_PHYSID2
);
272 switch (priv
->PhyID0
) {
273 case MARVELL_ALASKA_PHYSID0
:
274 debug("ax88180: Found Marvell Alaska PHY family."
275 " (PHY Addr=0x%x)\n", priv
->PhyAddr
);
277 switch (priv
->PhyID1
) {
278 case MARVELL_88E1118_PHYSID1
:
279 ax88180_mdio_write(dev
, M88E1118_PAGE_SEL
, 2);
280 ax88180_mdio_write(dev
, M88E1118_CR
,
281 M88E1118_CR_DEFAULT
);
282 ax88180_mdio_write(dev
, M88E1118_PAGE_SEL
, 3);
283 ax88180_mdio_write(dev
, M88E1118_LEDCTL
,
284 M88E1118_LEDCTL_DEFAULT
);
285 ax88180_mdio_write(dev
, M88E1118_LEDMIX
,
286 M88E1118_LEDMIX_LED050
| M88E1118_LEDMIX_LED150
| 0x15);
287 ax88180_mdio_write(dev
, M88E1118_PAGE_SEL
, 0);
288 default: /* Default to 88E1111 Phy */
289 tmp_regval
= ax88180_mdio_read(dev
, M88E1111_EXT_SSR
);
290 if ((tmp_regval
& HWCFG_MODE_MASK
) != RGMII_COPPER_MODE
)
291 ax88180_mdio_write(dev
, M88E1111_EXT_SCR
,
295 if (ax88180_phy_reset(dev
) < 0)
297 ax88180_mdio_write(dev
, M88_IER
, LINK_CHANGE_INT
);
301 case CICADA_CIS8201_PHYSID0
:
302 debug("ax88180: Found CICADA CIS8201 PHY"
303 " chipset. (PHY Addr=0x%x)\n", priv
->PhyAddr
);
305 ax88180_mdio_write(dev
, CIS_IMR
,
306 (CIS_INT_ENABLE
| LINK_CHANGE_INT
));
308 /* Set CIS_SMI_PRIORITY bit before force the media mode */
309 tmp_regval
= ax88180_mdio_read(dev
, CIS_AUX_CTRL_STATUS
);
310 tmp_regval
&= ~CIS_SMI_PRIORITY
;
311 ax88180_mdio_write(dev
, CIS_AUX_CTRL_STATUS
, tmp_regval
);
316 /* No PHY at this addr */
320 printf("ax88180: Unknown PHY chipset %#x at addr %#x\n",
321 priv
->PhyID0
, priv
->PhyAddr
);
326 printf("ax88180: Unknown PHY chipset!!\n");
330 static void ax88180_media_config (struct eth_device
*dev
)
332 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
333 unsigned long bmcr_val
, bmsr_val
;
334 unsigned long rxcfg_val
, maccfg0_val
, maccfg1_val
;
335 unsigned long RealMediaMode
;
338 /* Waiting 2 seconds for PHY link stable */
339 for (i
= 0; i
< 20000; i
++) {
340 bmsr_val
= ax88180_mdio_read (dev
, MII_BMSR
);
341 if (bmsr_val
& BMSR_LSTATUS
) {
347 bmsr_val
= ax88180_mdio_read (dev
, MII_BMSR
);
348 debug ("ax88180: BMSR=0x%04x\n", (unsigned int)bmsr_val
);
350 if (bmsr_val
& BMSR_LSTATUS
) {
351 bmcr_val
= ax88180_mdio_read (dev
, MII_BMCR
);
353 if (bmcr_val
& BMCR_ANENABLE
) {
356 * Waiting for Auto-negotiation completion, this may
357 * take up to 5 seconds.
359 debug ("ax88180: Auto-negotiation is "
360 "enabled. Waiting for NWay completion..\n");
361 for (i
= 0; i
< 50000; i
++) {
362 bmsr_val
= ax88180_mdio_read (dev
, MII_BMSR
);
363 if (bmsr_val
& BMSR_ANEGCOMPLETE
) {
369 debug ("ax88180: Auto-negotiation is disabled.\n");
371 debug ("ax88180: BMCR=0x%04x, BMSR=0x%04x\n",
372 (unsigned int)bmcr_val
, (unsigned int)bmsr_val
);
374 /* Get real media mode here */
375 switch (priv
->PhyID0
) {
376 case MARVELL_ALASKA_PHYSID0
:
377 RealMediaMode
= get_MarvellPHY_media_mode(dev
);
379 case CICADA_CIS8201_PHYSID0
:
380 RealMediaMode
= get_CicadaPHY_media_mode(dev
);
383 RealMediaMode
= MEDIA_1000FULL
;
387 priv
->LinkState
= INS_LINK_UP
;
389 switch (RealMediaMode
) {
391 debug ("ax88180: 1000Mbps Full-duplex mode.\n");
392 rxcfg_val
= RXFLOW_ENABLE
| DEFAULT_RXCFG
;
393 maccfg0_val
= TXFLOW_ENABLE
| DEFAULT_MACCFG0
;
394 maccfg1_val
= GIGA_MODE_EN
| RXFLOW_EN
|
395 FULLDUPLEX
| DEFAULT_MACCFG1
;
399 debug ("ax88180: 1000Mbps Half-duplex mode.\n");
400 rxcfg_val
= DEFAULT_RXCFG
;
401 maccfg0_val
= DEFAULT_MACCFG0
;
402 maccfg1_val
= GIGA_MODE_EN
| DEFAULT_MACCFG1
;
406 debug ("ax88180: 100Mbps Full-duplex mode.\n");
407 rxcfg_val
= RXFLOW_ENABLE
| DEFAULT_RXCFG
;
408 maccfg0_val
= SPEED100
| TXFLOW_ENABLE
410 maccfg1_val
= RXFLOW_EN
| FULLDUPLEX
| DEFAULT_MACCFG1
;
414 debug ("ax88180: 100Mbps Half-duplex mode.\n");
415 rxcfg_val
= DEFAULT_RXCFG
;
416 maccfg0_val
= SPEED100
| DEFAULT_MACCFG0
;
417 maccfg1_val
= DEFAULT_MACCFG1
;
421 debug ("ax88180: 10Mbps Full-duplex mode.\n");
422 rxcfg_val
= RXFLOW_ENABLE
| DEFAULT_RXCFG
;
423 maccfg0_val
= TXFLOW_ENABLE
| DEFAULT_MACCFG0
;
424 maccfg1_val
= RXFLOW_EN
| FULLDUPLEX
| DEFAULT_MACCFG1
;
428 debug ("ax88180: 10Mbps Half-duplex mode.\n");
429 rxcfg_val
= DEFAULT_RXCFG
;
430 maccfg0_val
= DEFAULT_MACCFG0
;
431 maccfg1_val
= DEFAULT_MACCFG1
;
434 debug ("ax88180: Unknow media mode.\n");
435 rxcfg_val
= DEFAULT_RXCFG
;
436 maccfg0_val
= DEFAULT_MACCFG0
;
437 maccfg1_val
= DEFAULT_MACCFG1
;
439 priv
->LinkState
= INS_LINK_DOWN
;
444 rxcfg_val
= DEFAULT_RXCFG
;
445 maccfg0_val
= DEFAULT_MACCFG0
;
446 maccfg1_val
= DEFAULT_MACCFG1
;
448 priv
->LinkState
= INS_LINK_DOWN
;
451 OUTW (dev
, rxcfg_val
, RXCFG
);
452 OUTW (dev
, maccfg0_val
, MACCFG0
);
453 OUTW (dev
, maccfg1_val
, MACCFG1
);
458 static unsigned long get_MarvellPHY_media_mode (struct eth_device
*dev
)
460 unsigned long m88_ssr
;
461 unsigned long MediaMode
;
463 m88_ssr
= ax88180_mdio_read (dev
, M88_SSR
);
464 switch (m88_ssr
& SSR_MEDIA_MASK
) {
466 MediaMode
= MEDIA_1000FULL
;
469 MediaMode
= MEDIA_1000HALF
;
472 MediaMode
= MEDIA_100FULL
;
475 MediaMode
= MEDIA_100HALF
;
478 MediaMode
= MEDIA_10FULL
;
481 MediaMode
= MEDIA_10HALF
;
484 MediaMode
= MEDIA_UNKNOWN
;
491 static unsigned long get_CicadaPHY_media_mode (struct eth_device
*dev
)
493 unsigned long tmp_regval
;
494 unsigned long MediaMode
;
496 tmp_regval
= ax88180_mdio_read (dev
, CIS_AUX_CTRL_STATUS
);
497 switch (tmp_regval
& CIS_MEDIA_MASK
) {
499 MediaMode
= MEDIA_1000FULL
;
502 MediaMode
= MEDIA_1000HALF
;
505 MediaMode
= MEDIA_100FULL
;
508 MediaMode
= MEDIA_100HALF
;
511 MediaMode
= MEDIA_10FULL
;
514 MediaMode
= MEDIA_10HALF
;
517 MediaMode
= MEDIA_UNKNOWN
;
524 static void ax88180_halt (struct eth_device
*dev
)
526 /* Disable AX88180 TX/RX functions */
527 OUTW (dev
, WAKEMOD
, CMD
);
530 static int ax88180_init (struct eth_device
*dev
, bd_t
* bd
)
532 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
533 unsigned short tmp_regval
;
535 ax88180_mac_reset (dev
);
537 /* Disable interrupt */
538 OUTW (dev
, CLEAR_IMR
, IMR
);
540 /* Disable AX88180 TX/RX functions */
541 OUTW (dev
, WAKEMOD
, CMD
);
543 /* Fill the MAC address */
545 dev
->enetaddr
[0] | (((unsigned short)dev
->enetaddr
[1]) << 8);
546 OUTW (dev
, tmp_regval
, MACID0
);
549 dev
->enetaddr
[2] | (((unsigned short)dev
->enetaddr
[3]) << 8);
550 OUTW (dev
, tmp_regval
, MACID1
);
553 dev
->enetaddr
[4] | (((unsigned short)dev
->enetaddr
[5]) << 8);
554 OUTW (dev
, tmp_regval
, MACID2
);
556 ax88180_media_config (dev
);
558 OUTW (dev
, DEFAULT_RXFILTER
, RXFILTER
);
560 /* Initial variables here */
561 priv
->FirstTxDesc
= TXDP0
;
562 priv
->NextTxDesc
= TXDP0
;
564 /* Check if there is any invalid interrupt status and clear it. */
565 OUTW (dev
, INW (dev
, ISR
), ISR
);
567 /* Start AX88180 TX/RX functions */
568 OUTW (dev
, (RXEN
| TXEN
| WAKEMOD
), CMD
);
573 /* Get a data block via Ethernet */
574 static int ax88180_recv (struct eth_device
*dev
)
576 unsigned short ISR_Status
;
577 unsigned short tmp_regval
;
579 /* Read and check interrupt status here. */
580 ISR_Status
= INW (dev
, ISR
);
583 /* Clear the interrupt status */
584 OUTW (dev
, ISR_Status
, ISR
);
586 debug ("\nax88180: The interrupt status = 0x%04x\n",
589 if (ISR_Status
& ISR_PHY
) {
590 /* Read ISR register once to clear PHY interrupt bit */
591 tmp_regval
= ax88180_mdio_read (dev
, M88_ISR
);
592 ax88180_media_config (dev
);
595 if ((ISR_Status
& ISR_RX
) || (ISR_Status
& ISR_RXBUFFOVR
)) {
596 ax88180_rx_handler (dev
);
599 /* Read and check interrupt status again */
600 ISR_Status
= INW (dev
, ISR
);
606 /* Send a data block via Ethernet. */
607 static int ax88180_send(struct eth_device
*dev
, void *packet
, int length
)
609 struct ax88180_private
*priv
= (struct ax88180_private
*)dev
->priv
;
610 unsigned short TXDES_addr
;
611 unsigned short txcmd_txdp
, txbs_txdp
;
612 unsigned short tmp_data
;
614 #if defined (CONFIG_DRIVER_AX88180_16BIT)
615 volatile unsigned short *txdata
= (volatile unsigned short *)packet
;
617 volatile unsigned long *txdata
= (volatile unsigned long *)packet
;
619 unsigned short count
;
621 if (priv
->LinkState
!= INS_LINK_UP
) {
625 priv
->FirstTxDesc
= priv
->NextTxDesc
;
626 txbs_txdp
= 1 << priv
->FirstTxDesc
;
628 debug ("ax88180: TXDP%d is available\n", priv
->FirstTxDesc
);
630 txcmd_txdp
= priv
->FirstTxDesc
<< 13;
631 TXDES_addr
= TXDES0
+ (priv
->FirstTxDesc
<< 2);
633 OUTW (dev
, (txcmd_txdp
| length
| TX_START_WRITE
), TXCMD
);
635 /* Comput access times */
636 count
= (length
+ priv
->PadSize
) >> priv
->BusWidth
;
638 for (i
= 0; i
< count
; i
++) {
639 WRITE_TXBUF (dev
, *(txdata
+ i
));
642 OUTW (dev
, txcmd_txdp
| length
, TXCMD
);
643 OUTW (dev
, txbs_txdp
, TXBS
);
644 OUTW (dev
, (TXDPx_ENABLE
| length
), TXDES_addr
);
646 priv
->NextTxDesc
= (priv
->NextTxDesc
+ 1) & TXDP_MASK
;
649 * Check the available transmit descriptor, if we had exhausted all
650 * transmit descriptor ,then we have to wait for at least one free
653 txbs_txdp
= 1 << priv
->NextTxDesc
;
654 tmp_data
= INW (dev
, TXBS
);
656 if (tmp_data
& txbs_txdp
) {
657 if (ax88180_poll_tx_complete (dev
) < 0) {
658 ax88180_mac_reset (dev
);
659 priv
->FirstTxDesc
= TXDP0
;
660 priv
->NextTxDesc
= TXDP0
;
661 printf ("ax88180: Transmit time out occurred!\n");
668 static void ax88180_read_mac_addr (struct eth_device
*dev
)
670 unsigned short macid0_val
, macid1_val
, macid2_val
;
671 unsigned short tmp_regval
;
674 /* Reload MAC address from EEPROM */
675 OUTW (dev
, RELOAD_EEPROM
, PROMCTRL
);
677 /* Waiting for reload eeprom completion */
678 for (i
= 0; i
< 500; i
++) {
679 tmp_regval
= INW (dev
, PROMCTRL
);
680 if ((tmp_regval
& RELOAD_EEPROM
) == 0)
685 /* Get MAC addresses */
686 macid0_val
= INW (dev
, MACID0
);
687 macid1_val
= INW (dev
, MACID1
);
688 macid2_val
= INW (dev
, MACID2
);
690 if (((macid0_val
| macid1_val
| macid2_val
) != 0) &&
691 ((macid0_val
& 0x01) == 0)) {
692 dev
->enetaddr
[0] = (unsigned char)macid0_val
;
693 dev
->enetaddr
[1] = (unsigned char)(macid0_val
>> 8);
694 dev
->enetaddr
[2] = (unsigned char)macid1_val
;
695 dev
->enetaddr
[3] = (unsigned char)(macid1_val
>> 8);
696 dev
->enetaddr
[4] = (unsigned char)macid2_val
;
697 dev
->enetaddr
[5] = (unsigned char)(macid2_val
>> 8);
701 /* Exported SubProgram Bodies */
702 int ax88180_initialize (bd_t
* bis
)
704 struct eth_device
*dev
;
705 struct ax88180_private
*priv
;
707 dev
= (struct eth_device
*)malloc (sizeof *dev
);
712 memset (dev
, 0, sizeof *dev
);
714 priv
= (struct ax88180_private
*)malloc (sizeof (*priv
));
719 memset (priv
, 0, sizeof *priv
);
721 strcpy(dev
->name
, "ax88180");
722 dev
->iobase
= AX88180_BASE
;
724 dev
->init
= ax88180_init
;
725 dev
->halt
= ax88180_halt
;
726 dev
->send
= ax88180_send
;
727 dev
->recv
= ax88180_recv
;
729 priv
->BusWidth
= BUS_WIDTH_32
;
731 #if defined (CONFIG_DRIVER_AX88180_16BIT)
732 OUTW (dev
, (START_BASE
>> 8), BASE
);
733 OUTW (dev
, DECODE_EN
, DECODE
);
735 priv
->BusWidth
= BUS_WIDTH_16
;
739 ax88180_mac_reset (dev
);
741 /* Disable interrupt */
742 OUTW (dev
, CLEAR_IMR
, IMR
);
744 /* Disable AX88180 TX/RX functions */
745 OUTW (dev
, WAKEMOD
, CMD
);
747 ax88180_read_mac_addr (dev
);
751 return ax88180_phy_initial (dev
);