drivers/net/ax88796.h

   1 /*
   2  * AX88796L(NE2000) support
   3  *
   4  * (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  *
  21  */
  22
  23 #ifndef __DRIVERS_AX88796L_H__
  24 #define __DRIVERS_AX88796L_H__
  25
  26 #define DP_DATA         (0x10 << 1)
  27 #define START_PG        0x40    /* First page of TX buffer */
  28 #define START_PG2       0x48
  29 #define STOP_PG         0x80    /* Last page +1 of RX ring */
  30 #define TX_PAGES        12
  31 #define RX_START        (START_PG+TX_PAGES)
  32 #define RX_END          STOP_PG
  33
  34 #define AX88796L_BASE_ADDRESS   CONFIG_DRIVER_NE2000_BASE
  35 #define AX88796L_BYTE_ACCESS    0x00001000
  36 #define AX88796L_OFFSET         0x00000400
  37 #define AX88796L_ADDRESS_BYTE   AX88796L_BASE_ADDRESS + \
  38                 AX88796L_BYTE_ACCESS + AX88796L_OFFSET
  39 #define AX88796L_REG_MEMR       AX88796L_ADDRESS_BYTE + (0x14<<1)
  40 #define AX88796L_REG_CR         AX88796L_ADDRESS_BYTE + (0x00<<1)
  41
  42 #define AX88796L_CR             (*(vu_short *)(AX88796L_REG_CR))
  43 #define AX88796L_MEMR           (*(vu_short *)(AX88796L_REG_MEMR))
  44
  45 #define EECS_HIGH               (AX88796L_MEMR |= 0x10)
  46 #define EECS_LOW                (AX88796L_MEMR &= 0xef)
  47 #define EECLK_HIGH              (AX88796L_MEMR |= 0x80)
  48 #define EECLK_LOW               (AX88796L_MEMR &= 0x7f)
  49 #define EEDI_HIGH               (AX88796L_MEMR |= 0x20)
  50 #define EEDI_LOW                (AX88796L_MEMR &= 0xdf)
  51 #define EEDO                    ((AX88796L_MEMR & 0x40)>>6)
  52
  53 #define PAGE0_SET               (AX88796L_CR &= 0x3f)
  54 #define PAGE1_SET               (AX88796L_CR = (AX88796L_CR & 0x3f) | 0x40)
  55
  56 #define BIT_DUMMY       0
  57 #define MAC_EEP_READ    1
  58 #define MAC_EEP_WRITE   2
  59 #define MAC_EEP_ERACE   3
  60 #define MAC_EEP_EWEN    4
  61 #define MAC_EEP_EWDS    5
  62
  63 /* R7780MP Specific code */
  64 #if defined(CONFIG_R7780MP)
  65 #define ISA_OFFSET      0x1400
  66 #define DP_IN(_b_, _o_, _d_)    (_d_) = \
  67         *( (vu_short *) ((_b_) + ((_o_) * 2) + ISA_OFFSET))
  68 #define DP_OUT(_b_, _o_, _d_) \
  69         *((vu_short *)((_b_) + ((_o_) * 2) + ISA_OFFSET)) = (_d_)
  70 #define DP_IN_DATA(_b_, _d_)    (_d_) = *( (vu_short *) ((_b_) + ISA_OFFSET))
  71 #define DP_OUT_DATA(_b_, _d_)   *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
  72 #else
  73 /* Please change for your target boards */
  74 #define ISA_OFFSET      0x0000
  75 #define DP_IN(_b_, _o_, _d_)    (_d_) = *( (vu_short *)((_b_)+(_o_ )+ISA_OFFSET))
  76 #define DP_OUT(_b_, _o_, _d_)   *((vu_short *)((_b_)+(_o_)+ISA_OFFSET)) = (_d_)
  77 #define DP_IN_DATA(_b_, _d_)    (_d_) = *( (vu_short *) ((_b_)+ISA_OFFSET))
  78 #define DP_OUT_DATA(_b_, _d_)   *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
  79 #endif
  80
  81 #endif /* __DRIVERS_AX88796L_H__ */