1 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
3 Copyright (c) 2001, 2002 by D-Link Corporation
4 Written by Edward Peng.<edward_peng@dlink.com.tw>
5 Created 03-May-2001, base on Linux' sundance.c.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
13 #define DRV_NAME "DL2000/TC902x-based linux driver"
14 #define DRV_VERSION "v1.19"
15 #define DRV_RELDATE "2007/08/12"
17 #include <linux/dma-mapping.h>
19 static char version
[] __devinitdata
=
20 KERN_INFO DRV_NAME
" " DRV_VERSION
" " DRV_RELDATE
"\n";
22 static int mtu
[MAX_UNITS
];
23 static int vlan
[MAX_UNITS
];
24 static int jumbo
[MAX_UNITS
];
25 static char *media
[MAX_UNITS
];
26 static int tx_flow
=-1;
27 static int rx_flow
=-1;
28 static int copy_thresh
;
29 static int rx_coalesce
=10; /* Rx frame count each interrupt */
30 static int rx_timeout
=200; /* Rx DMA wait time in 640ns increments */
31 static int tx_coalesce
=16; /* HW xmit count each TxDMAComplete */
34 MODULE_AUTHOR ("Edward Peng");
35 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
36 MODULE_LICENSE("GPL");
37 module_param_array(mtu
, int, NULL
, 0);
38 module_param_array(media
, charp
, NULL
, 0);
39 module_param_array(vlan
, int, NULL
, 0);
40 module_param_array(jumbo
, int, NULL
, 0);
41 module_param(tx_flow
, int, 0);
42 module_param(rx_flow
, int, 0);
43 module_param(copy_thresh
, int, 0);
44 module_param(rx_coalesce
, int, 0); /* Rx frame count each interrupt */
45 module_param(rx_timeout
, int, 0); /* Rx DMA wait time in 64ns increments */
46 module_param(tx_coalesce
, int, 0); /* HW xmit count each TxDMAComplete */
49 /* Enable the default interrupts */
50 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51 UpdateStats | LinkEvent)
53 writew(DEFAULT_INTR, ioaddr + IntEnable)
55 static const int max_intrloop
= 50;
56 static const int multicast_filter_limit
= 0x40;
58 static int rio_open (struct net_device
*dev
);
59 static void rio_timer (unsigned long data
);
60 static void rio_tx_timeout (struct net_device
*dev
);
61 static void alloc_list (struct net_device
*dev
);
62 static int start_xmit (struct sk_buff
*skb
, struct net_device
*dev
);
63 static irqreturn_t
rio_interrupt (int irq
, void *dev_instance
);
64 static void rio_free_tx (struct net_device
*dev
, int irq
);
65 static void tx_error (struct net_device
*dev
, int tx_status
);
66 static int receive_packet (struct net_device
*dev
);
67 static void rio_error (struct net_device
*dev
, int int_status
);
68 static int change_mtu (struct net_device
*dev
, int new_mtu
);
69 static void set_multicast (struct net_device
*dev
);
70 static struct net_device_stats
*get_stats (struct net_device
*dev
);
71 static int clear_stats (struct net_device
*dev
);
72 static int rio_ioctl (struct net_device
*dev
, struct ifreq
*rq
, int cmd
);
73 static int rio_close (struct net_device
*dev
);
74 static int find_miiphy (struct net_device
*dev
);
75 static int parse_eeprom (struct net_device
*dev
);
76 static int read_eeprom (long ioaddr
, int eep_addr
);
77 static int mii_wait_link (struct net_device
*dev
, int wait
);
78 static int mii_set_media (struct net_device
*dev
);
79 static int mii_get_media (struct net_device
*dev
);
80 static int mii_set_media_pcs (struct net_device
*dev
);
81 static int mii_get_media_pcs (struct net_device
*dev
);
82 static int mii_read (struct net_device
*dev
, int phy_addr
, int reg_num
);
83 static int mii_write (struct net_device
*dev
, int phy_addr
, int reg_num
,
86 static const struct ethtool_ops ethtool_ops
;
89 rio_probe1 (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
91 struct net_device
*dev
;
92 struct netdev_private
*np
;
94 int chip_idx
= ent
->driver_data
;
97 static int version_printed
;
101 if (!version_printed
++)
102 printk ("%s", version
);
104 err
= pci_enable_device (pdev
);
109 err
= pci_request_regions (pdev
, "dl2k");
111 goto err_out_disable
;
113 pci_set_master (pdev
);
114 dev
= alloc_etherdev (sizeof (*np
));
119 SET_NETDEV_DEV(dev
, &pdev
->dev
);
122 ioaddr
= pci_resource_start (pdev
, 1);
123 ioaddr
= (long) ioremap (ioaddr
, RIO_IO_SIZE
);
129 ioaddr
= pci_resource_start (pdev
, 0);
131 dev
->base_addr
= ioaddr
;
133 np
= netdev_priv(dev
);
134 np
->chip_id
= chip_idx
;
136 spin_lock_init (&np
->tx_lock
);
137 spin_lock_init (&np
->rx_lock
);
139 /* Parse manual configuration */
142 if (card_idx
< MAX_UNITS
) {
143 if (media
[card_idx
] != NULL
) {
145 if (strcmp (media
[card_idx
], "auto") == 0 ||
146 strcmp (media
[card_idx
], "autosense") == 0 ||
147 strcmp (media
[card_idx
], "0") == 0 ) {
149 } else if (strcmp (media
[card_idx
], "100mbps_fd") == 0 ||
150 strcmp (media
[card_idx
], "4") == 0) {
153 } else if (strcmp (media
[card_idx
], "100mbps_hd") == 0
154 || strcmp (media
[card_idx
], "3") == 0) {
157 } else if (strcmp (media
[card_idx
], "10mbps_fd") == 0 ||
158 strcmp (media
[card_idx
], "2") == 0) {
161 } else if (strcmp (media
[card_idx
], "10mbps_hd") == 0 ||
162 strcmp (media
[card_idx
], "1") == 0) {
165 } else if (strcmp (media
[card_idx
], "1000mbps_fd") == 0 ||
166 strcmp (media
[card_idx
], "6") == 0) {
169 } else if (strcmp (media
[card_idx
], "1000mbps_hd") == 0 ||
170 strcmp (media
[card_idx
], "5") == 0) {
177 if (jumbo
[card_idx
] != 0) {
179 dev
->mtu
= MAX_JUMBO
;
182 if (mtu
[card_idx
] > 0 && mtu
[card_idx
] < PACKET_SIZE
)
183 dev
->mtu
= mtu
[card_idx
];
185 np
->vlan
= (vlan
[card_idx
] > 0 && vlan
[card_idx
] < 4096) ?
187 if (rx_coalesce
> 0 && rx_timeout
> 0) {
188 np
->rx_coalesce
= rx_coalesce
;
189 np
->rx_timeout
= rx_timeout
;
192 np
->tx_flow
= (tx_flow
== 0) ? 0 : 1;
193 np
->rx_flow
= (rx_flow
== 0) ? 0 : 1;
197 else if (tx_coalesce
> TX_RING_SIZE
-1)
198 tx_coalesce
= TX_RING_SIZE
- 1;
200 dev
->open
= &rio_open
;
201 dev
->hard_start_xmit
= &start_xmit
;
202 dev
->stop
= &rio_close
;
203 dev
->get_stats
= &get_stats
;
204 dev
->set_multicast_list
= &set_multicast
;
205 dev
->do_ioctl
= &rio_ioctl
;
206 dev
->tx_timeout
= &rio_tx_timeout
;
207 dev
->watchdog_timeo
= TX_TIMEOUT
;
208 dev
->change_mtu
= &change_mtu
;
209 SET_ETHTOOL_OPS(dev
, ðtool_ops
);
211 dev
->features
= NETIF_F_IP_CSUM
;
213 pci_set_drvdata (pdev
, dev
);
215 ring_space
= pci_alloc_consistent (pdev
, TX_TOTAL_SIZE
, &ring_dma
);
217 goto err_out_iounmap
;
218 np
->tx_ring
= (struct netdev_desc
*) ring_space
;
219 np
->tx_ring_dma
= ring_dma
;
221 ring_space
= pci_alloc_consistent (pdev
, RX_TOTAL_SIZE
, &ring_dma
);
223 goto err_out_unmap_tx
;
224 np
->rx_ring
= (struct netdev_desc
*) ring_space
;
225 np
->rx_ring_dma
= ring_dma
;
227 /* Parse eeprom data */
230 /* Find PHY address */
231 err
= find_miiphy (dev
);
233 goto err_out_unmap_rx
;
236 np
->phy_media
= (readw(ioaddr
+ ASICCtrl
) & PhyMedia
) ? 1 : 0;
238 /* Set media and reset PHY */
240 /* default Auto-Negotiation for fiber deivices */
241 if (np
->an_enable
== 2) {
244 mii_set_media_pcs (dev
);
246 /* Auto-Negotiation is mandatory for 1000BASE-T,
247 IEEE 802.3ab Annex 28D page 14 */
248 if (np
->speed
== 1000)
253 err
= register_netdev (dev
);
255 goto err_out_unmap_rx
;
259 printk (KERN_INFO
"%s: %s, %pM, IRQ %d\n",
260 dev
->name
, np
->name
, dev
->dev_addr
, irq
);
262 printk(KERN_INFO
"tx_coalesce:\t%d packets\n",
265 printk(KERN_INFO
"rx_coalesce:\t%d packets\n"
266 KERN_INFO
"rx_timeout: \t%d ns\n",
267 np
->rx_coalesce
, np
->rx_timeout
*640);
269 printk(KERN_INFO
"vlan(id):\t%d\n", np
->vlan
);
273 pci_free_consistent (pdev
, RX_TOTAL_SIZE
, np
->rx_ring
, np
->rx_ring_dma
);
275 pci_free_consistent (pdev
, TX_TOTAL_SIZE
, np
->tx_ring
, np
->tx_ring_dma
);
278 iounmap ((void *) ioaddr
);
285 pci_release_regions (pdev
);
288 pci_disable_device (pdev
);
293 find_miiphy (struct net_device
*dev
)
295 int i
, phy_found
= 0;
296 struct netdev_private
*np
;
298 np
= netdev_priv(dev
);
299 ioaddr
= dev
->base_addr
;
302 for (i
= 31; i
>= 0; i
--) {
303 int mii_status
= mii_read (dev
, i
, 1);
304 if (mii_status
!= 0xffff && mii_status
!= 0x0000) {
310 printk (KERN_ERR
"%s: No MII PHY found!\n", dev
->name
);
317 parse_eeprom (struct net_device
*dev
)
320 long ioaddr
= dev
->base_addr
;
324 PSROM_t psrom
= (PSROM_t
) sromdata
;
325 struct netdev_private
*np
= netdev_priv(dev
);
330 ioaddr
= pci_resource_start (np
->pdev
, 0);
333 for (i
= 0; i
< 128; i
++) {
334 ((__le16
*) sromdata
)[i
] = cpu_to_le16(read_eeprom (ioaddr
, i
));
337 ioaddr
= dev
->base_addr
;
339 if (np
->pdev
->vendor
== PCI_VENDOR_ID_DLINK
) { /* D-Link Only */
341 crc
= ~ether_crc_le (256 - 4, sromdata
);
342 if (psrom
->crc
!= crc
) {
343 printk (KERN_ERR
"%s: EEPROM data CRC error.\n",
349 /* Set MAC address */
350 for (i
= 0; i
< 6; i
++)
351 dev
->dev_addr
[i
] = psrom
->mac_addr
[i
];
353 if (np
->pdev
->vendor
!= PCI_VENDOR_ID_DLINK
) {
357 /* Parse Software Information Block */
359 psib
= (u8
*) sromdata
;
363 if ((cid
== 0 && next
== 0) || (cid
== 0xff && next
== 0xff)) {
364 printk (KERN_ERR
"Cell data error\n");
368 case 0: /* Format version */
370 case 1: /* End of cell */
372 case 2: /* Duplex Polarity */
373 np
->duplex_polarity
= psib
[i
];
374 writeb (readb (ioaddr
+ PhyCtrl
) | psib
[i
],
377 case 3: /* Wake Polarity */
378 np
->wake_polarity
= psib
[i
];
380 case 9: /* Adapter description */
381 j
= (next
- i
> 255) ? 255 : next
- i
;
382 memcpy (np
->name
, &(psib
[i
]), j
);
388 case 8: /* Reversed */
390 default: /* Unknown cell */
400 rio_open (struct net_device
*dev
)
402 struct netdev_private
*np
= netdev_priv(dev
);
403 long ioaddr
= dev
->base_addr
;
407 i
= request_irq (dev
->irq
, &rio_interrupt
, IRQF_SHARED
, dev
->name
, dev
);
411 /* Reset all logic functions */
412 writew (GlobalReset
| DMAReset
| FIFOReset
| NetworkReset
| HostReset
,
413 ioaddr
+ ASICCtrl
+ 2);
416 /* DebugCtrl bit 4, 5, 9 must set */
417 writel (readl (ioaddr
+ DebugCtrl
) | 0x0230, ioaddr
+ DebugCtrl
);
421 writew (MAX_JUMBO
+14, ioaddr
+ MaxFrameSize
);
425 /* Get station address */
426 for (i
= 0; i
< 6; i
++)
427 writeb (dev
->dev_addr
[i
], ioaddr
+ StationAddr0
+ i
);
431 writel (np
->rx_coalesce
| np
->rx_timeout
<< 16,
432 ioaddr
+ RxDMAIntCtrl
);
434 /* Set RIO to poll every N*320nsec. */
435 writeb (0x20, ioaddr
+ RxDMAPollPeriod
);
436 writeb (0xff, ioaddr
+ TxDMAPollPeriod
);
437 writeb (0x30, ioaddr
+ RxDMABurstThresh
);
438 writeb (0x30, ioaddr
+ RxDMAUrgentThresh
);
439 writel (0x0007ffff, ioaddr
+ RmonStatMask
);
440 /* clear statistics */
445 /* priority field in RxDMAIntCtrl */
446 writel (readl(ioaddr
+ RxDMAIntCtrl
) | 0x7 << 10,
447 ioaddr
+ RxDMAIntCtrl
);
449 writew (np
->vlan
, ioaddr
+ VLANId
);
450 /* Length/Type should be 0x8100 */
451 writel (0x8100 << 16 | np
->vlan
, ioaddr
+ VLANTag
);
452 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
453 VLAN information tagged by TFC' VID, CFI fields. */
454 writel (readl (ioaddr
+ MACCtrl
) | AutoVLANuntagging
,
458 init_timer (&np
->timer
);
459 np
->timer
.expires
= jiffies
+ 1*HZ
;
460 np
->timer
.data
= (unsigned long) dev
;
461 np
->timer
.function
= &rio_timer
;
462 add_timer (&np
->timer
);
465 writel (readl (ioaddr
+ MACCtrl
) | StatsEnable
| RxEnable
| TxEnable
,
469 macctrl
|= (np
->vlan
) ? AutoVLANuntagging
: 0;
470 macctrl
|= (np
->full_duplex
) ? DuplexSelect
: 0;
471 macctrl
|= (np
->tx_flow
) ? TxFlowControlEnable
: 0;
472 macctrl
|= (np
->rx_flow
) ? RxFlowControlEnable
: 0;
473 writew(macctrl
, ioaddr
+ MACCtrl
);
475 netif_start_queue (dev
);
477 /* Enable default interrupts */
483 rio_timer (unsigned long data
)
485 struct net_device
*dev
= (struct net_device
*)data
;
486 struct netdev_private
*np
= netdev_priv(dev
);
488 int next_tick
= 1*HZ
;
491 spin_lock_irqsave(&np
->rx_lock
, flags
);
492 /* Recover rx ring exhausted error */
493 if (np
->cur_rx
- np
->old_rx
>= RX_RING_SIZE
) {
494 printk(KERN_INFO
"Try to recover rx ring exhausted...\n");
495 /* Re-allocate skbuffs to fill the descriptor ring */
496 for (; np
->cur_rx
- np
->old_rx
> 0; np
->old_rx
++) {
498 entry
= np
->old_rx
% RX_RING_SIZE
;
499 /* Dropped packets don't need to re-allocate */
500 if (np
->rx_skbuff
[entry
] == NULL
) {
501 skb
= netdev_alloc_skb (dev
, np
->rx_buf_sz
);
503 np
->rx_ring
[entry
].fraginfo
= 0;
505 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
509 np
->rx_skbuff
[entry
] = skb
;
510 /* 16 byte align the IP header */
511 skb_reserve (skb
, 2);
512 np
->rx_ring
[entry
].fraginfo
=
513 cpu_to_le64 (pci_map_single
514 (np
->pdev
, skb
->data
, np
->rx_buf_sz
,
515 PCI_DMA_FROMDEVICE
));
517 np
->rx_ring
[entry
].fraginfo
|=
518 cpu_to_le64((u64
)np
->rx_buf_sz
<< 48);
519 np
->rx_ring
[entry
].status
= 0;
522 spin_unlock_irqrestore (&np
->rx_lock
, flags
);
523 np
->timer
.expires
= jiffies
+ next_tick
;
524 add_timer(&np
->timer
);
528 rio_tx_timeout (struct net_device
*dev
)
530 long ioaddr
= dev
->base_addr
;
532 printk (KERN_INFO
"%s: Tx timed out (%4.4x), is buffer full?\n",
533 dev
->name
, readl (ioaddr
+ TxStatus
));
536 dev
->trans_start
= jiffies
;
539 /* allocate and initialize Tx and Rx descriptors */
541 alloc_list (struct net_device
*dev
)
543 struct netdev_private
*np
= netdev_priv(dev
);
546 np
->cur_rx
= np
->cur_tx
= 0;
547 np
->old_rx
= np
->old_tx
= 0;
548 np
->rx_buf_sz
= (dev
->mtu
<= 1500 ? PACKET_SIZE
: dev
->mtu
+ 32);
550 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
551 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
552 np
->tx_skbuff
[i
] = NULL
;
553 np
->tx_ring
[i
].status
= cpu_to_le64 (TFDDone
);
554 np
->tx_ring
[i
].next_desc
= cpu_to_le64 (np
->tx_ring_dma
+
555 ((i
+1)%TX_RING_SIZE
) *
556 sizeof (struct netdev_desc
));
559 /* Initialize Rx descriptors */
560 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
561 np
->rx_ring
[i
].next_desc
= cpu_to_le64 (np
->rx_ring_dma
+
562 ((i
+ 1) % RX_RING_SIZE
) *
563 sizeof (struct netdev_desc
));
564 np
->rx_ring
[i
].status
= 0;
565 np
->rx_ring
[i
].fraginfo
= 0;
566 np
->rx_skbuff
[i
] = NULL
;
569 /* Allocate the rx buffers */
570 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
571 /* Allocated fixed size of skbuff */
572 struct sk_buff
*skb
= netdev_alloc_skb (dev
, np
->rx_buf_sz
);
573 np
->rx_skbuff
[i
] = skb
;
576 "%s: alloc_list: allocate Rx buffer error! ",
580 skb_reserve (skb
, 2); /* 16 byte align the IP header. */
581 /* Rubicon now supports 40 bits of addressing space. */
582 np
->rx_ring
[i
].fraginfo
=
583 cpu_to_le64 ( pci_map_single (
584 np
->pdev
, skb
->data
, np
->rx_buf_sz
,
585 PCI_DMA_FROMDEVICE
));
586 np
->rx_ring
[i
].fraginfo
|= cpu_to_le64((u64
)np
->rx_buf_sz
<< 48);
590 writel (np
->rx_ring_dma
, dev
->base_addr
+ RFDListPtr0
);
591 writel (0, dev
->base_addr
+ RFDListPtr1
);
597 start_xmit (struct sk_buff
*skb
, struct net_device
*dev
)
599 struct netdev_private
*np
= netdev_priv(dev
);
600 struct netdev_desc
*txdesc
;
603 u64 tfc_vlan_tag
= 0;
605 if (np
->link_status
== 0) { /* Link Down */
609 ioaddr
= dev
->base_addr
;
610 entry
= np
->cur_tx
% TX_RING_SIZE
;
611 np
->tx_skbuff
[entry
] = skb
;
612 txdesc
= &np
->tx_ring
[entry
];
615 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
617 cpu_to_le64 (TCPChecksumEnable
| UDPChecksumEnable
|
622 tfc_vlan_tag
= VLANTagInsert
|
623 ((u64
)np
->vlan
<< 32) |
624 ((u64
)skb
->priority
<< 45);
626 txdesc
->fraginfo
= cpu_to_le64 (pci_map_single (np
->pdev
, skb
->data
,
629 txdesc
->fraginfo
|= cpu_to_le64((u64
)skb
->len
<< 48);
631 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
632 * Work around: Always use 1 descriptor in 10Mbps mode */
633 if (entry
% np
->tx_coalesce
== 0 || np
->speed
== 10)
634 txdesc
->status
= cpu_to_le64 (entry
| tfc_vlan_tag
|
637 (1 << FragCountShift
));
639 txdesc
->status
= cpu_to_le64 (entry
| tfc_vlan_tag
|
641 (1 << FragCountShift
));
644 writel (readl (ioaddr
+ DMACtrl
) | 0x00001000, ioaddr
+ DMACtrl
);
646 writel(10000, ioaddr
+ CountDown
);
647 np
->cur_tx
= (np
->cur_tx
+ 1) % TX_RING_SIZE
;
648 if ((np
->cur_tx
- np
->old_tx
+ TX_RING_SIZE
) % TX_RING_SIZE
649 < TX_QUEUE_LEN
- 1 && np
->speed
!= 10) {
651 } else if (!netif_queue_stopped(dev
)) {
652 netif_stop_queue (dev
);
655 /* The first TFDListPtr */
656 if (readl (dev
->base_addr
+ TFDListPtr0
) == 0) {
657 writel (np
->tx_ring_dma
+ entry
* sizeof (struct netdev_desc
),
658 dev
->base_addr
+ TFDListPtr0
);
659 writel (0, dev
->base_addr
+ TFDListPtr1
);
662 /* NETDEV WATCHDOG timer */
663 dev
->trans_start
= jiffies
;
668 rio_interrupt (int irq
, void *dev_instance
)
670 struct net_device
*dev
= dev_instance
;
671 struct netdev_private
*np
;
674 int cnt
= max_intrloop
;
677 ioaddr
= dev
->base_addr
;
678 np
= netdev_priv(dev
);
680 int_status
= readw (ioaddr
+ IntStatus
);
681 writew (int_status
, ioaddr
+ IntStatus
);
682 int_status
&= DEFAULT_INTR
;
683 if (int_status
== 0 || --cnt
< 0)
686 /* Processing received packets */
687 if (int_status
& RxDMAComplete
)
688 receive_packet (dev
);
689 /* TxDMAComplete interrupt */
690 if ((int_status
& (TxDMAComplete
|IntRequested
))) {
692 tx_status
= readl (ioaddr
+ TxStatus
);
693 if (tx_status
& 0x01)
694 tx_error (dev
, tx_status
);
695 /* Free used tx skbuffs */
696 rio_free_tx (dev
, 1);
699 /* Handle uncommon events */
701 (HostError
| LinkEvent
| UpdateStats
))
702 rio_error (dev
, int_status
);
704 if (np
->cur_tx
!= np
->old_tx
)
705 writel (100, ioaddr
+ CountDown
);
706 return IRQ_RETVAL(handled
);
709 static inline dma_addr_t
desc_to_dma(struct netdev_desc
*desc
)
711 return le64_to_cpu(desc
->fraginfo
) & DMA_48BIT_MASK
;
715 rio_free_tx (struct net_device
*dev
, int irq
)
717 struct netdev_private
*np
= netdev_priv(dev
);
718 int entry
= np
->old_tx
% TX_RING_SIZE
;
720 unsigned long flag
= 0;
723 spin_lock(&np
->tx_lock
);
725 spin_lock_irqsave(&np
->tx_lock
, flag
);
727 /* Free used tx skbuffs */
728 while (entry
!= np
->cur_tx
) {
731 if (!(np
->tx_ring
[entry
].status
& cpu_to_le64(TFDDone
)))
733 skb
= np
->tx_skbuff
[entry
];
734 pci_unmap_single (np
->pdev
,
735 desc_to_dma(&np
->tx_ring
[entry
]),
736 skb
->len
, PCI_DMA_TODEVICE
);
738 dev_kfree_skb_irq (skb
);
742 np
->tx_skbuff
[entry
] = NULL
;
743 entry
= (entry
+ 1) % TX_RING_SIZE
;
747 spin_unlock(&np
->tx_lock
);
749 spin_unlock_irqrestore(&np
->tx_lock
, flag
);
752 /* If the ring is no longer full, clear tx_full and
753 call netif_wake_queue() */
755 if (netif_queue_stopped(dev
) &&
756 ((np
->cur_tx
- np
->old_tx
+ TX_RING_SIZE
) % TX_RING_SIZE
757 < TX_QUEUE_LEN
- 1 || np
->speed
== 10)) {
758 netif_wake_queue (dev
);
763 tx_error (struct net_device
*dev
, int tx_status
)
765 struct netdev_private
*np
;
766 long ioaddr
= dev
->base_addr
;
770 np
= netdev_priv(dev
);
772 frame_id
= (tx_status
& 0xffff0000);
773 printk (KERN_ERR
"%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
774 dev
->name
, tx_status
, frame_id
);
775 np
->stats
.tx_errors
++;
776 /* Ttransmit Underrun */
777 if (tx_status
& 0x10) {
778 np
->stats
.tx_fifo_errors
++;
779 writew (readw (ioaddr
+ TxStartThresh
) + 0x10,
780 ioaddr
+ TxStartThresh
);
781 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
782 writew (TxReset
| DMAReset
| FIFOReset
| NetworkReset
,
783 ioaddr
+ ASICCtrl
+ 2);
784 /* Wait for ResetBusy bit clear */
785 for (i
= 50; i
> 0; i
--) {
786 if ((readw (ioaddr
+ ASICCtrl
+ 2) & ResetBusy
) == 0)
790 rio_free_tx (dev
, 1);
791 /* Reset TFDListPtr */
792 writel (np
->tx_ring_dma
+
793 np
->old_tx
* sizeof (struct netdev_desc
),
794 dev
->base_addr
+ TFDListPtr0
);
795 writel (0, dev
->base_addr
+ TFDListPtr1
);
797 /* Let TxStartThresh stay default value */
800 if (tx_status
& 0x04) {
801 np
->stats
.tx_fifo_errors
++;
802 /* TxReset and clear FIFO */
803 writew (TxReset
| FIFOReset
, ioaddr
+ ASICCtrl
+ 2);
804 /* Wait reset done */
805 for (i
= 50; i
> 0; i
--) {
806 if ((readw (ioaddr
+ ASICCtrl
+ 2) & ResetBusy
) == 0)
810 /* Let TxStartThresh stay default value */
812 /* Maximum Collisions */
814 if (tx_status
& 0x08)
815 np
->stats
.collisions16
++;
817 if (tx_status
& 0x08)
818 np
->stats
.collisions
++;
821 writel (readw (dev
->base_addr
+ MACCtrl
) | TxEnable
, ioaddr
+ MACCtrl
);
825 receive_packet (struct net_device
*dev
)
827 struct netdev_private
*np
= netdev_priv(dev
);
828 int entry
= np
->cur_rx
% RX_RING_SIZE
;
831 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
833 struct netdev_desc
*desc
= &np
->rx_ring
[entry
];
837 if (!(desc
->status
& cpu_to_le64(RFDDone
)) ||
838 !(desc
->status
& cpu_to_le64(FrameStart
)) ||
839 !(desc
->status
& cpu_to_le64(FrameEnd
)))
842 /* Chip omits the CRC. */
843 frame_status
= le64_to_cpu(desc
->status
);
844 pkt_len
= frame_status
& 0xffff;
847 /* Update rx error statistics, drop packet. */
848 if (frame_status
& RFS_Errors
) {
849 np
->stats
.rx_errors
++;
850 if (frame_status
& (RxRuntFrame
| RxLengthError
))
851 np
->stats
.rx_length_errors
++;
852 if (frame_status
& RxFCSError
)
853 np
->stats
.rx_crc_errors
++;
854 if (frame_status
& RxAlignmentError
&& np
->speed
!= 1000)
855 np
->stats
.rx_frame_errors
++;
856 if (frame_status
& RxFIFOOverrun
)
857 np
->stats
.rx_fifo_errors
++;
861 /* Small skbuffs for short packets */
862 if (pkt_len
> copy_thresh
) {
863 pci_unmap_single (np
->pdev
,
867 skb_put (skb
= np
->rx_skbuff
[entry
], pkt_len
);
868 np
->rx_skbuff
[entry
] = NULL
;
869 } else if ((skb
= netdev_alloc_skb(dev
, pkt_len
+ 2))) {
870 pci_dma_sync_single_for_cpu(np
->pdev
,
874 /* 16 byte align the IP header */
875 skb_reserve (skb
, 2);
876 skb_copy_to_linear_data (skb
,
877 np
->rx_skbuff
[entry
]->data
,
879 skb_put (skb
, pkt_len
);
880 pci_dma_sync_single_for_device(np
->pdev
,
885 skb
->protocol
= eth_type_trans (skb
, dev
);
887 /* Checksum done by hw, but csum value unavailable. */
888 if (np
->pdev
->pci_rev_id
>= 0x0c &&
889 !(frame_status
& (TCPError
| UDPError
| IPError
))) {
890 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
894 dev
->last_rx
= jiffies
;
896 entry
= (entry
+ 1) % RX_RING_SIZE
;
898 spin_lock(&np
->rx_lock
);
900 /* Re-allocate skbuffs to fill the descriptor ring */
902 while (entry
!= np
->cur_rx
) {
904 /* Dropped packets don't need to re-allocate */
905 if (np
->rx_skbuff
[entry
] == NULL
) {
906 skb
= netdev_alloc_skb(dev
, np
->rx_buf_sz
);
908 np
->rx_ring
[entry
].fraginfo
= 0;
910 "%s: receive_packet: "
911 "Unable to re-allocate Rx skbuff.#%d\n",
915 np
->rx_skbuff
[entry
] = skb
;
916 /* 16 byte align the IP header */
917 skb_reserve (skb
, 2);
918 np
->rx_ring
[entry
].fraginfo
=
919 cpu_to_le64 (pci_map_single
920 (np
->pdev
, skb
->data
, np
->rx_buf_sz
,
921 PCI_DMA_FROMDEVICE
));
923 np
->rx_ring
[entry
].fraginfo
|=
924 cpu_to_le64((u64
)np
->rx_buf_sz
<< 48);
925 np
->rx_ring
[entry
].status
= 0;
926 entry
= (entry
+ 1) % RX_RING_SIZE
;
929 spin_unlock(&np
->rx_lock
);
934 rio_error (struct net_device
*dev
, int int_status
)
936 long ioaddr
= dev
->base_addr
;
937 struct netdev_private
*np
= netdev_priv(dev
);
940 /* Link change event */
941 if (int_status
& LinkEvent
) {
942 if (mii_wait_link (dev
, 10) == 0) {
943 printk (KERN_INFO
"%s: Link up\n", dev
->name
);
945 mii_get_media_pcs (dev
);
948 if (np
->speed
== 1000)
949 np
->tx_coalesce
= tx_coalesce
;
953 macctrl
|= (np
->vlan
) ? AutoVLANuntagging
: 0;
954 macctrl
|= (np
->full_duplex
) ? DuplexSelect
: 0;
955 macctrl
|= (np
->tx_flow
) ?
956 TxFlowControlEnable
: 0;
957 macctrl
|= (np
->rx_flow
) ?
958 RxFlowControlEnable
: 0;
959 writew(macctrl
, ioaddr
+ MACCtrl
);
961 netif_carrier_on(dev
);
963 printk (KERN_INFO
"%s: Link off\n", dev
->name
);
965 netif_carrier_off(dev
);
969 /* UpdateStats statistics registers */
970 if (int_status
& UpdateStats
) {
974 /* PCI Error, a catastronphic error related to the bus interface
975 occurs, set GlobalReset and HostReset to reset. */
976 if (int_status
& HostError
) {
977 printk (KERN_ERR
"%s: HostError! IntStatus %4.4x.\n",
978 dev
->name
, int_status
);
979 writew (GlobalReset
| HostReset
, ioaddr
+ ASICCtrl
+ 2);
984 static struct net_device_stats
*
985 get_stats (struct net_device
*dev
)
987 long ioaddr
= dev
->base_addr
;
988 struct netdev_private
*np
= netdev_priv(dev
);
992 unsigned int stat_reg
;
994 /* All statistics registers need to be acknowledged,
995 else statistic overflow could cause problems */
997 np
->stats
.rx_packets
+= readl (ioaddr
+ FramesRcvOk
);
998 np
->stats
.tx_packets
+= readl (ioaddr
+ FramesXmtOk
);
999 np
->stats
.rx_bytes
+= readl (ioaddr
+ OctetRcvOk
);
1000 np
->stats
.tx_bytes
+= readl (ioaddr
+ OctetXmtOk
);
1002 np
->stats
.multicast
= readl (ioaddr
+ McstFramesRcvdOk
);
1003 np
->stats
.collisions
+= readl (ioaddr
+ SingleColFrames
)
1004 + readl (ioaddr
+ MultiColFrames
);
1006 /* detailed tx errors */
1007 stat_reg
= readw (ioaddr
+ FramesAbortXSColls
);
1008 np
->stats
.tx_aborted_errors
+= stat_reg
;
1009 np
->stats
.tx_errors
+= stat_reg
;
1011 stat_reg
= readw (ioaddr
+ CarrierSenseErrors
);
1012 np
->stats
.tx_carrier_errors
+= stat_reg
;
1013 np
->stats
.tx_errors
+= stat_reg
;
1015 /* Clear all other statistic register. */
1016 readl (ioaddr
+ McstOctetXmtOk
);
1017 readw (ioaddr
+ BcstFramesXmtdOk
);
1018 readl (ioaddr
+ McstFramesXmtdOk
);
1019 readw (ioaddr
+ BcstFramesRcvdOk
);
1020 readw (ioaddr
+ MacControlFramesRcvd
);
1021 readw (ioaddr
+ FrameTooLongErrors
);
1022 readw (ioaddr
+ InRangeLengthErrors
);
1023 readw (ioaddr
+ FramesCheckSeqErrors
);
1024 readw (ioaddr
+ FramesLostRxErrors
);
1025 readl (ioaddr
+ McstOctetXmtOk
);
1026 readl (ioaddr
+ BcstOctetXmtOk
);
1027 readl (ioaddr
+ McstFramesXmtdOk
);
1028 readl (ioaddr
+ FramesWDeferredXmt
);
1029 readl (ioaddr
+ LateCollisions
);
1030 readw (ioaddr
+ BcstFramesXmtdOk
);
1031 readw (ioaddr
+ MacControlFramesXmtd
);
1032 readw (ioaddr
+ FramesWEXDeferal
);
1035 for (i
= 0x100; i
<= 0x150; i
+= 4)
1038 readw (ioaddr
+ TxJumboFrames
);
1039 readw (ioaddr
+ RxJumboFrames
);
1040 readw (ioaddr
+ TCPCheckSumErrors
);
1041 readw (ioaddr
+ UDPCheckSumErrors
);
1042 readw (ioaddr
+ IPCheckSumErrors
);
1047 clear_stats (struct net_device
*dev
)
1049 long ioaddr
= dev
->base_addr
;
1054 /* All statistics registers need to be acknowledged,
1055 else statistic overflow could cause problems */
1056 readl (ioaddr
+ FramesRcvOk
);
1057 readl (ioaddr
+ FramesXmtOk
);
1058 readl (ioaddr
+ OctetRcvOk
);
1059 readl (ioaddr
+ OctetXmtOk
);
1061 readl (ioaddr
+ McstFramesRcvdOk
);
1062 readl (ioaddr
+ SingleColFrames
);
1063 readl (ioaddr
+ MultiColFrames
);
1064 readl (ioaddr
+ LateCollisions
);
1065 /* detailed rx errors */
1066 readw (ioaddr
+ FrameTooLongErrors
);
1067 readw (ioaddr
+ InRangeLengthErrors
);
1068 readw (ioaddr
+ FramesCheckSeqErrors
);
1069 readw (ioaddr
+ FramesLostRxErrors
);
1071 /* detailed tx errors */
1072 readw (ioaddr
+ FramesAbortXSColls
);
1073 readw (ioaddr
+ CarrierSenseErrors
);
1075 /* Clear all other statistic register. */
1076 readl (ioaddr
+ McstOctetXmtOk
);
1077 readw (ioaddr
+ BcstFramesXmtdOk
);
1078 readl (ioaddr
+ McstFramesXmtdOk
);
1079 readw (ioaddr
+ BcstFramesRcvdOk
);
1080 readw (ioaddr
+ MacControlFramesRcvd
);
1081 readl (ioaddr
+ McstOctetXmtOk
);
1082 readl (ioaddr
+ BcstOctetXmtOk
);
1083 readl (ioaddr
+ McstFramesXmtdOk
);
1084 readl (ioaddr
+ FramesWDeferredXmt
);
1085 readw (ioaddr
+ BcstFramesXmtdOk
);
1086 readw (ioaddr
+ MacControlFramesXmtd
);
1087 readw (ioaddr
+ FramesWEXDeferal
);
1089 for (i
= 0x100; i
<= 0x150; i
+= 4)
1092 readw (ioaddr
+ TxJumboFrames
);
1093 readw (ioaddr
+ RxJumboFrames
);
1094 readw (ioaddr
+ TCPCheckSumErrors
);
1095 readw (ioaddr
+ UDPCheckSumErrors
);
1096 readw (ioaddr
+ IPCheckSumErrors
);
1102 change_mtu (struct net_device
*dev
, int new_mtu
)
1104 struct netdev_private
*np
= netdev_priv(dev
);
1105 int max
= (np
->jumbo
) ? MAX_JUMBO
: 1536;
1107 if ((new_mtu
< 68) || (new_mtu
> max
)) {
1117 set_multicast (struct net_device
*dev
)
1119 long ioaddr
= dev
->base_addr
;
1122 struct netdev_private
*np
= netdev_priv(dev
);
1124 hash_table
[0] = hash_table
[1] = 0;
1125 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1126 hash_table
[1] |= 0x02000000;
1127 if (dev
->flags
& IFF_PROMISC
) {
1128 /* Receive all frames promiscuously. */
1129 rx_mode
= ReceiveAllFrames
;
1130 } else if ((dev
->flags
& IFF_ALLMULTI
) ||
1131 (dev
->mc_count
> multicast_filter_limit
)) {
1132 /* Receive broadcast and multicast frames */
1133 rx_mode
= ReceiveBroadcast
| ReceiveMulticast
| ReceiveUnicast
;
1134 } else if (dev
->mc_count
> 0) {
1136 struct dev_mc_list
*mclist
;
1137 /* Receive broadcast frames and multicast frames filtering
1140 ReceiveBroadcast
| ReceiveMulticastHash
| ReceiveUnicast
;
1141 for (i
=0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
1142 i
++, mclist
=mclist
->next
)
1145 int crc
= ether_crc_le (ETH_ALEN
, mclist
->dmi_addr
);
1146 /* The inverted high significant 6 bits of CRC are
1147 used as an index to hashtable */
1148 for (bit
= 0; bit
< 6; bit
++)
1149 if (crc
& (1 << (31 - bit
)))
1150 index
|= (1 << bit
);
1151 hash_table
[index
/ 32] |= (1 << (index
% 32));
1154 rx_mode
= ReceiveBroadcast
| ReceiveUnicast
;
1157 /* ReceiveVLANMatch field in ReceiveMode */
1158 rx_mode
|= ReceiveVLANMatch
;
1161 writel (hash_table
[0], ioaddr
+ HashTable0
);
1162 writel (hash_table
[1], ioaddr
+ HashTable1
);
1163 writew (rx_mode
, ioaddr
+ ReceiveMode
);
1166 static void rio_get_drvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
1168 struct netdev_private
*np
= netdev_priv(dev
);
1169 strcpy(info
->driver
, "dl2k");
1170 strcpy(info
->version
, DRV_VERSION
);
1171 strcpy(info
->bus_info
, pci_name(np
->pdev
));
1174 static int rio_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1176 struct netdev_private
*np
= netdev_priv(dev
);
1177 if (np
->phy_media
) {
1179 cmd
->supported
= SUPPORTED_Autoneg
| SUPPORTED_FIBRE
;
1180 cmd
->advertising
= ADVERTISED_Autoneg
| ADVERTISED_FIBRE
;
1181 cmd
->port
= PORT_FIBRE
;
1182 cmd
->transceiver
= XCVR_INTERNAL
;
1185 cmd
->supported
= SUPPORTED_10baseT_Half
|
1186 SUPPORTED_10baseT_Full
| SUPPORTED_100baseT_Half
1187 | SUPPORTED_100baseT_Full
| SUPPORTED_1000baseT_Full
|
1188 SUPPORTED_Autoneg
| SUPPORTED_MII
;
1189 cmd
->advertising
= ADVERTISED_10baseT_Half
|
1190 ADVERTISED_10baseT_Full
| ADVERTISED_100baseT_Half
|
1191 ADVERTISED_100baseT_Full
| ADVERTISED_1000baseT_Full
|
1192 ADVERTISED_Autoneg
| ADVERTISED_MII
;
1193 cmd
->port
= PORT_MII
;
1194 cmd
->transceiver
= XCVR_INTERNAL
;
1196 if ( np
->link_status
) {
1197 cmd
->speed
= np
->speed
;
1198 cmd
->duplex
= np
->full_duplex
? DUPLEX_FULL
: DUPLEX_HALF
;
1204 cmd
->autoneg
= AUTONEG_ENABLE
;
1206 cmd
->autoneg
= AUTONEG_DISABLE
;
1208 cmd
->phy_address
= np
->phy_addr
;
1212 static int rio_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1214 struct netdev_private
*np
= netdev_priv(dev
);
1215 netif_carrier_off(dev
);
1216 if (cmd
->autoneg
== AUTONEG_ENABLE
) {
1226 if (np
->speed
== 1000) {
1227 cmd
->speed
= SPEED_100
;
1228 cmd
->duplex
= DUPLEX_FULL
;
1229 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1231 switch(cmd
->speed
+ cmd
->duplex
) {
1233 case SPEED_10
+ DUPLEX_HALF
:
1235 np
->full_duplex
= 0;
1238 case SPEED_10
+ DUPLEX_FULL
:
1240 np
->full_duplex
= 1;
1242 case SPEED_100
+ DUPLEX_HALF
:
1244 np
->full_duplex
= 0;
1246 case SPEED_100
+ DUPLEX_FULL
:
1248 np
->full_duplex
= 1;
1250 case SPEED_1000
+ DUPLEX_HALF
:/* not supported */
1251 case SPEED_1000
+ DUPLEX_FULL
:/* not supported */
1260 static u32
rio_get_link(struct net_device
*dev
)
1262 struct netdev_private
*np
= netdev_priv(dev
);
1263 return np
->link_status
;
1266 static const struct ethtool_ops ethtool_ops
= {
1267 .get_drvinfo
= rio_get_drvinfo
,
1268 .get_settings
= rio_get_settings
,
1269 .set_settings
= rio_set_settings
,
1270 .get_link
= rio_get_link
,
1274 rio_ioctl (struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1277 struct netdev_private
*np
= netdev_priv(dev
);
1278 struct mii_data
*miidata
= (struct mii_data
*) &rq
->ifr_ifru
;
1280 struct netdev_desc
*desc
;
1283 phy_addr
= np
->phy_addr
;
1285 case SIOCDEVPRIVATE
:
1288 case SIOCDEVPRIVATE
+ 1:
1289 miidata
->out_value
= mii_read (dev
, phy_addr
, miidata
->reg_num
);
1291 case SIOCDEVPRIVATE
+ 2:
1292 mii_write (dev
, phy_addr
, miidata
->reg_num
, miidata
->in_value
);
1294 case SIOCDEVPRIVATE
+ 3:
1296 case SIOCDEVPRIVATE
+ 4:
1298 case SIOCDEVPRIVATE
+ 5:
1299 netif_stop_queue (dev
);
1301 case SIOCDEVPRIVATE
+ 6:
1302 netif_wake_queue (dev
);
1304 case SIOCDEVPRIVATE
+ 7:
1306 ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",
1307 netif_queue_stopped(dev
), np
->cur_tx
, np
->old_tx
, np
->cur_rx
,
1310 case SIOCDEVPRIVATE
+ 8:
1311 printk("TX ring:\n");
1312 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1313 desc
= &np
->tx_ring
[i
];
1315 ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",
1317 (u32
) (np
->tx_ring_dma
+ i
* sizeof (*desc
)),
1318 (u32
)le64_to_cpu(desc
->next_desc
),
1319 (u32
)le64_to_cpu(desc
->status
),
1320 (u32
)(le64_to_cpu(desc
->fraginfo
) >> 32),
1321 (u32
)le64_to_cpu(desc
->fraginfo
));
1333 #define EEP_READ 0x0200
1334 #define EEP_BUSY 0x8000
1335 /* Read the EEPROM word */
1336 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1338 read_eeprom (long ioaddr
, int eep_addr
)
1341 outw (EEP_READ
| (eep_addr
& 0xff), ioaddr
+ EepromCtrl
);
1343 if (!(inw (ioaddr
+ EepromCtrl
) & EEP_BUSY
)) {
1344 return inw (ioaddr
+ EepromData
);
1350 enum phy_ctrl_bits
{
1351 MII_READ
= 0x00, MII_CLK
= 0x01, MII_DATA1
= 0x02, MII_WRITE
= 0x04,
1355 #define mii_delay() readb(ioaddr)
1357 mii_sendbit (struct net_device
*dev
, u32 data
)
1359 long ioaddr
= dev
->base_addr
+ PhyCtrl
;
1360 data
= (data
) ? MII_DATA1
: 0;
1362 data
|= (readb (ioaddr
) & 0xf8) | MII_WRITE
;
1363 writeb (data
, ioaddr
);
1365 writeb (data
| MII_CLK
, ioaddr
);
1370 mii_getbit (struct net_device
*dev
)
1372 long ioaddr
= dev
->base_addr
+ PhyCtrl
;
1375 data
= (readb (ioaddr
) & 0xf8) | MII_READ
;
1376 writeb (data
, ioaddr
);
1378 writeb (data
| MII_CLK
, ioaddr
);
1380 return ((readb (ioaddr
) >> 1) & 1);
1384 mii_send_bits (struct net_device
*dev
, u32 data
, int len
)
1387 for (i
= len
- 1; i
>= 0; i
--) {
1388 mii_sendbit (dev
, data
& (1 << i
));
1393 mii_read (struct net_device
*dev
, int phy_addr
, int reg_num
)
1400 mii_send_bits (dev
, 0xffffffff, 32);
1401 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1402 /* ST,OP = 0110'b for read operation */
1403 cmd
= (0x06 << 10 | phy_addr
<< 5 | reg_num
);
1404 mii_send_bits (dev
, cmd
, 14);
1406 if (mii_getbit (dev
))
1409 for (i
= 0; i
< 16; i
++) {
1410 retval
|= mii_getbit (dev
);
1415 return (retval
>> 1) & 0xffff;
1421 mii_write (struct net_device
*dev
, int phy_addr
, int reg_num
, u16 data
)
1426 mii_send_bits (dev
, 0xffffffff, 32);
1427 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1428 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1429 cmd
= (0x5002 << 16) | (phy_addr
<< 23) | (reg_num
<< 18) | data
;
1430 mii_send_bits (dev
, cmd
, 32);
1436 mii_wait_link (struct net_device
*dev
, int wait
)
1440 struct netdev_private
*np
;
1442 np
= netdev_priv(dev
);
1443 phy_addr
= np
->phy_addr
;
1446 bmsr
= mii_read (dev
, phy_addr
, MII_BMSR
);
1447 if (bmsr
& MII_BMSR_LINK_STATUS
)
1450 } while (--wait
> 0);
1454 mii_get_media (struct net_device
*dev
)
1461 struct netdev_private
*np
;
1463 np
= netdev_priv(dev
);
1464 phy_addr
= np
->phy_addr
;
1466 bmsr
= mii_read (dev
, phy_addr
, MII_BMSR
);
1467 if (np
->an_enable
) {
1468 if (!(bmsr
& MII_BMSR_AN_COMPLETE
)) {
1469 /* Auto-Negotiation not completed */
1472 negotiate
= mii_read (dev
, phy_addr
, MII_ANAR
) &
1473 mii_read (dev
, phy_addr
, MII_ANLPAR
);
1474 mscr
= mii_read (dev
, phy_addr
, MII_MSCR
);
1475 mssr
= mii_read (dev
, phy_addr
, MII_MSSR
);
1476 if (mscr
& MII_MSCR_1000BT_FD
&& mssr
& MII_MSSR_LP_1000BT_FD
) {
1478 np
->full_duplex
= 1;
1479 printk (KERN_INFO
"Auto 1000 Mbps, Full duplex\n");
1480 } else if (mscr
& MII_MSCR_1000BT_HD
&& mssr
& MII_MSSR_LP_1000BT_HD
) {
1482 np
->full_duplex
= 0;
1483 printk (KERN_INFO
"Auto 1000 Mbps, Half duplex\n");
1484 } else if (negotiate
& MII_ANAR_100BX_FD
) {
1486 np
->full_duplex
= 1;
1487 printk (KERN_INFO
"Auto 100 Mbps, Full duplex\n");
1488 } else if (negotiate
& MII_ANAR_100BX_HD
) {
1490 np
->full_duplex
= 0;
1491 printk (KERN_INFO
"Auto 100 Mbps, Half duplex\n");
1492 } else if (negotiate
& MII_ANAR_10BT_FD
) {
1494 np
->full_duplex
= 1;
1495 printk (KERN_INFO
"Auto 10 Mbps, Full duplex\n");
1496 } else if (negotiate
& MII_ANAR_10BT_HD
) {
1498 np
->full_duplex
= 0;
1499 printk (KERN_INFO
"Auto 10 Mbps, Half duplex\n");
1501 if (negotiate
& MII_ANAR_PAUSE
) {
1504 } else if (negotiate
& MII_ANAR_ASYMMETRIC
) {
1508 /* else tx_flow, rx_flow = user select */
1510 __u16 bmcr
= mii_read (dev
, phy_addr
, MII_BMCR
);
1511 switch (bmcr
& (MII_BMCR_SPEED_100
| MII_BMCR_SPEED_1000
)) {
1512 case MII_BMCR_SPEED_1000
:
1513 printk (KERN_INFO
"Operating at 1000 Mbps, ");
1515 case MII_BMCR_SPEED_100
:
1516 printk (KERN_INFO
"Operating at 100 Mbps, ");
1519 printk (KERN_INFO
"Operating at 10 Mbps, ");
1521 if (bmcr
& MII_BMCR_DUPLEX_MODE
) {
1522 printk ("Full duplex\n");
1524 printk ("Half duplex\n");
1528 printk(KERN_INFO
"Enable Tx Flow Control\n");
1530 printk(KERN_INFO
"Disable Tx Flow Control\n");
1532 printk(KERN_INFO
"Enable Rx Flow Control\n");
1534 printk(KERN_INFO
"Disable Rx Flow Control\n");
1540 mii_set_media (struct net_device
*dev
)
1547 struct netdev_private
*np
;
1548 np
= netdev_priv(dev
);
1549 phy_addr
= np
->phy_addr
;
1551 /* Does user set speed? */
1552 if (np
->an_enable
) {
1553 /* Advertise capabilities */
1554 bmsr
= mii_read (dev
, phy_addr
, MII_BMSR
);
1555 anar
= mii_read (dev
, phy_addr
, MII_ANAR
) &
1556 ~MII_ANAR_100BX_FD
&
1557 ~MII_ANAR_100BX_HD
&
1561 if (bmsr
& MII_BMSR_100BX_FD
)
1562 anar
|= MII_ANAR_100BX_FD
;
1563 if (bmsr
& MII_BMSR_100BX_HD
)
1564 anar
|= MII_ANAR_100BX_HD
;
1565 if (bmsr
& MII_BMSR_100BT4
)
1566 anar
|= MII_ANAR_100BT4
;
1567 if (bmsr
& MII_BMSR_10BT_FD
)
1568 anar
|= MII_ANAR_10BT_FD
;
1569 if (bmsr
& MII_BMSR_10BT_HD
)
1570 anar
|= MII_ANAR_10BT_HD
;
1571 anar
|= MII_ANAR_PAUSE
| MII_ANAR_ASYMMETRIC
;
1572 mii_write (dev
, phy_addr
, MII_ANAR
, anar
);
1574 /* Enable Auto crossover */
1575 pscr
= mii_read (dev
, phy_addr
, MII_PHY_SCR
);
1576 pscr
|= 3 << 5; /* 11'b */
1577 mii_write (dev
, phy_addr
, MII_PHY_SCR
, pscr
);
1579 /* Soft reset PHY */
1580 mii_write (dev
, phy_addr
, MII_BMCR
, MII_BMCR_RESET
);
1581 bmcr
= MII_BMCR_AN_ENABLE
| MII_BMCR_RESTART_AN
| MII_BMCR_RESET
;
1582 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1585 /* Force speed setting */
1586 /* 1) Disable Auto crossover */
1587 pscr
= mii_read (dev
, phy_addr
, MII_PHY_SCR
);
1589 mii_write (dev
, phy_addr
, MII_PHY_SCR
, pscr
);
1592 bmcr
= mii_read (dev
, phy_addr
, MII_BMCR
);
1593 bmcr
|= MII_BMCR_RESET
;
1594 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1597 bmcr
= 0x1940; /* must be 0x1940 */
1598 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1599 mdelay (100); /* wait a certain time */
1601 /* 4) Advertise nothing */
1602 mii_write (dev
, phy_addr
, MII_ANAR
, 0);
1604 /* 5) Set media and Power Up */
1605 bmcr
= MII_BMCR_POWER_DOWN
;
1606 if (np
->speed
== 100) {
1607 bmcr
|= MII_BMCR_SPEED_100
;
1608 printk (KERN_INFO
"Manual 100 Mbps, ");
1609 } else if (np
->speed
== 10) {
1610 printk (KERN_INFO
"Manual 10 Mbps, ");
1612 if (np
->full_duplex
) {
1613 bmcr
|= MII_BMCR_DUPLEX_MODE
;
1614 printk ("Full duplex\n");
1616 printk ("Half duplex\n");
1619 /* Set 1000BaseT Master/Slave setting */
1620 mscr
= mii_read (dev
, phy_addr
, MII_MSCR
);
1621 mscr
|= MII_MSCR_CFG_ENABLE
;
1622 mscr
&= ~MII_MSCR_CFG_VALUE
= 0;
1624 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1631 mii_get_media_pcs (struct net_device
*dev
)
1636 struct netdev_private
*np
;
1638 np
= netdev_priv(dev
);
1639 phy_addr
= np
->phy_addr
;
1641 bmsr
= mii_read (dev
, phy_addr
, PCS_BMSR
);
1642 if (np
->an_enable
) {
1643 if (!(bmsr
& MII_BMSR_AN_COMPLETE
)) {
1644 /* Auto-Negotiation not completed */
1647 negotiate
= mii_read (dev
, phy_addr
, PCS_ANAR
) &
1648 mii_read (dev
, phy_addr
, PCS_ANLPAR
);
1650 if (negotiate
& PCS_ANAR_FULL_DUPLEX
) {
1651 printk (KERN_INFO
"Auto 1000 Mbps, Full duplex\n");
1652 np
->full_duplex
= 1;
1654 printk (KERN_INFO
"Auto 1000 Mbps, half duplex\n");
1655 np
->full_duplex
= 0;
1657 if (negotiate
& PCS_ANAR_PAUSE
) {
1660 } else if (negotiate
& PCS_ANAR_ASYMMETRIC
) {
1664 /* else tx_flow, rx_flow = user select */
1666 __u16 bmcr
= mii_read (dev
, phy_addr
, PCS_BMCR
);
1667 printk (KERN_INFO
"Operating at 1000 Mbps, ");
1668 if (bmcr
& MII_BMCR_DUPLEX_MODE
) {
1669 printk ("Full duplex\n");
1671 printk ("Half duplex\n");
1675 printk(KERN_INFO
"Enable Tx Flow Control\n");
1677 printk(KERN_INFO
"Disable Tx Flow Control\n");
1679 printk(KERN_INFO
"Enable Rx Flow Control\n");
1681 printk(KERN_INFO
"Disable Rx Flow Control\n");
1687 mii_set_media_pcs (struct net_device
*dev
)
1693 struct netdev_private
*np
;
1694 np
= netdev_priv(dev
);
1695 phy_addr
= np
->phy_addr
;
1697 /* Auto-Negotiation? */
1698 if (np
->an_enable
) {
1699 /* Advertise capabilities */
1700 esr
= mii_read (dev
, phy_addr
, PCS_ESR
);
1701 anar
= mii_read (dev
, phy_addr
, MII_ANAR
) &
1702 ~PCS_ANAR_HALF_DUPLEX
&
1703 ~PCS_ANAR_FULL_DUPLEX
;
1704 if (esr
& (MII_ESR_1000BT_HD
| MII_ESR_1000BX_HD
))
1705 anar
|= PCS_ANAR_HALF_DUPLEX
;
1706 if (esr
& (MII_ESR_1000BT_FD
| MII_ESR_1000BX_FD
))
1707 anar
|= PCS_ANAR_FULL_DUPLEX
;
1708 anar
|= PCS_ANAR_PAUSE
| PCS_ANAR_ASYMMETRIC
;
1709 mii_write (dev
, phy_addr
, MII_ANAR
, anar
);
1711 /* Soft reset PHY */
1712 mii_write (dev
, phy_addr
, MII_BMCR
, MII_BMCR_RESET
);
1713 bmcr
= MII_BMCR_AN_ENABLE
| MII_BMCR_RESTART_AN
|
1715 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1718 /* Force speed setting */
1720 bmcr
= MII_BMCR_RESET
;
1721 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1723 if (np
->full_duplex
) {
1724 bmcr
= MII_BMCR_DUPLEX_MODE
;
1725 printk (KERN_INFO
"Manual full duplex\n");
1728 printk (KERN_INFO
"Manual half duplex\n");
1730 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
);
1733 /* Advertise nothing */
1734 mii_write (dev
, phy_addr
, MII_ANAR
, 0);
1741 rio_close (struct net_device
*dev
)
1743 long ioaddr
= dev
->base_addr
;
1744 struct netdev_private
*np
= netdev_priv(dev
);
1745 struct sk_buff
*skb
;
1748 netif_stop_queue (dev
);
1750 /* Disable interrupts */
1751 writew (0, ioaddr
+ IntEnable
);
1753 /* Stop Tx and Rx logics */
1754 writel (TxDisable
| RxDisable
| StatsDisable
, ioaddr
+ MACCtrl
);
1756 free_irq (dev
->irq
, dev
);
1757 del_timer_sync (&np
->timer
);
1759 /* Free all the skbuffs in the queue. */
1760 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1761 np
->rx_ring
[i
].status
= 0;
1762 np
->rx_ring
[i
].fraginfo
= 0;
1763 skb
= np
->rx_skbuff
[i
];
1765 pci_unmap_single(np
->pdev
,
1766 desc_to_dma(&np
->rx_ring
[i
]),
1767 skb
->len
, PCI_DMA_FROMDEVICE
);
1768 dev_kfree_skb (skb
);
1769 np
->rx_skbuff
[i
] = NULL
;
1772 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1773 skb
= np
->tx_skbuff
[i
];
1775 pci_unmap_single(np
->pdev
,
1776 desc_to_dma(&np
->tx_ring
[i
]),
1777 skb
->len
, PCI_DMA_TODEVICE
);
1778 dev_kfree_skb (skb
);
1779 np
->tx_skbuff
[i
] = NULL
;
1786 static void __devexit
1787 rio_remove1 (struct pci_dev
*pdev
)
1789 struct net_device
*dev
= pci_get_drvdata (pdev
);
1792 struct netdev_private
*np
= netdev_priv(dev
);
1794 unregister_netdev (dev
);
1795 pci_free_consistent (pdev
, RX_TOTAL_SIZE
, np
->rx_ring
,
1797 pci_free_consistent (pdev
, TX_TOTAL_SIZE
, np
->tx_ring
,
1800 iounmap ((char *) (dev
->base_addr
));
1803 pci_release_regions (pdev
);
1804 pci_disable_device (pdev
);
1806 pci_set_drvdata (pdev
, NULL
);
1809 static struct pci_driver rio_driver
= {
1811 .id_table
= rio_pci_tbl
,
1812 .probe
= rio_probe1
,
1813 .remove
= __devexit_p(rio_remove1
),
1819 return pci_register_driver(&rio_driver
);
1825 pci_unregister_driver (&rio_driver
);
1828 module_init (rio_init
);
1829 module_exit (rio_exit
);
1835 gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1837 Read Documentation/networking/dl2k.txt for details.