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[thirdparty/linux.git] / drivers / net / dsa / sja1105 / sja1105_ptp.c
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
3 */
4 #include <linux/spi/spi.h>
5 #include "sja1105.h"
6
7 /* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and
8 * therefore scaled_ppm between [-2,147,483,648, 2,147,483,647].
9 * Set the maximum supported ppb to a round value smaller than the maximum.
10 *
11 * Percentually speaking, this is a +/- 0.032x adjustment of the
12 * free-running counter (0.968x to 1.032x).
13 */
14 #define SJA1105_MAX_ADJ_PPB 32000000
15 #define SJA1105_SIZE_PTP_CMD 4
16
17 /* PTPSYNCTS has no interrupt or update mechanism, because the intended
18 * hardware use case is for the timestamp to be collected synchronously,
19 * immediately after the CAS_MASTER SJA1105 switch has triggered a CASSYNC
20 * pulse on the PTP_CLK pin. When used as a generic extts source, it needs
21 * polling and a comparison with the old value. The polling interval is just
22 * the Nyquist rate of a canonical PPS input (e.g. from a GPS module).
23 * Anything of higher frequency than 1 Hz will be lost, since there is no
24 * timestamp FIFO.
25 */
26 #define SJA1105_EXTTS_INTERVAL (HZ / 2)
27
28 /* This range is actually +/- SJA1105_MAX_ADJ_PPB
29 * divided by 1000 (ppb -> ppm) and with a 16-bit
30 * "fractional" part (actually fixed point).
31 * |
32 * v
33 * Convert scaled_ppm from the +/- ((10^6) << 16) range
34 * into the +/- (1 << 31) range.
35 *
36 * This forgoes a "ppb" numeric representation (up to NSEC_PER_SEC)
37 * and defines the scaling factor between scaled_ppm and the actual
38 * frequency adjustments of the PHC.
39 *
40 * ptpclkrate = scaled_ppm * 2^31 / (10^6 * 2^16)
41 * simplifies to
42 * ptpclkrate = scaled_ppm * 2^9 / 5^6
43 */
44 #define SJA1105_CC_MULT_NUM (1 << 9)
45 #define SJA1105_CC_MULT_DEM 15625
46 #define SJA1105_CC_MULT 0x80000000
47
48 enum sja1105_ptp_clk_mode {
49 PTP_ADD_MODE = 1,
50 PTP_SET_MODE = 0,
51 };
52
53 #define extts_to_data(d) \
54 container_of((d), struct sja1105_ptp_data, extts_work)
55 #define ptp_caps_to_data(d) \
56 container_of((d), struct sja1105_ptp_data, caps)
57 #define ptp_data_to_sja1105(d) \
58 container_of((d), struct sja1105_private, ptp_data)
59
60 /* Must be called only with priv->tagger_data.state bit
61 * SJA1105_HWTS_RX_EN cleared
62 */
63 static int sja1105_change_rxtstamping(struct sja1105_private *priv,
64 bool on)
65 {
66 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
67 struct sja1105_general_params_entry *general_params;
68 struct sja1105_table *table;
69
70 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
71 general_params = table->entries;
72 general_params->send_meta1 = on;
73 general_params->send_meta0 = on;
74
75 /* Initialize the meta state machine to a known state */
76 if (priv->tagger_data.stampable_skb) {
77 kfree_skb(priv->tagger_data.stampable_skb);
78 priv->tagger_data.stampable_skb = NULL;
79 }
80 ptp_cancel_worker_sync(ptp_data->clock);
81 skb_queue_purge(&ptp_data->skb_rxtstamp_queue);
82
83 return sja1105_static_config_reload(priv, SJA1105_RX_HWTSTAMPING);
84 }
85
86 int sja1105_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr)
87 {
88 struct sja1105_private *priv = ds->priv;
89 struct hwtstamp_config config;
90 bool rx_on;
91 int rc;
92
93 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
94 return -EFAULT;
95
96 switch (config.tx_type) {
97 case HWTSTAMP_TX_OFF:
98 priv->ports[port].hwts_tx_en = false;
99 break;
100 case HWTSTAMP_TX_ON:
101 priv->ports[port].hwts_tx_en = true;
102 break;
103 default:
104 return -ERANGE;
105 }
106
107 switch (config.rx_filter) {
108 case HWTSTAMP_FILTER_NONE:
109 rx_on = false;
110 break;
111 default:
112 rx_on = true;
113 break;
114 }
115
116 if (rx_on != test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state)) {
117 clear_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state);
118
119 rc = sja1105_change_rxtstamping(priv, rx_on);
120 if (rc < 0) {
121 dev_err(ds->dev,
122 "Failed to change RX timestamping: %d\n", rc);
123 return rc;
124 }
125 if (rx_on)
126 set_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state);
127 }
128
129 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
130 return -EFAULT;
131 return 0;
132 }
133
134 int sja1105_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr)
135 {
136 struct sja1105_private *priv = ds->priv;
137 struct hwtstamp_config config;
138
139 config.flags = 0;
140 if (priv->ports[port].hwts_tx_en)
141 config.tx_type = HWTSTAMP_TX_ON;
142 else
143 config.tx_type = HWTSTAMP_TX_OFF;
144 if (test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state))
145 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
146 else
147 config.rx_filter = HWTSTAMP_FILTER_NONE;
148
149 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
150 -EFAULT : 0;
151 }
152
153 int sja1105_get_ts_info(struct dsa_switch *ds, int port,
154 struct ethtool_ts_info *info)
155 {
156 struct sja1105_private *priv = ds->priv;
157 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
158
159 /* Called during cleanup */
160 if (!ptp_data->clock)
161 return -ENODEV;
162
163 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
164 SOF_TIMESTAMPING_RX_HARDWARE |
165 SOF_TIMESTAMPING_RAW_HARDWARE;
166 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
167 (1 << HWTSTAMP_TX_ON);
168 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
169 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
170 info->phc_index = ptp_clock_index(ptp_data->clock);
171 return 0;
172 }
173
174 void sja1105et_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,
175 enum packing_op op)
176 {
177 const int size = SJA1105_SIZE_PTP_CMD;
178 /* No need to keep this as part of the structure */
179 u64 valid = 1;
180
181 sja1105_packing(buf, &valid, 31, 31, size, op);
182 sja1105_packing(buf, &cmd->ptpstrtsch, 30, 30, size, op);
183 sja1105_packing(buf, &cmd->ptpstopsch, 29, 29, size, op);
184 sja1105_packing(buf, &cmd->startptpcp, 28, 28, size, op);
185 sja1105_packing(buf, &cmd->stopptpcp, 27, 27, size, op);
186 sja1105_packing(buf, &cmd->resptp, 2, 2, size, op);
187 sja1105_packing(buf, &cmd->corrclk4ts, 1, 1, size, op);
188 sja1105_packing(buf, &cmd->ptpclkadd, 0, 0, size, op);
189 }
190
191 void sja1105pqrs_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,
192 enum packing_op op)
193 {
194 const int size = SJA1105_SIZE_PTP_CMD;
195 /* No need to keep this as part of the structure */
196 u64 valid = 1;
197
198 sja1105_packing(buf, &valid, 31, 31, size, op);
199 sja1105_packing(buf, &cmd->ptpstrtsch, 30, 30, size, op);
200 sja1105_packing(buf, &cmd->ptpstopsch, 29, 29, size, op);
201 sja1105_packing(buf, &cmd->startptpcp, 28, 28, size, op);
202 sja1105_packing(buf, &cmd->stopptpcp, 27, 27, size, op);
203 sja1105_packing(buf, &cmd->resptp, 3, 3, size, op);
204 sja1105_packing(buf, &cmd->corrclk4ts, 2, 2, size, op);
205 sja1105_packing(buf, &cmd->ptpclkadd, 0, 0, size, op);
206 }
207
208 int sja1105_ptp_commit(struct dsa_switch *ds, struct sja1105_ptp_cmd *cmd,
209 sja1105_spi_rw_mode_t rw)
210 {
211 const struct sja1105_private *priv = ds->priv;
212 const struct sja1105_regs *regs = priv->info->regs;
213 u8 buf[SJA1105_SIZE_PTP_CMD] = {0};
214 int rc;
215
216 if (rw == SPI_WRITE)
217 priv->info->ptp_cmd_packing(buf, cmd, PACK);
218
219 rc = sja1105_xfer_buf(priv, rw, regs->ptp_control, buf,
220 SJA1105_SIZE_PTP_CMD);
221
222 if (rw == SPI_READ)
223 priv->info->ptp_cmd_packing(buf, cmd, UNPACK);
224
225 return rc;
226 }
227
228 /* The switch returns partial timestamps (24 bits for SJA1105 E/T, which wrap
229 * around in 0.135 seconds, and 32 bits for P/Q/R/S, wrapping around in 34.35
230 * seconds).
231 *
232 * This receives the RX or TX MAC timestamps, provided by hardware as
233 * the lower bits of the cycle counter, sampled at the time the timestamp was
234 * collected.
235 *
236 * To reconstruct into a full 64-bit-wide timestamp, the cycle counter is
237 * read and the high-order bits are filled in.
238 *
239 * Must be called within one wraparound period of the partial timestamp since
240 * it was generated by the MAC.
241 */
242 static u64 sja1105_tstamp_reconstruct(struct dsa_switch *ds, u64 now,
243 u64 ts_partial)
244 {
245 struct sja1105_private *priv = ds->priv;
246 u64 partial_tstamp_mask = CYCLECOUNTER_MASK(priv->info->ptp_ts_bits);
247 u64 ts_reconstructed;
248
249 ts_reconstructed = (now & ~partial_tstamp_mask) | ts_partial;
250
251 /* Check lower bits of current cycle counter against the timestamp.
252 * If the current cycle counter is lower than the partial timestamp,
253 * then wraparound surely occurred and must be accounted for.
254 */
255 if ((now & partial_tstamp_mask) <= ts_partial)
256 ts_reconstructed -= (partial_tstamp_mask + 1);
257
258 return ts_reconstructed;
259 }
260
261 /* Reads the SPI interface for an egress timestamp generated by the switch
262 * for frames sent using management routes.
263 *
264 * SJA1105 E/T layout of the 4-byte SPI payload:
265 *
266 * 31 23 15 7 0
267 * | | | | |
268 * +-----+-----+-----+ ^
269 * ^ |
270 * | |
271 * 24-bit timestamp Update bit
272 *
273 *
274 * SJA1105 P/Q/R/S layout of the 8-byte SPI payload:
275 *
276 * 31 23 15 7 0 63 55 47 39 32
277 * | | | | | | | | | |
278 * ^ +-----+-----+-----+-----+
279 * | ^
280 * | |
281 * Update bit 32-bit timestamp
282 *
283 * Notice that the update bit is in the same place.
284 * To have common code for E/T and P/Q/R/S for reading the timestamp,
285 * we need to juggle with the offset and the bit indices.
286 */
287 static int sja1105_ptpegr_ts_poll(struct dsa_switch *ds, int port, u64 *ts)
288 {
289 struct sja1105_private *priv = ds->priv;
290 const struct sja1105_regs *regs = priv->info->regs;
291 int tstamp_bit_start, tstamp_bit_end;
292 int timeout = 10;
293 u8 packed_buf[8];
294 u64 update;
295 int rc;
296
297 do {
298 rc = sja1105_xfer_buf(priv, SPI_READ, regs->ptpegr_ts[port],
299 packed_buf, priv->info->ptpegr_ts_bytes);
300 if (rc < 0)
301 return rc;
302
303 sja1105_unpack(packed_buf, &update, 0, 0,
304 priv->info->ptpegr_ts_bytes);
305 if (update)
306 break;
307
308 usleep_range(10, 50);
309 } while (--timeout);
310
311 if (!timeout)
312 return -ETIMEDOUT;
313
314 /* Point the end bit to the second 32-bit word on P/Q/R/S,
315 * no-op on E/T.
316 */
317 tstamp_bit_end = (priv->info->ptpegr_ts_bytes - 4) * 8;
318 /* Shift the 24-bit timestamp on E/T to be collected from 31:8.
319 * No-op on P/Q/R/S.
320 */
321 tstamp_bit_end += 32 - priv->info->ptp_ts_bits;
322 tstamp_bit_start = tstamp_bit_end + priv->info->ptp_ts_bits - 1;
323
324 *ts = 0;
325
326 sja1105_unpack(packed_buf, ts, tstamp_bit_start, tstamp_bit_end,
327 priv->info->ptpegr_ts_bytes);
328
329 return 0;
330 }
331
332 /* Caller must hold ptp_data->lock */
333 static int sja1105_ptpclkval_read(struct sja1105_private *priv, u64 *ticks,
334 struct ptp_system_timestamp *ptp_sts)
335 {
336 const struct sja1105_regs *regs = priv->info->regs;
337
338 return sja1105_xfer_u64(priv, SPI_READ, regs->ptpclkval, ticks,
339 ptp_sts);
340 }
341
342 /* Caller must hold ptp_data->lock */
343 static int sja1105_ptpclkval_write(struct sja1105_private *priv, u64 ticks,
344 struct ptp_system_timestamp *ptp_sts)
345 {
346 const struct sja1105_regs *regs = priv->info->regs;
347
348 return sja1105_xfer_u64(priv, SPI_WRITE, regs->ptpclkval, &ticks,
349 ptp_sts);
350 }
351
352 static long sja1105_rxtstamp_work(struct ptp_clock_info *ptp)
353 {
354 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
355 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
356 struct dsa_switch *ds = priv->ds;
357 struct sk_buff *skb;
358
359 mutex_lock(&ptp_data->lock);
360
361 while ((skb = skb_dequeue(&ptp_data->skb_rxtstamp_queue)) != NULL) {
362 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
363 u64 ticks, ts;
364 int rc;
365
366 rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
367 if (rc < 0) {
368 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
369 kfree_skb(skb);
370 continue;
371 }
372
373 *shwt = (struct skb_shared_hwtstamps) {0};
374
375 ts = SJA1105_SKB_CB(skb)->meta_tstamp;
376 ts = sja1105_tstamp_reconstruct(ds, ticks, ts);
377
378 shwt->hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
379 netif_rx_ni(skb);
380 }
381
382 mutex_unlock(&ptp_data->lock);
383
384 /* Don't restart */
385 return -1;
386 }
387
388 /* Called from dsa_skb_defer_rx_timestamp */
389 bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,
390 struct sk_buff *skb, unsigned int type)
391 {
392 struct sja1105_private *priv = ds->priv;
393 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
394
395 if (!test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state))
396 return false;
397
398 /* We need to read the full PTP clock to reconstruct the Rx
399 * timestamp. For that we need a sleepable context.
400 */
401 skb_queue_tail(&ptp_data->skb_rxtstamp_queue, skb);
402 ptp_schedule_worker(ptp_data->clock, 0);
403 return true;
404 }
405
406 /* Called from dsa_skb_tx_timestamp. This callback is just to make DSA clone
407 * the skb and have it available in DSA_SKB_CB in the .port_deferred_xmit
408 * callback, where we will timestamp it synchronously.
409 */
410 bool sja1105_port_txtstamp(struct dsa_switch *ds, int port,
411 struct sk_buff *skb, unsigned int type)
412 {
413 struct sja1105_private *priv = ds->priv;
414 struct sja1105_port *sp = &priv->ports[port];
415
416 if (!sp->hwts_tx_en)
417 return false;
418
419 return true;
420 }
421
422 static int sja1105_ptp_reset(struct dsa_switch *ds)
423 {
424 struct sja1105_private *priv = ds->priv;
425 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
426 struct sja1105_ptp_cmd cmd = ptp_data->cmd;
427 int rc;
428
429 mutex_lock(&ptp_data->lock);
430
431 cmd.resptp = 1;
432
433 dev_dbg(ds->dev, "Resetting PTP clock\n");
434 rc = sja1105_ptp_commit(ds, &cmd, SPI_WRITE);
435
436 sja1105_tas_clockstep(priv->ds);
437
438 mutex_unlock(&ptp_data->lock);
439
440 return rc;
441 }
442
443 /* Caller must hold ptp_data->lock */
444 int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,
445 struct ptp_system_timestamp *ptp_sts)
446 {
447 struct sja1105_private *priv = ds->priv;
448 u64 ticks;
449 int rc;
450
451 rc = sja1105_ptpclkval_read(priv, &ticks, ptp_sts);
452 if (rc < 0) {
453 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
454 return rc;
455 }
456
457 *ns = sja1105_ticks_to_ns(ticks);
458
459 return 0;
460 }
461
462 static int sja1105_ptp_gettimex(struct ptp_clock_info *ptp,
463 struct timespec64 *ts,
464 struct ptp_system_timestamp *ptp_sts)
465 {
466 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
467 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
468 u64 now = 0;
469 int rc;
470
471 mutex_lock(&ptp_data->lock);
472
473 rc = __sja1105_ptp_gettimex(priv->ds, &now, ptp_sts);
474 *ts = ns_to_timespec64(now);
475
476 mutex_unlock(&ptp_data->lock);
477
478 return rc;
479 }
480
481 /* Caller must hold ptp_data->lock */
482 static int sja1105_ptp_mode_set(struct sja1105_private *priv,
483 enum sja1105_ptp_clk_mode mode)
484 {
485 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
486
487 if (ptp_data->cmd.ptpclkadd == mode)
488 return 0;
489
490 ptp_data->cmd.ptpclkadd = mode;
491
492 return sja1105_ptp_commit(priv->ds, &ptp_data->cmd, SPI_WRITE);
493 }
494
495 /* Write to PTPCLKVAL while PTPCLKADD is 0 */
496 int __sja1105_ptp_settime(struct dsa_switch *ds, u64 ns,
497 struct ptp_system_timestamp *ptp_sts)
498 {
499 struct sja1105_private *priv = ds->priv;
500 u64 ticks = ns_to_sja1105_ticks(ns);
501 int rc;
502
503 rc = sja1105_ptp_mode_set(priv, PTP_SET_MODE);
504 if (rc < 0) {
505 dev_err(priv->ds->dev, "Failed to put PTPCLK in set mode\n");
506 return rc;
507 }
508
509 rc = sja1105_ptpclkval_write(priv, ticks, ptp_sts);
510
511 sja1105_tas_clockstep(priv->ds);
512
513 return rc;
514 }
515
516 static int sja1105_ptp_settime(struct ptp_clock_info *ptp,
517 const struct timespec64 *ts)
518 {
519 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
520 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
521 u64 ns = timespec64_to_ns(ts);
522 int rc;
523
524 mutex_lock(&ptp_data->lock);
525
526 rc = __sja1105_ptp_settime(priv->ds, ns, NULL);
527
528 mutex_unlock(&ptp_data->lock);
529
530 return rc;
531 }
532
533 static int sja1105_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
534 {
535 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
536 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
537 const struct sja1105_regs *regs = priv->info->regs;
538 u32 clkrate32;
539 s64 clkrate;
540 int rc;
541
542 clkrate = (s64)scaled_ppm * SJA1105_CC_MULT_NUM;
543 clkrate = div_s64(clkrate, SJA1105_CC_MULT_DEM);
544
545 /* Take a +/- value and re-center it around 2^31. */
546 clkrate = SJA1105_CC_MULT + clkrate;
547 WARN_ON(abs(clkrate) >= GENMASK_ULL(31, 0));
548 clkrate32 = clkrate;
549
550 mutex_lock(&ptp_data->lock);
551
552 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkrate, &clkrate32,
553 NULL);
554
555 sja1105_tas_adjfreq(priv->ds);
556
557 mutex_unlock(&ptp_data->lock);
558
559 return rc;
560 }
561
562 /* Write to PTPCLKVAL while PTPCLKADD is 1 */
563 int __sja1105_ptp_adjtime(struct dsa_switch *ds, s64 delta)
564 {
565 struct sja1105_private *priv = ds->priv;
566 s64 ticks = ns_to_sja1105_ticks(delta);
567 int rc;
568
569 rc = sja1105_ptp_mode_set(priv, PTP_ADD_MODE);
570 if (rc < 0) {
571 dev_err(priv->ds->dev, "Failed to put PTPCLK in add mode\n");
572 return rc;
573 }
574
575 rc = sja1105_ptpclkval_write(priv, ticks, NULL);
576
577 sja1105_tas_clockstep(priv->ds);
578
579 return rc;
580 }
581
582 static int sja1105_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
583 {
584 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
585 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
586 int rc;
587
588 mutex_lock(&ptp_data->lock);
589
590 rc = __sja1105_ptp_adjtime(priv->ds, delta);
591
592 mutex_unlock(&ptp_data->lock);
593
594 return rc;
595 }
596
597 static void sja1105_ptp_extts_work(struct work_struct *work)
598 {
599 struct delayed_work *dw = to_delayed_work(work);
600 struct sja1105_ptp_data *ptp_data = extts_to_data(dw);
601 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
602 const struct sja1105_regs *regs = priv->info->regs;
603 struct ptp_clock_event event;
604 u64 ptpsyncts = 0;
605 int rc;
606
607 mutex_lock(&ptp_data->lock);
608
609 rc = sja1105_xfer_u64(priv, SPI_READ, regs->ptpsyncts, &ptpsyncts,
610 NULL);
611 if (rc < 0)
612 dev_err_ratelimited(priv->ds->dev,
613 "Failed to read PTPSYNCTS: %d\n", rc);
614
615 if (ptpsyncts && ptp_data->ptpsyncts != ptpsyncts) {
616 event.index = 0;
617 event.type = PTP_CLOCK_EXTTS;
618 event.timestamp = ns_to_ktime(sja1105_ticks_to_ns(ptpsyncts));
619 ptp_clock_event(ptp_data->clock, &event);
620
621 ptp_data->ptpsyncts = ptpsyncts;
622 }
623
624 mutex_unlock(&ptp_data->lock);
625
626 schedule_delayed_work(&ptp_data->extts_work, SJA1105_EXTTS_INTERVAL);
627 }
628
629 static int sja1105_change_ptp_clk_pin_func(struct sja1105_private *priv,
630 enum ptp_pin_function func)
631 {
632 struct sja1105_avb_params_entry *avb;
633 enum ptp_pin_function old_func;
634
635 avb = priv->static_config.tables[BLK_IDX_AVB_PARAMS].entries;
636
637 if (priv->info->device_id == SJA1105E_DEVICE_ID ||
638 priv->info->device_id == SJA1105T_DEVICE_ID ||
639 avb->cas_master)
640 old_func = PTP_PF_PEROUT;
641 else
642 old_func = PTP_PF_EXTTS;
643
644 if (func == old_func)
645 return 0;
646
647 avb->cas_master = (func == PTP_PF_PEROUT);
648
649 return sja1105_dynamic_config_write(priv, BLK_IDX_AVB_PARAMS, 0, avb,
650 true);
651 }
652
653 /* The PTP_CLK pin may be configured to toggle with a 50% duty cycle and a
654 * frequency f:
655 *
656 * NSEC_PER_SEC
657 * f = ----------------------
658 * (PTPPINDUR * 8 ns) * 2
659 */
660 static int sja1105_per_out_enable(struct sja1105_private *priv,
661 struct ptp_perout_request *perout,
662 bool on)
663 {
664 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
665 const struct sja1105_regs *regs = priv->info->regs;
666 struct sja1105_ptp_cmd cmd = ptp_data->cmd;
667 int rc;
668
669 /* We only support one channel */
670 if (perout->index != 0)
671 return -EOPNOTSUPP;
672
673 /* Reject requests with unsupported flags */
674 if (perout->flags)
675 return -EOPNOTSUPP;
676
677 mutex_lock(&ptp_data->lock);
678
679 rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_PEROUT);
680 if (rc)
681 goto out;
682
683 if (on) {
684 struct timespec64 pin_duration_ts = {
685 .tv_sec = perout->period.sec,
686 .tv_nsec = perout->period.nsec,
687 };
688 struct timespec64 pin_start_ts = {
689 .tv_sec = perout->start.sec,
690 .tv_nsec = perout->start.nsec,
691 };
692 u64 pin_duration = timespec64_to_ns(&pin_duration_ts);
693 u64 pin_start = timespec64_to_ns(&pin_start_ts);
694 u32 pin_duration32;
695 u64 now;
696
697 /* ptppindur: 32 bit register which holds the interval between
698 * 2 edges on PTP_CLK. So check for truncation which happens
699 * at periods larger than around 68.7 seconds.
700 */
701 pin_duration = ns_to_sja1105_ticks(pin_duration / 2);
702 if (pin_duration > U32_MAX) {
703 rc = -ERANGE;
704 goto out;
705 }
706 pin_duration32 = pin_duration;
707
708 /* ptppins: 64 bit register which needs to hold a PTP time
709 * larger than the current time, otherwise the startptpcp
710 * command won't do anything. So advance the current time
711 * by a number of periods in a way that won't alter the
712 * phase offset.
713 */
714 rc = __sja1105_ptp_gettimex(priv->ds, &now, NULL);
715 if (rc < 0)
716 goto out;
717
718 pin_start = future_base_time(pin_start, pin_duration,
719 now + 1ull * NSEC_PER_SEC);
720 pin_start = ns_to_sja1105_ticks(pin_start);
721
722 rc = sja1105_xfer_u64(priv, SPI_WRITE, regs->ptppinst,
723 &pin_start, NULL);
724 if (rc < 0)
725 goto out;
726
727 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptppindur,
728 &pin_duration32, NULL);
729 if (rc < 0)
730 goto out;
731 }
732
733 if (on)
734 cmd.startptpcp = true;
735 else
736 cmd.stopptpcp = true;
737
738 rc = sja1105_ptp_commit(priv->ds, &cmd, SPI_WRITE);
739
740 out:
741 mutex_unlock(&ptp_data->lock);
742
743 return rc;
744 }
745
746 static int sja1105_extts_enable(struct sja1105_private *priv,
747 struct ptp_extts_request *extts,
748 bool on)
749 {
750 int rc;
751
752 /* We only support one channel */
753 if (extts->index != 0)
754 return -EOPNOTSUPP;
755
756 /* Reject requests with unsupported flags */
757 if (extts->flags)
758 return -EOPNOTSUPP;
759
760 rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_EXTTS);
761 if (rc)
762 return rc;
763
764 if (on)
765 schedule_delayed_work(&priv->ptp_data.extts_work,
766 SJA1105_EXTTS_INTERVAL);
767 else
768 cancel_delayed_work_sync(&priv->ptp_data.extts_work);
769
770 return 0;
771 }
772
773 static int sja1105_ptp_enable(struct ptp_clock_info *ptp,
774 struct ptp_clock_request *req, int on)
775 {
776 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
777 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
778 int rc = -EOPNOTSUPP;
779
780 if (req->type == PTP_CLK_REQ_PEROUT)
781 rc = sja1105_per_out_enable(priv, &req->perout, on);
782 else if (req->type == PTP_CLK_REQ_EXTTS)
783 rc = sja1105_extts_enable(priv, &req->extts, on);
784
785 return rc;
786 }
787
788 static int sja1105_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
789 enum ptp_pin_function func, unsigned int chan)
790 {
791 struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
792 struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
793
794 if (chan != 0 || pin != 0)
795 return -1;
796
797 switch (func) {
798 case PTP_PF_NONE:
799 case PTP_PF_PEROUT:
800 break;
801 case PTP_PF_EXTTS:
802 if (priv->info->device_id == SJA1105E_DEVICE_ID ||
803 priv->info->device_id == SJA1105T_DEVICE_ID)
804 return -1;
805 break;
806 default:
807 return -1;
808 }
809 return 0;
810 }
811
812 static struct ptp_pin_desc sja1105_ptp_pin = {
813 .name = "ptp_clk",
814 .index = 0,
815 .func = PTP_PF_NONE,
816 };
817
818 int sja1105_ptp_clock_register(struct dsa_switch *ds)
819 {
820 struct sja1105_private *priv = ds->priv;
821 struct sja1105_tagger_data *tagger_data = &priv->tagger_data;
822 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
823
824 ptp_data->caps = (struct ptp_clock_info) {
825 .owner = THIS_MODULE,
826 .name = "SJA1105 PHC",
827 .adjfine = sja1105_ptp_adjfine,
828 .adjtime = sja1105_ptp_adjtime,
829 .gettimex64 = sja1105_ptp_gettimex,
830 .settime64 = sja1105_ptp_settime,
831 .enable = sja1105_ptp_enable,
832 .verify = sja1105_ptp_verify_pin,
833 .do_aux_work = sja1105_rxtstamp_work,
834 .max_adj = SJA1105_MAX_ADJ_PPB,
835 .pin_config = &sja1105_ptp_pin,
836 .n_pins = 1,
837 .n_ext_ts = 1,
838 .n_per_out = 1,
839 };
840
841 skb_queue_head_init(&ptp_data->skb_rxtstamp_queue);
842 spin_lock_init(&tagger_data->meta_lock);
843
844 ptp_data->clock = ptp_clock_register(&ptp_data->caps, ds->dev);
845 if (IS_ERR_OR_NULL(ptp_data->clock))
846 return PTR_ERR(ptp_data->clock);
847
848 ptp_data->cmd.corrclk4ts = true;
849 ptp_data->cmd.ptpclkadd = PTP_SET_MODE;
850
851 INIT_DELAYED_WORK(&ptp_data->extts_work, sja1105_ptp_extts_work);
852
853 return sja1105_ptp_reset(ds);
854 }
855
856 void sja1105_ptp_clock_unregister(struct dsa_switch *ds)
857 {
858 struct sja1105_private *priv = ds->priv;
859 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
860
861 if (IS_ERR_OR_NULL(ptp_data->clock))
862 return;
863
864 cancel_delayed_work_sync(&ptp_data->extts_work);
865 ptp_cancel_worker_sync(ptp_data->clock);
866 skb_queue_purge(&ptp_data->skb_rxtstamp_queue);
867 ptp_clock_unregister(ptp_data->clock);
868 ptp_data->clock = NULL;
869 }
870
871 void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int port,
872 struct sk_buff *skb)
873 {
874 struct sja1105_private *priv = ds->priv;
875 struct sja1105_ptp_data *ptp_data = &priv->ptp_data;
876 struct skb_shared_hwtstamps shwt = {0};
877 u64 ticks, ts;
878 int rc;
879
880 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
881
882 mutex_lock(&ptp_data->lock);
883
884 rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
885 if (rc < 0) {
886 dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
887 kfree_skb(skb);
888 goto out;
889 }
890
891 rc = sja1105_ptpegr_ts_poll(ds, port, &ts);
892 if (rc < 0) {
893 dev_err(ds->dev, "timed out polling for tstamp\n");
894 kfree_skb(skb);
895 goto out;
896 }
897
898 ts = sja1105_tstamp_reconstruct(ds, ticks, ts);
899
900 shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));
901 skb_complete_tx_timestamp(skb, &shwt);
902
903 out:
904 mutex_unlock(&ptp_data->lock);
905 }