drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c

   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2016 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2016 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116
 117 #include <linux/module.h>
 118 #include <linux/kmod.h>
 119 #include <linux/mdio.h>
 120 #include <linux/phy.h>
 121
 122 #include "xgbe.h"
 123 #include "xgbe-common.h"
 124
 125 #define XGBE_PHY_PORT_SPEED_100         BIT(0)
 126 #define XGBE_PHY_PORT_SPEED_1000        BIT(1)
 127 #define XGBE_PHY_PORT_SPEED_2500        BIT(2)
 128 #define XGBE_PHY_PORT_SPEED_10000       BIT(3)
 129
 130 /* Rate-change complete wait/retry count */
 131 #define XGBE_RATECHANGE_COUNT           500
 132
 133 enum xgbe_port_mode {
 134         XGBE_PORT_MODE_RSVD = 0,
 135         XGBE_PORT_MODE_BACKPLANE,
 136         XGBE_PORT_MODE_BACKPLANE_2500,
 137         XGBE_PORT_MODE_1000BASE_T,
 138         XGBE_PORT_MODE_1000BASE_X,
 139         XGBE_PORT_MODE_NBASE_T,
 140         XGBE_PORT_MODE_10GBASE_T,
 141         XGBE_PORT_MODE_10GBASE_R,
 142         XGBE_PORT_MODE_SFP,
 143         XGBE_PORT_MODE_MAX,
 144 };
 145
 146 enum xgbe_conn_type {
 147         XGBE_CONN_TYPE_NONE = 0,
 148         XGBE_CONN_TYPE_SFP,
 149         XGBE_CONN_TYPE_MDIO,
 150         XGBE_CONN_TYPE_BACKPLANE,
 151         XGBE_CONN_TYPE_MAX,
 152 };
 153
 154 /* PHY related configuration information */
 155 struct xgbe_phy_data {
 156         enum xgbe_port_mode port_mode;
 157
 158         unsigned int port_id;
 159
 160         unsigned int port_speeds;
 161
 162         enum xgbe_conn_type conn_type;
 163
 164         enum xgbe_mode cur_mode;
 165         enum xgbe_mode start_mode;
 166
 167         unsigned int rrc_count;
 168 };
 169
 170 static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)
 171 {
 172         enum xgbe_mode mode;
 173         unsigned int ad_reg, lp_reg;
 174
 175         pdata->phy.lp_advertising |= ADVERTISED_Autoneg;
 176         pdata->phy.lp_advertising |= ADVERTISED_Backplane;
 177
 178         /* Compare Advertisement and Link Partner register 1 */
 179         ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
 180         lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);
 181         if (lp_reg & 0x400)
 182                 pdata->phy.lp_advertising |= ADVERTISED_Pause;
 183         if (lp_reg & 0x800)
 184                 pdata->phy.lp_advertising |= ADVERTISED_Asym_Pause;
 185
 186         if (pdata->phy.pause_autoneg) {
 187                 /* Set flow control based on auto-negotiation result */
 188                 pdata->phy.tx_pause = 0;
 189                 pdata->phy.rx_pause = 0;
 190
 191                 if (ad_reg & lp_reg & 0x400) {
 192                         pdata->phy.tx_pause = 1;
 193                         pdata->phy.rx_pause = 1;
 194                 } else if (ad_reg & lp_reg & 0x800) {
 195                         if (ad_reg & 0x400)
 196                                 pdata->phy.rx_pause = 1;
 197                         else if (lp_reg & 0x400)
 198                                 pdata->phy.tx_pause = 1;
 199                 }
 200         }
 201
 202         /* Compare Advertisement and Link Partner register 2 */
 203         ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
 204         lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);
 205         if (lp_reg & 0x80)
 206                 pdata->phy.lp_advertising |= ADVERTISED_10000baseKR_Full;
 207         if (lp_reg & 0x20)
 208                 pdata->phy.lp_advertising |= ADVERTISED_1000baseKX_Full;
 209
 210         ad_reg &= lp_reg;
 211         if (ad_reg & 0x80)
 212                 mode = XGBE_MODE_KR;
 213         else if (ad_reg & 0x20)
 214                 mode = XGBE_MODE_KX_1000;
 215         else
 216                 mode = XGBE_MODE_UNKNOWN;
 217
 218         /* Compare Advertisement and Link Partner register 3 */
 219         ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
 220         lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);
 221         if (lp_reg & 0xc000)
 222                 pdata->phy.lp_advertising |= ADVERTISED_10000baseR_FEC;
 223
 224         return mode;
 225 }
 226
 227 static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)
 228 {
 229         struct xgbe_phy_data *phy_data = pdata->phy_data;
 230
 231         switch (phy_data->port_mode) {
 232         case XGBE_PORT_MODE_BACKPLANE:
 233                 return XGBE_AN_MODE_CL73;
 234         case XGBE_PORT_MODE_BACKPLANE_2500:
 235                 return XGBE_AN_MODE_NONE;
 236         case XGBE_PORT_MODE_1000BASE_T:
 237         case XGBE_PORT_MODE_1000BASE_X:
 238         case XGBE_PORT_MODE_NBASE_T:
 239         case XGBE_PORT_MODE_10GBASE_T:
 240         case XGBE_PORT_MODE_10GBASE_R:
 241         case XGBE_PORT_MODE_SFP:
 242         default:
 243                 return XGBE_AN_MODE_NONE;
 244         }
 245 }
 246
 247 static void xgbe_phy_start_ratechange(struct xgbe_prv_data *pdata)
 248 {
 249         if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
 250                 return;
 251
 252         /* Log if a previous command did not complete */
 253         netif_dbg(pdata, link, pdata->netdev,
 254                   "firmware mailbox not ready for command\n");
 255 }
 256
 257 static void xgbe_phy_complete_ratechange(struct xgbe_prv_data *pdata)
 258 {
 259         unsigned int wait;
 260
 261         /* Wait for command to complete */
 262         wait = XGBE_RATECHANGE_COUNT;
 263         while (wait--) {
 264                 if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
 265                         return;
 266
 267                 usleep_range(1000, 2000);
 268         }
 269
 270         netif_dbg(pdata, link, pdata->netdev,
 271                   "firmware mailbox command did not complete\n");
 272 }
 273
 274 static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)
 275 {
 276         unsigned int s0;
 277
 278         xgbe_phy_start_ratechange(pdata);
 279
 280         /* Receiver Reset Cycle */
 281         s0 = 0;
 282         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 5);
 283         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
 284
 285         /* Call FW to make the change */
 286         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
 287         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
 288         XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
 289
 290         xgbe_phy_complete_ratechange(pdata);
 291
 292         netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n");
 293 }
 294
 295 static void xgbe_phy_power_off(struct xgbe_prv_data *pdata)
 296 {
 297         struct xgbe_phy_data *phy_data = pdata->phy_data;
 298
 299         xgbe_phy_start_ratechange(pdata);
 300
 301         /* Call FW to make the change */
 302         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, 0);
 303         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
 304         XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
 305
 306         xgbe_phy_complete_ratechange(pdata);
 307
 308         phy_data->cur_mode = XGBE_MODE_UNKNOWN;
 309
 310         netif_dbg(pdata, link, pdata->netdev, "phy powered off\n");
 311 }
 312
 313 static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)
 314 {
 315         struct xgbe_phy_data *phy_data = pdata->phy_data;
 316         unsigned int s0;
 317
 318         xgbe_phy_start_ratechange(pdata);
 319
 320         /* 10G/KR */
 321         s0 = 0;
 322         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 4);
 323         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
 324
 325         /* Call FW to make the change */
 326         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
 327         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
 328         XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
 329
 330         xgbe_phy_complete_ratechange(pdata);
 331
 332         phy_data->cur_mode = XGBE_MODE_KR;
 333
 334         netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n");
 335 }
 336
 337 static void xgbe_phy_kx_2500_mode(struct xgbe_prv_data *pdata)
 338 {
 339         struct xgbe_phy_data *phy_data = pdata->phy_data;
 340         unsigned int s0;
 341
 342         xgbe_phy_start_ratechange(pdata);
 343
 344         /* 2.5G/KX */
 345         s0 = 0;
 346         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 2);
 347         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
 348
 349         /* Call FW to make the change */
 350         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
 351         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
 352         XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
 353
 354         xgbe_phy_complete_ratechange(pdata);
 355
 356         phy_data->cur_mode = XGBE_MODE_KX_2500;
 357
 358         netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n");
 359 }
 360
 361 static void xgbe_phy_kx_1000_mode(struct xgbe_prv_data *pdata)
 362 {
 363         struct xgbe_phy_data *phy_data = pdata->phy_data;
 364         unsigned int s0;
 365
 366         xgbe_phy_start_ratechange(pdata);
 367
 368         /* 1G/KX */
 369         s0 = 0;
 370         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 1);
 371         XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 3);
 372
 373         /* Call FW to make the change */
 374         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
 375         XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
 376         XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
 377
 378         xgbe_phy_complete_ratechange(pdata);
 379
 380         phy_data->cur_mode = XGBE_MODE_KX_1000;
 381
 382         netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n");
 383 }
 384
 385 static enum xgbe_mode xgbe_phy_cur_mode(struct xgbe_prv_data *pdata)
 386 {
 387         struct xgbe_phy_data *phy_data = pdata->phy_data;
 388
 389         return phy_data->cur_mode;
 390 }
 391
 392 static enum xgbe_mode xgbe_phy_switch_bp_2500_mode(struct xgbe_prv_data *pdata)
 393 {
 394         return XGBE_MODE_KX_2500;
 395 }
 396
 397 static enum xgbe_mode xgbe_phy_switch_bp_mode(struct xgbe_prv_data *pdata)
 398 {
 399         /* If we are in KR switch to KX, and vice-versa */
 400         switch (xgbe_phy_cur_mode(pdata)) {
 401         case XGBE_MODE_KX_1000:
 402                 return XGBE_MODE_KR;
 403         case XGBE_MODE_KR:
 404         default:
 405                 return XGBE_MODE_KX_1000;
 406         }
 407 }
 408
 409 static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata)
 410 {
 411         struct xgbe_phy_data *phy_data = pdata->phy_data;
 412
 413         switch (phy_data->port_mode) {
 414         case XGBE_PORT_MODE_BACKPLANE:
 415                 return xgbe_phy_switch_bp_mode(pdata);
 416         case XGBE_PORT_MODE_BACKPLANE_2500:
 417                 return xgbe_phy_switch_bp_2500_mode(pdata);
 418         case XGBE_PORT_MODE_1000BASE_T:
 419         case XGBE_PORT_MODE_1000BASE_X:
 420         case XGBE_PORT_MODE_NBASE_T:
 421         case XGBE_PORT_MODE_10GBASE_T:
 422         case XGBE_PORT_MODE_10GBASE_R:
 423         case XGBE_PORT_MODE_SFP:
 424         default:
 425                 return XGBE_MODE_UNKNOWN;
 426         }
 427 }
 428
 429 static enum xgbe_mode xgbe_phy_get_bp_2500_mode(int speed)
 430 {
 431         switch (speed) {
 432         case SPEED_2500:
 433                 return XGBE_MODE_KX_2500;
 434         default:
 435                 return XGBE_MODE_UNKNOWN;
 436         }
 437 }
 438
 439 static enum xgbe_mode xgbe_phy_get_bp_mode(int speed)
 440 {
 441         switch (speed) {
 442         case SPEED_1000:
 443                 return XGBE_MODE_KX_1000;
 444         case SPEED_10000:
 445                 return XGBE_MODE_KR;
 446         default:
 447                 return XGBE_MODE_UNKNOWN;
 448         }
 449 }
 450
 451 static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata,
 452                                         int speed)
 453 {
 454         struct xgbe_phy_data *phy_data = pdata->phy_data;
 455
 456         switch (phy_data->port_mode) {
 457         case XGBE_PORT_MODE_BACKPLANE:
 458                 return xgbe_phy_get_bp_mode(speed);
 459         case XGBE_PORT_MODE_BACKPLANE_2500:
 460                 return xgbe_phy_get_bp_2500_mode(speed);
 461         case XGBE_PORT_MODE_1000BASE_T:
 462         case XGBE_PORT_MODE_1000BASE_X:
 463         case XGBE_PORT_MODE_NBASE_T:
 464         case XGBE_PORT_MODE_10GBASE_T:
 465         case XGBE_PORT_MODE_10GBASE_R:
 466         case XGBE_PORT_MODE_SFP:
 467         default:
 468                 return XGBE_MODE_UNKNOWN;
 469         }
 470 }
 471
 472 static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
 473 {
 474         switch (mode) {
 475         case XGBE_MODE_KX_1000:
 476                 xgbe_phy_kx_1000_mode(pdata);
 477                 break;
 478         case XGBE_MODE_KX_2500:
 479                 xgbe_phy_kx_2500_mode(pdata);
 480                 break;
 481         case XGBE_MODE_KR:
 482                 xgbe_phy_kr_mode(pdata);
 483                 break;
 484         default:
 485                 break;
 486         }
 487 }
 488
 489 static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata,
 490                                 enum xgbe_mode mode, u32 advert)
 491 {
 492         if (pdata->phy.autoneg == AUTONEG_ENABLE) {
 493                 if (pdata->phy.advertising & advert)
 494                         return true;
 495         } else {
 496                 enum xgbe_mode cur_mode;
 497
 498                 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed);
 499                 if (cur_mode == mode)
 500                         return true;
 501         }
 502
 503         return false;
 504 }
 505
 506 static bool xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata,
 507                                       enum xgbe_mode mode)
 508 {
 509         switch (mode) {
 510         case XGBE_MODE_KX_2500:
 511                 return xgbe_phy_check_mode(pdata, mode,
 512                                            ADVERTISED_2500baseX_Full);
 513         default:
 514                 return false;
 515         }
 516 }
 517
 518 static bool xgbe_phy_use_bp_mode(struct xgbe_prv_data *pdata,
 519                                  enum xgbe_mode mode)
 520 {
 521         switch (mode) {
 522         case XGBE_MODE_KX_1000:
 523                 return xgbe_phy_check_mode(pdata, mode,
 524                                            ADVERTISED_1000baseKX_Full);
 525         case XGBE_MODE_KR:
 526                 return xgbe_phy_check_mode(pdata, mode,
 527                                            ADVERTISED_10000baseKR_Full);
 528         default:
 529                 return false;
 530         }
 531 }
 532
 533 static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
 534 {
 535         struct xgbe_phy_data *phy_data = pdata->phy_data;
 536
 537         switch (phy_data->port_mode) {
 538         case XGBE_PORT_MODE_BACKPLANE:
 539                 return xgbe_phy_use_bp_mode(pdata, mode);
 540         case XGBE_PORT_MODE_BACKPLANE_2500:
 541                 return xgbe_phy_use_bp_2500_mode(pdata, mode);
 542         case XGBE_PORT_MODE_1000BASE_T:
 543         case XGBE_PORT_MODE_1000BASE_X:
 544         case XGBE_PORT_MODE_NBASE_T:
 545         case XGBE_PORT_MODE_10GBASE_T:
 546         case XGBE_PORT_MODE_10GBASE_R:
 547         case XGBE_PORT_MODE_SFP:
 548         default:
 549                 return false;
 550         }
 551 }
 552
 553 static bool xgbe_phy_valid_speed_bp_2500_mode(int speed)
 554 {
 555         switch (speed) {
 556         case SPEED_2500:
 557                 return true;
 558         default:
 559                 return false;
 560         }
 561 }
 562
 563 static bool xgbe_phy_valid_speed_bp_mode(int speed)
 564 {
 565         switch (speed) {
 566         case SPEED_1000:
 567         case SPEED_10000:
 568                 return true;
 569         default:
 570                 return false;
 571         }
 572 }
 573
 574 static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
 575 {
 576         struct xgbe_phy_data *phy_data = pdata->phy_data;
 577
 578         switch (phy_data->port_mode) {
 579         case XGBE_PORT_MODE_BACKPLANE:
 580                 return xgbe_phy_valid_speed_bp_mode(speed);
 581         case XGBE_PORT_MODE_BACKPLANE_2500:
 582                 return xgbe_phy_valid_speed_bp_2500_mode(speed);
 583         case XGBE_PORT_MODE_1000BASE_T:
 584         case XGBE_PORT_MODE_1000BASE_X:
 585         case XGBE_PORT_MODE_NBASE_T:
 586         case XGBE_PORT_MODE_10GBASE_T:
 587         case XGBE_PORT_MODE_10GBASE_R:
 588         case XGBE_PORT_MODE_SFP:
 589         default:
 590                 return false;
 591         }
 592 }
 593
 594 static int xgbe_phy_link_status(struct xgbe_prv_data *pdata)
 595 {
 596         struct xgbe_phy_data *phy_data = pdata->phy_data;
 597         unsigned int reg;
 598
 599         /* Link status is latched low, so read once to clear
 600          * and then read again to get current state
 601          */
 602         reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
 603         reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
 604         if (reg & MDIO_STAT1_LSTATUS)
 605                 return 1;
 606
 607         /* No link, attempt a receiver reset cycle */
 608         if (phy_data->rrc_count++) {
 609                 phy_data->rrc_count = 0;
 610                 xgbe_phy_rrc(pdata);
 611         }
 612
 613         return 0;
 614 }
 615
 616 static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata)
 617 {
 618         struct xgbe_phy_data *phy_data = pdata->phy_data;
 619
 620         switch (phy_data->port_mode) {
 621         case XGBE_PORT_MODE_BACKPLANE:
 622                 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
 623                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
 624                         return false;
 625                 break;
 626         case XGBE_PORT_MODE_BACKPLANE_2500:
 627                 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)
 628                         return false;
 629                 break;
 630         case XGBE_PORT_MODE_1000BASE_T:
 631                 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
 632                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000))
 633                         return false;
 634                 break;
 635         case XGBE_PORT_MODE_1000BASE_X:
 636                 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
 637                         return false;
 638                 break;
 639         case XGBE_PORT_MODE_NBASE_T:
 640                 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
 641                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
 642                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500))
 643                         return false;
 644                 break;
 645         case XGBE_PORT_MODE_10GBASE_T:
 646                 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
 647                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
 648                         return false;
 649                 break;
 650         case XGBE_PORT_MODE_10GBASE_R:
 651                 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)
 652                         return false;
 653                 break;
 654         case XGBE_PORT_MODE_SFP:
 655                 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
 656                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
 657                     (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
 658                         return false;
 659                 break;
 660         default:
 661                 break;
 662         }
 663
 664         return true;
 665 }
 666
 667 static bool xgbe_phy_conn_type_mismatch(struct xgbe_prv_data *pdata)
 668 {
 669         struct xgbe_phy_data *phy_data = pdata->phy_data;
 670
 671         switch (phy_data->port_mode) {
 672         case XGBE_PORT_MODE_BACKPLANE:
 673         case XGBE_PORT_MODE_BACKPLANE_2500:
 674                 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE)
 675                         return false;
 676                 break;
 677         case XGBE_PORT_MODE_1000BASE_T:
 678         case XGBE_PORT_MODE_1000BASE_X:
 679         case XGBE_PORT_MODE_NBASE_T:
 680         case XGBE_PORT_MODE_10GBASE_T:
 681         case XGBE_PORT_MODE_10GBASE_R:
 682                 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO)
 683                         return false;
 684                 break;
 685         case XGBE_PORT_MODE_SFP:
 686                 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
 687                         return false;
 688                 break;
 689         default:
 690                 break;
 691         }
 692
 693         return true;
 694 }
 695
 696 static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata)
 697 {
 698         unsigned int reg;
 699
 700         reg = XP_IOREAD(pdata, XP_PROP_0);
 701         if (!XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS))
 702                 return false;
 703         if (!XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE))
 704                 return false;
 705
 706         return true;
 707 }
 708
 709 static void xgbe_phy_stop(struct xgbe_prv_data *pdata)
 710 {
 711         /* Power off the PHY */
 712         xgbe_phy_power_off(pdata);
 713 }
 714
 715 static int xgbe_phy_start(struct xgbe_prv_data *pdata)
 716 {
 717         struct xgbe_phy_data *phy_data = pdata->phy_data;
 718
 719         /* Start in highest supported mode */
 720         xgbe_phy_set_mode(pdata, phy_data->start_mode);
 721
 722         return 0;
 723 }
 724
 725 static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
 726 {
 727         struct xgbe_phy_data *phy_data = pdata->phy_data;
 728         enum xgbe_mode cur_mode;
 729
 730         /* Reset by power cycling the PHY */
 731         cur_mode = phy_data->cur_mode;
 732         xgbe_phy_power_off(pdata);
 733         xgbe_phy_set_mode(pdata, cur_mode);
 734
 735         return 0;
 736 }
 737
 738 static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
 739 {
 740         /* Nothing uniquely required for exit */
 741 }
 742
 743 static int xgbe_phy_init(struct xgbe_prv_data *pdata)
 744 {
 745         struct xgbe_phy_data *phy_data;
 746         unsigned int reg;
 747
 748         /* Check if enabled */
 749         if (!xgbe_phy_port_enabled(pdata)) {
 750                 dev_info(pdata->dev, "device is not enabled\n");
 751                 return -ENODEV;
 752         }
 753
 754         phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL);
 755         if (!phy_data)
 756                 return -ENOMEM;
 757         pdata->phy_data = phy_data;
 758
 759         reg = XP_IOREAD(pdata, XP_PROP_0);
 760         phy_data->port_mode = XP_GET_BITS(reg, XP_PROP_0, PORT_MODE);
 761         phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID);
 762         phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS);
 763         phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE);
 764         if (netif_msg_probe(pdata)) {
 765                 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode);
 766                 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id);
 767                 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds);
 768                 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type);
 769         }
 770
 771         /* Validate the connection requested */
 772         if (xgbe_phy_conn_type_mismatch(pdata)) {
 773                 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n",
 774                         phy_data->port_mode, phy_data->conn_type);
 775         }
 776
 777         /* Validate the mode requested */
 778         if (xgbe_phy_port_mode_mismatch(pdata)) {
 779                 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n",
 780                         phy_data->port_mode, phy_data->port_speeds);
 781                 return -EINVAL;
 782         }
 783
 784         /* Indicate current mode is unknown */
 785         phy_data->cur_mode = XGBE_MODE_UNKNOWN;
 786
 787         /* Initialize supported features */
 788         pdata->phy.supported = 0;
 789
 790         switch (phy_data->port_mode) {
 791         case XGBE_PORT_MODE_BACKPLANE:
 792                 pdata->phy.supported |= SUPPORTED_Autoneg;
 793                 pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
 794                 pdata->phy.supported |= SUPPORTED_Backplane;
 795                 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
 796                         pdata->phy.supported |= SUPPORTED_1000baseKX_Full;
 797                         phy_data->start_mode = XGBE_MODE_KX_1000;
 798                 }
 799                 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) {
 800                         pdata->phy.supported |= SUPPORTED_10000baseKR_Full;
 801                         if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE)
 802                                 pdata->phy.supported |=
 803                                         SUPPORTED_10000baseR_FEC;
 804                         phy_data->start_mode = XGBE_MODE_KR;
 805                 }
 806                 break;
 807         case XGBE_PORT_MODE_BACKPLANE_2500:
 808                 pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
 809                 pdata->phy.supported |= SUPPORTED_Backplane;
 810                 pdata->phy.supported |= SUPPORTED_2500baseX_Full;
 811                 phy_data->start_mode = XGBE_MODE_KX_2500;
 812                 break;
 813         case XGBE_PORT_MODE_1000BASE_T:
 814         case XGBE_PORT_MODE_1000BASE_X:
 815         case XGBE_PORT_MODE_NBASE_T:
 816         case XGBE_PORT_MODE_10GBASE_T:
 817         case XGBE_PORT_MODE_10GBASE_R:
 818         case XGBE_PORT_MODE_SFP:
 819         default:
 820                 return -EINVAL;
 821         }
 822
 823         if (netif_msg_probe(pdata))
 824                 dev_dbg(pdata->dev, "phy supported=%#x\n",
 825                         pdata->phy.supported);
 826
 827         return 0;
 828 }
 829
 830 void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *phy_if)
 831 {
 832         struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl;
 833
 834         phy_impl->init                  = xgbe_phy_init;
 835         phy_impl->exit                  = xgbe_phy_exit;
 836
 837         phy_impl->reset                 = xgbe_phy_reset;
 838         phy_impl->start                 = xgbe_phy_start;
 839         phy_impl->stop                  = xgbe_phy_stop;
 840
 841         phy_impl->link_status           = xgbe_phy_link_status;
 842
 843         phy_impl->valid_speed           = xgbe_phy_valid_speed;
 844
 845         phy_impl->use_mode              = xgbe_phy_use_mode;
 846         phy_impl->set_mode              = xgbe_phy_set_mode;
 847         phy_impl->get_mode              = xgbe_phy_get_mode;
 848         phy_impl->switch_mode           = xgbe_phy_switch_mode;
 849         phy_impl->cur_mode              = xgbe_phy_cur_mode;
 850
 851         phy_impl->an_mode               = xgbe_phy_an_mode;
 852
 853         phy_impl->an_outcome            = xgbe_phy_an_outcome;
 854 }