2 * drivers/net/ethernet/ibm/emac/core.c
4 * Driver for PowerPC 4xx on-chip ethernet controller.
6 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
7 * <benh@kernel.crashing.org>
9 * Based on the arch/ppc version of the driver:
11 * Copyright (c) 2004, 2005 Zultys Technologies.
12 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
14 * Based on original work by
15 * Matt Porter <mporter@kernel.crashing.org>
16 * (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
17 * Armin Kuster <akuster@mvista.com>
18 * Johnnie Peters <jpeters@mvista.com>
20 * This program is free software; you can redistribute it and/or modify it
21 * under the terms of the GNU General Public License as published by the
22 * Free Software Foundation; either version 2 of the License, or (at your
23 * option) any later version.
27 #include <linux/module.h>
28 #include <linux/sched.h>
29 #include <linux/string.h>
30 #include <linux/errno.h>
31 #include <linux/delay.h>
32 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
36 #include <linux/crc32.h>
37 #include <linux/ethtool.h>
38 #include <linux/mii.h>
39 #include <linux/bitops.h>
40 #include <linux/workqueue.h>
42 #include <linux/of_address.h>
43 #include <linux/of_irq.h>
44 #include <linux/of_net.h>
45 #include <linux/slab.h>
47 #include <asm/processor.h>
50 #include <linux/uaccess.h>
52 #include <asm/dcr-regs.h>
57 * Lack of dma_unmap_???? calls is intentional.
59 * API-correct usage requires additional support state information to be
60 * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to
61 * EMAC design (e.g. TX buffer passed from network stack can be split into
62 * several BDs, dma_map_single/dma_map_page can be used to map particular BD),
63 * maintaining such information will add additional overhead.
64 * Current DMA API implementation for 4xx processors only ensures cache coherency
65 * and dma_unmap_???? routines are empty and are likely to stay this way.
66 * I decided to omit dma_unmap_??? calls because I don't want to add additional
67 * complexity just for the sake of following some abstract API, when it doesn't
68 * add any real benefit to the driver. I understand that this decision maybe
69 * controversial, but I really tried to make code API-correct and efficient
70 * at the same time and didn't come up with code I liked :(. --ebs
73 #define DRV_NAME "emac"
74 #define DRV_VERSION "3.54"
75 #define DRV_DESC "PPC 4xx OCP EMAC driver"
77 MODULE_DESCRIPTION(DRV_DESC
);
79 ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>");
80 MODULE_LICENSE("GPL");
82 /* minimum number of free TX descriptors required to wake up TX process */
83 #define EMAC_TX_WAKEUP_THRESH (NUM_TX_BUFF / 4)
85 /* If packet size is less than this number, we allocate small skb and copy packet
86 * contents into it instead of just sending original big skb up
88 #define EMAC_RX_COPY_THRESH CONFIG_IBM_EMAC_RX_COPY_THRESHOLD
90 /* Since multiple EMACs share MDIO lines in various ways, we need
91 * to avoid re-using the same PHY ID in cases where the arch didn't
92 * setup precise phy_map entries
94 * XXX This is something that needs to be reworked as we can have multiple
95 * EMAC "sets" (multiple ASICs containing several EMACs) though we can
96 * probably require in that case to have explicit PHY IDs in the device-tree
98 static u32 busy_phy_map
;
99 static DEFINE_MUTEX(emac_phy_map_lock
);
101 /* This is the wait queue used to wait on any event related to probe, that
102 * is discovery of MALs, other EMACs, ZMII/RGMIIs, etc...
104 static DECLARE_WAIT_QUEUE_HEAD(emac_probe_wait
);
106 /* Having stable interface names is a doomed idea. However, it would be nice
107 * if we didn't have completely random interface names at boot too :-) It's
108 * just a matter of making everybody's life easier. Since we are doing
109 * threaded probing, it's a bit harder though. The base idea here is that
110 * we make up a list of all emacs in the device-tree before we register the
111 * driver. Every emac will then wait for the previous one in the list to
112 * initialize before itself. We should also keep that list ordered by
114 * That list is only 4 entries long, meaning that additional EMACs don't
115 * get ordering guarantees unless EMAC_BOOT_LIST_SIZE is increased.
118 #define EMAC_BOOT_LIST_SIZE 4
119 static struct device_node
*emac_boot_list
[EMAC_BOOT_LIST_SIZE
];
121 /* How long should I wait for dependent devices ? */
122 #define EMAC_PROBE_DEP_TIMEOUT (HZ * 5)
124 /* I don't want to litter system log with timeout errors
125 * when we have brain-damaged PHY.
127 static inline void emac_report_timeout_error(struct emac_instance
*dev
,
130 if (emac_has_feature(dev
, EMAC_FTR_440GX_PHY_CLK_FIX
|
131 EMAC_FTR_460EX_PHY_CLK_FIX
|
132 EMAC_FTR_440EP_PHY_CLK_FIX
))
133 DBG(dev
, "%s" NL
, error
);
134 else if (net_ratelimit())
135 printk(KERN_ERR
"%s: %s\n", dev
->ofdev
->dev
.of_node
->full_name
,
139 /* EMAC PHY clock workaround:
140 * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX,
141 * which allows controlling each EMAC clock
143 static inline void emac_rx_clk_tx(struct emac_instance
*dev
)
145 #ifdef CONFIG_PPC_DCR_NATIVE
146 if (emac_has_feature(dev
, EMAC_FTR_440EP_PHY_CLK_FIX
))
147 dcri_clrset(SDR0
, SDR0_MFR
,
148 0, SDR0_MFR_ECS
>> dev
->cell_index
);
152 static inline void emac_rx_clk_default(struct emac_instance
*dev
)
154 #ifdef CONFIG_PPC_DCR_NATIVE
155 if (emac_has_feature(dev
, EMAC_FTR_440EP_PHY_CLK_FIX
))
156 dcri_clrset(SDR0
, SDR0_MFR
,
157 SDR0_MFR_ECS
>> dev
->cell_index
, 0);
161 /* PHY polling intervals */
162 #define PHY_POLL_LINK_ON HZ
163 #define PHY_POLL_LINK_OFF (HZ / 5)
165 /* Graceful stop timeouts in us.
166 * We should allow up to 1 frame time (full-duplex, ignoring collisions)
168 #define STOP_TIMEOUT_10 1230
169 #define STOP_TIMEOUT_100 124
170 #define STOP_TIMEOUT_1000 13
171 #define STOP_TIMEOUT_1000_JUMBO 73
173 static unsigned char default_mcast_addr
[] = {
174 0x01, 0x80, 0xC2, 0x00, 0x00, 0x01
177 /* Please, keep in sync with struct ibm_emac_stats/ibm_emac_error_stats */
178 static const char emac_stats_keys
[EMAC_ETHTOOL_STATS_COUNT
][ETH_GSTRING_LEN
] = {
179 "rx_packets", "rx_bytes", "tx_packets", "tx_bytes", "rx_packets_csum",
180 "tx_packets_csum", "tx_undo", "rx_dropped_stack", "rx_dropped_oom",
181 "rx_dropped_error", "rx_dropped_resize", "rx_dropped_mtu",
182 "rx_stopped", "rx_bd_errors", "rx_bd_overrun", "rx_bd_bad_packet",
183 "rx_bd_runt_packet", "rx_bd_short_event", "rx_bd_alignment_error",
184 "rx_bd_bad_fcs", "rx_bd_packet_too_long", "rx_bd_out_of_range",
185 "rx_bd_in_range", "rx_parity", "rx_fifo_overrun", "rx_overrun",
186 "rx_bad_packet", "rx_runt_packet", "rx_short_event",
187 "rx_alignment_error", "rx_bad_fcs", "rx_packet_too_long",
188 "rx_out_of_range", "rx_in_range", "tx_dropped", "tx_bd_errors",
189 "tx_bd_bad_fcs", "tx_bd_carrier_loss", "tx_bd_excessive_deferral",
190 "tx_bd_excessive_collisions", "tx_bd_late_collision",
191 "tx_bd_multple_collisions", "tx_bd_single_collision",
192 "tx_bd_underrun", "tx_bd_sqe", "tx_parity", "tx_underrun", "tx_sqe",
196 static irqreturn_t
emac_irq(int irq
, void *dev_instance
);
197 static void emac_clean_tx_ring(struct emac_instance
*dev
);
198 static void __emac_set_multicast_list(struct emac_instance
*dev
);
200 static inline int emac_phy_supports_gige(int phy_mode
)
202 return phy_mode
== PHY_MODE_GMII
||
203 phy_mode
== PHY_MODE_RGMII
||
204 phy_mode
== PHY_MODE_SGMII
||
205 phy_mode
== PHY_MODE_TBI
||
206 phy_mode
== PHY_MODE_RTBI
;
209 static inline int emac_phy_gpcs(int phy_mode
)
211 return phy_mode
== PHY_MODE_SGMII
||
212 phy_mode
== PHY_MODE_TBI
||
213 phy_mode
== PHY_MODE_RTBI
;
216 static inline void emac_tx_enable(struct emac_instance
*dev
)
218 struct emac_regs __iomem
*p
= dev
->emacp
;
221 DBG(dev
, "tx_enable" NL
);
223 r
= in_be32(&p
->mr0
);
224 if (!(r
& EMAC_MR0_TXE
))
225 out_be32(&p
->mr0
, r
| EMAC_MR0_TXE
);
228 static void emac_tx_disable(struct emac_instance
*dev
)
230 struct emac_regs __iomem
*p
= dev
->emacp
;
233 DBG(dev
, "tx_disable" NL
);
235 r
= in_be32(&p
->mr0
);
236 if (r
& EMAC_MR0_TXE
) {
237 int n
= dev
->stop_timeout
;
238 out_be32(&p
->mr0
, r
& ~EMAC_MR0_TXE
);
239 while (!(in_be32(&p
->mr0
) & EMAC_MR0_TXI
) && n
) {
244 emac_report_timeout_error(dev
, "TX disable timeout");
248 static void emac_rx_enable(struct emac_instance
*dev
)
250 struct emac_regs __iomem
*p
= dev
->emacp
;
253 if (unlikely(test_bit(MAL_COMMAC_RX_STOPPED
, &dev
->commac
.flags
)))
256 DBG(dev
, "rx_enable" NL
);
258 r
= in_be32(&p
->mr0
);
259 if (!(r
& EMAC_MR0_RXE
)) {
260 if (unlikely(!(r
& EMAC_MR0_RXI
))) {
261 /* Wait if previous async disable is still in progress */
262 int n
= dev
->stop_timeout
;
263 while (!(r
= in_be32(&p
->mr0
) & EMAC_MR0_RXI
) && n
) {
268 emac_report_timeout_error(dev
,
269 "RX disable timeout");
271 out_be32(&p
->mr0
, r
| EMAC_MR0_RXE
);
277 static void emac_rx_disable(struct emac_instance
*dev
)
279 struct emac_regs __iomem
*p
= dev
->emacp
;
282 DBG(dev
, "rx_disable" NL
);
284 r
= in_be32(&p
->mr0
);
285 if (r
& EMAC_MR0_RXE
) {
286 int n
= dev
->stop_timeout
;
287 out_be32(&p
->mr0
, r
& ~EMAC_MR0_RXE
);
288 while (!(in_be32(&p
->mr0
) & EMAC_MR0_RXI
) && n
) {
293 emac_report_timeout_error(dev
, "RX disable timeout");
297 static inline void emac_netif_stop(struct emac_instance
*dev
)
299 netif_tx_lock_bh(dev
->ndev
);
300 netif_addr_lock(dev
->ndev
);
302 netif_addr_unlock(dev
->ndev
);
303 netif_tx_unlock_bh(dev
->ndev
);
304 netif_trans_update(dev
->ndev
); /* prevent tx timeout */
305 mal_poll_disable(dev
->mal
, &dev
->commac
);
306 netif_tx_disable(dev
->ndev
);
309 static inline void emac_netif_start(struct emac_instance
*dev
)
311 netif_tx_lock_bh(dev
->ndev
);
312 netif_addr_lock(dev
->ndev
);
314 if (dev
->mcast_pending
&& netif_running(dev
->ndev
))
315 __emac_set_multicast_list(dev
);
316 netif_addr_unlock(dev
->ndev
);
317 netif_tx_unlock_bh(dev
->ndev
);
319 netif_wake_queue(dev
->ndev
);
321 /* NOTE: unconditional netif_wake_queue is only appropriate
322 * so long as all callers are assured to have free tx slots
323 * (taken from tg3... though the case where that is wrong is
324 * not terribly harmful)
326 mal_poll_enable(dev
->mal
, &dev
->commac
);
329 static inline void emac_rx_disable_async(struct emac_instance
*dev
)
331 struct emac_regs __iomem
*p
= dev
->emacp
;
334 DBG(dev
, "rx_disable_async" NL
);
336 r
= in_be32(&p
->mr0
);
337 if (r
& EMAC_MR0_RXE
)
338 out_be32(&p
->mr0
, r
& ~EMAC_MR0_RXE
);
341 static int emac_reset(struct emac_instance
*dev
)
343 struct emac_regs __iomem
*p
= dev
->emacp
;
346 DBG(dev
, "reset" NL
);
348 if (!dev
->reset_failed
) {
349 /* 40x erratum suggests stopping RX channel before reset,
352 emac_rx_disable(dev
);
353 emac_tx_disable(dev
);
356 #ifdef CONFIG_PPC_DCR_NATIVE
358 * PPC460EX/GT Embedded Processor Advanced User's Manual
359 * section 28.10.1 Mode Register 0 (EMACx_MR0) states:
360 * Note: The PHY must provide a TX Clk in order to perform a soft reset
361 * of the EMAC. If none is present, select the internal clock
362 * (SDR0_ETH_CFG[EMACx_PHY_CLK] = 1).
363 * After a soft reset, select the external clock.
365 if (emac_has_feature(dev
, EMAC_FTR_460EX_PHY_CLK_FIX
)) {
366 if (dev
->phy_address
== 0xffffffff &&
367 dev
->phy_map
== 0xffffffff) {
368 /* No PHY: select internal loop clock before reset */
369 dcri_clrset(SDR0
, SDR0_ETH_CFG
,
370 0, SDR0_ETH_CFG_ECS
<< dev
->cell_index
);
372 /* PHY present: select external clock before reset */
373 dcri_clrset(SDR0
, SDR0_ETH_CFG
,
374 SDR0_ETH_CFG_ECS
<< dev
->cell_index
, 0);
379 out_be32(&p
->mr0
, EMAC_MR0_SRST
);
380 while ((in_be32(&p
->mr0
) & EMAC_MR0_SRST
) && n
)
383 #ifdef CONFIG_PPC_DCR_NATIVE
384 if (emac_has_feature(dev
, EMAC_FTR_460EX_PHY_CLK_FIX
)) {
385 if (dev
->phy_address
== 0xffffffff &&
386 dev
->phy_map
== 0xffffffff) {
387 /* No PHY: restore external clock source after reset */
388 dcri_clrset(SDR0
, SDR0_ETH_CFG
,
389 SDR0_ETH_CFG_ECS
<< dev
->cell_index
, 0);
395 dev
->reset_failed
= 0;
398 emac_report_timeout_error(dev
, "reset timeout");
399 dev
->reset_failed
= 1;
404 static void emac_hash_mc(struct emac_instance
*dev
)
406 const int regs
= EMAC_XAHT_REGS(dev
);
407 u32
*gaht_base
= emac_gaht_base(dev
);
409 struct netdev_hw_addr
*ha
;
412 DBG(dev
, "hash_mc %d" NL
, netdev_mc_count(dev
->ndev
));
414 memset(gaht_temp
, 0, sizeof (gaht_temp
));
416 netdev_for_each_mc_addr(ha
, dev
->ndev
) {
418 DBG2(dev
, "mc %pM" NL
, ha
->addr
);
420 slot
= EMAC_XAHT_CRC_TO_SLOT(dev
,
421 ether_crc(ETH_ALEN
, ha
->addr
));
422 reg
= EMAC_XAHT_SLOT_TO_REG(dev
, slot
);
423 mask
= EMAC_XAHT_SLOT_TO_MASK(dev
, slot
);
425 gaht_temp
[reg
] |= mask
;
428 for (i
= 0; i
< regs
; i
++)
429 out_be32(gaht_base
+ i
, gaht_temp
[i
]);
432 static inline u32
emac_iff2rmr(struct net_device
*ndev
)
434 struct emac_instance
*dev
= netdev_priv(ndev
);
437 r
= EMAC_RMR_SP
| EMAC_RMR_SFCS
| EMAC_RMR_IAE
| EMAC_RMR_BAE
;
439 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
444 if (ndev
->flags
& IFF_PROMISC
)
446 else if (ndev
->flags
& IFF_ALLMULTI
||
447 (netdev_mc_count(ndev
) > EMAC_XAHT_SLOTS(dev
)))
449 else if (!netdev_mc_empty(ndev
))
452 if (emac_has_feature(dev
, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE
)) {
453 r
&= ~EMAC4_RMR_MJS_MASK
;
454 r
|= EMAC4_RMR_MJS(ndev
->mtu
);
460 static u32
__emac_calc_base_mr1(struct emac_instance
*dev
, int tx_size
, int rx_size
)
462 u32 ret
= EMAC_MR1_VLE
| EMAC_MR1_IST
| EMAC_MR1_TR0_MULT
;
464 DBG2(dev
, "__emac_calc_base_mr1" NL
);
468 ret
|= EMAC_MR1_TFS_2K
;
471 printk(KERN_WARNING
"%s: Unknown Tx FIFO size %d\n",
472 dev
->ndev
->name
, tx_size
);
477 ret
|= EMAC_MR1_RFS_16K
;
480 ret
|= EMAC_MR1_RFS_4K
;
483 printk(KERN_WARNING
"%s: Unknown Rx FIFO size %d\n",
484 dev
->ndev
->name
, rx_size
);
490 static u32
__emac4_calc_base_mr1(struct emac_instance
*dev
, int tx_size
, int rx_size
)
492 u32 ret
= EMAC_MR1_VLE
| EMAC_MR1_IST
| EMAC4_MR1_TR
|
493 EMAC4_MR1_OBCI(dev
->opb_bus_freq
/ 1000000);
495 DBG2(dev
, "__emac4_calc_base_mr1" NL
);
499 ret
|= EMAC4_MR1_TFS_16K
;
502 ret
|= EMAC4_MR1_TFS_4K
;
505 ret
|= EMAC4_MR1_TFS_2K
;
508 printk(KERN_WARNING
"%s: Unknown Tx FIFO size %d\n",
509 dev
->ndev
->name
, tx_size
);
514 ret
|= EMAC4_MR1_RFS_16K
;
517 ret
|= EMAC4_MR1_RFS_4K
;
520 ret
|= EMAC4_MR1_RFS_2K
;
523 printk(KERN_WARNING
"%s: Unknown Rx FIFO size %d\n",
524 dev
->ndev
->name
, rx_size
);
530 static u32
emac_calc_base_mr1(struct emac_instance
*dev
, int tx_size
, int rx_size
)
532 return emac_has_feature(dev
, EMAC_FTR_EMAC4
) ?
533 __emac4_calc_base_mr1(dev
, tx_size
, rx_size
) :
534 __emac_calc_base_mr1(dev
, tx_size
, rx_size
);
537 static inline u32
emac_calc_trtr(struct emac_instance
*dev
, unsigned int size
)
539 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
540 return ((size
>> 6) - 1) << EMAC_TRTR_SHIFT_EMAC4
;
542 return ((size
>> 6) - 1) << EMAC_TRTR_SHIFT
;
545 static inline u32
emac_calc_rwmr(struct emac_instance
*dev
,
546 unsigned int low
, unsigned int high
)
548 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
549 return (low
<< 22) | ( (high
& 0x3ff) << 6);
551 return (low
<< 23) | ( (high
& 0x1ff) << 7);
554 static int emac_configure(struct emac_instance
*dev
)
556 struct emac_regs __iomem
*p
= dev
->emacp
;
557 struct net_device
*ndev
= dev
->ndev
;
558 int tx_size
, rx_size
, link
= netif_carrier_ok(dev
->ndev
);
561 DBG(dev
, "configure" NL
);
564 out_be32(&p
->mr1
, in_be32(&p
->mr1
)
565 | EMAC_MR1_FDE
| EMAC_MR1_ILE
);
567 } else if (emac_reset(dev
) < 0)
570 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
))
571 tah_reset(dev
->tah_dev
);
573 DBG(dev
, " link = %d duplex = %d, pause = %d, asym_pause = %d\n",
574 link
, dev
->phy
.duplex
, dev
->phy
.pause
, dev
->phy
.asym_pause
);
576 /* Default fifo sizes */
577 tx_size
= dev
->tx_fifo_size
;
578 rx_size
= dev
->rx_fifo_size
;
580 /* No link, force loopback */
582 mr1
= EMAC_MR1_FDE
| EMAC_MR1_ILE
;
584 /* Check for full duplex */
585 else if (dev
->phy
.duplex
== DUPLEX_FULL
)
586 mr1
|= EMAC_MR1_FDE
| EMAC_MR1_MWSW_001
;
588 /* Adjust fifo sizes, mr1 and timeouts based on link speed */
589 dev
->stop_timeout
= STOP_TIMEOUT_10
;
590 switch (dev
->phy
.speed
) {
592 if (emac_phy_gpcs(dev
->phy
.mode
)) {
593 mr1
|= EMAC_MR1_MF_1000GPCS
| EMAC_MR1_MF_IPPA(
594 (dev
->phy
.gpcs_address
!= 0xffffffff) ?
595 dev
->phy
.gpcs_address
: dev
->phy
.address
);
597 /* Put some arbitrary OUI, Manuf & Rev IDs so we can
598 * identify this GPCS PHY later.
600 out_be32(&p
->u1
.emac4
.ipcr
, 0xdeadbeef);
602 mr1
|= EMAC_MR1_MF_1000
;
604 /* Extended fifo sizes */
605 tx_size
= dev
->tx_fifo_size_gige
;
606 rx_size
= dev
->rx_fifo_size_gige
;
608 if (dev
->ndev
->mtu
> ETH_DATA_LEN
) {
609 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
610 mr1
|= EMAC4_MR1_JPSM
;
612 mr1
|= EMAC_MR1_JPSM
;
613 dev
->stop_timeout
= STOP_TIMEOUT_1000_JUMBO
;
615 dev
->stop_timeout
= STOP_TIMEOUT_1000
;
618 mr1
|= EMAC_MR1_MF_100
;
619 dev
->stop_timeout
= STOP_TIMEOUT_100
;
621 default: /* make gcc happy */
625 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
626 rgmii_set_speed(dev
->rgmii_dev
, dev
->rgmii_port
,
628 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
629 zmii_set_speed(dev
->zmii_dev
, dev
->zmii_port
, dev
->phy
.speed
);
631 /* on 40x erratum forces us to NOT use integrated flow control,
632 * let's hope it works on 44x ;)
634 if (!emac_has_feature(dev
, EMAC_FTR_NO_FLOW_CONTROL_40x
) &&
635 dev
->phy
.duplex
== DUPLEX_FULL
) {
637 mr1
|= EMAC_MR1_EIFC
| EMAC_MR1_APP
;
638 else if (dev
->phy
.asym_pause
)
642 /* Add base settings & fifo sizes & program MR1 */
643 mr1
|= emac_calc_base_mr1(dev
, tx_size
, rx_size
);
644 out_be32(&p
->mr1
, mr1
);
646 /* Set individual MAC address */
647 out_be32(&p
->iahr
, (ndev
->dev_addr
[0] << 8) | ndev
->dev_addr
[1]);
648 out_be32(&p
->ialr
, (ndev
->dev_addr
[2] << 24) |
649 (ndev
->dev_addr
[3] << 16) | (ndev
->dev_addr
[4] << 8) |
652 /* VLAN Tag Protocol ID */
653 out_be32(&p
->vtpid
, 0x8100);
655 /* Receive mode register */
656 r
= emac_iff2rmr(ndev
);
657 if (r
& EMAC_RMR_MAE
)
659 out_be32(&p
->rmr
, r
);
661 /* FIFOs thresholds */
662 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
663 r
= EMAC4_TMR1((dev
->mal_burst_size
/ dev
->fifo_entry_size
) + 1,
664 tx_size
/ 2 / dev
->fifo_entry_size
);
666 r
= EMAC_TMR1((dev
->mal_burst_size
/ dev
->fifo_entry_size
) + 1,
667 tx_size
/ 2 / dev
->fifo_entry_size
);
668 out_be32(&p
->tmr1
, r
);
669 out_be32(&p
->trtr
, emac_calc_trtr(dev
, tx_size
/ 2));
671 /* PAUSE frame is sent when RX FIFO reaches its high-water mark,
672 there should be still enough space in FIFO to allow the our link
673 partner time to process this frame and also time to send PAUSE
676 Here is the worst case scenario for the RX FIFO "headroom"
677 (from "The Switch Book") (100Mbps, without preamble, inter-frame gap):
679 1) One maximum-length frame on TX 1522 bytes
680 2) One PAUSE frame time 64 bytes
681 3) PAUSE frame decode time allowance 64 bytes
682 4) One maximum-length frame on RX 1522 bytes
683 5) Round-trip propagation delay of the link (100Mb) 15 bytes
687 I chose to set high-water mark to RX_FIFO_SIZE / 4 (1024 bytes)
688 low-water mark to RX_FIFO_SIZE / 8 (512 bytes)
690 r
= emac_calc_rwmr(dev
, rx_size
/ 8 / dev
->fifo_entry_size
,
691 rx_size
/ 4 / dev
->fifo_entry_size
);
692 out_be32(&p
->rwmr
, r
);
694 /* Set PAUSE timer to the maximum */
695 out_be32(&p
->ptr
, 0xffff);
698 r
= EMAC_ISR_OVR
| EMAC_ISR_BP
| EMAC_ISR_SE
|
699 EMAC_ISR_ALE
| EMAC_ISR_BFCS
| EMAC_ISR_PTLE
| EMAC_ISR_ORE
|
700 EMAC_ISR_IRE
| EMAC_ISR_TE
;
701 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
702 r
|= EMAC4_ISR_TXPE
| EMAC4_ISR_RXPE
/* | EMAC4_ISR_TXUE |
704 out_be32(&p
->iser
, r
);
706 /* We need to take GPCS PHY out of isolate mode after EMAC reset */
707 if (emac_phy_gpcs(dev
->phy
.mode
)) {
708 if (dev
->phy
.gpcs_address
!= 0xffffffff)
709 emac_mii_reset_gpcs(&dev
->phy
);
711 emac_mii_reset_phy(&dev
->phy
);
717 static void emac_reinitialize(struct emac_instance
*dev
)
719 DBG(dev
, "reinitialize" NL
);
721 emac_netif_stop(dev
);
722 if (!emac_configure(dev
)) {
726 emac_netif_start(dev
);
729 static void emac_full_tx_reset(struct emac_instance
*dev
)
731 DBG(dev
, "full_tx_reset" NL
);
733 emac_tx_disable(dev
);
734 mal_disable_tx_channel(dev
->mal
, dev
->mal_tx_chan
);
735 emac_clean_tx_ring(dev
);
736 dev
->tx_cnt
= dev
->tx_slot
= dev
->ack_slot
= 0;
740 mal_enable_tx_channel(dev
->mal
, dev
->mal_tx_chan
);
745 static void emac_reset_work(struct work_struct
*work
)
747 struct emac_instance
*dev
= container_of(work
, struct emac_instance
, reset_work
);
749 DBG(dev
, "reset_work" NL
);
751 mutex_lock(&dev
->link_lock
);
753 emac_netif_stop(dev
);
754 emac_full_tx_reset(dev
);
755 emac_netif_start(dev
);
757 mutex_unlock(&dev
->link_lock
);
760 static void emac_tx_timeout(struct net_device
*ndev
)
762 struct emac_instance
*dev
= netdev_priv(ndev
);
764 DBG(dev
, "tx_timeout" NL
);
766 schedule_work(&dev
->reset_work
);
770 static inline int emac_phy_done(struct emac_instance
*dev
, u32 stacr
)
772 int done
= !!(stacr
& EMAC_STACR_OC
);
774 if (emac_has_feature(dev
, EMAC_FTR_STACR_OC_INVERT
))
780 static int __emac_mdio_read(struct emac_instance
*dev
, u8 id
, u8 reg
)
782 struct emac_regs __iomem
*p
= dev
->emacp
;
784 int n
, err
= -ETIMEDOUT
;
786 mutex_lock(&dev
->mdio_lock
);
788 DBG2(dev
, "mdio_read(%02x,%02x)" NL
, id
, reg
);
790 /* Enable proper MDIO port */
791 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
792 zmii_get_mdio(dev
->zmii_dev
, dev
->zmii_port
);
793 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
794 rgmii_get_mdio(dev
->rgmii_dev
, dev
->rgmii_port
);
796 /* Wait for management interface to become idle */
798 while (!emac_phy_done(dev
, in_be32(&p
->stacr
))) {
801 DBG2(dev
, " -> timeout wait idle\n");
806 /* Issue read command */
807 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
808 r
= EMAC4_STACR_BASE(dev
->opb_bus_freq
);
810 r
= EMAC_STACR_BASE(dev
->opb_bus_freq
);
811 if (emac_has_feature(dev
, EMAC_FTR_STACR_OC_INVERT
))
813 if (emac_has_feature(dev
, EMAC_FTR_HAS_NEW_STACR
))
814 r
|= EMACX_STACR_STAC_READ
;
816 r
|= EMAC_STACR_STAC_READ
;
817 r
|= (reg
& EMAC_STACR_PRA_MASK
)
818 | ((id
& EMAC_STACR_PCDA_MASK
) << EMAC_STACR_PCDA_SHIFT
);
819 out_be32(&p
->stacr
, r
);
821 /* Wait for read to complete */
823 while (!emac_phy_done(dev
, (r
= in_be32(&p
->stacr
)))) {
826 DBG2(dev
, " -> timeout wait complete\n");
831 if (unlikely(r
& EMAC_STACR_PHYE
)) {
832 DBG(dev
, "mdio_read(%02x, %02x) failed" NL
, id
, reg
);
837 r
= ((r
>> EMAC_STACR_PHYD_SHIFT
) & EMAC_STACR_PHYD_MASK
);
839 DBG2(dev
, "mdio_read -> %04x" NL
, r
);
842 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
843 rgmii_put_mdio(dev
->rgmii_dev
, dev
->rgmii_port
);
844 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
845 zmii_put_mdio(dev
->zmii_dev
, dev
->zmii_port
);
846 mutex_unlock(&dev
->mdio_lock
);
848 return err
== 0 ? r
: err
;
851 static void __emac_mdio_write(struct emac_instance
*dev
, u8 id
, u8 reg
,
854 struct emac_regs __iomem
*p
= dev
->emacp
;
856 int n
, err
= -ETIMEDOUT
;
858 mutex_lock(&dev
->mdio_lock
);
860 DBG2(dev
, "mdio_write(%02x,%02x,%04x)" NL
, id
, reg
, val
);
862 /* Enable proper MDIO port */
863 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
864 zmii_get_mdio(dev
->zmii_dev
, dev
->zmii_port
);
865 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
866 rgmii_get_mdio(dev
->rgmii_dev
, dev
->rgmii_port
);
868 /* Wait for management interface to be idle */
870 while (!emac_phy_done(dev
, in_be32(&p
->stacr
))) {
873 DBG2(dev
, " -> timeout wait idle\n");
878 /* Issue write command */
879 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
880 r
= EMAC4_STACR_BASE(dev
->opb_bus_freq
);
882 r
= EMAC_STACR_BASE(dev
->opb_bus_freq
);
883 if (emac_has_feature(dev
, EMAC_FTR_STACR_OC_INVERT
))
885 if (emac_has_feature(dev
, EMAC_FTR_HAS_NEW_STACR
))
886 r
|= EMACX_STACR_STAC_WRITE
;
888 r
|= EMAC_STACR_STAC_WRITE
;
889 r
|= (reg
& EMAC_STACR_PRA_MASK
) |
890 ((id
& EMAC_STACR_PCDA_MASK
) << EMAC_STACR_PCDA_SHIFT
) |
891 (val
<< EMAC_STACR_PHYD_SHIFT
);
892 out_be32(&p
->stacr
, r
);
894 /* Wait for write to complete */
896 while (!emac_phy_done(dev
, in_be32(&p
->stacr
))) {
899 DBG2(dev
, " -> timeout wait complete\n");
905 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
906 rgmii_put_mdio(dev
->rgmii_dev
, dev
->rgmii_port
);
907 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
908 zmii_put_mdio(dev
->zmii_dev
, dev
->zmii_port
);
909 mutex_unlock(&dev
->mdio_lock
);
912 static int emac_mdio_read(struct net_device
*ndev
, int id
, int reg
)
914 struct emac_instance
*dev
= netdev_priv(ndev
);
917 res
= __emac_mdio_read((dev
->mdio_instance
&&
918 dev
->phy
.gpcs_address
!= id
) ?
919 dev
->mdio_instance
: dev
,
924 static void emac_mdio_write(struct net_device
*ndev
, int id
, int reg
, int val
)
926 struct emac_instance
*dev
= netdev_priv(ndev
);
928 __emac_mdio_write((dev
->mdio_instance
&&
929 dev
->phy
.gpcs_address
!= id
) ?
930 dev
->mdio_instance
: dev
,
931 (u8
) id
, (u8
) reg
, (u16
) val
);
935 static void __emac_set_multicast_list(struct emac_instance
*dev
)
937 struct emac_regs __iomem
*p
= dev
->emacp
;
938 u32 rmr
= emac_iff2rmr(dev
->ndev
);
940 DBG(dev
, "__multicast %08x" NL
, rmr
);
942 /* I decided to relax register access rules here to avoid
945 * There is a real problem with EMAC4 core if we use MWSW_001 bit
946 * in MR1 register and do a full EMAC reset.
947 * One TX BD status update is delayed and, after EMAC reset, it
948 * never happens, resulting in TX hung (it'll be recovered by TX
949 * timeout handler eventually, but this is just gross).
950 * So we either have to do full TX reset or try to cheat here :)
952 * The only required change is to RX mode register, so I *think* all
953 * we need is just to stop RX channel. This seems to work on all
956 * If we need the full reset, we might just trigger the workqueue
957 * and do it async... a bit nasty but should work --BenH
959 dev
->mcast_pending
= 0;
960 emac_rx_disable(dev
);
961 if (rmr
& EMAC_RMR_MAE
)
963 out_be32(&p
->rmr
, rmr
);
968 static void emac_set_multicast_list(struct net_device
*ndev
)
970 struct emac_instance
*dev
= netdev_priv(ndev
);
972 DBG(dev
, "multicast" NL
);
974 BUG_ON(!netif_running(dev
->ndev
));
977 dev
->mcast_pending
= 1;
981 mutex_lock(&dev
->link_lock
);
982 __emac_set_multicast_list(dev
);
983 mutex_unlock(&dev
->link_lock
);
986 static int emac_set_mac_address(struct net_device
*ndev
, void *sa
)
988 struct emac_instance
*dev
= netdev_priv(ndev
);
989 struct sockaddr
*addr
= sa
;
990 struct emac_regs __iomem
*p
= dev
->emacp
;
992 if (!is_valid_ether_addr(addr
->sa_data
))
993 return -EADDRNOTAVAIL
;
995 mutex_lock(&dev
->link_lock
);
997 memcpy(ndev
->dev_addr
, addr
->sa_data
, ndev
->addr_len
);
999 emac_rx_disable(dev
);
1000 emac_tx_disable(dev
);
1001 out_be32(&p
->iahr
, (ndev
->dev_addr
[0] << 8) | ndev
->dev_addr
[1]);
1002 out_be32(&p
->ialr
, (ndev
->dev_addr
[2] << 24) |
1003 (ndev
->dev_addr
[3] << 16) | (ndev
->dev_addr
[4] << 8) |
1005 emac_tx_enable(dev
);
1006 emac_rx_enable(dev
);
1008 mutex_unlock(&dev
->link_lock
);
1013 static int emac_resize_rx_ring(struct emac_instance
*dev
, int new_mtu
)
1015 int rx_sync_size
= emac_rx_sync_size(new_mtu
);
1016 int rx_skb_size
= emac_rx_skb_size(new_mtu
);
1018 int mr1_jumbo_bit_change
= 0;
1020 mutex_lock(&dev
->link_lock
);
1021 emac_netif_stop(dev
);
1022 emac_rx_disable(dev
);
1023 mal_disable_rx_channel(dev
->mal
, dev
->mal_rx_chan
);
1025 if (dev
->rx_sg_skb
) {
1026 ++dev
->estats
.rx_dropped_resize
;
1027 dev_kfree_skb(dev
->rx_sg_skb
);
1028 dev
->rx_sg_skb
= NULL
;
1031 /* Make a first pass over RX ring and mark BDs ready, dropping
1032 * non-processed packets on the way. We need this as a separate pass
1033 * to simplify error recovery in the case of allocation failure later.
1035 for (i
= 0; i
< NUM_RX_BUFF
; ++i
) {
1036 if (dev
->rx_desc
[i
].ctrl
& MAL_RX_CTRL_FIRST
)
1037 ++dev
->estats
.rx_dropped_resize
;
1039 dev
->rx_desc
[i
].data_len
= 0;
1040 dev
->rx_desc
[i
].ctrl
= MAL_RX_CTRL_EMPTY
|
1041 (i
== (NUM_RX_BUFF
- 1) ? MAL_RX_CTRL_WRAP
: 0);
1044 /* Reallocate RX ring only if bigger skb buffers are required */
1045 if (rx_skb_size
<= dev
->rx_skb_size
)
1048 /* Second pass, allocate new skbs */
1049 for (i
= 0; i
< NUM_RX_BUFF
; ++i
) {
1050 struct sk_buff
*skb
= alloc_skb(rx_skb_size
, GFP_ATOMIC
);
1056 BUG_ON(!dev
->rx_skb
[i
]);
1057 dev_kfree_skb(dev
->rx_skb
[i
]);
1059 skb_reserve(skb
, EMAC_RX_SKB_HEADROOM
+ 2);
1060 dev
->rx_desc
[i
].data_ptr
=
1061 dma_map_single(&dev
->ofdev
->dev
, skb
->data
- 2, rx_sync_size
,
1062 DMA_FROM_DEVICE
) + 2;
1063 dev
->rx_skb
[i
] = skb
;
1066 /* Check if we need to change "Jumbo" bit in MR1 */
1067 if (emac_has_feature(dev
, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE
)) {
1068 mr1_jumbo_bit_change
= (new_mtu
> ETH_DATA_LEN
) ||
1069 (dev
->ndev
->mtu
> ETH_DATA_LEN
);
1071 mr1_jumbo_bit_change
= (new_mtu
> ETH_DATA_LEN
) ^
1072 (dev
->ndev
->mtu
> ETH_DATA_LEN
);
1075 if (mr1_jumbo_bit_change
) {
1076 /* This is to prevent starting RX channel in emac_rx_enable() */
1077 set_bit(MAL_COMMAC_RX_STOPPED
, &dev
->commac
.flags
);
1079 dev
->ndev
->mtu
= new_mtu
;
1080 emac_full_tx_reset(dev
);
1083 mal_set_rcbs(dev
->mal
, dev
->mal_rx_chan
, emac_rx_size(new_mtu
));
1086 clear_bit(MAL_COMMAC_RX_STOPPED
, &dev
->commac
.flags
);
1088 mal_enable_rx_channel(dev
->mal
, dev
->mal_rx_chan
);
1089 emac_rx_enable(dev
);
1090 emac_netif_start(dev
);
1091 mutex_unlock(&dev
->link_lock
);
1096 /* Process ctx, rtnl_lock semaphore */
1097 static int emac_change_mtu(struct net_device
*ndev
, int new_mtu
)
1099 struct emac_instance
*dev
= netdev_priv(ndev
);
1102 DBG(dev
, "change_mtu(%d)" NL
, new_mtu
);
1104 if (netif_running(ndev
)) {
1105 /* Check if we really need to reinitialize RX ring */
1106 if (emac_rx_skb_size(ndev
->mtu
) != emac_rx_skb_size(new_mtu
))
1107 ret
= emac_resize_rx_ring(dev
, new_mtu
);
1111 ndev
->mtu
= new_mtu
;
1112 dev
->rx_skb_size
= emac_rx_skb_size(new_mtu
);
1113 dev
->rx_sync_size
= emac_rx_sync_size(new_mtu
);
1119 static void emac_clean_tx_ring(struct emac_instance
*dev
)
1123 for (i
= 0; i
< NUM_TX_BUFF
; ++i
) {
1124 if (dev
->tx_skb
[i
]) {
1125 dev_kfree_skb(dev
->tx_skb
[i
]);
1126 dev
->tx_skb
[i
] = NULL
;
1127 if (dev
->tx_desc
[i
].ctrl
& MAL_TX_CTRL_READY
)
1128 ++dev
->estats
.tx_dropped
;
1130 dev
->tx_desc
[i
].ctrl
= 0;
1131 dev
->tx_desc
[i
].data_ptr
= 0;
1135 static void emac_clean_rx_ring(struct emac_instance
*dev
)
1139 for (i
= 0; i
< NUM_RX_BUFF
; ++i
)
1140 if (dev
->rx_skb
[i
]) {
1141 dev
->rx_desc
[i
].ctrl
= 0;
1142 dev_kfree_skb(dev
->rx_skb
[i
]);
1143 dev
->rx_skb
[i
] = NULL
;
1144 dev
->rx_desc
[i
].data_ptr
= 0;
1147 if (dev
->rx_sg_skb
) {
1148 dev_kfree_skb(dev
->rx_sg_skb
);
1149 dev
->rx_sg_skb
= NULL
;
1153 static inline int emac_alloc_rx_skb(struct emac_instance
*dev
, int slot
,
1156 struct sk_buff
*skb
= alloc_skb(dev
->rx_skb_size
, flags
);
1160 dev
->rx_skb
[slot
] = skb
;
1161 dev
->rx_desc
[slot
].data_len
= 0;
1163 skb_reserve(skb
, EMAC_RX_SKB_HEADROOM
+ 2);
1164 dev
->rx_desc
[slot
].data_ptr
=
1165 dma_map_single(&dev
->ofdev
->dev
, skb
->data
- 2, dev
->rx_sync_size
,
1166 DMA_FROM_DEVICE
) + 2;
1168 dev
->rx_desc
[slot
].ctrl
= MAL_RX_CTRL_EMPTY
|
1169 (slot
== (NUM_RX_BUFF
- 1) ? MAL_RX_CTRL_WRAP
: 0);
1174 static void emac_print_link_status(struct emac_instance
*dev
)
1176 if (netif_carrier_ok(dev
->ndev
))
1177 printk(KERN_INFO
"%s: link is up, %d %s%s\n",
1178 dev
->ndev
->name
, dev
->phy
.speed
,
1179 dev
->phy
.duplex
== DUPLEX_FULL
? "FDX" : "HDX",
1180 dev
->phy
.pause
? ", pause enabled" :
1181 dev
->phy
.asym_pause
? ", asymmetric pause enabled" : "");
1183 printk(KERN_INFO
"%s: link is down\n", dev
->ndev
->name
);
1186 /* Process ctx, rtnl_lock semaphore */
1187 static int emac_open(struct net_device
*ndev
)
1189 struct emac_instance
*dev
= netdev_priv(ndev
);
1192 DBG(dev
, "open" NL
);
1194 /* Setup error IRQ handler */
1195 err
= request_irq(dev
->emac_irq
, emac_irq
, 0, "EMAC", dev
);
1197 printk(KERN_ERR
"%s: failed to request IRQ %d\n",
1198 ndev
->name
, dev
->emac_irq
);
1202 /* Allocate RX ring */
1203 for (i
= 0; i
< NUM_RX_BUFF
; ++i
)
1204 if (emac_alloc_rx_skb(dev
, i
, GFP_KERNEL
)) {
1205 printk(KERN_ERR
"%s: failed to allocate RX ring\n",
1210 dev
->tx_cnt
= dev
->tx_slot
= dev
->ack_slot
= dev
->rx_slot
= 0;
1211 clear_bit(MAL_COMMAC_RX_STOPPED
, &dev
->commac
.flags
);
1212 dev
->rx_sg_skb
= NULL
;
1214 mutex_lock(&dev
->link_lock
);
1217 /* Start PHY polling now.
1219 if (dev
->phy
.address
>= 0) {
1220 int link_poll_interval
;
1221 if (dev
->phy
.def
->ops
->poll_link(&dev
->phy
)) {
1222 dev
->phy
.def
->ops
->read_link(&dev
->phy
);
1223 emac_rx_clk_default(dev
);
1224 netif_carrier_on(dev
->ndev
);
1225 link_poll_interval
= PHY_POLL_LINK_ON
;
1227 emac_rx_clk_tx(dev
);
1228 netif_carrier_off(dev
->ndev
);
1229 link_poll_interval
= PHY_POLL_LINK_OFF
;
1231 dev
->link_polling
= 1;
1233 schedule_delayed_work(&dev
->link_work
, link_poll_interval
);
1234 emac_print_link_status(dev
);
1236 netif_carrier_on(dev
->ndev
);
1238 /* Required for Pause packet support in EMAC */
1239 dev_mc_add_global(ndev
, default_mcast_addr
);
1241 emac_configure(dev
);
1242 mal_poll_add(dev
->mal
, &dev
->commac
);
1243 mal_enable_tx_channel(dev
->mal
, dev
->mal_tx_chan
);
1244 mal_set_rcbs(dev
->mal
, dev
->mal_rx_chan
, emac_rx_size(ndev
->mtu
));
1245 mal_enable_rx_channel(dev
->mal
, dev
->mal_rx_chan
);
1246 emac_tx_enable(dev
);
1247 emac_rx_enable(dev
);
1248 emac_netif_start(dev
);
1250 mutex_unlock(&dev
->link_lock
);
1254 emac_clean_rx_ring(dev
);
1255 free_irq(dev
->emac_irq
, dev
);
1262 static int emac_link_differs(struct emac_instance
*dev
)
1264 u32 r
= in_be32(&dev
->emacp
->mr1
);
1266 int duplex
= r
& EMAC_MR1_FDE
? DUPLEX_FULL
: DUPLEX_HALF
;
1267 int speed
, pause
, asym_pause
;
1269 if (r
& EMAC_MR1_MF_1000
)
1271 else if (r
& EMAC_MR1_MF_100
)
1276 switch (r
& (EMAC_MR1_EIFC
| EMAC_MR1_APP
)) {
1277 case (EMAC_MR1_EIFC
| EMAC_MR1_APP
):
1286 pause
= asym_pause
= 0;
1288 return speed
!= dev
->phy
.speed
|| duplex
!= dev
->phy
.duplex
||
1289 pause
!= dev
->phy
.pause
|| asym_pause
!= dev
->phy
.asym_pause
;
1293 static void emac_link_timer(struct work_struct
*work
)
1295 struct emac_instance
*dev
=
1296 container_of(to_delayed_work(work
),
1297 struct emac_instance
, link_work
);
1298 int link_poll_interval
;
1300 mutex_lock(&dev
->link_lock
);
1301 DBG2(dev
, "link timer" NL
);
1306 if (dev
->phy
.def
->ops
->poll_link(&dev
->phy
)) {
1307 if (!netif_carrier_ok(dev
->ndev
)) {
1308 emac_rx_clk_default(dev
);
1309 /* Get new link parameters */
1310 dev
->phy
.def
->ops
->read_link(&dev
->phy
);
1312 netif_carrier_on(dev
->ndev
);
1313 emac_netif_stop(dev
);
1314 emac_full_tx_reset(dev
);
1315 emac_netif_start(dev
);
1316 emac_print_link_status(dev
);
1318 link_poll_interval
= PHY_POLL_LINK_ON
;
1320 if (netif_carrier_ok(dev
->ndev
)) {
1321 emac_rx_clk_tx(dev
);
1322 netif_carrier_off(dev
->ndev
);
1323 netif_tx_disable(dev
->ndev
);
1324 emac_reinitialize(dev
);
1325 emac_print_link_status(dev
);
1327 link_poll_interval
= PHY_POLL_LINK_OFF
;
1329 schedule_delayed_work(&dev
->link_work
, link_poll_interval
);
1331 mutex_unlock(&dev
->link_lock
);
1334 static void emac_force_link_update(struct emac_instance
*dev
)
1336 netif_carrier_off(dev
->ndev
);
1338 if (dev
->link_polling
) {
1339 cancel_delayed_work_sync(&dev
->link_work
);
1340 if (dev
->link_polling
)
1341 schedule_delayed_work(&dev
->link_work
, PHY_POLL_LINK_OFF
);
1345 /* Process ctx, rtnl_lock semaphore */
1346 static int emac_close(struct net_device
*ndev
)
1348 struct emac_instance
*dev
= netdev_priv(ndev
);
1350 DBG(dev
, "close" NL
);
1352 if (dev
->phy
.address
>= 0) {
1353 dev
->link_polling
= 0;
1354 cancel_delayed_work_sync(&dev
->link_work
);
1356 mutex_lock(&dev
->link_lock
);
1357 emac_netif_stop(dev
);
1359 mutex_unlock(&dev
->link_lock
);
1361 emac_rx_disable(dev
);
1362 emac_tx_disable(dev
);
1363 mal_disable_rx_channel(dev
->mal
, dev
->mal_rx_chan
);
1364 mal_disable_tx_channel(dev
->mal
, dev
->mal_tx_chan
);
1365 mal_poll_del(dev
->mal
, &dev
->commac
);
1367 emac_clean_tx_ring(dev
);
1368 emac_clean_rx_ring(dev
);
1370 free_irq(dev
->emac_irq
, dev
);
1372 netif_carrier_off(ndev
);
1377 static inline u16
emac_tx_csum(struct emac_instance
*dev
,
1378 struct sk_buff
*skb
)
1380 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
) &&
1381 (skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
1382 ++dev
->stats
.tx_packets_csum
;
1383 return EMAC_TX_CTRL_TAH_CSUM
;
1388 static inline int emac_xmit_finish(struct emac_instance
*dev
, int len
)
1390 struct emac_regs __iomem
*p
= dev
->emacp
;
1391 struct net_device
*ndev
= dev
->ndev
;
1393 /* Send the packet out. If the if makes a significant perf
1394 * difference, then we can store the TMR0 value in "dev"
1397 if (emac_has_feature(dev
, EMAC_FTR_EMAC4
))
1398 out_be32(&p
->tmr0
, EMAC4_TMR0_XMIT
);
1400 out_be32(&p
->tmr0
, EMAC_TMR0_XMIT
);
1402 if (unlikely(++dev
->tx_cnt
== NUM_TX_BUFF
)) {
1403 netif_stop_queue(ndev
);
1404 DBG2(dev
, "stopped TX queue" NL
);
1407 netif_trans_update(ndev
);
1408 ++dev
->stats
.tx_packets
;
1409 dev
->stats
.tx_bytes
+= len
;
1411 return NETDEV_TX_OK
;
1415 static int emac_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
)
1417 struct emac_instance
*dev
= netdev_priv(ndev
);
1418 unsigned int len
= skb
->len
;
1421 u16 ctrl
= EMAC_TX_CTRL_GFCS
| EMAC_TX_CTRL_GP
| MAL_TX_CTRL_READY
|
1422 MAL_TX_CTRL_LAST
| emac_tx_csum(dev
, skb
);
1424 slot
= dev
->tx_slot
++;
1425 if (dev
->tx_slot
== NUM_TX_BUFF
) {
1427 ctrl
|= MAL_TX_CTRL_WRAP
;
1430 DBG2(dev
, "xmit(%u) %d" NL
, len
, slot
);
1432 dev
->tx_skb
[slot
] = skb
;
1433 dev
->tx_desc
[slot
].data_ptr
= dma_map_single(&dev
->ofdev
->dev
,
1436 dev
->tx_desc
[slot
].data_len
= (u16
) len
;
1438 dev
->tx_desc
[slot
].ctrl
= ctrl
;
1440 return emac_xmit_finish(dev
, len
);
1443 static inline int emac_xmit_split(struct emac_instance
*dev
, int slot
,
1444 u32 pd
, int len
, int last
, u16 base_ctrl
)
1447 u16 ctrl
= base_ctrl
;
1448 int chunk
= min(len
, MAL_MAX_TX_SIZE
);
1451 slot
= (slot
+ 1) % NUM_TX_BUFF
;
1454 ctrl
|= MAL_TX_CTRL_LAST
;
1455 if (slot
== NUM_TX_BUFF
- 1)
1456 ctrl
|= MAL_TX_CTRL_WRAP
;
1458 dev
->tx_skb
[slot
] = NULL
;
1459 dev
->tx_desc
[slot
].data_ptr
= pd
;
1460 dev
->tx_desc
[slot
].data_len
= (u16
) chunk
;
1461 dev
->tx_desc
[slot
].ctrl
= ctrl
;
1472 /* Tx lock BH disabled (SG version for TAH equipped EMACs) */
1473 static int emac_start_xmit_sg(struct sk_buff
*skb
, struct net_device
*ndev
)
1475 struct emac_instance
*dev
= netdev_priv(ndev
);
1476 int nr_frags
= skb_shinfo(skb
)->nr_frags
;
1477 int len
= skb
->len
, chunk
;
1482 /* This is common "fast" path */
1483 if (likely(!nr_frags
&& len
<= MAL_MAX_TX_SIZE
))
1484 return emac_start_xmit(skb
, ndev
);
1486 len
-= skb
->data_len
;
1488 /* Note, this is only an *estimation*, we can still run out of empty
1489 * slots because of the additional fragmentation into
1490 * MAL_MAX_TX_SIZE-sized chunks
1492 if (unlikely(dev
->tx_cnt
+ nr_frags
+ mal_tx_chunks(len
) > NUM_TX_BUFF
))
1495 ctrl
= EMAC_TX_CTRL_GFCS
| EMAC_TX_CTRL_GP
| MAL_TX_CTRL_READY
|
1496 emac_tx_csum(dev
, skb
);
1497 slot
= dev
->tx_slot
;
1500 dev
->tx_skb
[slot
] = NULL
;
1501 chunk
= min(len
, MAL_MAX_TX_SIZE
);
1502 dev
->tx_desc
[slot
].data_ptr
= pd
=
1503 dma_map_single(&dev
->ofdev
->dev
, skb
->data
, len
, DMA_TO_DEVICE
);
1504 dev
->tx_desc
[slot
].data_len
= (u16
) chunk
;
1507 slot
= emac_xmit_split(dev
, slot
, pd
+ chunk
, len
, !nr_frags
,
1510 for (i
= 0; i
< nr_frags
; ++i
) {
1511 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[i
];
1512 len
= skb_frag_size(frag
);
1514 if (unlikely(dev
->tx_cnt
+ mal_tx_chunks(len
) >= NUM_TX_BUFF
))
1517 pd
= skb_frag_dma_map(&dev
->ofdev
->dev
, frag
, 0, len
,
1520 slot
= emac_xmit_split(dev
, slot
, pd
, len
, i
== nr_frags
- 1,
1524 DBG2(dev
, "xmit_sg(%u) %d - %d" NL
, skb
->len
, dev
->tx_slot
, slot
);
1526 /* Attach skb to the last slot so we don't release it too early */
1527 dev
->tx_skb
[slot
] = skb
;
1529 /* Send the packet out */
1530 if (dev
->tx_slot
== NUM_TX_BUFF
- 1)
1531 ctrl
|= MAL_TX_CTRL_WRAP
;
1533 dev
->tx_desc
[dev
->tx_slot
].ctrl
= ctrl
;
1534 dev
->tx_slot
= (slot
+ 1) % NUM_TX_BUFF
;
1536 return emac_xmit_finish(dev
, skb
->len
);
1539 /* Well, too bad. Our previous estimation was overly optimistic.
1542 while (slot
!= dev
->tx_slot
) {
1543 dev
->tx_desc
[slot
].ctrl
= 0;
1546 slot
= NUM_TX_BUFF
- 1;
1548 ++dev
->estats
.tx_undo
;
1551 netif_stop_queue(ndev
);
1552 DBG2(dev
, "stopped TX queue" NL
);
1553 return NETDEV_TX_BUSY
;
1557 static void emac_parse_tx_error(struct emac_instance
*dev
, u16 ctrl
)
1559 struct emac_error_stats
*st
= &dev
->estats
;
1561 DBG(dev
, "BD TX error %04x" NL
, ctrl
);
1564 if (ctrl
& EMAC_TX_ST_BFCS
)
1565 ++st
->tx_bd_bad_fcs
;
1566 if (ctrl
& EMAC_TX_ST_LCS
)
1567 ++st
->tx_bd_carrier_loss
;
1568 if (ctrl
& EMAC_TX_ST_ED
)
1569 ++st
->tx_bd_excessive_deferral
;
1570 if (ctrl
& EMAC_TX_ST_EC
)
1571 ++st
->tx_bd_excessive_collisions
;
1572 if (ctrl
& EMAC_TX_ST_LC
)
1573 ++st
->tx_bd_late_collision
;
1574 if (ctrl
& EMAC_TX_ST_MC
)
1575 ++st
->tx_bd_multple_collisions
;
1576 if (ctrl
& EMAC_TX_ST_SC
)
1577 ++st
->tx_bd_single_collision
;
1578 if (ctrl
& EMAC_TX_ST_UR
)
1579 ++st
->tx_bd_underrun
;
1580 if (ctrl
& EMAC_TX_ST_SQE
)
1584 static void emac_poll_tx(void *param
)
1586 struct emac_instance
*dev
= param
;
1589 DBG2(dev
, "poll_tx, %d %d" NL
, dev
->tx_cnt
, dev
->ack_slot
);
1591 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
))
1592 bad_mask
= EMAC_IS_BAD_TX_TAH
;
1594 bad_mask
= EMAC_IS_BAD_TX
;
1596 netif_tx_lock_bh(dev
->ndev
);
1599 int slot
= dev
->ack_slot
, n
= 0;
1601 ctrl
= dev
->tx_desc
[slot
].ctrl
;
1602 if (!(ctrl
& MAL_TX_CTRL_READY
)) {
1603 struct sk_buff
*skb
= dev
->tx_skb
[slot
];
1608 dev
->tx_skb
[slot
] = NULL
;
1610 slot
= (slot
+ 1) % NUM_TX_BUFF
;
1612 if (unlikely(ctrl
& bad_mask
))
1613 emac_parse_tx_error(dev
, ctrl
);
1619 dev
->ack_slot
= slot
;
1620 if (netif_queue_stopped(dev
->ndev
) &&
1621 dev
->tx_cnt
< EMAC_TX_WAKEUP_THRESH
)
1622 netif_wake_queue(dev
->ndev
);
1624 DBG2(dev
, "tx %d pkts" NL
, n
);
1627 netif_tx_unlock_bh(dev
->ndev
);
1630 static inline void emac_recycle_rx_skb(struct emac_instance
*dev
, int slot
,
1633 struct sk_buff
*skb
= dev
->rx_skb
[slot
];
1635 DBG2(dev
, "recycle %d %d" NL
, slot
, len
);
1638 dma_map_single(&dev
->ofdev
->dev
, skb
->data
- 2,
1639 EMAC_DMA_ALIGN(len
+ 2), DMA_FROM_DEVICE
);
1641 dev
->rx_desc
[slot
].data_len
= 0;
1643 dev
->rx_desc
[slot
].ctrl
= MAL_RX_CTRL_EMPTY
|
1644 (slot
== (NUM_RX_BUFF
- 1) ? MAL_RX_CTRL_WRAP
: 0);
1647 static void emac_parse_rx_error(struct emac_instance
*dev
, u16 ctrl
)
1649 struct emac_error_stats
*st
= &dev
->estats
;
1651 DBG(dev
, "BD RX error %04x" NL
, ctrl
);
1654 if (ctrl
& EMAC_RX_ST_OE
)
1655 ++st
->rx_bd_overrun
;
1656 if (ctrl
& EMAC_RX_ST_BP
)
1657 ++st
->rx_bd_bad_packet
;
1658 if (ctrl
& EMAC_RX_ST_RP
)
1659 ++st
->rx_bd_runt_packet
;
1660 if (ctrl
& EMAC_RX_ST_SE
)
1661 ++st
->rx_bd_short_event
;
1662 if (ctrl
& EMAC_RX_ST_AE
)
1663 ++st
->rx_bd_alignment_error
;
1664 if (ctrl
& EMAC_RX_ST_BFCS
)
1665 ++st
->rx_bd_bad_fcs
;
1666 if (ctrl
& EMAC_RX_ST_PTL
)
1667 ++st
->rx_bd_packet_too_long
;
1668 if (ctrl
& EMAC_RX_ST_ORE
)
1669 ++st
->rx_bd_out_of_range
;
1670 if (ctrl
& EMAC_RX_ST_IRE
)
1671 ++st
->rx_bd_in_range
;
1674 static inline void emac_rx_csum(struct emac_instance
*dev
,
1675 struct sk_buff
*skb
, u16 ctrl
)
1677 #ifdef CONFIG_IBM_EMAC_TAH
1678 if (!ctrl
&& dev
->tah_dev
) {
1679 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1680 ++dev
->stats
.rx_packets_csum
;
1685 static inline int emac_rx_sg_append(struct emac_instance
*dev
, int slot
)
1687 if (likely(dev
->rx_sg_skb
!= NULL
)) {
1688 int len
= dev
->rx_desc
[slot
].data_len
;
1689 int tot_len
= dev
->rx_sg_skb
->len
+ len
;
1691 if (unlikely(tot_len
+ 2 > dev
->rx_skb_size
)) {
1692 ++dev
->estats
.rx_dropped_mtu
;
1693 dev_kfree_skb(dev
->rx_sg_skb
);
1694 dev
->rx_sg_skb
= NULL
;
1696 memcpy(skb_tail_pointer(dev
->rx_sg_skb
),
1697 dev
->rx_skb
[slot
]->data
, len
);
1698 skb_put(dev
->rx_sg_skb
, len
);
1699 emac_recycle_rx_skb(dev
, slot
, len
);
1703 emac_recycle_rx_skb(dev
, slot
, 0);
1707 /* NAPI poll context */
1708 static int emac_poll_rx(void *param
, int budget
)
1710 struct emac_instance
*dev
= param
;
1711 int slot
= dev
->rx_slot
, received
= 0;
1713 DBG2(dev
, "poll_rx(%d)" NL
, budget
);
1716 while (budget
> 0) {
1718 struct sk_buff
*skb
;
1719 u16 ctrl
= dev
->rx_desc
[slot
].ctrl
;
1721 if (ctrl
& MAL_RX_CTRL_EMPTY
)
1724 skb
= dev
->rx_skb
[slot
];
1726 len
= dev
->rx_desc
[slot
].data_len
;
1728 if (unlikely(!MAL_IS_SINGLE_RX(ctrl
)))
1731 ctrl
&= EMAC_BAD_RX_MASK
;
1732 if (unlikely(ctrl
&& ctrl
!= EMAC_RX_TAH_BAD_CSUM
)) {
1733 emac_parse_rx_error(dev
, ctrl
);
1734 ++dev
->estats
.rx_dropped_error
;
1735 emac_recycle_rx_skb(dev
, slot
, 0);
1740 if (len
< ETH_HLEN
) {
1741 ++dev
->estats
.rx_dropped_stack
;
1742 emac_recycle_rx_skb(dev
, slot
, len
);
1746 if (len
&& len
< EMAC_RX_COPY_THRESH
) {
1747 struct sk_buff
*copy_skb
=
1748 alloc_skb(len
+ EMAC_RX_SKB_HEADROOM
+ 2, GFP_ATOMIC
);
1749 if (unlikely(!copy_skb
))
1752 skb_reserve(copy_skb
, EMAC_RX_SKB_HEADROOM
+ 2);
1753 memcpy(copy_skb
->data
- 2, skb
->data
- 2, len
+ 2);
1754 emac_recycle_rx_skb(dev
, slot
, len
);
1756 } else if (unlikely(emac_alloc_rx_skb(dev
, slot
, GFP_ATOMIC
)))
1761 skb
->protocol
= eth_type_trans(skb
, dev
->ndev
);
1762 emac_rx_csum(dev
, skb
, ctrl
);
1764 if (unlikely(netif_receive_skb(skb
) == NET_RX_DROP
))
1765 ++dev
->estats
.rx_dropped_stack
;
1767 ++dev
->stats
.rx_packets
;
1769 dev
->stats
.rx_bytes
+= len
;
1770 slot
= (slot
+ 1) % NUM_RX_BUFF
;
1775 if (ctrl
& MAL_RX_CTRL_FIRST
) {
1776 BUG_ON(dev
->rx_sg_skb
);
1777 if (unlikely(emac_alloc_rx_skb(dev
, slot
, GFP_ATOMIC
))) {
1778 DBG(dev
, "rx OOM %d" NL
, slot
);
1779 ++dev
->estats
.rx_dropped_oom
;
1780 emac_recycle_rx_skb(dev
, slot
, 0);
1782 dev
->rx_sg_skb
= skb
;
1785 } else if (!emac_rx_sg_append(dev
, slot
) &&
1786 (ctrl
& MAL_RX_CTRL_LAST
)) {
1788 skb
= dev
->rx_sg_skb
;
1789 dev
->rx_sg_skb
= NULL
;
1791 ctrl
&= EMAC_BAD_RX_MASK
;
1792 if (unlikely(ctrl
&& ctrl
!= EMAC_RX_TAH_BAD_CSUM
)) {
1793 emac_parse_rx_error(dev
, ctrl
);
1794 ++dev
->estats
.rx_dropped_error
;
1802 DBG(dev
, "rx OOM %d" NL
, slot
);
1803 /* Drop the packet and recycle skb */
1804 ++dev
->estats
.rx_dropped_oom
;
1805 emac_recycle_rx_skb(dev
, slot
, 0);
1810 DBG2(dev
, "rx %d BDs" NL
, received
);
1811 dev
->rx_slot
= slot
;
1814 if (unlikely(budget
&& test_bit(MAL_COMMAC_RX_STOPPED
, &dev
->commac
.flags
))) {
1816 if (!(dev
->rx_desc
[slot
].ctrl
& MAL_RX_CTRL_EMPTY
)) {
1817 DBG2(dev
, "rx restart" NL
);
1822 if (dev
->rx_sg_skb
) {
1823 DBG2(dev
, "dropping partial rx packet" NL
);
1824 ++dev
->estats
.rx_dropped_error
;
1825 dev_kfree_skb(dev
->rx_sg_skb
);
1826 dev
->rx_sg_skb
= NULL
;
1829 clear_bit(MAL_COMMAC_RX_STOPPED
, &dev
->commac
.flags
);
1830 mal_enable_rx_channel(dev
->mal
, dev
->mal_rx_chan
);
1831 emac_rx_enable(dev
);
1837 /* NAPI poll context */
1838 static int emac_peek_rx(void *param
)
1840 struct emac_instance
*dev
= param
;
1842 return !(dev
->rx_desc
[dev
->rx_slot
].ctrl
& MAL_RX_CTRL_EMPTY
);
1845 /* NAPI poll context */
1846 static int emac_peek_rx_sg(void *param
)
1848 struct emac_instance
*dev
= param
;
1850 int slot
= dev
->rx_slot
;
1852 u16 ctrl
= dev
->rx_desc
[slot
].ctrl
;
1853 if (ctrl
& MAL_RX_CTRL_EMPTY
)
1855 else if (ctrl
& MAL_RX_CTRL_LAST
)
1858 slot
= (slot
+ 1) % NUM_RX_BUFF
;
1860 /* I'm just being paranoid here :) */
1861 if (unlikely(slot
== dev
->rx_slot
))
1867 static void emac_rxde(void *param
)
1869 struct emac_instance
*dev
= param
;
1871 ++dev
->estats
.rx_stopped
;
1872 emac_rx_disable_async(dev
);
1876 static irqreturn_t
emac_irq(int irq
, void *dev_instance
)
1878 struct emac_instance
*dev
= dev_instance
;
1879 struct emac_regs __iomem
*p
= dev
->emacp
;
1880 struct emac_error_stats
*st
= &dev
->estats
;
1883 spin_lock(&dev
->lock
);
1885 isr
= in_be32(&p
->isr
);
1886 out_be32(&p
->isr
, isr
);
1888 DBG(dev
, "isr = %08x" NL
, isr
);
1890 if (isr
& EMAC4_ISR_TXPE
)
1892 if (isr
& EMAC4_ISR_RXPE
)
1894 if (isr
& EMAC4_ISR_TXUE
)
1896 if (isr
& EMAC4_ISR_RXOE
)
1897 ++st
->rx_fifo_overrun
;
1898 if (isr
& EMAC_ISR_OVR
)
1900 if (isr
& EMAC_ISR_BP
)
1901 ++st
->rx_bad_packet
;
1902 if (isr
& EMAC_ISR_RP
)
1903 ++st
->rx_runt_packet
;
1904 if (isr
& EMAC_ISR_SE
)
1905 ++st
->rx_short_event
;
1906 if (isr
& EMAC_ISR_ALE
)
1907 ++st
->rx_alignment_error
;
1908 if (isr
& EMAC_ISR_BFCS
)
1910 if (isr
& EMAC_ISR_PTLE
)
1911 ++st
->rx_packet_too_long
;
1912 if (isr
& EMAC_ISR_ORE
)
1913 ++st
->rx_out_of_range
;
1914 if (isr
& EMAC_ISR_IRE
)
1916 if (isr
& EMAC_ISR_SQE
)
1918 if (isr
& EMAC_ISR_TE
)
1921 spin_unlock(&dev
->lock
);
1926 static struct net_device_stats
*emac_stats(struct net_device
*ndev
)
1928 struct emac_instance
*dev
= netdev_priv(ndev
);
1929 struct emac_stats
*st
= &dev
->stats
;
1930 struct emac_error_stats
*est
= &dev
->estats
;
1931 struct net_device_stats
*nst
= &dev
->nstats
;
1932 unsigned long flags
;
1934 DBG2(dev
, "stats" NL
);
1936 /* Compute "legacy" statistics */
1937 spin_lock_irqsave(&dev
->lock
, flags
);
1938 nst
->rx_packets
= (unsigned long)st
->rx_packets
;
1939 nst
->rx_bytes
= (unsigned long)st
->rx_bytes
;
1940 nst
->tx_packets
= (unsigned long)st
->tx_packets
;
1941 nst
->tx_bytes
= (unsigned long)st
->tx_bytes
;
1942 nst
->rx_dropped
= (unsigned long)(est
->rx_dropped_oom
+
1943 est
->rx_dropped_error
+
1944 est
->rx_dropped_resize
+
1945 est
->rx_dropped_mtu
);
1946 nst
->tx_dropped
= (unsigned long)est
->tx_dropped
;
1948 nst
->rx_errors
= (unsigned long)est
->rx_bd_errors
;
1949 nst
->rx_fifo_errors
= (unsigned long)(est
->rx_bd_overrun
+
1950 est
->rx_fifo_overrun
+
1952 nst
->rx_frame_errors
= (unsigned long)(est
->rx_bd_alignment_error
+
1953 est
->rx_alignment_error
);
1954 nst
->rx_crc_errors
= (unsigned long)(est
->rx_bd_bad_fcs
+
1956 nst
->rx_length_errors
= (unsigned long)(est
->rx_bd_runt_packet
+
1957 est
->rx_bd_short_event
+
1958 est
->rx_bd_packet_too_long
+
1959 est
->rx_bd_out_of_range
+
1960 est
->rx_bd_in_range
+
1961 est
->rx_runt_packet
+
1962 est
->rx_short_event
+
1963 est
->rx_packet_too_long
+
1964 est
->rx_out_of_range
+
1967 nst
->tx_errors
= (unsigned long)(est
->tx_bd_errors
+ est
->tx_errors
);
1968 nst
->tx_fifo_errors
= (unsigned long)(est
->tx_bd_underrun
+
1970 nst
->tx_carrier_errors
= (unsigned long)est
->tx_bd_carrier_loss
;
1971 nst
->collisions
= (unsigned long)(est
->tx_bd_excessive_deferral
+
1972 est
->tx_bd_excessive_collisions
+
1973 est
->tx_bd_late_collision
+
1974 est
->tx_bd_multple_collisions
);
1975 spin_unlock_irqrestore(&dev
->lock
, flags
);
1979 static struct mal_commac_ops emac_commac_ops
= {
1980 .poll_tx
= &emac_poll_tx
,
1981 .poll_rx
= &emac_poll_rx
,
1982 .peek_rx
= &emac_peek_rx
,
1986 static struct mal_commac_ops emac_commac_sg_ops
= {
1987 .poll_tx
= &emac_poll_tx
,
1988 .poll_rx
= &emac_poll_rx
,
1989 .peek_rx
= &emac_peek_rx_sg
,
1993 /* Ethtool support */
1994 static int emac_ethtool_get_settings(struct net_device
*ndev
,
1995 struct ethtool_cmd
*cmd
)
1997 struct emac_instance
*dev
= netdev_priv(ndev
);
1999 cmd
->supported
= dev
->phy
.features
;
2000 cmd
->port
= PORT_MII
;
2001 cmd
->phy_address
= dev
->phy
.address
;
2003 dev
->phy
.address
>= 0 ? XCVR_EXTERNAL
: XCVR_INTERNAL
;
2005 mutex_lock(&dev
->link_lock
);
2006 cmd
->advertising
= dev
->phy
.advertising
;
2007 cmd
->autoneg
= dev
->phy
.autoneg
;
2008 cmd
->speed
= dev
->phy
.speed
;
2009 cmd
->duplex
= dev
->phy
.duplex
;
2010 mutex_unlock(&dev
->link_lock
);
2015 static int emac_ethtool_set_settings(struct net_device
*ndev
,
2016 struct ethtool_cmd
*cmd
)
2018 struct emac_instance
*dev
= netdev_priv(ndev
);
2019 u32 f
= dev
->phy
.features
;
2021 DBG(dev
, "set_settings(%d, %d, %d, 0x%08x)" NL
,
2022 cmd
->autoneg
, cmd
->speed
, cmd
->duplex
, cmd
->advertising
);
2024 /* Basic sanity checks */
2025 if (dev
->phy
.address
< 0)
2027 if (cmd
->autoneg
!= AUTONEG_ENABLE
&& cmd
->autoneg
!= AUTONEG_DISABLE
)
2029 if (cmd
->autoneg
== AUTONEG_ENABLE
&& cmd
->advertising
== 0)
2031 if (cmd
->duplex
!= DUPLEX_HALF
&& cmd
->duplex
!= DUPLEX_FULL
)
2034 if (cmd
->autoneg
== AUTONEG_DISABLE
) {
2035 switch (cmd
->speed
) {
2037 if (cmd
->duplex
== DUPLEX_HALF
&&
2038 !(f
& SUPPORTED_10baseT_Half
))
2040 if (cmd
->duplex
== DUPLEX_FULL
&&
2041 !(f
& SUPPORTED_10baseT_Full
))
2045 if (cmd
->duplex
== DUPLEX_HALF
&&
2046 !(f
& SUPPORTED_100baseT_Half
))
2048 if (cmd
->duplex
== DUPLEX_FULL
&&
2049 !(f
& SUPPORTED_100baseT_Full
))
2053 if (cmd
->duplex
== DUPLEX_HALF
&&
2054 !(f
& SUPPORTED_1000baseT_Half
))
2056 if (cmd
->duplex
== DUPLEX_FULL
&&
2057 !(f
& SUPPORTED_1000baseT_Full
))
2064 mutex_lock(&dev
->link_lock
);
2065 dev
->phy
.def
->ops
->setup_forced(&dev
->phy
, cmd
->speed
,
2067 mutex_unlock(&dev
->link_lock
);
2070 if (!(f
& SUPPORTED_Autoneg
))
2073 mutex_lock(&dev
->link_lock
);
2074 dev
->phy
.def
->ops
->setup_aneg(&dev
->phy
,
2075 (cmd
->advertising
& f
) |
2076 (dev
->phy
.advertising
&
2078 ADVERTISED_Asym_Pause
)));
2079 mutex_unlock(&dev
->link_lock
);
2081 emac_force_link_update(dev
);
2086 static void emac_ethtool_get_ringparam(struct net_device
*ndev
,
2087 struct ethtool_ringparam
*rp
)
2089 rp
->rx_max_pending
= rp
->rx_pending
= NUM_RX_BUFF
;
2090 rp
->tx_max_pending
= rp
->tx_pending
= NUM_TX_BUFF
;
2093 static void emac_ethtool_get_pauseparam(struct net_device
*ndev
,
2094 struct ethtool_pauseparam
*pp
)
2096 struct emac_instance
*dev
= netdev_priv(ndev
);
2098 mutex_lock(&dev
->link_lock
);
2099 if ((dev
->phy
.features
& SUPPORTED_Autoneg
) &&
2100 (dev
->phy
.advertising
& (ADVERTISED_Pause
| ADVERTISED_Asym_Pause
)))
2103 if (dev
->phy
.duplex
== DUPLEX_FULL
) {
2105 pp
->rx_pause
= pp
->tx_pause
= 1;
2106 else if (dev
->phy
.asym_pause
)
2109 mutex_unlock(&dev
->link_lock
);
2112 static int emac_get_regs_len(struct emac_instance
*dev
)
2114 return sizeof(struct emac_ethtool_regs_subhdr
) +
2115 sizeof(struct emac_regs
);
2118 static int emac_ethtool_get_regs_len(struct net_device
*ndev
)
2120 struct emac_instance
*dev
= netdev_priv(ndev
);
2123 size
= sizeof(struct emac_ethtool_regs_hdr
) +
2124 emac_get_regs_len(dev
) + mal_get_regs_len(dev
->mal
);
2125 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
2126 size
+= zmii_get_regs_len(dev
->zmii_dev
);
2127 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
2128 size
+= rgmii_get_regs_len(dev
->rgmii_dev
);
2129 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
))
2130 size
+= tah_get_regs_len(dev
->tah_dev
);
2135 static void *emac_dump_regs(struct emac_instance
*dev
, void *buf
)
2137 struct emac_ethtool_regs_subhdr
*hdr
= buf
;
2139 hdr
->index
= dev
->cell_index
;
2140 if (emac_has_feature(dev
, EMAC_FTR_EMAC4SYNC
)) {
2141 hdr
->version
= EMAC4SYNC_ETHTOOL_REGS_VER
;
2142 } else if (emac_has_feature(dev
, EMAC_FTR_EMAC4
)) {
2143 hdr
->version
= EMAC4_ETHTOOL_REGS_VER
;
2145 hdr
->version
= EMAC_ETHTOOL_REGS_VER
;
2147 memcpy_fromio(hdr
+ 1, dev
->emacp
, sizeof(struct emac_regs
));
2148 return (void *)(hdr
+ 1) + sizeof(struct emac_regs
);
2151 static void emac_ethtool_get_regs(struct net_device
*ndev
,
2152 struct ethtool_regs
*regs
, void *buf
)
2154 struct emac_instance
*dev
= netdev_priv(ndev
);
2155 struct emac_ethtool_regs_hdr
*hdr
= buf
;
2157 hdr
->components
= 0;
2160 buf
= mal_dump_regs(dev
->mal
, buf
);
2161 buf
= emac_dump_regs(dev
, buf
);
2162 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
)) {
2163 hdr
->components
|= EMAC_ETHTOOL_REGS_ZMII
;
2164 buf
= zmii_dump_regs(dev
->zmii_dev
, buf
);
2166 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
)) {
2167 hdr
->components
|= EMAC_ETHTOOL_REGS_RGMII
;
2168 buf
= rgmii_dump_regs(dev
->rgmii_dev
, buf
);
2170 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
)) {
2171 hdr
->components
|= EMAC_ETHTOOL_REGS_TAH
;
2172 buf
= tah_dump_regs(dev
->tah_dev
, buf
);
2176 static int emac_ethtool_nway_reset(struct net_device
*ndev
)
2178 struct emac_instance
*dev
= netdev_priv(ndev
);
2181 DBG(dev
, "nway_reset" NL
);
2183 if (dev
->phy
.address
< 0)
2186 mutex_lock(&dev
->link_lock
);
2187 if (!dev
->phy
.autoneg
) {
2192 dev
->phy
.def
->ops
->setup_aneg(&dev
->phy
, dev
->phy
.advertising
);
2194 mutex_unlock(&dev
->link_lock
);
2195 emac_force_link_update(dev
);
2199 static int emac_ethtool_get_sset_count(struct net_device
*ndev
, int stringset
)
2201 if (stringset
== ETH_SS_STATS
)
2202 return EMAC_ETHTOOL_STATS_COUNT
;
2207 static void emac_ethtool_get_strings(struct net_device
*ndev
, u32 stringset
,
2210 if (stringset
== ETH_SS_STATS
)
2211 memcpy(buf
, &emac_stats_keys
, sizeof(emac_stats_keys
));
2214 static void emac_ethtool_get_ethtool_stats(struct net_device
*ndev
,
2215 struct ethtool_stats
*estats
,
2218 struct emac_instance
*dev
= netdev_priv(ndev
);
2220 memcpy(tmp_stats
, &dev
->stats
, sizeof(dev
->stats
));
2221 tmp_stats
+= sizeof(dev
->stats
) / sizeof(u64
);
2222 memcpy(tmp_stats
, &dev
->estats
, sizeof(dev
->estats
));
2225 static void emac_ethtool_get_drvinfo(struct net_device
*ndev
,
2226 struct ethtool_drvinfo
*info
)
2228 struct emac_instance
*dev
= netdev_priv(ndev
);
2230 strlcpy(info
->driver
, "ibm_emac", sizeof(info
->driver
));
2231 strlcpy(info
->version
, DRV_VERSION
, sizeof(info
->version
));
2232 snprintf(info
->bus_info
, sizeof(info
->bus_info
), "PPC 4xx EMAC-%d %s",
2233 dev
->cell_index
, dev
->ofdev
->dev
.of_node
->full_name
);
2236 static const struct ethtool_ops emac_ethtool_ops
= {
2237 .get_settings
= emac_ethtool_get_settings
,
2238 .set_settings
= emac_ethtool_set_settings
,
2239 .get_drvinfo
= emac_ethtool_get_drvinfo
,
2241 .get_regs_len
= emac_ethtool_get_regs_len
,
2242 .get_regs
= emac_ethtool_get_regs
,
2244 .nway_reset
= emac_ethtool_nway_reset
,
2246 .get_ringparam
= emac_ethtool_get_ringparam
,
2247 .get_pauseparam
= emac_ethtool_get_pauseparam
,
2249 .get_strings
= emac_ethtool_get_strings
,
2250 .get_sset_count
= emac_ethtool_get_sset_count
,
2251 .get_ethtool_stats
= emac_ethtool_get_ethtool_stats
,
2253 .get_link
= ethtool_op_get_link
,
2256 static int emac_ioctl(struct net_device
*ndev
, struct ifreq
*rq
, int cmd
)
2258 struct emac_instance
*dev
= netdev_priv(ndev
);
2259 struct mii_ioctl_data
*data
= if_mii(rq
);
2261 DBG(dev
, "ioctl %08x" NL
, cmd
);
2263 if (dev
->phy
.address
< 0)
2268 data
->phy_id
= dev
->phy
.address
;
2271 data
->val_out
= emac_mdio_read(ndev
, dev
->phy
.address
,
2276 emac_mdio_write(ndev
, dev
->phy
.address
, data
->reg_num
,
2284 struct emac_depentry
{
2286 struct device_node
*node
;
2287 struct platform_device
*ofdev
;
2291 #define EMAC_DEP_MAL_IDX 0
2292 #define EMAC_DEP_ZMII_IDX 1
2293 #define EMAC_DEP_RGMII_IDX 2
2294 #define EMAC_DEP_TAH_IDX 3
2295 #define EMAC_DEP_MDIO_IDX 4
2296 #define EMAC_DEP_PREV_IDX 5
2297 #define EMAC_DEP_COUNT 6
2299 static int emac_check_deps(struct emac_instance
*dev
,
2300 struct emac_depentry
*deps
)
2303 struct device_node
*np
;
2305 for (i
= 0; i
< EMAC_DEP_COUNT
; i
++) {
2306 /* no dependency on that item, allright */
2307 if (deps
[i
].phandle
== 0) {
2311 /* special case for blist as the dependency might go away */
2312 if (i
== EMAC_DEP_PREV_IDX
) {
2313 np
= *(dev
->blist
- 1);
2315 deps
[i
].phandle
= 0;
2319 if (deps
[i
].node
== NULL
)
2320 deps
[i
].node
= of_node_get(np
);
2322 if (deps
[i
].node
== NULL
)
2323 deps
[i
].node
= of_find_node_by_phandle(deps
[i
].phandle
);
2324 if (deps
[i
].node
== NULL
)
2326 if (deps
[i
].ofdev
== NULL
)
2327 deps
[i
].ofdev
= of_find_device_by_node(deps
[i
].node
);
2328 if (deps
[i
].ofdev
== NULL
)
2330 if (deps
[i
].drvdata
== NULL
)
2331 deps
[i
].drvdata
= platform_get_drvdata(deps
[i
].ofdev
);
2332 if (deps
[i
].drvdata
!= NULL
)
2335 return there
== EMAC_DEP_COUNT
;
2338 static void emac_put_deps(struct emac_instance
*dev
)
2340 of_dev_put(dev
->mal_dev
);
2341 of_dev_put(dev
->zmii_dev
);
2342 of_dev_put(dev
->rgmii_dev
);
2343 of_dev_put(dev
->mdio_dev
);
2344 of_dev_put(dev
->tah_dev
);
2347 static int emac_of_bus_notify(struct notifier_block
*nb
, unsigned long action
,
2350 /* We are only intereted in device addition */
2351 if (action
== BUS_NOTIFY_BOUND_DRIVER
)
2352 wake_up_all(&emac_probe_wait
);
2356 static struct notifier_block emac_of_bus_notifier
= {
2357 .notifier_call
= emac_of_bus_notify
2360 static int emac_wait_deps(struct emac_instance
*dev
)
2362 struct emac_depentry deps
[EMAC_DEP_COUNT
];
2365 memset(&deps
, 0, sizeof(deps
));
2367 deps
[EMAC_DEP_MAL_IDX
].phandle
= dev
->mal_ph
;
2368 deps
[EMAC_DEP_ZMII_IDX
].phandle
= dev
->zmii_ph
;
2369 deps
[EMAC_DEP_RGMII_IDX
].phandle
= dev
->rgmii_ph
;
2371 deps
[EMAC_DEP_TAH_IDX
].phandle
= dev
->tah_ph
;
2373 deps
[EMAC_DEP_MDIO_IDX
].phandle
= dev
->mdio_ph
;
2374 if (dev
->blist
&& dev
->blist
> emac_boot_list
)
2375 deps
[EMAC_DEP_PREV_IDX
].phandle
= 0xffffffffu
;
2376 bus_register_notifier(&platform_bus_type
, &emac_of_bus_notifier
);
2377 wait_event_timeout(emac_probe_wait
,
2378 emac_check_deps(dev
, deps
),
2379 EMAC_PROBE_DEP_TIMEOUT
);
2380 bus_unregister_notifier(&platform_bus_type
, &emac_of_bus_notifier
);
2381 err
= emac_check_deps(dev
, deps
) ? 0 : -ENODEV
;
2382 for (i
= 0; i
< EMAC_DEP_COUNT
; i
++) {
2383 of_node_put(deps
[i
].node
);
2385 of_dev_put(deps
[i
].ofdev
);
2388 dev
->mal_dev
= deps
[EMAC_DEP_MAL_IDX
].ofdev
;
2389 dev
->zmii_dev
= deps
[EMAC_DEP_ZMII_IDX
].ofdev
;
2390 dev
->rgmii_dev
= deps
[EMAC_DEP_RGMII_IDX
].ofdev
;
2391 dev
->tah_dev
= deps
[EMAC_DEP_TAH_IDX
].ofdev
;
2392 dev
->mdio_dev
= deps
[EMAC_DEP_MDIO_IDX
].ofdev
;
2394 of_dev_put(deps
[EMAC_DEP_PREV_IDX
].ofdev
);
2398 static int emac_read_uint_prop(struct device_node
*np
, const char *name
,
2399 u32
*val
, int fatal
)
2402 const u32
*prop
= of_get_property(np
, name
, &len
);
2403 if (prop
== NULL
|| len
< sizeof(u32
)) {
2405 printk(KERN_ERR
"%s: missing %s property\n",
2406 np
->full_name
, name
);
2413 static int emac_init_phy(struct emac_instance
*dev
)
2415 struct device_node
*np
= dev
->ofdev
->dev
.of_node
;
2416 struct net_device
*ndev
= dev
->ndev
;
2420 dev
->phy
.dev
= ndev
;
2421 dev
->phy
.mode
= dev
->phy_mode
;
2423 /* PHY-less configuration.
2424 * XXX I probably should move these settings to the dev tree
2426 if (dev
->phy_address
== 0xffffffff && dev
->phy_map
== 0xffffffff) {
2429 /* PHY-less configuration.
2430 * XXX I probably should move these settings to the dev tree
2432 dev
->phy
.address
= -1;
2433 dev
->phy
.features
= SUPPORTED_MII
;
2434 if (emac_phy_supports_gige(dev
->phy_mode
))
2435 dev
->phy
.features
|= SUPPORTED_1000baseT_Full
;
2437 dev
->phy
.features
|= SUPPORTED_100baseT_Full
;
2443 mutex_lock(&emac_phy_map_lock
);
2444 phy_map
= dev
->phy_map
| busy_phy_map
;
2446 DBG(dev
, "PHY maps %08x %08x" NL
, dev
->phy_map
, busy_phy_map
);
2448 dev
->phy
.mdio_read
= emac_mdio_read
;
2449 dev
->phy
.mdio_write
= emac_mdio_write
;
2451 /* Enable internal clock source */
2452 #ifdef CONFIG_PPC_DCR_NATIVE
2453 if (emac_has_feature(dev
, EMAC_FTR_440GX_PHY_CLK_FIX
))
2454 dcri_clrset(SDR0
, SDR0_MFR
, 0, SDR0_MFR_ECS
);
2456 /* PHY clock workaround */
2457 emac_rx_clk_tx(dev
);
2459 /* Enable internal clock source on 440GX*/
2460 #ifdef CONFIG_PPC_DCR_NATIVE
2461 if (emac_has_feature(dev
, EMAC_FTR_440GX_PHY_CLK_FIX
))
2462 dcri_clrset(SDR0
, SDR0_MFR
, 0, SDR0_MFR_ECS
);
2464 /* Configure EMAC with defaults so we can at least use MDIO
2465 * This is needed mostly for 440GX
2467 if (emac_phy_gpcs(dev
->phy
.mode
)) {
2469 * Make GPCS PHY address equal to EMAC index.
2470 * We probably should take into account busy_phy_map
2471 * and/or phy_map here.
2473 * Note that the busy_phy_map is currently global
2474 * while it should probably be per-ASIC...
2476 dev
->phy
.gpcs_address
= dev
->gpcs_address
;
2477 if (dev
->phy
.gpcs_address
== 0xffffffff)
2478 dev
->phy
.address
= dev
->cell_index
;
2481 emac_configure(dev
);
2483 if (dev
->phy_address
!= 0xffffffff)
2484 phy_map
= ~(1 << dev
->phy_address
);
2486 for (i
= 0; i
< 0x20; phy_map
>>= 1, ++i
)
2487 if (!(phy_map
& 1)) {
2489 busy_phy_map
|= 1 << i
;
2491 /* Quick check if there is a PHY at the address */
2492 r
= emac_mdio_read(dev
->ndev
, i
, MII_BMCR
);
2493 if (r
== 0xffff || r
< 0)
2495 if (!emac_mii_phy_probe(&dev
->phy
, i
))
2499 /* Enable external clock source */
2500 #ifdef CONFIG_PPC_DCR_NATIVE
2501 if (emac_has_feature(dev
, EMAC_FTR_440GX_PHY_CLK_FIX
))
2502 dcri_clrset(SDR0
, SDR0_MFR
, SDR0_MFR_ECS
, 0);
2504 mutex_unlock(&emac_phy_map_lock
);
2506 printk(KERN_WARNING
"%s: can't find PHY!\n", np
->full_name
);
2511 if (dev
->phy
.def
->ops
->init
)
2512 dev
->phy
.def
->ops
->init(&dev
->phy
);
2514 /* Disable any PHY features not supported by the platform */
2515 dev
->phy
.def
->features
&= ~dev
->phy_feat_exc
;
2516 dev
->phy
.features
&= ~dev
->phy_feat_exc
;
2518 /* Setup initial link parameters */
2519 if (dev
->phy
.features
& SUPPORTED_Autoneg
) {
2520 adv
= dev
->phy
.features
;
2521 if (!emac_has_feature(dev
, EMAC_FTR_NO_FLOW_CONTROL_40x
))
2522 adv
|= ADVERTISED_Pause
| ADVERTISED_Asym_Pause
;
2523 /* Restart autonegotiation */
2524 dev
->phy
.def
->ops
->setup_aneg(&dev
->phy
, adv
);
2526 u32 f
= dev
->phy
.def
->features
;
2527 int speed
= SPEED_10
, fd
= DUPLEX_HALF
;
2529 /* Select highest supported speed/duplex */
2530 if (f
& SUPPORTED_1000baseT_Full
) {
2533 } else if (f
& SUPPORTED_1000baseT_Half
)
2535 else if (f
& SUPPORTED_100baseT_Full
) {
2538 } else if (f
& SUPPORTED_100baseT_Half
)
2540 else if (f
& SUPPORTED_10baseT_Full
)
2543 /* Force link parameters */
2544 dev
->phy
.def
->ops
->setup_forced(&dev
->phy
, speed
, fd
);
2549 static int emac_init_config(struct emac_instance
*dev
)
2551 struct device_node
*np
= dev
->ofdev
->dev
.of_node
;
2554 /* Read config from device-tree */
2555 if (emac_read_uint_prop(np
, "mal-device", &dev
->mal_ph
, 1))
2557 if (emac_read_uint_prop(np
, "mal-tx-channel", &dev
->mal_tx_chan
, 1))
2559 if (emac_read_uint_prop(np
, "mal-rx-channel", &dev
->mal_rx_chan
, 1))
2561 if (emac_read_uint_prop(np
, "cell-index", &dev
->cell_index
, 1))
2563 if (emac_read_uint_prop(np
, "max-frame-size", &dev
->max_mtu
, 0))
2564 dev
->max_mtu
= ETH_DATA_LEN
;
2565 if (emac_read_uint_prop(np
, "rx-fifo-size", &dev
->rx_fifo_size
, 0))
2566 dev
->rx_fifo_size
= 2048;
2567 if (emac_read_uint_prop(np
, "tx-fifo-size", &dev
->tx_fifo_size
, 0))
2568 dev
->tx_fifo_size
= 2048;
2569 if (emac_read_uint_prop(np
, "rx-fifo-size-gige", &dev
->rx_fifo_size_gige
, 0))
2570 dev
->rx_fifo_size_gige
= dev
->rx_fifo_size
;
2571 if (emac_read_uint_prop(np
, "tx-fifo-size-gige", &dev
->tx_fifo_size_gige
, 0))
2572 dev
->tx_fifo_size_gige
= dev
->tx_fifo_size
;
2573 if (emac_read_uint_prop(np
, "phy-address", &dev
->phy_address
, 0))
2574 dev
->phy_address
= 0xffffffff;
2575 if (emac_read_uint_prop(np
, "phy-map", &dev
->phy_map
, 0))
2576 dev
->phy_map
= 0xffffffff;
2577 if (emac_read_uint_prop(np
, "gpcs-address", &dev
->gpcs_address
, 0))
2578 dev
->gpcs_address
= 0xffffffff;
2579 if (emac_read_uint_prop(np
->parent
, "clock-frequency", &dev
->opb_bus_freq
, 1))
2581 if (emac_read_uint_prop(np
, "tah-device", &dev
->tah_ph
, 0))
2583 if (emac_read_uint_prop(np
, "tah-channel", &dev
->tah_port
, 0))
2585 if (emac_read_uint_prop(np
, "mdio-device", &dev
->mdio_ph
, 0))
2587 if (emac_read_uint_prop(np
, "zmii-device", &dev
->zmii_ph
, 0))
2589 if (emac_read_uint_prop(np
, "zmii-channel", &dev
->zmii_port
, 0))
2590 dev
->zmii_port
= 0xffffffff;
2591 if (emac_read_uint_prop(np
, "rgmii-device", &dev
->rgmii_ph
, 0))
2593 if (emac_read_uint_prop(np
, "rgmii-channel", &dev
->rgmii_port
, 0))
2594 dev
->rgmii_port
= 0xffffffff;
2595 if (emac_read_uint_prop(np
, "fifo-entry-size", &dev
->fifo_entry_size
, 0))
2596 dev
->fifo_entry_size
= 16;
2597 if (emac_read_uint_prop(np
, "mal-burst-size", &dev
->mal_burst_size
, 0))
2598 dev
->mal_burst_size
= 256;
2600 /* PHY mode needs some decoding */
2601 dev
->phy_mode
= of_get_phy_mode(np
);
2602 if (dev
->phy_mode
< 0)
2603 dev
->phy_mode
= PHY_MODE_NA
;
2605 /* Check EMAC version */
2606 if (of_device_is_compatible(np
, "ibm,emac4sync")) {
2607 dev
->features
|= (EMAC_FTR_EMAC4
| EMAC_FTR_EMAC4SYNC
);
2608 if (of_device_is_compatible(np
, "ibm,emac-460ex") ||
2609 of_device_is_compatible(np
, "ibm,emac-460gt"))
2610 dev
->features
|= EMAC_FTR_460EX_PHY_CLK_FIX
;
2611 if (of_device_is_compatible(np
, "ibm,emac-405ex") ||
2612 of_device_is_compatible(np
, "ibm,emac-405exr"))
2613 dev
->features
|= EMAC_FTR_440EP_PHY_CLK_FIX
;
2614 if (of_device_is_compatible(np
, "ibm,emac-apm821xx")) {
2615 dev
->features
|= (EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE
|
2616 EMAC_FTR_APM821XX_NO_HALF_DUPLEX
|
2617 EMAC_FTR_460EX_PHY_CLK_FIX
);
2619 } else if (of_device_is_compatible(np
, "ibm,emac4")) {
2620 dev
->features
|= EMAC_FTR_EMAC4
;
2621 if (of_device_is_compatible(np
, "ibm,emac-440gx"))
2622 dev
->features
|= EMAC_FTR_440GX_PHY_CLK_FIX
;
2624 if (of_device_is_compatible(np
, "ibm,emac-440ep") ||
2625 of_device_is_compatible(np
, "ibm,emac-440gr"))
2626 dev
->features
|= EMAC_FTR_440EP_PHY_CLK_FIX
;
2627 if (of_device_is_compatible(np
, "ibm,emac-405ez")) {
2628 #ifdef CONFIG_IBM_EMAC_NO_FLOW_CTRL
2629 dev
->features
|= EMAC_FTR_NO_FLOW_CONTROL_40x
;
2631 printk(KERN_ERR
"%s: Flow control not disabled!\n",
2639 /* Fixup some feature bits based on the device tree */
2640 if (of_get_property(np
, "has-inverted-stacr-oc", NULL
))
2641 dev
->features
|= EMAC_FTR_STACR_OC_INVERT
;
2642 if (of_get_property(np
, "has-new-stacr-staopc", NULL
))
2643 dev
->features
|= EMAC_FTR_HAS_NEW_STACR
;
2645 /* CAB lacks the appropriate properties */
2646 if (of_device_is_compatible(np
, "ibm,emac-axon"))
2647 dev
->features
|= EMAC_FTR_HAS_NEW_STACR
|
2648 EMAC_FTR_STACR_OC_INVERT
;
2650 /* Enable TAH/ZMII/RGMII features as found */
2651 if (dev
->tah_ph
!= 0) {
2652 #ifdef CONFIG_IBM_EMAC_TAH
2653 dev
->features
|= EMAC_FTR_HAS_TAH
;
2655 printk(KERN_ERR
"%s: TAH support not enabled !\n",
2661 if (dev
->zmii_ph
!= 0) {
2662 #ifdef CONFIG_IBM_EMAC_ZMII
2663 dev
->features
|= EMAC_FTR_HAS_ZMII
;
2665 printk(KERN_ERR
"%s: ZMII support not enabled !\n",
2671 if (dev
->rgmii_ph
!= 0) {
2672 #ifdef CONFIG_IBM_EMAC_RGMII
2673 dev
->features
|= EMAC_FTR_HAS_RGMII
;
2675 printk(KERN_ERR
"%s: RGMII support not enabled !\n",
2681 /* Read MAC-address */
2682 p
= of_get_property(np
, "local-mac-address", NULL
);
2684 printk(KERN_ERR
"%s: Can't find local-mac-address property\n",
2688 memcpy(dev
->ndev
->dev_addr
, p
, ETH_ALEN
);
2690 /* IAHT and GAHT filter parameterization */
2691 if (emac_has_feature(dev
, EMAC_FTR_EMAC4SYNC
)) {
2692 dev
->xaht_slots_shift
= EMAC4SYNC_XAHT_SLOTS_SHIFT
;
2693 dev
->xaht_width_shift
= EMAC4SYNC_XAHT_WIDTH_SHIFT
;
2695 dev
->xaht_slots_shift
= EMAC4_XAHT_SLOTS_SHIFT
;
2696 dev
->xaht_width_shift
= EMAC4_XAHT_WIDTH_SHIFT
;
2699 DBG(dev
, "features : 0x%08x / 0x%08x\n", dev
->features
, EMAC_FTRS_POSSIBLE
);
2700 DBG(dev
, "tx_fifo_size : %d (%d gige)\n", dev
->tx_fifo_size
, dev
->tx_fifo_size_gige
);
2701 DBG(dev
, "rx_fifo_size : %d (%d gige)\n", dev
->rx_fifo_size
, dev
->rx_fifo_size_gige
);
2702 DBG(dev
, "max_mtu : %d\n", dev
->max_mtu
);
2703 DBG(dev
, "OPB freq : %d\n", dev
->opb_bus_freq
);
2708 static const struct net_device_ops emac_netdev_ops
= {
2709 .ndo_open
= emac_open
,
2710 .ndo_stop
= emac_close
,
2711 .ndo_get_stats
= emac_stats
,
2712 .ndo_set_rx_mode
= emac_set_multicast_list
,
2713 .ndo_do_ioctl
= emac_ioctl
,
2714 .ndo_tx_timeout
= emac_tx_timeout
,
2715 .ndo_validate_addr
= eth_validate_addr
,
2716 .ndo_set_mac_address
= emac_set_mac_address
,
2717 .ndo_start_xmit
= emac_start_xmit
,
2720 static const struct net_device_ops emac_gige_netdev_ops
= {
2721 .ndo_open
= emac_open
,
2722 .ndo_stop
= emac_close
,
2723 .ndo_get_stats
= emac_stats
,
2724 .ndo_set_rx_mode
= emac_set_multicast_list
,
2725 .ndo_do_ioctl
= emac_ioctl
,
2726 .ndo_tx_timeout
= emac_tx_timeout
,
2727 .ndo_validate_addr
= eth_validate_addr
,
2728 .ndo_set_mac_address
= emac_set_mac_address
,
2729 .ndo_start_xmit
= emac_start_xmit_sg
,
2730 .ndo_change_mtu
= emac_change_mtu
,
2733 static int emac_probe(struct platform_device
*ofdev
)
2735 struct net_device
*ndev
;
2736 struct emac_instance
*dev
;
2737 struct device_node
*np
= ofdev
->dev
.of_node
;
2738 struct device_node
**blist
= NULL
;
2741 /* Skip unused/unwired EMACS. We leave the check for an unused
2742 * property here for now, but new flat device trees should set a
2743 * status property to "disabled" instead.
2745 if (of_get_property(np
, "unused", NULL
) || !of_device_is_available(np
))
2748 /* Find ourselves in the bootlist if we are there */
2749 for (i
= 0; i
< EMAC_BOOT_LIST_SIZE
; i
++)
2750 if (emac_boot_list
[i
] == np
)
2751 blist
= &emac_boot_list
[i
];
2753 /* Allocate our net_device structure */
2755 ndev
= alloc_etherdev(sizeof(struct emac_instance
));
2759 dev
= netdev_priv(ndev
);
2763 SET_NETDEV_DEV(ndev
, &ofdev
->dev
);
2765 /* Initialize some embedded data structures */
2766 mutex_init(&dev
->mdio_lock
);
2767 mutex_init(&dev
->link_lock
);
2768 spin_lock_init(&dev
->lock
);
2769 INIT_WORK(&dev
->reset_work
, emac_reset_work
);
2771 /* Init various config data based on device-tree */
2772 err
= emac_init_config(dev
);
2776 /* Get interrupts. EMAC irq is mandatory, WOL irq is optional */
2777 dev
->emac_irq
= irq_of_parse_and_map(np
, 0);
2778 dev
->wol_irq
= irq_of_parse_and_map(np
, 1);
2779 if (!dev
->emac_irq
) {
2780 printk(KERN_ERR
"%s: Can't map main interrupt\n", np
->full_name
);
2783 ndev
->irq
= dev
->emac_irq
;
2786 if (of_address_to_resource(np
, 0, &dev
->rsrc_regs
)) {
2787 printk(KERN_ERR
"%s: Can't get registers address\n",
2791 // TODO : request_mem_region
2792 dev
->emacp
= ioremap(dev
->rsrc_regs
.start
,
2793 resource_size(&dev
->rsrc_regs
));
2794 if (dev
->emacp
== NULL
) {
2795 printk(KERN_ERR
"%s: Can't map device registers!\n",
2801 /* Wait for dependent devices */
2802 err
= emac_wait_deps(dev
);
2805 "%s: Timeout waiting for dependent devices\n",
2807 /* display more info about what's missing ? */
2810 dev
->mal
= platform_get_drvdata(dev
->mal_dev
);
2811 if (dev
->mdio_dev
!= NULL
)
2812 dev
->mdio_instance
= platform_get_drvdata(dev
->mdio_dev
);
2814 /* Register with MAL */
2815 dev
->commac
.ops
= &emac_commac_ops
;
2816 dev
->commac
.dev
= dev
;
2817 dev
->commac
.tx_chan_mask
= MAL_CHAN_MASK(dev
->mal_tx_chan
);
2818 dev
->commac
.rx_chan_mask
= MAL_CHAN_MASK(dev
->mal_rx_chan
);
2819 err
= mal_register_commac(dev
->mal
, &dev
->commac
);
2821 printk(KERN_ERR
"%s: failed to register with mal %s!\n",
2822 np
->full_name
, dev
->mal_dev
->dev
.of_node
->full_name
);
2825 dev
->rx_skb_size
= emac_rx_skb_size(ndev
->mtu
);
2826 dev
->rx_sync_size
= emac_rx_sync_size(ndev
->mtu
);
2828 /* Get pointers to BD rings */
2830 dev
->mal
->bd_virt
+ mal_tx_bd_offset(dev
->mal
, dev
->mal_tx_chan
);
2832 dev
->mal
->bd_virt
+ mal_rx_bd_offset(dev
->mal
, dev
->mal_rx_chan
);
2834 DBG(dev
, "tx_desc %p" NL
, dev
->tx_desc
);
2835 DBG(dev
, "rx_desc %p" NL
, dev
->rx_desc
);
2838 memset(dev
->tx_desc
, 0, NUM_TX_BUFF
* sizeof(struct mal_descriptor
));
2839 memset(dev
->rx_desc
, 0, NUM_RX_BUFF
* sizeof(struct mal_descriptor
));
2840 memset(dev
->tx_skb
, 0, NUM_TX_BUFF
* sizeof(struct sk_buff
*));
2841 memset(dev
->rx_skb
, 0, NUM_RX_BUFF
* sizeof(struct sk_buff
*));
2843 /* Attach to ZMII, if needed */
2844 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
) &&
2845 (err
= zmii_attach(dev
->zmii_dev
, dev
->zmii_port
, &dev
->phy_mode
)) != 0)
2846 goto err_unreg_commac
;
2848 /* Attach to RGMII, if needed */
2849 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
) &&
2850 (err
= rgmii_attach(dev
->rgmii_dev
, dev
->rgmii_port
, dev
->phy_mode
)) != 0)
2851 goto err_detach_zmii
;
2853 /* Attach to TAH, if needed */
2854 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
) &&
2855 (err
= tah_attach(dev
->tah_dev
, dev
->tah_port
)) != 0)
2856 goto err_detach_rgmii
;
2858 /* Set some link defaults before we can find out real parameters */
2859 dev
->phy
.speed
= SPEED_100
;
2860 dev
->phy
.duplex
= DUPLEX_FULL
;
2861 dev
->phy
.autoneg
= AUTONEG_DISABLE
;
2862 dev
->phy
.pause
= dev
->phy
.asym_pause
= 0;
2863 dev
->stop_timeout
= STOP_TIMEOUT_100
;
2864 INIT_DELAYED_WORK(&dev
->link_work
, emac_link_timer
);
2866 /* Some SoCs like APM821xx does not support Half Duplex mode. */
2867 if (emac_has_feature(dev
, EMAC_FTR_APM821XX_NO_HALF_DUPLEX
)) {
2868 dev
->phy_feat_exc
= (SUPPORTED_1000baseT_Half
|
2869 SUPPORTED_100baseT_Half
|
2870 SUPPORTED_10baseT_Half
);
2873 /* Find PHY if any */
2874 err
= emac_init_phy(dev
);
2876 goto err_detach_tah
;
2879 ndev
->hw_features
= NETIF_F_IP_CSUM
| NETIF_F_SG
;
2880 ndev
->features
|= ndev
->hw_features
| NETIF_F_RXCSUM
;
2882 ndev
->watchdog_timeo
= 5 * HZ
;
2883 if (emac_phy_supports_gige(dev
->phy_mode
)) {
2884 ndev
->netdev_ops
= &emac_gige_netdev_ops
;
2885 dev
->commac
.ops
= &emac_commac_sg_ops
;
2887 ndev
->netdev_ops
= &emac_netdev_ops
;
2888 ndev
->ethtool_ops
= &emac_ethtool_ops
;
2890 /* MTU range: 46 - 1500 or whatever is in OF */
2891 ndev
->min_mtu
= EMAC_MIN_MTU
;
2892 ndev
->max_mtu
= dev
->max_mtu
;
2894 netif_carrier_off(ndev
);
2896 err
= register_netdev(ndev
);
2898 printk(KERN_ERR
"%s: failed to register net device (%d)!\n",
2899 np
->full_name
, err
);
2900 goto err_detach_tah
;
2903 /* Set our drvdata last as we don't want them visible until we are
2907 platform_set_drvdata(ofdev
, dev
);
2909 /* There's a new kid in town ! Let's tell everybody */
2910 wake_up_all(&emac_probe_wait
);
2913 printk(KERN_INFO
"%s: EMAC-%d %s, MAC %pM\n",
2914 ndev
->name
, dev
->cell_index
, np
->full_name
, ndev
->dev_addr
);
2916 if (dev
->phy_mode
== PHY_MODE_SGMII
)
2917 printk(KERN_NOTICE
"%s: in SGMII mode\n", ndev
->name
);
2919 if (dev
->phy
.address
>= 0)
2920 printk("%s: found %s PHY (0x%02x)\n", ndev
->name
,
2921 dev
->phy
.def
->name
, dev
->phy
.address
);
2923 emac_dbg_register(dev
);
2928 /* I have a bad feeling about this ... */
2931 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
))
2932 tah_detach(dev
->tah_dev
, dev
->tah_port
);
2934 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
2935 rgmii_detach(dev
->rgmii_dev
, dev
->rgmii_port
);
2937 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
2938 zmii_detach(dev
->zmii_dev
, dev
->zmii_port
);
2940 mal_unregister_commac(dev
->mal
, &dev
->commac
);
2944 iounmap(dev
->emacp
);
2947 irq_dispose_mapping(dev
->wol_irq
);
2949 irq_dispose_mapping(dev
->emac_irq
);
2953 /* if we were on the bootlist, remove us as we won't show up and
2954 * wake up all waiters to notify them in case they were waiting
2959 wake_up_all(&emac_probe_wait
);
2964 static int emac_remove(struct platform_device
*ofdev
)
2966 struct emac_instance
*dev
= platform_get_drvdata(ofdev
);
2968 DBG(dev
, "remove" NL
);
2970 unregister_netdev(dev
->ndev
);
2972 cancel_work_sync(&dev
->reset_work
);
2974 if (emac_has_feature(dev
, EMAC_FTR_HAS_TAH
))
2975 tah_detach(dev
->tah_dev
, dev
->tah_port
);
2976 if (emac_has_feature(dev
, EMAC_FTR_HAS_RGMII
))
2977 rgmii_detach(dev
->rgmii_dev
, dev
->rgmii_port
);
2978 if (emac_has_feature(dev
, EMAC_FTR_HAS_ZMII
))
2979 zmii_detach(dev
->zmii_dev
, dev
->zmii_port
);
2981 busy_phy_map
&= ~(1 << dev
->phy
.address
);
2982 DBG(dev
, "busy_phy_map now %#x" NL
, busy_phy_map
);
2984 mal_unregister_commac(dev
->mal
, &dev
->commac
);
2987 emac_dbg_unregister(dev
);
2988 iounmap(dev
->emacp
);
2991 irq_dispose_mapping(dev
->wol_irq
);
2993 irq_dispose_mapping(dev
->emac_irq
);
2995 free_netdev(dev
->ndev
);
3000 /* XXX Features in here should be replaced by properties... */
3001 static const struct of_device_id emac_match
[] =
3005 .compatible
= "ibm,emac",
3009 .compatible
= "ibm,emac4",
3013 .compatible
= "ibm,emac4sync",
3017 MODULE_DEVICE_TABLE(of
, emac_match
);
3019 static struct platform_driver emac_driver
= {
3022 .of_match_table
= emac_match
,
3024 .probe
= emac_probe
,
3025 .remove
= emac_remove
,
3028 static void __init
emac_make_bootlist(void)
3030 struct device_node
*np
= NULL
;
3032 int cell_indices
[EMAC_BOOT_LIST_SIZE
];
3035 while((np
= of_find_all_nodes(np
)) != NULL
) {
3038 if (of_match_node(emac_match
, np
) == NULL
)
3040 if (of_get_property(np
, "unused", NULL
))
3042 idx
= of_get_property(np
, "cell-index", NULL
);
3045 cell_indices
[i
] = *idx
;
3046 emac_boot_list
[i
++] = of_node_get(np
);
3047 if (i
>= EMAC_BOOT_LIST_SIZE
) {
3054 /* Bubble sort them (doh, what a creative algorithm :-) */
3055 for (i
= 0; max
> 1 && (i
< (max
- 1)); i
++)
3056 for (j
= i
; j
< max
; j
++) {
3057 if (cell_indices
[i
] > cell_indices
[j
]) {
3058 swap(emac_boot_list
[i
], emac_boot_list
[j
]);
3059 swap(cell_indices
[i
], cell_indices
[j
]);
3064 static int __init
emac_init(void)
3068 printk(KERN_INFO DRV_DESC
", version " DRV_VERSION
"\n");
3070 /* Init debug stuff */
3073 /* Build EMAC boot list */
3074 emac_make_bootlist();
3076 /* Init submodules */
3089 rc
= platform_driver_register(&emac_driver
);
3107 static void __exit
emac_exit(void)
3111 platform_driver_unregister(&emac_driver
);
3119 /* Destroy EMAC boot list */
3120 for (i
= 0; i
< EMAC_BOOT_LIST_SIZE
; i
++)
3121 of_node_put(emac_boot_list
[i
]);
3124 module_init(emac_init
);
3125 module_exit(emac_exit
);