1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
4 #include <linux/etherdevice.h>
5 #include <linux/of_net.h>
11 #include "i40e_diag.h"
12 #include <net/udp_tunnel.h>
13 /* All i40e tracepoints are defined by the include below, which
14 * must be included exactly once across the whole kernel with
15 * CREATE_TRACE_POINTS defined
17 #define CREATE_TRACE_POINTS
18 #include "i40e_trace.h"
20 const char i40e_driver_name
[] = "i40e";
21 static const char i40e_driver_string
[] =
22 "Intel(R) Ethernet Connection XL710 Network Driver";
26 #define DRV_VERSION_MAJOR 2
27 #define DRV_VERSION_MINOR 3
28 #define DRV_VERSION_BUILD 2
29 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
30 __stringify(DRV_VERSION_MINOR) "." \
31 __stringify(DRV_VERSION_BUILD) DRV_KERN
32 const char i40e_driver_version_str
[] = DRV_VERSION
;
33 static const char i40e_copyright
[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
35 /* a bit of forward declarations */
36 static void i40e_vsi_reinit_locked(struct i40e_vsi
*vsi
);
37 static void i40e_handle_reset_warning(struct i40e_pf
*pf
, bool lock_acquired
);
38 static int i40e_add_vsi(struct i40e_vsi
*vsi
);
39 static int i40e_add_veb(struct i40e_veb
*veb
, struct i40e_vsi
*vsi
);
40 static int i40e_setup_pf_switch(struct i40e_pf
*pf
, bool reinit
);
41 static int i40e_setup_misc_vector(struct i40e_pf
*pf
);
42 static void i40e_determine_queue_usage(struct i40e_pf
*pf
);
43 static int i40e_setup_pf_filter_control(struct i40e_pf
*pf
);
44 static void i40e_prep_for_reset(struct i40e_pf
*pf
, bool lock_acquired
);
45 static int i40e_reset(struct i40e_pf
*pf
);
46 static void i40e_rebuild(struct i40e_pf
*pf
, bool reinit
, bool lock_acquired
);
47 static void i40e_fdir_sb_setup(struct i40e_pf
*pf
);
48 static int i40e_veb_get_bw_info(struct i40e_veb
*veb
);
49 static int i40e_get_capabilities(struct i40e_pf
*pf
,
50 enum i40e_admin_queue_opc list_type
);
53 /* i40e_pci_tbl - PCI Device ID Table
55 * Last entry must be all 0s
57 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
58 * Class, Class Mask, private data (not used) }
60 static const struct pci_device_id i40e_pci_tbl
[] = {
61 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_SFP_XL710
), 0},
62 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_QEMU
), 0},
63 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_KX_B
), 0},
64 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_KX_C
), 0},
65 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_QSFP_A
), 0},
66 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_QSFP_B
), 0},
67 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_QSFP_C
), 0},
68 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_10G_BASE_T
), 0},
69 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_10G_BASE_T4
), 0},
70 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_KX_X722
), 0},
71 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_QSFP_X722
), 0},
72 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_SFP_X722
), 0},
73 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_1G_BASE_T_X722
), 0},
74 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_10G_BASE_T_X722
), 0},
75 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_SFP_I_X722
), 0},
76 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_20G_KR2
), 0},
77 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_20G_KR2_A
), 0},
78 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_25G_B
), 0},
79 {PCI_VDEVICE(INTEL
, I40E_DEV_ID_25G_SFP28
), 0},
80 /* required last entry */
83 MODULE_DEVICE_TABLE(pci
, i40e_pci_tbl
);
85 #define I40E_MAX_VF_COUNT 128
86 static int debug
= -1;
87 module_param(debug
, uint
, 0);
88 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
90 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
91 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
92 MODULE_LICENSE("GPL");
93 MODULE_VERSION(DRV_VERSION
);
95 static struct workqueue_struct
*i40e_wq
;
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
104 int i40e_allocate_dma_mem_d(struct i40e_hw
*hw
, struct i40e_dma_mem
*mem
,
105 u64 size
, u32 alignment
)
107 struct i40e_pf
*pf
= (struct i40e_pf
*)hw
->back
;
109 mem
->size
= ALIGN(size
, alignment
);
110 mem
->va
= dma_zalloc_coherent(&pf
->pdev
->dev
, mem
->size
,
111 &mem
->pa
, GFP_KERNEL
);
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
123 int i40e_free_dma_mem_d(struct i40e_hw
*hw
, struct i40e_dma_mem
*mem
)
125 struct i40e_pf
*pf
= (struct i40e_pf
*)hw
->back
;
127 dma_free_coherent(&pf
->pdev
->dev
, mem
->size
, mem
->va
, mem
->pa
);
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
141 int i40e_allocate_virt_mem_d(struct i40e_hw
*hw
, struct i40e_virt_mem
*mem
,
145 mem
->va
= kzalloc(size
, GFP_KERNEL
);
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
158 int i40e_free_virt_mem_d(struct i40e_hw
*hw
, struct i40e_virt_mem
*mem
)
160 /* it's ok to kfree a NULL pointer */
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
175 * Returns the base item index of the lump, or negative for error
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
181 static int i40e_get_lump(struct i40e_pf
*pf
, struct i40e_lump_tracking
*pile
,
187 if (!pile
|| needed
== 0 || id
>= I40E_PILE_VALID_BIT
) {
188 dev_info(&pf
->pdev
->dev
,
189 "param err: pile=%s needed=%d id=0x%04x\n",
190 pile
? "<valid>" : "<null>", needed
, id
);
194 /* start the linear search with an imperfect hint */
195 i
= pile
->search_hint
;
196 while (i
< pile
->num_entries
) {
197 /* skip already allocated entries */
198 if (pile
->list
[i
] & I40E_PILE_VALID_BIT
) {
203 /* do we have enough in this lump? */
204 for (j
= 0; (j
< needed
) && ((i
+j
) < pile
->num_entries
); j
++) {
205 if (pile
->list
[i
+j
] & I40E_PILE_VALID_BIT
)
210 /* there was enough, so assign it to the requestor */
211 for (j
= 0; j
< needed
; j
++)
212 pile
->list
[i
+j
] = id
| I40E_PILE_VALID_BIT
;
214 pile
->search_hint
= i
+ j
;
218 /* not enough, so skip over it and continue looking */
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
231 * Returns the count of items in the lump
233 static int i40e_put_lump(struct i40e_lump_tracking
*pile
, u16 index
, u16 id
)
235 int valid_id
= (id
| I40E_PILE_VALID_BIT
);
239 if (!pile
|| index
>= pile
->num_entries
)
243 i
< pile
->num_entries
&& pile
->list
[i
] == valid_id
;
249 if (count
&& index
< pile
->search_hint
)
250 pile
->search_hint
= index
;
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf: the pf structure to search for the vsi
258 * @id: id of the vsi it is searching for
260 struct i40e_vsi
*i40e_find_vsi_from_id(struct i40e_pf
*pf
, u16 id
)
264 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++)
265 if (pf
->vsi
[i
] && (pf
->vsi
[i
]->id
== id
))
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
275 * If not already scheduled, this puts the task into the work queue
277 void i40e_service_event_schedule(struct i40e_pf
*pf
)
279 if (!test_bit(__I40E_DOWN
, pf
->state
) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
))
281 queue_work(i40e_wq
, &pf
->service_task
);
285 * i40e_tx_timeout - Respond to a Tx Hang
286 * @netdev: network interface device structure
288 * If any port has noticed a Tx timeout, it is likely that the whole
289 * device is munged, not just the one netdev port, so go for the full
292 static void i40e_tx_timeout(struct net_device
*netdev
)
294 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
295 struct i40e_vsi
*vsi
= np
->vsi
;
296 struct i40e_pf
*pf
= vsi
->back
;
297 struct i40e_ring
*tx_ring
= NULL
;
298 unsigned int i
, hung_queue
= 0;
301 pf
->tx_timeout_count
++;
303 /* find the stopped queue the same way the stack does */
304 for (i
= 0; i
< netdev
->num_tx_queues
; i
++) {
305 struct netdev_queue
*q
;
306 unsigned long trans_start
;
308 q
= netdev_get_tx_queue(netdev
, i
);
309 trans_start
= q
->trans_start
;
310 if (netif_xmit_stopped(q
) &&
312 (trans_start
+ netdev
->watchdog_timeo
))) {
318 if (i
== netdev
->num_tx_queues
) {
319 netdev_info(netdev
, "tx_timeout: no netdev hung queue found\n");
321 /* now that we have an index, find the tx_ring struct */
322 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++) {
323 if (vsi
->tx_rings
[i
] && vsi
->tx_rings
[i
]->desc
) {
325 vsi
->tx_rings
[i
]->queue_index
) {
326 tx_ring
= vsi
->tx_rings
[i
];
333 if (time_after(jiffies
, (pf
->tx_timeout_last_recovery
+ HZ
*20)))
334 pf
->tx_timeout_recovery_level
= 1; /* reset after some time */
335 else if (time_before(jiffies
,
336 (pf
->tx_timeout_last_recovery
+ netdev
->watchdog_timeo
)))
337 return; /* don't do any new action before the next timeout */
340 head
= i40e_get_head(tx_ring
);
341 /* Read interrupt register */
342 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
344 I40E_PFINT_DYN_CTLN(tx_ring
->q_vector
->v_idx
+
345 tx_ring
->vsi
->base_vector
- 1));
347 val
= rd32(&pf
->hw
, I40E_PFINT_DYN_CTL0
);
349 netdev_info(netdev
, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
350 vsi
->seid
, hung_queue
, tx_ring
->next_to_clean
,
351 head
, tx_ring
->next_to_use
,
352 readl(tx_ring
->tail
), val
);
355 pf
->tx_timeout_last_recovery
= jiffies
;
356 netdev_info(netdev
, "tx_timeout recovery level %d, hung_queue %d\n",
357 pf
->tx_timeout_recovery_level
, hung_queue
);
359 switch (pf
->tx_timeout_recovery_level
) {
361 set_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
);
364 set_bit(__I40E_CORE_RESET_REQUESTED
, pf
->state
);
367 set_bit(__I40E_GLOBAL_RESET_REQUESTED
, pf
->state
);
370 netdev_err(netdev
, "tx_timeout recovery unsuccessful\n");
374 i40e_service_event_schedule(pf
);
375 pf
->tx_timeout_recovery_level
++;
379 * i40e_get_vsi_stats_struct - Get System Network Statistics
380 * @vsi: the VSI we care about
382 * Returns the address of the device statistics structure.
383 * The statistics are actually updated from the service task.
385 struct rtnl_link_stats64
*i40e_get_vsi_stats_struct(struct i40e_vsi
*vsi
)
387 return &vsi
->net_stats
;
391 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
392 * @ring: Tx ring to get statistics from
393 * @stats: statistics entry to be updated
395 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring
*ring
,
396 struct rtnl_link_stats64
*stats
)
402 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
403 packets
= ring
->stats
.packets
;
404 bytes
= ring
->stats
.bytes
;
405 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
407 stats
->tx_packets
+= packets
;
408 stats
->tx_bytes
+= bytes
;
412 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
413 * @netdev: network interface device structure
414 * @stats: data structure to store statistics
416 * Returns the address of the device statistics structure.
417 * The statistics are actually updated from the service task.
419 static void i40e_get_netdev_stats_struct(struct net_device
*netdev
,
420 struct rtnl_link_stats64
*stats
)
422 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
423 struct i40e_ring
*tx_ring
, *rx_ring
;
424 struct i40e_vsi
*vsi
= np
->vsi
;
425 struct rtnl_link_stats64
*vsi_stats
= i40e_get_vsi_stats_struct(vsi
);
428 if (test_bit(__I40E_VSI_DOWN
, vsi
->state
))
435 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++) {
439 tx_ring
= READ_ONCE(vsi
->tx_rings
[i
]);
442 i40e_get_netdev_stats_struct_tx(tx_ring
, stats
);
444 rx_ring
= &tx_ring
[1];
447 start
= u64_stats_fetch_begin_irq(&rx_ring
->syncp
);
448 packets
= rx_ring
->stats
.packets
;
449 bytes
= rx_ring
->stats
.bytes
;
450 } while (u64_stats_fetch_retry_irq(&rx_ring
->syncp
, start
));
452 stats
->rx_packets
+= packets
;
453 stats
->rx_bytes
+= bytes
;
455 if (i40e_enabled_xdp_vsi(vsi
))
456 i40e_get_netdev_stats_struct_tx(&rx_ring
[1], stats
);
460 /* following stats updated by i40e_watchdog_subtask() */
461 stats
->multicast
= vsi_stats
->multicast
;
462 stats
->tx_errors
= vsi_stats
->tx_errors
;
463 stats
->tx_dropped
= vsi_stats
->tx_dropped
;
464 stats
->rx_errors
= vsi_stats
->rx_errors
;
465 stats
->rx_dropped
= vsi_stats
->rx_dropped
;
466 stats
->rx_crc_errors
= vsi_stats
->rx_crc_errors
;
467 stats
->rx_length_errors
= vsi_stats
->rx_length_errors
;
471 * i40e_vsi_reset_stats - Resets all stats of the given vsi
472 * @vsi: the VSI to have its stats reset
474 void i40e_vsi_reset_stats(struct i40e_vsi
*vsi
)
476 struct rtnl_link_stats64
*ns
;
482 ns
= i40e_get_vsi_stats_struct(vsi
);
483 memset(ns
, 0, sizeof(*ns
));
484 memset(&vsi
->net_stats_offsets
, 0, sizeof(vsi
->net_stats_offsets
));
485 memset(&vsi
->eth_stats
, 0, sizeof(vsi
->eth_stats
));
486 memset(&vsi
->eth_stats_offsets
, 0, sizeof(vsi
->eth_stats_offsets
));
487 if (vsi
->rx_rings
&& vsi
->rx_rings
[0]) {
488 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++) {
489 memset(&vsi
->rx_rings
[i
]->stats
, 0,
490 sizeof(vsi
->rx_rings
[i
]->stats
));
491 memset(&vsi
->rx_rings
[i
]->rx_stats
, 0,
492 sizeof(vsi
->rx_rings
[i
]->rx_stats
));
493 memset(&vsi
->tx_rings
[i
]->stats
, 0,
494 sizeof(vsi
->tx_rings
[i
]->stats
));
495 memset(&vsi
->tx_rings
[i
]->tx_stats
, 0,
496 sizeof(vsi
->tx_rings
[i
]->tx_stats
));
499 vsi
->stat_offsets_loaded
= false;
503 * i40e_pf_reset_stats - Reset all of the stats for the given PF
504 * @pf: the PF to be reset
506 void i40e_pf_reset_stats(struct i40e_pf
*pf
)
510 memset(&pf
->stats
, 0, sizeof(pf
->stats
));
511 memset(&pf
->stats_offsets
, 0, sizeof(pf
->stats_offsets
));
512 pf
->stat_offsets_loaded
= false;
514 for (i
= 0; i
< I40E_MAX_VEB
; i
++) {
516 memset(&pf
->veb
[i
]->stats
, 0,
517 sizeof(pf
->veb
[i
]->stats
));
518 memset(&pf
->veb
[i
]->stats_offsets
, 0,
519 sizeof(pf
->veb
[i
]->stats_offsets
));
520 pf
->veb
[i
]->stat_offsets_loaded
= false;
523 pf
->hw_csum_rx_error
= 0;
527 * i40e_stat_update48 - read and update a 48 bit stat from the chip
528 * @hw: ptr to the hardware info
529 * @hireg: the high 32 bit reg to read
530 * @loreg: the low 32 bit reg to read
531 * @offset_loaded: has the initial offset been loaded yet
532 * @offset: ptr to current offset value
533 * @stat: ptr to the stat
535 * Since the device stats are not reset at PFReset, they likely will not
536 * be zeroed when the driver starts. We'll save the first values read
537 * and use them as offsets to be subtracted from the raw values in order
538 * to report stats that count from zero. In the process, we also manage
539 * the potential roll-over.
541 static void i40e_stat_update48(struct i40e_hw
*hw
, u32 hireg
, u32 loreg
,
542 bool offset_loaded
, u64
*offset
, u64
*stat
)
546 if (hw
->device_id
== I40E_DEV_ID_QEMU
) {
547 new_data
= rd32(hw
, loreg
);
548 new_data
|= ((u64
)(rd32(hw
, hireg
) & 0xFFFF)) << 32;
550 new_data
= rd64(hw
, loreg
);
554 if (likely(new_data
>= *offset
))
555 *stat
= new_data
- *offset
;
557 *stat
= (new_data
+ BIT_ULL(48)) - *offset
;
558 *stat
&= 0xFFFFFFFFFFFFULL
;
562 * i40e_stat_update32 - read and update a 32 bit stat from the chip
563 * @hw: ptr to the hardware info
564 * @reg: the hw reg to read
565 * @offset_loaded: has the initial offset been loaded yet
566 * @offset: ptr to current offset value
567 * @stat: ptr to the stat
569 static void i40e_stat_update32(struct i40e_hw
*hw
, u32 reg
,
570 bool offset_loaded
, u64
*offset
, u64
*stat
)
574 new_data
= rd32(hw
, reg
);
577 if (likely(new_data
>= *offset
))
578 *stat
= (u32
)(new_data
- *offset
);
580 *stat
= (u32
)((new_data
+ BIT_ULL(32)) - *offset
);
584 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
585 * @hw: ptr to the hardware info
586 * @reg: the hw reg to read and clear
587 * @stat: ptr to the stat
589 static void i40e_stat_update_and_clear32(struct i40e_hw
*hw
, u32 reg
, u64
*stat
)
591 u32 new_data
= rd32(hw
, reg
);
593 wr32(hw
, reg
, 1); /* must write a nonzero value to clear register */
598 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
599 * @vsi: the VSI to be updated
601 void i40e_update_eth_stats(struct i40e_vsi
*vsi
)
603 int stat_idx
= le16_to_cpu(vsi
->info
.stat_counter_idx
);
604 struct i40e_pf
*pf
= vsi
->back
;
605 struct i40e_hw
*hw
= &pf
->hw
;
606 struct i40e_eth_stats
*oes
;
607 struct i40e_eth_stats
*es
; /* device's eth stats */
609 es
= &vsi
->eth_stats
;
610 oes
= &vsi
->eth_stats_offsets
;
612 /* Gather up the stats that the hw collects */
613 i40e_stat_update32(hw
, I40E_GLV_TEPC(stat_idx
),
614 vsi
->stat_offsets_loaded
,
615 &oes
->tx_errors
, &es
->tx_errors
);
616 i40e_stat_update32(hw
, I40E_GLV_RDPC(stat_idx
),
617 vsi
->stat_offsets_loaded
,
618 &oes
->rx_discards
, &es
->rx_discards
);
619 i40e_stat_update32(hw
, I40E_GLV_RUPP(stat_idx
),
620 vsi
->stat_offsets_loaded
,
621 &oes
->rx_unknown_protocol
, &es
->rx_unknown_protocol
);
622 i40e_stat_update32(hw
, I40E_GLV_TEPC(stat_idx
),
623 vsi
->stat_offsets_loaded
,
624 &oes
->tx_errors
, &es
->tx_errors
);
626 i40e_stat_update48(hw
, I40E_GLV_GORCH(stat_idx
),
627 I40E_GLV_GORCL(stat_idx
),
628 vsi
->stat_offsets_loaded
,
629 &oes
->rx_bytes
, &es
->rx_bytes
);
630 i40e_stat_update48(hw
, I40E_GLV_UPRCH(stat_idx
),
631 I40E_GLV_UPRCL(stat_idx
),
632 vsi
->stat_offsets_loaded
,
633 &oes
->rx_unicast
, &es
->rx_unicast
);
634 i40e_stat_update48(hw
, I40E_GLV_MPRCH(stat_idx
),
635 I40E_GLV_MPRCL(stat_idx
),
636 vsi
->stat_offsets_loaded
,
637 &oes
->rx_multicast
, &es
->rx_multicast
);
638 i40e_stat_update48(hw
, I40E_GLV_BPRCH(stat_idx
),
639 I40E_GLV_BPRCL(stat_idx
),
640 vsi
->stat_offsets_loaded
,
641 &oes
->rx_broadcast
, &es
->rx_broadcast
);
643 i40e_stat_update48(hw
, I40E_GLV_GOTCH(stat_idx
),
644 I40E_GLV_GOTCL(stat_idx
),
645 vsi
->stat_offsets_loaded
,
646 &oes
->tx_bytes
, &es
->tx_bytes
);
647 i40e_stat_update48(hw
, I40E_GLV_UPTCH(stat_idx
),
648 I40E_GLV_UPTCL(stat_idx
),
649 vsi
->stat_offsets_loaded
,
650 &oes
->tx_unicast
, &es
->tx_unicast
);
651 i40e_stat_update48(hw
, I40E_GLV_MPTCH(stat_idx
),
652 I40E_GLV_MPTCL(stat_idx
),
653 vsi
->stat_offsets_loaded
,
654 &oes
->tx_multicast
, &es
->tx_multicast
);
655 i40e_stat_update48(hw
, I40E_GLV_BPTCH(stat_idx
),
656 I40E_GLV_BPTCL(stat_idx
),
657 vsi
->stat_offsets_loaded
,
658 &oes
->tx_broadcast
, &es
->tx_broadcast
);
659 vsi
->stat_offsets_loaded
= true;
663 * i40e_update_veb_stats - Update Switch component statistics
664 * @veb: the VEB being updated
666 static void i40e_update_veb_stats(struct i40e_veb
*veb
)
668 struct i40e_pf
*pf
= veb
->pf
;
669 struct i40e_hw
*hw
= &pf
->hw
;
670 struct i40e_eth_stats
*oes
;
671 struct i40e_eth_stats
*es
; /* device's eth stats */
672 struct i40e_veb_tc_stats
*veb_oes
;
673 struct i40e_veb_tc_stats
*veb_es
;
676 idx
= veb
->stats_idx
;
678 oes
= &veb
->stats_offsets
;
679 veb_es
= &veb
->tc_stats
;
680 veb_oes
= &veb
->tc_stats_offsets
;
682 /* Gather up the stats that the hw collects */
683 i40e_stat_update32(hw
, I40E_GLSW_TDPC(idx
),
684 veb
->stat_offsets_loaded
,
685 &oes
->tx_discards
, &es
->tx_discards
);
686 if (hw
->revision_id
> 0)
687 i40e_stat_update32(hw
, I40E_GLSW_RUPP(idx
),
688 veb
->stat_offsets_loaded
,
689 &oes
->rx_unknown_protocol
,
690 &es
->rx_unknown_protocol
);
691 i40e_stat_update48(hw
, I40E_GLSW_GORCH(idx
), I40E_GLSW_GORCL(idx
),
692 veb
->stat_offsets_loaded
,
693 &oes
->rx_bytes
, &es
->rx_bytes
);
694 i40e_stat_update48(hw
, I40E_GLSW_UPRCH(idx
), I40E_GLSW_UPRCL(idx
),
695 veb
->stat_offsets_loaded
,
696 &oes
->rx_unicast
, &es
->rx_unicast
);
697 i40e_stat_update48(hw
, I40E_GLSW_MPRCH(idx
), I40E_GLSW_MPRCL(idx
),
698 veb
->stat_offsets_loaded
,
699 &oes
->rx_multicast
, &es
->rx_multicast
);
700 i40e_stat_update48(hw
, I40E_GLSW_BPRCH(idx
), I40E_GLSW_BPRCL(idx
),
701 veb
->stat_offsets_loaded
,
702 &oes
->rx_broadcast
, &es
->rx_broadcast
);
704 i40e_stat_update48(hw
, I40E_GLSW_GOTCH(idx
), I40E_GLSW_GOTCL(idx
),
705 veb
->stat_offsets_loaded
,
706 &oes
->tx_bytes
, &es
->tx_bytes
);
707 i40e_stat_update48(hw
, I40E_GLSW_UPTCH(idx
), I40E_GLSW_UPTCL(idx
),
708 veb
->stat_offsets_loaded
,
709 &oes
->tx_unicast
, &es
->tx_unicast
);
710 i40e_stat_update48(hw
, I40E_GLSW_MPTCH(idx
), I40E_GLSW_MPTCL(idx
),
711 veb
->stat_offsets_loaded
,
712 &oes
->tx_multicast
, &es
->tx_multicast
);
713 i40e_stat_update48(hw
, I40E_GLSW_BPTCH(idx
), I40E_GLSW_BPTCL(idx
),
714 veb
->stat_offsets_loaded
,
715 &oes
->tx_broadcast
, &es
->tx_broadcast
);
716 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
717 i40e_stat_update48(hw
, I40E_GLVEBTC_RPCH(i
, idx
),
718 I40E_GLVEBTC_RPCL(i
, idx
),
719 veb
->stat_offsets_loaded
,
720 &veb_oes
->tc_rx_packets
[i
],
721 &veb_es
->tc_rx_packets
[i
]);
722 i40e_stat_update48(hw
, I40E_GLVEBTC_RBCH(i
, idx
),
723 I40E_GLVEBTC_RBCL(i
, idx
),
724 veb
->stat_offsets_loaded
,
725 &veb_oes
->tc_rx_bytes
[i
],
726 &veb_es
->tc_rx_bytes
[i
]);
727 i40e_stat_update48(hw
, I40E_GLVEBTC_TPCH(i
, idx
),
728 I40E_GLVEBTC_TPCL(i
, idx
),
729 veb
->stat_offsets_loaded
,
730 &veb_oes
->tc_tx_packets
[i
],
731 &veb_es
->tc_tx_packets
[i
]);
732 i40e_stat_update48(hw
, I40E_GLVEBTC_TBCH(i
, idx
),
733 I40E_GLVEBTC_TBCL(i
, idx
),
734 veb
->stat_offsets_loaded
,
735 &veb_oes
->tc_tx_bytes
[i
],
736 &veb_es
->tc_tx_bytes
[i
]);
738 veb
->stat_offsets_loaded
= true;
742 * i40e_update_vsi_stats - Update the vsi statistics counters.
743 * @vsi: the VSI to be updated
745 * There are a few instances where we store the same stat in a
746 * couple of different structs. This is partly because we have
747 * the netdev stats that need to be filled out, which is slightly
748 * different from the "eth_stats" defined by the chip and used in
749 * VF communications. We sort it out here.
751 static void i40e_update_vsi_stats(struct i40e_vsi
*vsi
)
753 struct i40e_pf
*pf
= vsi
->back
;
754 struct rtnl_link_stats64
*ons
;
755 struct rtnl_link_stats64
*ns
; /* netdev stats */
756 struct i40e_eth_stats
*oes
;
757 struct i40e_eth_stats
*es
; /* device's eth stats */
758 u32 tx_restart
, tx_busy
;
769 if (test_bit(__I40E_VSI_DOWN
, vsi
->state
) ||
770 test_bit(__I40E_CONFIG_BUSY
, pf
->state
))
773 ns
= i40e_get_vsi_stats_struct(vsi
);
774 ons
= &vsi
->net_stats_offsets
;
775 es
= &vsi
->eth_stats
;
776 oes
= &vsi
->eth_stats_offsets
;
778 /* Gather up the netdev and vsi stats that the driver collects
779 * on the fly during packet processing
783 tx_restart
= tx_busy
= tx_linearize
= tx_force_wb
= 0;
787 for (q
= 0; q
< vsi
->num_queue_pairs
; q
++) {
789 p
= READ_ONCE(vsi
->tx_rings
[q
]);
792 start
= u64_stats_fetch_begin_irq(&p
->syncp
);
793 packets
= p
->stats
.packets
;
794 bytes
= p
->stats
.bytes
;
795 } while (u64_stats_fetch_retry_irq(&p
->syncp
, start
));
798 tx_restart
+= p
->tx_stats
.restart_queue
;
799 tx_busy
+= p
->tx_stats
.tx_busy
;
800 tx_linearize
+= p
->tx_stats
.tx_linearize
;
801 tx_force_wb
+= p
->tx_stats
.tx_force_wb
;
803 /* Rx queue is part of the same block as Tx queue */
806 start
= u64_stats_fetch_begin_irq(&p
->syncp
);
807 packets
= p
->stats
.packets
;
808 bytes
= p
->stats
.bytes
;
809 } while (u64_stats_fetch_retry_irq(&p
->syncp
, start
));
812 rx_buf
+= p
->rx_stats
.alloc_buff_failed
;
813 rx_page
+= p
->rx_stats
.alloc_page_failed
;
816 vsi
->tx_restart
= tx_restart
;
817 vsi
->tx_busy
= tx_busy
;
818 vsi
->tx_linearize
= tx_linearize
;
819 vsi
->tx_force_wb
= tx_force_wb
;
820 vsi
->rx_page_failed
= rx_page
;
821 vsi
->rx_buf_failed
= rx_buf
;
823 ns
->rx_packets
= rx_p
;
825 ns
->tx_packets
= tx_p
;
828 /* update netdev stats from eth stats */
829 i40e_update_eth_stats(vsi
);
830 ons
->tx_errors
= oes
->tx_errors
;
831 ns
->tx_errors
= es
->tx_errors
;
832 ons
->multicast
= oes
->rx_multicast
;
833 ns
->multicast
= es
->rx_multicast
;
834 ons
->rx_dropped
= oes
->rx_discards
;
835 ns
->rx_dropped
= es
->rx_discards
;
836 ons
->tx_dropped
= oes
->tx_discards
;
837 ns
->tx_dropped
= es
->tx_discards
;
839 /* pull in a couple PF stats if this is the main vsi */
840 if (vsi
== pf
->vsi
[pf
->lan_vsi
]) {
841 ns
->rx_crc_errors
= pf
->stats
.crc_errors
;
842 ns
->rx_errors
= pf
->stats
.crc_errors
+ pf
->stats
.illegal_bytes
;
843 ns
->rx_length_errors
= pf
->stats
.rx_length_errors
;
848 * i40e_update_pf_stats - Update the PF statistics counters.
849 * @pf: the PF to be updated
851 static void i40e_update_pf_stats(struct i40e_pf
*pf
)
853 struct i40e_hw_port_stats
*osd
= &pf
->stats_offsets
;
854 struct i40e_hw_port_stats
*nsd
= &pf
->stats
;
855 struct i40e_hw
*hw
= &pf
->hw
;
859 i40e_stat_update48(hw
, I40E_GLPRT_GORCH(hw
->port
),
860 I40E_GLPRT_GORCL(hw
->port
),
861 pf
->stat_offsets_loaded
,
862 &osd
->eth
.rx_bytes
, &nsd
->eth
.rx_bytes
);
863 i40e_stat_update48(hw
, I40E_GLPRT_GOTCH(hw
->port
),
864 I40E_GLPRT_GOTCL(hw
->port
),
865 pf
->stat_offsets_loaded
,
866 &osd
->eth
.tx_bytes
, &nsd
->eth
.tx_bytes
);
867 i40e_stat_update32(hw
, I40E_GLPRT_RDPC(hw
->port
),
868 pf
->stat_offsets_loaded
,
869 &osd
->eth
.rx_discards
,
870 &nsd
->eth
.rx_discards
);
871 i40e_stat_update48(hw
, I40E_GLPRT_UPRCH(hw
->port
),
872 I40E_GLPRT_UPRCL(hw
->port
),
873 pf
->stat_offsets_loaded
,
874 &osd
->eth
.rx_unicast
,
875 &nsd
->eth
.rx_unicast
);
876 i40e_stat_update48(hw
, I40E_GLPRT_MPRCH(hw
->port
),
877 I40E_GLPRT_MPRCL(hw
->port
),
878 pf
->stat_offsets_loaded
,
879 &osd
->eth
.rx_multicast
,
880 &nsd
->eth
.rx_multicast
);
881 i40e_stat_update48(hw
, I40E_GLPRT_BPRCH(hw
->port
),
882 I40E_GLPRT_BPRCL(hw
->port
),
883 pf
->stat_offsets_loaded
,
884 &osd
->eth
.rx_broadcast
,
885 &nsd
->eth
.rx_broadcast
);
886 i40e_stat_update48(hw
, I40E_GLPRT_UPTCH(hw
->port
),
887 I40E_GLPRT_UPTCL(hw
->port
),
888 pf
->stat_offsets_loaded
,
889 &osd
->eth
.tx_unicast
,
890 &nsd
->eth
.tx_unicast
);
891 i40e_stat_update48(hw
, I40E_GLPRT_MPTCH(hw
->port
),
892 I40E_GLPRT_MPTCL(hw
->port
),
893 pf
->stat_offsets_loaded
,
894 &osd
->eth
.tx_multicast
,
895 &nsd
->eth
.tx_multicast
);
896 i40e_stat_update48(hw
, I40E_GLPRT_BPTCH(hw
->port
),
897 I40E_GLPRT_BPTCL(hw
->port
),
898 pf
->stat_offsets_loaded
,
899 &osd
->eth
.tx_broadcast
,
900 &nsd
->eth
.tx_broadcast
);
902 i40e_stat_update32(hw
, I40E_GLPRT_TDOLD(hw
->port
),
903 pf
->stat_offsets_loaded
,
904 &osd
->tx_dropped_link_down
,
905 &nsd
->tx_dropped_link_down
);
907 i40e_stat_update32(hw
, I40E_GLPRT_CRCERRS(hw
->port
),
908 pf
->stat_offsets_loaded
,
909 &osd
->crc_errors
, &nsd
->crc_errors
);
911 i40e_stat_update32(hw
, I40E_GLPRT_ILLERRC(hw
->port
),
912 pf
->stat_offsets_loaded
,
913 &osd
->illegal_bytes
, &nsd
->illegal_bytes
);
915 i40e_stat_update32(hw
, I40E_GLPRT_MLFC(hw
->port
),
916 pf
->stat_offsets_loaded
,
917 &osd
->mac_local_faults
,
918 &nsd
->mac_local_faults
);
919 i40e_stat_update32(hw
, I40E_GLPRT_MRFC(hw
->port
),
920 pf
->stat_offsets_loaded
,
921 &osd
->mac_remote_faults
,
922 &nsd
->mac_remote_faults
);
924 i40e_stat_update32(hw
, I40E_GLPRT_RLEC(hw
->port
),
925 pf
->stat_offsets_loaded
,
926 &osd
->rx_length_errors
,
927 &nsd
->rx_length_errors
);
929 i40e_stat_update32(hw
, I40E_GLPRT_LXONRXC(hw
->port
),
930 pf
->stat_offsets_loaded
,
931 &osd
->link_xon_rx
, &nsd
->link_xon_rx
);
932 i40e_stat_update32(hw
, I40E_GLPRT_LXONTXC(hw
->port
),
933 pf
->stat_offsets_loaded
,
934 &osd
->link_xon_tx
, &nsd
->link_xon_tx
);
935 i40e_stat_update32(hw
, I40E_GLPRT_LXOFFRXC(hw
->port
),
936 pf
->stat_offsets_loaded
,
937 &osd
->link_xoff_rx
, &nsd
->link_xoff_rx
);
938 i40e_stat_update32(hw
, I40E_GLPRT_LXOFFTXC(hw
->port
),
939 pf
->stat_offsets_loaded
,
940 &osd
->link_xoff_tx
, &nsd
->link_xoff_tx
);
942 for (i
= 0; i
< 8; i
++) {
943 i40e_stat_update32(hw
, I40E_GLPRT_PXOFFRXC(hw
->port
, i
),
944 pf
->stat_offsets_loaded
,
945 &osd
->priority_xoff_rx
[i
],
946 &nsd
->priority_xoff_rx
[i
]);
947 i40e_stat_update32(hw
, I40E_GLPRT_PXONRXC(hw
->port
, i
),
948 pf
->stat_offsets_loaded
,
949 &osd
->priority_xon_rx
[i
],
950 &nsd
->priority_xon_rx
[i
]);
951 i40e_stat_update32(hw
, I40E_GLPRT_PXONTXC(hw
->port
, i
),
952 pf
->stat_offsets_loaded
,
953 &osd
->priority_xon_tx
[i
],
954 &nsd
->priority_xon_tx
[i
]);
955 i40e_stat_update32(hw
, I40E_GLPRT_PXOFFTXC(hw
->port
, i
),
956 pf
->stat_offsets_loaded
,
957 &osd
->priority_xoff_tx
[i
],
958 &nsd
->priority_xoff_tx
[i
]);
959 i40e_stat_update32(hw
,
960 I40E_GLPRT_RXON2OFFCNT(hw
->port
, i
),
961 pf
->stat_offsets_loaded
,
962 &osd
->priority_xon_2_xoff
[i
],
963 &nsd
->priority_xon_2_xoff
[i
]);
966 i40e_stat_update48(hw
, I40E_GLPRT_PRC64H(hw
->port
),
967 I40E_GLPRT_PRC64L(hw
->port
),
968 pf
->stat_offsets_loaded
,
969 &osd
->rx_size_64
, &nsd
->rx_size_64
);
970 i40e_stat_update48(hw
, I40E_GLPRT_PRC127H(hw
->port
),
971 I40E_GLPRT_PRC127L(hw
->port
),
972 pf
->stat_offsets_loaded
,
973 &osd
->rx_size_127
, &nsd
->rx_size_127
);
974 i40e_stat_update48(hw
, I40E_GLPRT_PRC255H(hw
->port
),
975 I40E_GLPRT_PRC255L(hw
->port
),
976 pf
->stat_offsets_loaded
,
977 &osd
->rx_size_255
, &nsd
->rx_size_255
);
978 i40e_stat_update48(hw
, I40E_GLPRT_PRC511H(hw
->port
),
979 I40E_GLPRT_PRC511L(hw
->port
),
980 pf
->stat_offsets_loaded
,
981 &osd
->rx_size_511
, &nsd
->rx_size_511
);
982 i40e_stat_update48(hw
, I40E_GLPRT_PRC1023H(hw
->port
),
983 I40E_GLPRT_PRC1023L(hw
->port
),
984 pf
->stat_offsets_loaded
,
985 &osd
->rx_size_1023
, &nsd
->rx_size_1023
);
986 i40e_stat_update48(hw
, I40E_GLPRT_PRC1522H(hw
->port
),
987 I40E_GLPRT_PRC1522L(hw
->port
),
988 pf
->stat_offsets_loaded
,
989 &osd
->rx_size_1522
, &nsd
->rx_size_1522
);
990 i40e_stat_update48(hw
, I40E_GLPRT_PRC9522H(hw
->port
),
991 I40E_GLPRT_PRC9522L(hw
->port
),
992 pf
->stat_offsets_loaded
,
993 &osd
->rx_size_big
, &nsd
->rx_size_big
);
995 i40e_stat_update48(hw
, I40E_GLPRT_PTC64H(hw
->port
),
996 I40E_GLPRT_PTC64L(hw
->port
),
997 pf
->stat_offsets_loaded
,
998 &osd
->tx_size_64
, &nsd
->tx_size_64
);
999 i40e_stat_update48(hw
, I40E_GLPRT_PTC127H(hw
->port
),
1000 I40E_GLPRT_PTC127L(hw
->port
),
1001 pf
->stat_offsets_loaded
,
1002 &osd
->tx_size_127
, &nsd
->tx_size_127
);
1003 i40e_stat_update48(hw
, I40E_GLPRT_PTC255H(hw
->port
),
1004 I40E_GLPRT_PTC255L(hw
->port
),
1005 pf
->stat_offsets_loaded
,
1006 &osd
->tx_size_255
, &nsd
->tx_size_255
);
1007 i40e_stat_update48(hw
, I40E_GLPRT_PTC511H(hw
->port
),
1008 I40E_GLPRT_PTC511L(hw
->port
),
1009 pf
->stat_offsets_loaded
,
1010 &osd
->tx_size_511
, &nsd
->tx_size_511
);
1011 i40e_stat_update48(hw
, I40E_GLPRT_PTC1023H(hw
->port
),
1012 I40E_GLPRT_PTC1023L(hw
->port
),
1013 pf
->stat_offsets_loaded
,
1014 &osd
->tx_size_1023
, &nsd
->tx_size_1023
);
1015 i40e_stat_update48(hw
, I40E_GLPRT_PTC1522H(hw
->port
),
1016 I40E_GLPRT_PTC1522L(hw
->port
),
1017 pf
->stat_offsets_loaded
,
1018 &osd
->tx_size_1522
, &nsd
->tx_size_1522
);
1019 i40e_stat_update48(hw
, I40E_GLPRT_PTC9522H(hw
->port
),
1020 I40E_GLPRT_PTC9522L(hw
->port
),
1021 pf
->stat_offsets_loaded
,
1022 &osd
->tx_size_big
, &nsd
->tx_size_big
);
1024 i40e_stat_update32(hw
, I40E_GLPRT_RUC(hw
->port
),
1025 pf
->stat_offsets_loaded
,
1026 &osd
->rx_undersize
, &nsd
->rx_undersize
);
1027 i40e_stat_update32(hw
, I40E_GLPRT_RFC(hw
->port
),
1028 pf
->stat_offsets_loaded
,
1029 &osd
->rx_fragments
, &nsd
->rx_fragments
);
1030 i40e_stat_update32(hw
, I40E_GLPRT_ROC(hw
->port
),
1031 pf
->stat_offsets_loaded
,
1032 &osd
->rx_oversize
, &nsd
->rx_oversize
);
1033 i40e_stat_update32(hw
, I40E_GLPRT_RJC(hw
->port
),
1034 pf
->stat_offsets_loaded
,
1035 &osd
->rx_jabber
, &nsd
->rx_jabber
);
1038 i40e_stat_update_and_clear32(hw
,
1039 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw
->pf_id
)),
1040 &nsd
->fd_atr_match
);
1041 i40e_stat_update_and_clear32(hw
,
1042 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw
->pf_id
)),
1044 i40e_stat_update_and_clear32(hw
,
1045 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw
->pf_id
)),
1046 &nsd
->fd_atr_tunnel_match
);
1048 val
= rd32(hw
, I40E_PRTPM_EEE_STAT
);
1049 nsd
->tx_lpi_status
=
1050 (val
& I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK
) >>
1051 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT
;
1052 nsd
->rx_lpi_status
=
1053 (val
& I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK
) >>
1054 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT
;
1055 i40e_stat_update32(hw
, I40E_PRTPM_TLPIC
,
1056 pf
->stat_offsets_loaded
,
1057 &osd
->tx_lpi_count
, &nsd
->tx_lpi_count
);
1058 i40e_stat_update32(hw
, I40E_PRTPM_RLPIC
,
1059 pf
->stat_offsets_loaded
,
1060 &osd
->rx_lpi_count
, &nsd
->rx_lpi_count
);
1062 if (pf
->flags
& I40E_FLAG_FD_SB_ENABLED
&&
1063 !test_bit(__I40E_FD_SB_AUTO_DISABLED
, pf
->state
))
1064 nsd
->fd_sb_status
= true;
1066 nsd
->fd_sb_status
= false;
1068 if (pf
->flags
& I40E_FLAG_FD_ATR_ENABLED
&&
1069 !test_bit(__I40E_FD_ATR_AUTO_DISABLED
, pf
->state
))
1070 nsd
->fd_atr_status
= true;
1072 nsd
->fd_atr_status
= false;
1074 pf
->stat_offsets_loaded
= true;
1078 * i40e_update_stats - Update the various statistics counters.
1079 * @vsi: the VSI to be updated
1081 * Update the various stats for this VSI and its related entities.
1083 void i40e_update_stats(struct i40e_vsi
*vsi
)
1085 struct i40e_pf
*pf
= vsi
->back
;
1087 if (vsi
== pf
->vsi
[pf
->lan_vsi
])
1088 i40e_update_pf_stats(pf
);
1090 i40e_update_vsi_stats(vsi
);
1094 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1095 * @vsi: the VSI to be searched
1096 * @macaddr: the MAC address
1099 * Returns ptr to the filter object or NULL
1101 static struct i40e_mac_filter
*i40e_find_filter(struct i40e_vsi
*vsi
,
1102 const u8
*macaddr
, s16 vlan
)
1104 struct i40e_mac_filter
*f
;
1107 if (!vsi
|| !macaddr
)
1110 key
= i40e_addr_to_hkey(macaddr
);
1111 hash_for_each_possible(vsi
->mac_filter_hash
, f
, hlist
, key
) {
1112 if ((ether_addr_equal(macaddr
, f
->macaddr
)) &&
1120 * i40e_find_mac - Find a mac addr in the macvlan filters list
1121 * @vsi: the VSI to be searched
1122 * @macaddr: the MAC address we are searching for
1124 * Returns the first filter with the provided MAC address or NULL if
1125 * MAC address was not found
1127 struct i40e_mac_filter
*i40e_find_mac(struct i40e_vsi
*vsi
, const u8
*macaddr
)
1129 struct i40e_mac_filter
*f
;
1132 if (!vsi
|| !macaddr
)
1135 key
= i40e_addr_to_hkey(macaddr
);
1136 hash_for_each_possible(vsi
->mac_filter_hash
, f
, hlist
, key
) {
1137 if ((ether_addr_equal(macaddr
, f
->macaddr
)))
1144 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1145 * @vsi: the VSI to be searched
1147 * Returns true if VSI is in vlan mode or false otherwise
1149 bool i40e_is_vsi_in_vlan(struct i40e_vsi
*vsi
)
1151 /* If we have a PVID, always operate in VLAN mode */
1155 /* We need to operate in VLAN mode whenever we have any filters with
1156 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1157 * time, incurring search cost repeatedly. However, we can notice two
1160 * 1) the only place where we can gain a VLAN filter is in
1163 * 2) the only place where filters are actually removed is in
1164 * i40e_sync_filters_subtask.
1166 * Thus, we can simply use a boolean value, has_vlan_filters which we
1167 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1168 * we have to perform the full search after deleting filters in
1169 * i40e_sync_filters_subtask, but we already have to search
1170 * filters here and can perform the check at the same time. This
1171 * results in avoiding embedding a loop for VLAN mode inside another
1172 * loop over all the filters, and should maintain correctness as noted
1175 return vsi
->has_vlan_filter
;
1179 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1180 * @vsi: the VSI to configure
1181 * @tmp_add_list: list of filters ready to be added
1182 * @tmp_del_list: list of filters ready to be deleted
1183 * @vlan_filters: the number of active VLAN filters
1185 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1186 * behave as expected. If we have any active VLAN filters remaining or about
1187 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1188 * so that they only match against untagged traffic. If we no longer have any
1189 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1190 * so that they match against both tagged and untagged traffic. In this way,
1191 * we ensure that we correctly receive the desired traffic. This ensures that
1192 * when we have an active VLAN we will receive only untagged traffic and
1193 * traffic matching active VLANs. If we have no active VLANs then we will
1194 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1196 * Finally, in a similar fashion, this function also corrects filters when
1197 * there is an active PVID assigned to this VSI.
1199 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1201 * This function is only expected to be called from within
1202 * i40e_sync_vsi_filters.
1204 * NOTE: This function expects to be called while under the
1205 * mac_filter_hash_lock
1207 static int i40e_correct_mac_vlan_filters(struct i40e_vsi
*vsi
,
1208 struct hlist_head
*tmp_add_list
,
1209 struct hlist_head
*tmp_del_list
,
1212 s16 pvid
= le16_to_cpu(vsi
->info
.pvid
);
1213 struct i40e_mac_filter
*f
, *add_head
;
1214 struct i40e_new_mac_filter
*new;
1215 struct hlist_node
*h
;
1218 /* To determine if a particular filter needs to be replaced we
1219 * have the three following conditions:
1221 * a) if we have a PVID assigned, then all filters which are
1222 * not marked as VLAN=PVID must be replaced with filters that
1224 * b) otherwise, if we have any active VLANS, all filters
1225 * which are marked as VLAN=-1 must be replaced with
1226 * filters marked as VLAN=0
1227 * c) finally, if we do not have any active VLANS, all filters
1228 * which are marked as VLAN=0 must be replaced with filters
1232 /* Update the filters about to be added in place */
1233 hlist_for_each_entry(new, tmp_add_list
, hlist
) {
1234 if (pvid
&& new->f
->vlan
!= pvid
)
1235 new->f
->vlan
= pvid
;
1236 else if (vlan_filters
&& new->f
->vlan
== I40E_VLAN_ANY
)
1238 else if (!vlan_filters
&& new->f
->vlan
== 0)
1239 new->f
->vlan
= I40E_VLAN_ANY
;
1242 /* Update the remaining active filters */
1243 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
1244 /* Combine the checks for whether a filter needs to be changed
1245 * and then determine the new VLAN inside the if block, in
1246 * order to avoid duplicating code for adding the new filter
1247 * then deleting the old filter.
1249 if ((pvid
&& f
->vlan
!= pvid
) ||
1250 (vlan_filters
&& f
->vlan
== I40E_VLAN_ANY
) ||
1251 (!vlan_filters
&& f
->vlan
== 0)) {
1252 /* Determine the new vlan we will be adding */
1255 else if (vlan_filters
)
1258 new_vlan
= I40E_VLAN_ANY
;
1260 /* Create the new filter */
1261 add_head
= i40e_add_filter(vsi
, f
->macaddr
, new_vlan
);
1265 /* Create a temporary i40e_new_mac_filter */
1266 new = kzalloc(sizeof(*new), GFP_ATOMIC
);
1271 new->state
= add_head
->state
;
1273 /* Add the new filter to the tmp list */
1274 hlist_add_head(&new->hlist
, tmp_add_list
);
1276 /* Put the original filter into the delete list */
1277 f
->state
= I40E_FILTER_REMOVE
;
1278 hash_del(&f
->hlist
);
1279 hlist_add_head(&f
->hlist
, tmp_del_list
);
1283 vsi
->has_vlan_filter
= !!vlan_filters
;
1289 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1290 * @vsi: the PF Main VSI - inappropriate for any other VSI
1291 * @macaddr: the MAC address
1293 * Remove whatever filter the firmware set up so the driver can manage
1294 * its own filtering intelligently.
1296 static void i40e_rm_default_mac_filter(struct i40e_vsi
*vsi
, u8
*macaddr
)
1298 struct i40e_aqc_remove_macvlan_element_data element
;
1299 struct i40e_pf
*pf
= vsi
->back
;
1301 /* Only appropriate for the PF main VSI */
1302 if (vsi
->type
!= I40E_VSI_MAIN
)
1305 memset(&element
, 0, sizeof(element
));
1306 ether_addr_copy(element
.mac_addr
, macaddr
);
1307 element
.vlan_tag
= 0;
1308 /* Ignore error returns, some firmware does it this way... */
1309 element
.flags
= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH
;
1310 i40e_aq_remove_macvlan(&pf
->hw
, vsi
->seid
, &element
, 1, NULL
);
1312 memset(&element
, 0, sizeof(element
));
1313 ether_addr_copy(element
.mac_addr
, macaddr
);
1314 element
.vlan_tag
= 0;
1315 /* ...and some firmware does it this way. */
1316 element
.flags
= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH
|
1317 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN
;
1318 i40e_aq_remove_macvlan(&pf
->hw
, vsi
->seid
, &element
, 1, NULL
);
1322 * i40e_add_filter - Add a mac/vlan filter to the VSI
1323 * @vsi: the VSI to be searched
1324 * @macaddr: the MAC address
1327 * Returns ptr to the filter object or NULL when no memory available.
1329 * NOTE: This function is expected to be called with mac_filter_hash_lock
1332 struct i40e_mac_filter
*i40e_add_filter(struct i40e_vsi
*vsi
,
1333 const u8
*macaddr
, s16 vlan
)
1335 struct i40e_mac_filter
*f
;
1338 if (!vsi
|| !macaddr
)
1341 f
= i40e_find_filter(vsi
, macaddr
, vlan
);
1343 f
= kzalloc(sizeof(*f
), GFP_ATOMIC
);
1347 /* Update the boolean indicating if we need to function in
1351 vsi
->has_vlan_filter
= true;
1353 ether_addr_copy(f
->macaddr
, macaddr
);
1355 f
->state
= I40E_FILTER_NEW
;
1356 INIT_HLIST_NODE(&f
->hlist
);
1358 key
= i40e_addr_to_hkey(macaddr
);
1359 hash_add(vsi
->mac_filter_hash
, &f
->hlist
, key
);
1361 vsi
->flags
|= I40E_VSI_FLAG_FILTER_CHANGED
;
1362 set_bit(__I40E_MACVLAN_SYNC_PENDING
, vsi
->back
->state
);
1365 /* If we're asked to add a filter that has been marked for removal, it
1366 * is safe to simply restore it to active state. __i40e_del_filter
1367 * will have simply deleted any filters which were previously marked
1368 * NEW or FAILED, so if it is currently marked REMOVE it must have
1369 * previously been ACTIVE. Since we haven't yet run the sync filters
1370 * task, just restore this filter to the ACTIVE state so that the
1371 * sync task leaves it in place
1373 if (f
->state
== I40E_FILTER_REMOVE
)
1374 f
->state
= I40E_FILTER_ACTIVE
;
1380 * __i40e_del_filter - Remove a specific filter from the VSI
1381 * @vsi: VSI to remove from
1382 * @f: the filter to remove from the list
1384 * This function should be called instead of i40e_del_filter only if you know
1385 * the exact filter you will remove already, such as via i40e_find_filter or
1388 * NOTE: This function is expected to be called with mac_filter_hash_lock
1390 * ANOTHER NOTE: This function MUST be called from within the context of
1391 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1392 * instead of list_for_each_entry().
1394 void __i40e_del_filter(struct i40e_vsi
*vsi
, struct i40e_mac_filter
*f
)
1399 /* If the filter was never added to firmware then we can just delete it
1400 * directly and we don't want to set the status to remove or else an
1401 * admin queue command will unnecessarily fire.
1403 if ((f
->state
== I40E_FILTER_FAILED
) ||
1404 (f
->state
== I40E_FILTER_NEW
)) {
1405 hash_del(&f
->hlist
);
1408 f
->state
= I40E_FILTER_REMOVE
;
1411 vsi
->flags
|= I40E_VSI_FLAG_FILTER_CHANGED
;
1412 set_bit(__I40E_MACVLAN_SYNC_PENDING
, vsi
->state
);
1416 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1417 * @vsi: the VSI to be searched
1418 * @macaddr: the MAC address
1421 * NOTE: This function is expected to be called with mac_filter_hash_lock
1423 * ANOTHER NOTE: This function MUST be called from within the context of
1424 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1425 * instead of list_for_each_entry().
1427 void i40e_del_filter(struct i40e_vsi
*vsi
, const u8
*macaddr
, s16 vlan
)
1429 struct i40e_mac_filter
*f
;
1431 if (!vsi
|| !macaddr
)
1434 f
= i40e_find_filter(vsi
, macaddr
, vlan
);
1435 __i40e_del_filter(vsi
, f
);
1439 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1440 * @vsi: the VSI to be searched
1441 * @macaddr: the mac address to be filtered
1443 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1444 * go through all the macvlan filters and add a macvlan filter for each
1445 * unique vlan that already exists. If a PVID has been assigned, instead only
1446 * add the macaddr to that VLAN.
1448 * Returns last filter added on success, else NULL
1450 struct i40e_mac_filter
*i40e_add_mac_filter(struct i40e_vsi
*vsi
,
1453 struct i40e_mac_filter
*f
, *add
= NULL
;
1454 struct hlist_node
*h
;
1458 return i40e_add_filter(vsi
, macaddr
,
1459 le16_to_cpu(vsi
->info
.pvid
));
1461 if (!i40e_is_vsi_in_vlan(vsi
))
1462 return i40e_add_filter(vsi
, macaddr
, I40E_VLAN_ANY
);
1464 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
1465 if (f
->state
== I40E_FILTER_REMOVE
)
1467 add
= i40e_add_filter(vsi
, macaddr
, f
->vlan
);
1476 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1477 * @vsi: the VSI to be searched
1478 * @macaddr: the mac address to be removed
1480 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1483 * Returns 0 for success, or error
1485 int i40e_del_mac_filter(struct i40e_vsi
*vsi
, const u8
*macaddr
)
1487 struct i40e_mac_filter
*f
;
1488 struct hlist_node
*h
;
1492 WARN(!spin_is_locked(&vsi
->mac_filter_hash_lock
),
1493 "Missing mac_filter_hash_lock\n");
1494 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
1495 if (ether_addr_equal(macaddr
, f
->macaddr
)) {
1496 __i40e_del_filter(vsi
, f
);
1508 * i40e_set_mac - NDO callback to set mac address
1509 * @netdev: network interface device structure
1510 * @p: pointer to an address structure
1512 * Returns 0 on success, negative on failure
1514 static int i40e_set_mac(struct net_device
*netdev
, void *p
)
1516 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
1517 struct i40e_vsi
*vsi
= np
->vsi
;
1518 struct i40e_pf
*pf
= vsi
->back
;
1519 struct i40e_hw
*hw
= &pf
->hw
;
1520 struct sockaddr
*addr
= p
;
1522 if (!is_valid_ether_addr(addr
->sa_data
))
1523 return -EADDRNOTAVAIL
;
1525 if (ether_addr_equal(netdev
->dev_addr
, addr
->sa_data
)) {
1526 netdev_info(netdev
, "already using mac address %pM\n",
1531 if (test_bit(__I40E_VSI_DOWN
, vsi
->back
->state
) ||
1532 test_bit(__I40E_RESET_RECOVERY_PENDING
, vsi
->back
->state
))
1533 return -EADDRNOTAVAIL
;
1535 if (ether_addr_equal(hw
->mac
.addr
, addr
->sa_data
))
1536 netdev_info(netdev
, "returning to hw mac address %pM\n",
1539 netdev_info(netdev
, "set new mac address %pM\n", addr
->sa_data
);
1541 /* Copy the address first, so that we avoid a possible race with
1542 * .set_rx_mode(). If we copy after changing the address in the filter
1543 * list, we might open ourselves to a narrow race window where
1544 * .set_rx_mode could delete our dev_addr filter and prevent traffic
1547 ether_addr_copy(netdev
->dev_addr
, addr
->sa_data
);
1549 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
1550 i40e_del_mac_filter(vsi
, netdev
->dev_addr
);
1551 i40e_add_mac_filter(vsi
, addr
->sa_data
);
1552 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
1553 if (vsi
->type
== I40E_VSI_MAIN
) {
1556 ret
= i40e_aq_mac_address_write(&vsi
->back
->hw
,
1557 I40E_AQC_WRITE_TYPE_LAA_WOL
,
1558 addr
->sa_data
, NULL
);
1560 netdev_info(netdev
, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1561 i40e_stat_str(hw
, ret
),
1562 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
1565 /* schedule our worker thread which will take care of
1566 * applying the new filter changes
1568 i40e_service_event_schedule(vsi
->back
);
1573 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1574 * @vsi: vsi structure
1575 * @seed: RSS hash seed
1577 static int i40e_config_rss_aq(struct i40e_vsi
*vsi
, const u8
*seed
,
1578 u8
*lut
, u16 lut_size
)
1580 struct i40e_pf
*pf
= vsi
->back
;
1581 struct i40e_hw
*hw
= &pf
->hw
;
1585 struct i40e_aqc_get_set_rss_key_data
*seed_dw
=
1586 (struct i40e_aqc_get_set_rss_key_data
*)seed
;
1587 ret
= i40e_aq_set_rss_key(hw
, vsi
->id
, seed_dw
);
1589 dev_info(&pf
->pdev
->dev
,
1590 "Cannot set RSS key, err %s aq_err %s\n",
1591 i40e_stat_str(hw
, ret
),
1592 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
1597 bool pf_lut
= vsi
->type
== I40E_VSI_MAIN
? true : false;
1599 ret
= i40e_aq_set_rss_lut(hw
, vsi
->id
, pf_lut
, lut
, lut_size
);
1601 dev_info(&pf
->pdev
->dev
,
1602 "Cannot set RSS lut, err %s aq_err %s\n",
1603 i40e_stat_str(hw
, ret
),
1604 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
1612 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1613 * @vsi: VSI structure
1615 static int i40e_vsi_config_rss(struct i40e_vsi
*vsi
)
1617 struct i40e_pf
*pf
= vsi
->back
;
1618 u8 seed
[I40E_HKEY_ARRAY_SIZE
];
1622 if (!(pf
->hw_features
& I40E_HW_RSS_AQ_CAPABLE
))
1625 vsi
->rss_size
= min_t(int, pf
->alloc_rss_size
,
1626 vsi
->num_queue_pairs
);
1629 lut
= kzalloc(vsi
->rss_table_size
, GFP_KERNEL
);
1633 /* Use the user configured hash keys and lookup table if there is one,
1634 * otherwise use default
1636 if (vsi
->rss_lut_user
)
1637 memcpy(lut
, vsi
->rss_lut_user
, vsi
->rss_table_size
);
1639 i40e_fill_rss_lut(pf
, lut
, vsi
->rss_table_size
, vsi
->rss_size
);
1640 if (vsi
->rss_hkey_user
)
1641 memcpy(seed
, vsi
->rss_hkey_user
, I40E_HKEY_ARRAY_SIZE
);
1643 netdev_rss_key_fill((void *)seed
, I40E_HKEY_ARRAY_SIZE
);
1644 ret
= i40e_config_rss_aq(vsi
, seed
, lut
, vsi
->rss_table_size
);
1650 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1651 * @vsi: the VSI being configured,
1652 * @ctxt: VSI context structure
1653 * @enabled_tc: number of traffic classes to enable
1655 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1657 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi
*vsi
,
1658 struct i40e_vsi_context
*ctxt
,
1661 u16 qcount
= 0, max_qcount
, qmap
, sections
= 0;
1662 int i
, override_q
, pow
, num_qps
, ret
;
1663 u8 netdev_tc
= 0, offset
= 0;
1665 if (vsi
->type
!= I40E_VSI_MAIN
)
1667 sections
= I40E_AQ_VSI_PROP_QUEUE_MAP_VALID
;
1668 sections
|= I40E_AQ_VSI_PROP_SCHED_VALID
;
1669 vsi
->tc_config
.numtc
= vsi
->mqprio_qopt
.qopt
.num_tc
;
1670 vsi
->tc_config
.enabled_tc
= enabled_tc
? enabled_tc
: 1;
1671 num_qps
= vsi
->mqprio_qopt
.qopt
.count
[0];
1673 /* find the next higher power-of-2 of num queue pairs */
1674 pow
= ilog2(num_qps
);
1675 if (!is_power_of_2(num_qps
))
1677 qmap
= (offset
<< I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT
) |
1678 (pow
<< I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT
);
1680 /* Setup queue offset/count for all TCs for given VSI */
1681 max_qcount
= vsi
->mqprio_qopt
.qopt
.count
[0];
1682 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
1683 /* See if the given TC is enabled for the given VSI */
1684 if (vsi
->tc_config
.enabled_tc
& BIT(i
)) {
1685 offset
= vsi
->mqprio_qopt
.qopt
.offset
[i
];
1686 qcount
= vsi
->mqprio_qopt
.qopt
.count
[i
];
1687 if (qcount
> max_qcount
)
1688 max_qcount
= qcount
;
1689 vsi
->tc_config
.tc_info
[i
].qoffset
= offset
;
1690 vsi
->tc_config
.tc_info
[i
].qcount
= qcount
;
1691 vsi
->tc_config
.tc_info
[i
].netdev_tc
= netdev_tc
++;
1693 /* TC is not enabled so set the offset to
1694 * default queue and allocate one queue
1697 vsi
->tc_config
.tc_info
[i
].qoffset
= 0;
1698 vsi
->tc_config
.tc_info
[i
].qcount
= 1;
1699 vsi
->tc_config
.tc_info
[i
].netdev_tc
= 0;
1703 /* Set actual Tx/Rx queue pairs */
1704 vsi
->num_queue_pairs
= offset
+ qcount
;
1706 /* Setup queue TC[0].qmap for given VSI context */
1707 ctxt
->info
.tc_mapping
[0] = cpu_to_le16(qmap
);
1708 ctxt
->info
.mapping_flags
|= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG
);
1709 ctxt
->info
.queue_mapping
[0] = cpu_to_le16(vsi
->base_queue
);
1710 ctxt
->info
.valid_sections
|= cpu_to_le16(sections
);
1712 /* Reconfigure RSS for main VSI with max queue count */
1713 vsi
->rss_size
= max_qcount
;
1714 ret
= i40e_vsi_config_rss(vsi
);
1716 dev_info(&vsi
->back
->pdev
->dev
,
1717 "Failed to reconfig rss for num_queues (%u)\n",
1721 vsi
->reconfig_rss
= true;
1722 dev_dbg(&vsi
->back
->pdev
->dev
,
1723 "Reconfigured rss with num_queues (%u)\n", max_qcount
);
1725 /* Find queue count available for channel VSIs and starting offset
1728 override_q
= vsi
->mqprio_qopt
.qopt
.count
[0];
1729 if (override_q
&& override_q
< vsi
->num_queue_pairs
) {
1730 vsi
->cnt_q_avail
= vsi
->num_queue_pairs
- override_q
;
1731 vsi
->next_base_queue
= override_q
;
1737 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1738 * @vsi: the VSI being setup
1739 * @ctxt: VSI context structure
1740 * @enabled_tc: Enabled TCs bitmap
1741 * @is_add: True if called before Add VSI
1743 * Setup VSI queue mapping for enabled traffic classes.
1745 static void i40e_vsi_setup_queue_map(struct i40e_vsi
*vsi
,
1746 struct i40e_vsi_context
*ctxt
,
1750 struct i40e_pf
*pf
= vsi
->back
;
1760 sections
= I40E_AQ_VSI_PROP_QUEUE_MAP_VALID
;
1763 /* Number of queues per enabled TC */
1764 num_tc_qps
= vsi
->alloc_queue_pairs
;
1765 if (enabled_tc
&& (vsi
->back
->flags
& I40E_FLAG_DCB_ENABLED
)) {
1766 /* Find numtc from enabled TC bitmap */
1767 for (i
= 0, numtc
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
1768 if (enabled_tc
& BIT(i
)) /* TC is enabled */
1772 dev_warn(&pf
->pdev
->dev
, "DCB is enabled but no TC enabled, forcing TC0\n");
1775 num_tc_qps
= num_tc_qps
/ numtc
;
1776 num_tc_qps
= min_t(int, num_tc_qps
,
1777 i40e_pf_get_max_q_per_tc(pf
));
1780 vsi
->tc_config
.numtc
= numtc
;
1781 vsi
->tc_config
.enabled_tc
= enabled_tc
? enabled_tc
: 1;
1783 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1784 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
1785 num_tc_qps
= min_t(int, num_tc_qps
, pf
->num_lan_msix
);
1787 /* Setup queue offset/count for all TCs for given VSI */
1788 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
1789 /* See if the given TC is enabled for the given VSI */
1790 if (vsi
->tc_config
.enabled_tc
& BIT(i
)) {
1794 switch (vsi
->type
) {
1796 if (!(pf
->flags
& (I40E_FLAG_FD_SB_ENABLED
|
1797 I40E_FLAG_FD_ATR_ENABLED
)) ||
1798 vsi
->tc_config
.enabled_tc
!= 1) {
1799 qcount
= min_t(int, pf
->alloc_rss_size
,
1805 case I40E_VSI_SRIOV
:
1806 case I40E_VSI_VMDQ2
:
1808 qcount
= num_tc_qps
;
1812 vsi
->tc_config
.tc_info
[i
].qoffset
= offset
;
1813 vsi
->tc_config
.tc_info
[i
].qcount
= qcount
;
1815 /* find the next higher power-of-2 of num queue pairs */
1818 while (num_qps
&& (BIT_ULL(pow
) < qcount
)) {
1823 vsi
->tc_config
.tc_info
[i
].netdev_tc
= netdev_tc
++;
1825 (offset
<< I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT
) |
1826 (pow
<< I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT
);
1830 /* TC is not enabled so set the offset to
1831 * default queue and allocate one queue
1834 vsi
->tc_config
.tc_info
[i
].qoffset
= 0;
1835 vsi
->tc_config
.tc_info
[i
].qcount
= 1;
1836 vsi
->tc_config
.tc_info
[i
].netdev_tc
= 0;
1840 ctxt
->info
.tc_mapping
[i
] = cpu_to_le16(qmap
);
1843 /* Set actual Tx/Rx queue pairs */
1844 vsi
->num_queue_pairs
= offset
;
1845 if ((vsi
->type
== I40E_VSI_MAIN
) && (numtc
== 1)) {
1846 if (vsi
->req_queue_pairs
> 0)
1847 vsi
->num_queue_pairs
= vsi
->req_queue_pairs
;
1848 else if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
1849 vsi
->num_queue_pairs
= pf
->num_lan_msix
;
1852 /* Scheduler section valid can only be set for ADD VSI */
1854 sections
|= I40E_AQ_VSI_PROP_SCHED_VALID
;
1856 ctxt
->info
.up_enable_bits
= enabled_tc
;
1858 if (vsi
->type
== I40E_VSI_SRIOV
) {
1859 ctxt
->info
.mapping_flags
|=
1860 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG
);
1861 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++)
1862 ctxt
->info
.queue_mapping
[i
] =
1863 cpu_to_le16(vsi
->base_queue
+ i
);
1865 ctxt
->info
.mapping_flags
|=
1866 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG
);
1867 ctxt
->info
.queue_mapping
[0] = cpu_to_le16(vsi
->base_queue
);
1869 ctxt
->info
.valid_sections
|= cpu_to_le16(sections
);
1873 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1874 * @netdev: the netdevice
1875 * @addr: address to add
1877 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1878 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1880 static int i40e_addr_sync(struct net_device
*netdev
, const u8
*addr
)
1882 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
1883 struct i40e_vsi
*vsi
= np
->vsi
;
1885 if (i40e_add_mac_filter(vsi
, addr
))
1892 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1893 * @netdev: the netdevice
1894 * @addr: address to add
1896 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1897 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1899 static int i40e_addr_unsync(struct net_device
*netdev
, const u8
*addr
)
1901 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
1902 struct i40e_vsi
*vsi
= np
->vsi
;
1904 /* Under some circumstances, we might receive a request to delete
1905 * our own device address from our uc list. Because we store the
1906 * device address in the VSI's MAC/VLAN filter list, we need to ignore
1907 * such requests and not delete our device address from this list.
1909 if (ether_addr_equal(addr
, netdev
->dev_addr
))
1912 i40e_del_mac_filter(vsi
, addr
);
1918 * i40e_set_rx_mode - NDO callback to set the netdev filters
1919 * @netdev: network interface device structure
1921 static void i40e_set_rx_mode(struct net_device
*netdev
)
1923 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
1924 struct i40e_vsi
*vsi
= np
->vsi
;
1926 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
1928 __dev_uc_sync(netdev
, i40e_addr_sync
, i40e_addr_unsync
);
1929 __dev_mc_sync(netdev
, i40e_addr_sync
, i40e_addr_unsync
);
1931 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
1933 /* check for other flag changes */
1934 if (vsi
->current_netdev_flags
!= vsi
->netdev
->flags
) {
1935 vsi
->flags
|= I40E_VSI_FLAG_FILTER_CHANGED
;
1936 set_bit(__I40E_MACVLAN_SYNC_PENDING
, vsi
->back
->state
);
1941 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1942 * @vsi: Pointer to VSI struct
1943 * @from: Pointer to list which contains MAC filter entries - changes to
1944 * those entries needs to be undone.
1946 * MAC filter entries from this list were slated for deletion.
1948 static void i40e_undo_del_filter_entries(struct i40e_vsi
*vsi
,
1949 struct hlist_head
*from
)
1951 struct i40e_mac_filter
*f
;
1952 struct hlist_node
*h
;
1954 hlist_for_each_entry_safe(f
, h
, from
, hlist
) {
1955 u64 key
= i40e_addr_to_hkey(f
->macaddr
);
1957 /* Move the element back into MAC filter list*/
1958 hlist_del(&f
->hlist
);
1959 hash_add(vsi
->mac_filter_hash
, &f
->hlist
, key
);
1964 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1965 * @vsi: Pointer to vsi struct
1966 * @from: Pointer to list which contains MAC filter entries - changes to
1967 * those entries needs to be undone.
1969 * MAC filter entries from this list were slated for addition.
1971 static void i40e_undo_add_filter_entries(struct i40e_vsi
*vsi
,
1972 struct hlist_head
*from
)
1974 struct i40e_new_mac_filter
*new;
1975 struct hlist_node
*h
;
1977 hlist_for_each_entry_safe(new, h
, from
, hlist
) {
1978 /* We can simply free the wrapper structure */
1979 hlist_del(&new->hlist
);
1985 * i40e_next_entry - Get the next non-broadcast filter from a list
1986 * @next: pointer to filter in list
1988 * Returns the next non-broadcast filter in the list. Required so that we
1989 * ignore broadcast filters within the list, since these are not handled via
1990 * the normal firmware update path.
1993 struct i40e_new_mac_filter
*i40e_next_filter(struct i40e_new_mac_filter
*next
)
1995 hlist_for_each_entry_continue(next
, hlist
) {
1996 if (!is_broadcast_ether_addr(next
->f
->macaddr
))
2004 * i40e_update_filter_state - Update filter state based on return data
2006 * @count: Number of filters added
2007 * @add_list: return data from fw
2008 * @add_head: pointer to first filter in current batch
2010 * MAC filter entries from list were slated to be added to device. Returns
2011 * number of successful filters. Note that 0 does NOT mean success!
2014 i40e_update_filter_state(int count
,
2015 struct i40e_aqc_add_macvlan_element_data
*add_list
,
2016 struct i40e_new_mac_filter
*add_head
)
2021 for (i
= 0; i
< count
; i
++) {
2022 /* Always check status of each filter. We don't need to check
2023 * the firmware return status because we pre-set the filter
2024 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2025 * request to the adminq. Thus, if it no longer matches then
2026 * we know the filter is active.
2028 if (add_list
[i
].match_method
== I40E_AQC_MM_ERR_NO_RES
) {
2029 add_head
->state
= I40E_FILTER_FAILED
;
2031 add_head
->state
= I40E_FILTER_ACTIVE
;
2035 add_head
= i40e_next_filter(add_head
);
2044 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2045 * @vsi: ptr to the VSI
2046 * @vsi_name: name to display in messages
2047 * @list: the list of filters to send to firmware
2048 * @num_del: the number of filters to delete
2049 * @retval: Set to -EIO on failure to delete
2051 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2052 * *retval instead of a return value so that success does not force ret_val to
2053 * be set to 0. This ensures that a sequence of calls to this function
2054 * preserve the previous value of *retval on successful delete.
2057 void i40e_aqc_del_filters(struct i40e_vsi
*vsi
, const char *vsi_name
,
2058 struct i40e_aqc_remove_macvlan_element_data
*list
,
2059 int num_del
, int *retval
)
2061 struct i40e_hw
*hw
= &vsi
->back
->hw
;
2065 aq_ret
= i40e_aq_remove_macvlan(hw
, vsi
->seid
, list
, num_del
, NULL
);
2066 aq_err
= hw
->aq
.asq_last_status
;
2068 /* Explicitly ignore and do not report when firmware returns ENOENT */
2069 if (aq_ret
&& !(aq_err
== I40E_AQ_RC_ENOENT
)) {
2071 dev_info(&vsi
->back
->pdev
->dev
,
2072 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2073 vsi_name
, i40e_stat_str(hw
, aq_ret
),
2074 i40e_aq_str(hw
, aq_err
));
2079 * i40e_aqc_add_filters - Request firmware to add a set of filters
2080 * @vsi: ptr to the VSI
2081 * @vsi_name: name to display in messages
2082 * @list: the list of filters to send to firmware
2083 * @add_head: Position in the add hlist
2084 * @num_add: the number of filters to add
2086 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2087 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2088 * space for more filters.
2091 void i40e_aqc_add_filters(struct i40e_vsi
*vsi
, const char *vsi_name
,
2092 struct i40e_aqc_add_macvlan_element_data
*list
,
2093 struct i40e_new_mac_filter
*add_head
,
2096 struct i40e_hw
*hw
= &vsi
->back
->hw
;
2099 i40e_aq_add_macvlan(hw
, vsi
->seid
, list
, num_add
, NULL
);
2100 aq_err
= hw
->aq
.asq_last_status
;
2101 fcnt
= i40e_update_filter_state(num_add
, list
, add_head
);
2103 if (fcnt
!= num_add
) {
2104 set_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
2105 dev_warn(&vsi
->back
->pdev
->dev
,
2106 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2107 i40e_aq_str(hw
, aq_err
),
2113 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2114 * @vsi: pointer to the VSI
2115 * @vsi_name: the VSI name
2118 * This function sets or clears the promiscuous broadcast flags for VLAN
2119 * filters in order to properly receive broadcast frames. Assumes that only
2120 * broadcast filters are passed.
2122 * Returns status indicating success or failure;
2125 i40e_aqc_broadcast_filter(struct i40e_vsi
*vsi
, const char *vsi_name
,
2126 struct i40e_mac_filter
*f
)
2128 bool enable
= f
->state
== I40E_FILTER_NEW
;
2129 struct i40e_hw
*hw
= &vsi
->back
->hw
;
2132 if (f
->vlan
== I40E_VLAN_ANY
) {
2133 aq_ret
= i40e_aq_set_vsi_broadcast(hw
,
2138 aq_ret
= i40e_aq_set_vsi_bc_promisc_on_vlan(hw
,
2146 set_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
2147 dev_warn(&vsi
->back
->pdev
->dev
,
2148 "Error %s, forcing overflow promiscuous on %s\n",
2149 i40e_aq_str(hw
, hw
->aq
.asq_last_status
),
2157 * i40e_set_promiscuous - set promiscuous mode
2158 * @pf: board private structure
2159 * @promisc: promisc on or off
2161 * There are different ways of setting promiscuous mode on a PF depending on
2162 * what state/environment we're in. This identifies and sets it appropriately.
2163 * Returns 0 on success.
2165 static int i40e_set_promiscuous(struct i40e_pf
*pf
, bool promisc
)
2167 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
2168 struct i40e_hw
*hw
= &pf
->hw
;
2171 if (vsi
->type
== I40E_VSI_MAIN
&&
2172 pf
->lan_veb
!= I40E_NO_VEB
&&
2173 !(pf
->flags
& I40E_FLAG_MFP_ENABLED
)) {
2174 /* set defport ON for Main VSI instead of true promisc
2175 * this way we will get all unicast/multicast and VLAN
2176 * promisc behavior but will not get VF or VMDq traffic
2177 * replicated on the Main VSI.
2180 aq_ret
= i40e_aq_set_default_vsi(hw
,
2184 aq_ret
= i40e_aq_clear_default_vsi(hw
,
2188 dev_info(&pf
->pdev
->dev
,
2189 "Set default VSI failed, err %s, aq_err %s\n",
2190 i40e_stat_str(hw
, aq_ret
),
2191 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
2194 aq_ret
= i40e_aq_set_vsi_unicast_promiscuous(
2200 dev_info(&pf
->pdev
->dev
,
2201 "set unicast promisc failed, err %s, aq_err %s\n",
2202 i40e_stat_str(hw
, aq_ret
),
2203 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
2205 aq_ret
= i40e_aq_set_vsi_multicast_promiscuous(
2210 dev_info(&pf
->pdev
->dev
,
2211 "set multicast promisc failed, err %s, aq_err %s\n",
2212 i40e_stat_str(hw
, aq_ret
),
2213 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
2218 pf
->cur_promisc
= promisc
;
2224 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2225 * @vsi: ptr to the VSI
2227 * Push any outstanding VSI filter changes through the AdminQ.
2229 * Returns 0 or error value
2231 int i40e_sync_vsi_filters(struct i40e_vsi
*vsi
)
2233 struct hlist_head tmp_add_list
, tmp_del_list
;
2234 struct i40e_mac_filter
*f
;
2235 struct i40e_new_mac_filter
*new, *add_head
= NULL
;
2236 struct i40e_hw
*hw
= &vsi
->back
->hw
;
2237 bool old_overflow
, new_overflow
;
2238 unsigned int failed_filters
= 0;
2239 unsigned int vlan_filters
= 0;
2240 char vsi_name
[16] = "PF";
2241 int filter_list_len
= 0;
2242 i40e_status aq_ret
= 0;
2243 u32 changed_flags
= 0;
2244 struct hlist_node
*h
;
2253 /* empty array typed pointers, kcalloc later */
2254 struct i40e_aqc_add_macvlan_element_data
*add_list
;
2255 struct i40e_aqc_remove_macvlan_element_data
*del_list
;
2257 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS
, vsi
->state
))
2258 usleep_range(1000, 2000);
2261 old_overflow
= test_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
2264 changed_flags
= vsi
->current_netdev_flags
^ vsi
->netdev
->flags
;
2265 vsi
->current_netdev_flags
= vsi
->netdev
->flags
;
2268 INIT_HLIST_HEAD(&tmp_add_list
);
2269 INIT_HLIST_HEAD(&tmp_del_list
);
2271 if (vsi
->type
== I40E_VSI_SRIOV
)
2272 snprintf(vsi_name
, sizeof(vsi_name
) - 1, "VF %d", vsi
->vf_id
);
2273 else if (vsi
->type
!= I40E_VSI_MAIN
)
2274 snprintf(vsi_name
, sizeof(vsi_name
) - 1, "vsi %d", vsi
->seid
);
2276 if (vsi
->flags
& I40E_VSI_FLAG_FILTER_CHANGED
) {
2277 vsi
->flags
&= ~I40E_VSI_FLAG_FILTER_CHANGED
;
2279 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
2280 /* Create a list of filters to delete. */
2281 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
2282 if (f
->state
== I40E_FILTER_REMOVE
) {
2283 /* Move the element into temporary del_list */
2284 hash_del(&f
->hlist
);
2285 hlist_add_head(&f
->hlist
, &tmp_del_list
);
2287 /* Avoid counting removed filters */
2290 if (f
->state
== I40E_FILTER_NEW
) {
2291 /* Create a temporary i40e_new_mac_filter */
2292 new = kzalloc(sizeof(*new), GFP_ATOMIC
);
2294 goto err_no_memory_locked
;
2296 /* Store pointer to the real filter */
2298 new->state
= f
->state
;
2300 /* Add it to the hash list */
2301 hlist_add_head(&new->hlist
, &tmp_add_list
);
2304 /* Count the number of active (current and new) VLAN
2305 * filters we have now. Does not count filters which
2306 * are marked for deletion.
2312 retval
= i40e_correct_mac_vlan_filters(vsi
,
2317 goto err_no_memory_locked
;
2319 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
2322 /* Now process 'del_list' outside the lock */
2323 if (!hlist_empty(&tmp_del_list
)) {
2324 filter_list_len
= hw
->aq
.asq_buf_size
/
2325 sizeof(struct i40e_aqc_remove_macvlan_element_data
);
2326 list_size
= filter_list_len
*
2327 sizeof(struct i40e_aqc_remove_macvlan_element_data
);
2328 del_list
= kzalloc(list_size
, GFP_ATOMIC
);
2332 hlist_for_each_entry_safe(f
, h
, &tmp_del_list
, hlist
) {
2335 /* handle broadcast filters by updating the broadcast
2336 * promiscuous flag and release filter list.
2338 if (is_broadcast_ether_addr(f
->macaddr
)) {
2339 i40e_aqc_broadcast_filter(vsi
, vsi_name
, f
);
2341 hlist_del(&f
->hlist
);
2346 /* add to delete list */
2347 ether_addr_copy(del_list
[num_del
].mac_addr
, f
->macaddr
);
2348 if (f
->vlan
== I40E_VLAN_ANY
) {
2349 del_list
[num_del
].vlan_tag
= 0;
2350 cmd_flags
|= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN
;
2352 del_list
[num_del
].vlan_tag
=
2353 cpu_to_le16((u16
)(f
->vlan
));
2356 cmd_flags
|= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH
;
2357 del_list
[num_del
].flags
= cmd_flags
;
2360 /* flush a full buffer */
2361 if (num_del
== filter_list_len
) {
2362 i40e_aqc_del_filters(vsi
, vsi_name
, del_list
,
2364 memset(del_list
, 0, list_size
);
2367 /* Release memory for MAC filter entries which were
2368 * synced up with HW.
2370 hlist_del(&f
->hlist
);
2375 i40e_aqc_del_filters(vsi
, vsi_name
, del_list
,
2383 if (!hlist_empty(&tmp_add_list
)) {
2384 /* Do all the adds now. */
2385 filter_list_len
= hw
->aq
.asq_buf_size
/
2386 sizeof(struct i40e_aqc_add_macvlan_element_data
);
2387 list_size
= filter_list_len
*
2388 sizeof(struct i40e_aqc_add_macvlan_element_data
);
2389 add_list
= kzalloc(list_size
, GFP_ATOMIC
);
2394 hlist_for_each_entry_safe(new, h
, &tmp_add_list
, hlist
) {
2395 /* handle broadcast filters by updating the broadcast
2396 * promiscuous flag instead of adding a MAC filter.
2398 if (is_broadcast_ether_addr(new->f
->macaddr
)) {
2399 if (i40e_aqc_broadcast_filter(vsi
, vsi_name
,
2401 new->state
= I40E_FILTER_FAILED
;
2403 new->state
= I40E_FILTER_ACTIVE
;
2407 /* add to add array */
2411 ether_addr_copy(add_list
[num_add
].mac_addr
,
2413 if (new->f
->vlan
== I40E_VLAN_ANY
) {
2414 add_list
[num_add
].vlan_tag
= 0;
2415 cmd_flags
|= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN
;
2417 add_list
[num_add
].vlan_tag
=
2418 cpu_to_le16((u16
)(new->f
->vlan
));
2420 add_list
[num_add
].queue_number
= 0;
2421 /* set invalid match method for later detection */
2422 add_list
[num_add
].match_method
= I40E_AQC_MM_ERR_NO_RES
;
2423 cmd_flags
|= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH
;
2424 add_list
[num_add
].flags
= cpu_to_le16(cmd_flags
);
2427 /* flush a full buffer */
2428 if (num_add
== filter_list_len
) {
2429 i40e_aqc_add_filters(vsi
, vsi_name
, add_list
,
2431 memset(add_list
, 0, list_size
);
2436 i40e_aqc_add_filters(vsi
, vsi_name
, add_list
, add_head
,
2439 /* Now move all of the filters from the temp add list back to
2442 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
2443 hlist_for_each_entry_safe(new, h
, &tmp_add_list
, hlist
) {
2444 /* Only update the state if we're still NEW */
2445 if (new->f
->state
== I40E_FILTER_NEW
)
2446 new->f
->state
= new->state
;
2447 hlist_del(&new->hlist
);
2450 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
2455 /* Determine the number of active and failed filters. */
2456 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
2457 vsi
->active_filters
= 0;
2458 hash_for_each(vsi
->mac_filter_hash
, bkt
, f
, hlist
) {
2459 if (f
->state
== I40E_FILTER_ACTIVE
)
2460 vsi
->active_filters
++;
2461 else if (f
->state
== I40E_FILTER_FAILED
)
2464 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
2466 /* Check if we are able to exit overflow promiscuous mode. We can
2467 * safely exit if we didn't just enter, we no longer have any failed
2468 * filters, and we have reduced filters below the threshold value.
2470 if (old_overflow
&& !failed_filters
&&
2471 vsi
->active_filters
< vsi
->promisc_threshold
) {
2472 dev_info(&pf
->pdev
->dev
,
2473 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2475 clear_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
2476 vsi
->promisc_threshold
= 0;
2479 /* if the VF is not trusted do not do promisc */
2480 if ((vsi
->type
== I40E_VSI_SRIOV
) && !pf
->vf
[vsi
->vf_id
].trusted
) {
2481 clear_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
2485 new_overflow
= test_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
2487 /* If we are entering overflow promiscuous, we need to calculate a new
2488 * threshold for when we are safe to exit
2490 if (!old_overflow
&& new_overflow
)
2491 vsi
->promisc_threshold
= (vsi
->active_filters
* 3) / 4;
2493 /* check for changes in promiscuous modes */
2494 if (changed_flags
& IFF_ALLMULTI
) {
2495 bool cur_multipromisc
;
2497 cur_multipromisc
= !!(vsi
->current_netdev_flags
& IFF_ALLMULTI
);
2498 aq_ret
= i40e_aq_set_vsi_multicast_promiscuous(&vsi
->back
->hw
,
2503 retval
= i40e_aq_rc_to_posix(aq_ret
,
2504 hw
->aq
.asq_last_status
);
2505 dev_info(&pf
->pdev
->dev
,
2506 "set multi promisc failed on %s, err %s aq_err %s\n",
2508 i40e_stat_str(hw
, aq_ret
),
2509 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
2513 if ((changed_flags
& IFF_PROMISC
) || old_overflow
!= new_overflow
) {
2516 cur_promisc
= (!!(vsi
->current_netdev_flags
& IFF_PROMISC
) ||
2518 aq_ret
= i40e_set_promiscuous(pf
, cur_promisc
);
2520 retval
= i40e_aq_rc_to_posix(aq_ret
,
2521 hw
->aq
.asq_last_status
);
2522 dev_info(&pf
->pdev
->dev
,
2523 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2524 cur_promisc
? "on" : "off",
2526 i40e_stat_str(hw
, aq_ret
),
2527 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
2531 /* if something went wrong then set the changed flag so we try again */
2533 vsi
->flags
|= I40E_VSI_FLAG_FILTER_CHANGED
;
2535 clear_bit(__I40E_VSI_SYNCING_FILTERS
, vsi
->state
);
2539 /* Restore elements on the temporary add and delete lists */
2540 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
2541 err_no_memory_locked
:
2542 i40e_undo_del_filter_entries(vsi
, &tmp_del_list
);
2543 i40e_undo_add_filter_entries(vsi
, &tmp_add_list
);
2544 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
2546 vsi
->flags
|= I40E_VSI_FLAG_FILTER_CHANGED
;
2547 clear_bit(__I40E_VSI_SYNCING_FILTERS
, vsi
->state
);
2552 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2553 * @pf: board private structure
2555 static void i40e_sync_filters_subtask(struct i40e_pf
*pf
)
2561 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING
, pf
->state
))
2564 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
2566 (pf
->vsi
[v
]->flags
& I40E_VSI_FLAG_FILTER_CHANGED
)) {
2567 int ret
= i40e_sync_vsi_filters(pf
->vsi
[v
]);
2570 /* come back and try again later */
2571 set_bit(__I40E_MACVLAN_SYNC_PENDING
,
2580 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2583 static int i40e_max_xdp_frame_size(struct i40e_vsi
*vsi
)
2585 if (PAGE_SIZE
>= 8192 || (vsi
->back
->flags
& I40E_FLAG_LEGACY_RX
))
2586 return I40E_RXBUFFER_2048
;
2588 return I40E_RXBUFFER_3072
;
2592 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2593 * @netdev: network interface device structure
2594 * @new_mtu: new value for maximum frame size
2596 * Returns 0 on success, negative on failure
2598 static int i40e_change_mtu(struct net_device
*netdev
, int new_mtu
)
2600 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
2601 struct i40e_vsi
*vsi
= np
->vsi
;
2602 struct i40e_pf
*pf
= vsi
->back
;
2604 if (i40e_enabled_xdp_vsi(vsi
)) {
2605 int frame_size
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
2607 if (frame_size
> i40e_max_xdp_frame_size(vsi
))
2611 netdev_info(netdev
, "changing MTU from %d to %d\n",
2612 netdev
->mtu
, new_mtu
);
2613 netdev
->mtu
= new_mtu
;
2614 if (netif_running(netdev
))
2615 i40e_vsi_reinit_locked(vsi
);
2616 set_bit(__I40E_CLIENT_SERVICE_REQUESTED
, pf
->state
);
2617 set_bit(__I40E_CLIENT_L2_CHANGE
, pf
->state
);
2622 * i40e_ioctl - Access the hwtstamp interface
2623 * @netdev: network interface device structure
2624 * @ifr: interface request data
2625 * @cmd: ioctl command
2627 int i40e_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
2629 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
2630 struct i40e_pf
*pf
= np
->vsi
->back
;
2634 return i40e_ptp_get_ts_config(pf
, ifr
);
2636 return i40e_ptp_set_ts_config(pf
, ifr
);
2643 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2644 * @vsi: the vsi being adjusted
2646 void i40e_vlan_stripping_enable(struct i40e_vsi
*vsi
)
2648 struct i40e_vsi_context ctxt
;
2651 if ((vsi
->info
.valid_sections
&
2652 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID
)) &&
2653 ((vsi
->info
.port_vlan_flags
& I40E_AQ_VSI_PVLAN_MODE_MASK
) == 0))
2654 return; /* already enabled */
2656 vsi
->info
.valid_sections
= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID
);
2657 vsi
->info
.port_vlan_flags
= I40E_AQ_VSI_PVLAN_MODE_ALL
|
2658 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH
;
2660 ctxt
.seid
= vsi
->seid
;
2661 ctxt
.info
= vsi
->info
;
2662 ret
= i40e_aq_update_vsi_params(&vsi
->back
->hw
, &ctxt
, NULL
);
2664 dev_info(&vsi
->back
->pdev
->dev
,
2665 "update vlan stripping failed, err %s aq_err %s\n",
2666 i40e_stat_str(&vsi
->back
->hw
, ret
),
2667 i40e_aq_str(&vsi
->back
->hw
,
2668 vsi
->back
->hw
.aq
.asq_last_status
));
2673 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2674 * @vsi: the vsi being adjusted
2676 void i40e_vlan_stripping_disable(struct i40e_vsi
*vsi
)
2678 struct i40e_vsi_context ctxt
;
2681 if ((vsi
->info
.valid_sections
&
2682 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID
)) &&
2683 ((vsi
->info
.port_vlan_flags
& I40E_AQ_VSI_PVLAN_EMOD_MASK
) ==
2684 I40E_AQ_VSI_PVLAN_EMOD_MASK
))
2685 return; /* already disabled */
2687 vsi
->info
.valid_sections
= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID
);
2688 vsi
->info
.port_vlan_flags
= I40E_AQ_VSI_PVLAN_MODE_ALL
|
2689 I40E_AQ_VSI_PVLAN_EMOD_NOTHING
;
2691 ctxt
.seid
= vsi
->seid
;
2692 ctxt
.info
= vsi
->info
;
2693 ret
= i40e_aq_update_vsi_params(&vsi
->back
->hw
, &ctxt
, NULL
);
2695 dev_info(&vsi
->back
->pdev
->dev
,
2696 "update vlan stripping failed, err %s aq_err %s\n",
2697 i40e_stat_str(&vsi
->back
->hw
, ret
),
2698 i40e_aq_str(&vsi
->back
->hw
,
2699 vsi
->back
->hw
.aq
.asq_last_status
));
2704 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2705 * @vsi: the vsi being configured
2706 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2708 * This is a helper function for adding a new MAC/VLAN filter with the
2709 * specified VLAN for each existing MAC address already in the hash table.
2710 * This function does *not* perform any accounting to update filters based on
2713 * NOTE: this function expects to be called while under the
2714 * mac_filter_hash_lock
2716 int i40e_add_vlan_all_mac(struct i40e_vsi
*vsi
, s16 vid
)
2718 struct i40e_mac_filter
*f
, *add_f
;
2719 struct hlist_node
*h
;
2722 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
2723 if (f
->state
== I40E_FILTER_REMOVE
)
2725 add_f
= i40e_add_filter(vsi
, f
->macaddr
, vid
);
2727 dev_info(&vsi
->back
->pdev
->dev
,
2728 "Could not add vlan filter %d for %pM\n",
2738 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2739 * @vsi: the VSI being configured
2740 * @vid: VLAN id to be added
2742 int i40e_vsi_add_vlan(struct i40e_vsi
*vsi
, u16 vid
)
2749 /* The network stack will attempt to add VID=0, with the intention to
2750 * receive priority tagged packets with a VLAN of 0. Our HW receives
2751 * these packets by default when configured to receive untagged
2752 * packets, so we don't need to add a filter for this case.
2753 * Additionally, HW interprets adding a VID=0 filter as meaning to
2754 * receive *only* tagged traffic and stops receiving untagged traffic.
2755 * Thus, we do not want to actually add a filter for VID=0
2760 /* Locked once because all functions invoked below iterates list*/
2761 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
2762 err
= i40e_add_vlan_all_mac(vsi
, vid
);
2763 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
2767 /* schedule our worker thread which will take care of
2768 * applying the new filter changes
2770 i40e_service_event_schedule(vsi
->back
);
2775 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2776 * @vsi: the vsi being configured
2777 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2779 * This function should be used to remove all VLAN filters which match the
2780 * given VID. It does not schedule the service event and does not take the
2781 * mac_filter_hash_lock so it may be combined with other operations under
2782 * a single invocation of the mac_filter_hash_lock.
2784 * NOTE: this function expects to be called while under the
2785 * mac_filter_hash_lock
2787 void i40e_rm_vlan_all_mac(struct i40e_vsi
*vsi
, s16 vid
)
2789 struct i40e_mac_filter
*f
;
2790 struct hlist_node
*h
;
2793 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
2795 __i40e_del_filter(vsi
, f
);
2800 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2801 * @vsi: the VSI being configured
2802 * @vid: VLAN id to be removed
2804 void i40e_vsi_kill_vlan(struct i40e_vsi
*vsi
, u16 vid
)
2806 if (!vid
|| vsi
->info
.pvid
)
2809 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
2810 i40e_rm_vlan_all_mac(vsi
, vid
);
2811 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
2813 /* schedule our worker thread which will take care of
2814 * applying the new filter changes
2816 i40e_service_event_schedule(vsi
->back
);
2820 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2821 * @netdev: network interface to be adjusted
2822 * @proto: unused protocol value
2823 * @vid: vlan id to be added
2825 * net_device_ops implementation for adding vlan ids
2827 static int i40e_vlan_rx_add_vid(struct net_device
*netdev
,
2828 __always_unused __be16 proto
, u16 vid
)
2830 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
2831 struct i40e_vsi
*vsi
= np
->vsi
;
2834 if (vid
>= VLAN_N_VID
)
2837 ret
= i40e_vsi_add_vlan(vsi
, vid
);
2839 set_bit(vid
, vsi
->active_vlans
);
2845 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2846 * @netdev: network interface to be adjusted
2847 * @proto: unused protocol value
2848 * @vid: vlan id to be added
2850 static void i40e_vlan_rx_add_vid_up(struct net_device
*netdev
,
2851 __always_unused __be16 proto
, u16 vid
)
2853 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
2854 struct i40e_vsi
*vsi
= np
->vsi
;
2856 if (vid
>= VLAN_N_VID
)
2858 set_bit(vid
, vsi
->active_vlans
);
2862 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2863 * @netdev: network interface to be adjusted
2864 * @proto: unused protocol value
2865 * @vid: vlan id to be removed
2867 * net_device_ops implementation for removing vlan ids
2869 static int i40e_vlan_rx_kill_vid(struct net_device
*netdev
,
2870 __always_unused __be16 proto
, u16 vid
)
2872 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
2873 struct i40e_vsi
*vsi
= np
->vsi
;
2875 /* return code is ignored as there is nothing a user
2876 * can do about failure to remove and a log message was
2877 * already printed from the other function
2879 i40e_vsi_kill_vlan(vsi
, vid
);
2881 clear_bit(vid
, vsi
->active_vlans
);
2887 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2888 * @vsi: the vsi being brought back up
2890 static void i40e_restore_vlan(struct i40e_vsi
*vsi
)
2897 if (vsi
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
2898 i40e_vlan_stripping_enable(vsi
);
2900 i40e_vlan_stripping_disable(vsi
);
2902 for_each_set_bit(vid
, vsi
->active_vlans
, VLAN_N_VID
)
2903 i40e_vlan_rx_add_vid_up(vsi
->netdev
, htons(ETH_P_8021Q
),
2908 * i40e_vsi_add_pvid - Add pvid for the VSI
2909 * @vsi: the vsi being adjusted
2910 * @vid: the vlan id to set as a PVID
2912 int i40e_vsi_add_pvid(struct i40e_vsi
*vsi
, u16 vid
)
2914 struct i40e_vsi_context ctxt
;
2917 vsi
->info
.valid_sections
= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID
);
2918 vsi
->info
.pvid
= cpu_to_le16(vid
);
2919 vsi
->info
.port_vlan_flags
= I40E_AQ_VSI_PVLAN_MODE_TAGGED
|
2920 I40E_AQ_VSI_PVLAN_INSERT_PVID
|
2921 I40E_AQ_VSI_PVLAN_EMOD_STR
;
2923 ctxt
.seid
= vsi
->seid
;
2924 ctxt
.info
= vsi
->info
;
2925 ret
= i40e_aq_update_vsi_params(&vsi
->back
->hw
, &ctxt
, NULL
);
2927 dev_info(&vsi
->back
->pdev
->dev
,
2928 "add pvid failed, err %s aq_err %s\n",
2929 i40e_stat_str(&vsi
->back
->hw
, ret
),
2930 i40e_aq_str(&vsi
->back
->hw
,
2931 vsi
->back
->hw
.aq
.asq_last_status
));
2939 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2940 * @vsi: the vsi being adjusted
2942 * Just use the vlan_rx_register() service to put it back to normal
2944 void i40e_vsi_remove_pvid(struct i40e_vsi
*vsi
)
2946 i40e_vlan_stripping_disable(vsi
);
2952 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2953 * @vsi: ptr to the VSI
2955 * If this function returns with an error, then it's possible one or
2956 * more of the rings is populated (while the rest are not). It is the
2957 * callers duty to clean those orphaned rings.
2959 * Return 0 on success, negative on failure
2961 static int i40e_vsi_setup_tx_resources(struct i40e_vsi
*vsi
)
2965 for (i
= 0; i
< vsi
->num_queue_pairs
&& !err
; i
++)
2966 err
= i40e_setup_tx_descriptors(vsi
->tx_rings
[i
]);
2968 if (!i40e_enabled_xdp_vsi(vsi
))
2971 for (i
= 0; i
< vsi
->num_queue_pairs
&& !err
; i
++)
2972 err
= i40e_setup_tx_descriptors(vsi
->xdp_rings
[i
]);
2978 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2979 * @vsi: ptr to the VSI
2981 * Free VSI's transmit software resources
2983 static void i40e_vsi_free_tx_resources(struct i40e_vsi
*vsi
)
2987 if (vsi
->tx_rings
) {
2988 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++)
2989 if (vsi
->tx_rings
[i
] && vsi
->tx_rings
[i
]->desc
)
2990 i40e_free_tx_resources(vsi
->tx_rings
[i
]);
2993 if (vsi
->xdp_rings
) {
2994 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++)
2995 if (vsi
->xdp_rings
[i
] && vsi
->xdp_rings
[i
]->desc
)
2996 i40e_free_tx_resources(vsi
->xdp_rings
[i
]);
3001 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3002 * @vsi: ptr to the VSI
3004 * If this function returns with an error, then it's possible one or
3005 * more of the rings is populated (while the rest are not). It is the
3006 * callers duty to clean those orphaned rings.
3008 * Return 0 on success, negative on failure
3010 static int i40e_vsi_setup_rx_resources(struct i40e_vsi
*vsi
)
3014 for (i
= 0; i
< vsi
->num_queue_pairs
&& !err
; i
++)
3015 err
= i40e_setup_rx_descriptors(vsi
->rx_rings
[i
]);
3020 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3021 * @vsi: ptr to the VSI
3023 * Free all receive software resources
3025 static void i40e_vsi_free_rx_resources(struct i40e_vsi
*vsi
)
3032 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++)
3033 if (vsi
->rx_rings
[i
] && vsi
->rx_rings
[i
]->desc
)
3034 i40e_free_rx_resources(vsi
->rx_rings
[i
]);
3038 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3039 * @ring: The Tx ring to configure
3041 * This enables/disables XPS for a given Tx descriptor ring
3042 * based on the TCs enabled for the VSI that ring belongs to.
3044 static void i40e_config_xps_tx_ring(struct i40e_ring
*ring
)
3048 if (!ring
->q_vector
|| !ring
->netdev
|| ring
->ch
)
3051 /* We only initialize XPS once, so as not to overwrite user settings */
3052 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE
, ring
->state
))
3055 cpu
= cpumask_local_spread(ring
->q_vector
->v_idx
, -1);
3056 netif_set_xps_queue(ring
->netdev
, get_cpu_mask(cpu
),
3061 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3062 * @ring: The Tx ring to configure
3064 * Configure the Tx descriptor ring in the HMC context.
3066 static int i40e_configure_tx_ring(struct i40e_ring
*ring
)
3068 struct i40e_vsi
*vsi
= ring
->vsi
;
3069 u16 pf_q
= vsi
->base_queue
+ ring
->queue_index
;
3070 struct i40e_hw
*hw
= &vsi
->back
->hw
;
3071 struct i40e_hmc_obj_txq tx_ctx
;
3072 i40e_status err
= 0;
3075 /* some ATR related tx ring init */
3076 if (vsi
->back
->flags
& I40E_FLAG_FD_ATR_ENABLED
) {
3077 ring
->atr_sample_rate
= vsi
->back
->atr_sample_rate
;
3078 ring
->atr_count
= 0;
3080 ring
->atr_sample_rate
= 0;
3084 i40e_config_xps_tx_ring(ring
);
3086 /* clear the context structure first */
3087 memset(&tx_ctx
, 0, sizeof(tx_ctx
));
3089 tx_ctx
.new_context
= 1;
3090 tx_ctx
.base
= (ring
->dma
/ 128);
3091 tx_ctx
.qlen
= ring
->count
;
3092 tx_ctx
.fd_ena
= !!(vsi
->back
->flags
& (I40E_FLAG_FD_SB_ENABLED
|
3093 I40E_FLAG_FD_ATR_ENABLED
));
3094 tx_ctx
.timesync_ena
= !!(vsi
->back
->flags
& I40E_FLAG_PTP
);
3095 /* FDIR VSI tx ring can still use RS bit and writebacks */
3096 if (vsi
->type
!= I40E_VSI_FDIR
)
3097 tx_ctx
.head_wb_ena
= 1;
3098 tx_ctx
.head_wb_addr
= ring
->dma
+
3099 (ring
->count
* sizeof(struct i40e_tx_desc
));
3101 /* As part of VSI creation/update, FW allocates certain
3102 * Tx arbitration queue sets for each TC enabled for
3103 * the VSI. The FW returns the handles to these queue
3104 * sets as part of the response buffer to Add VSI,
3105 * Update VSI, etc. AQ commands. It is expected that
3106 * these queue set handles be associated with the Tx
3107 * queues by the driver as part of the TX queue context
3108 * initialization. This has to be done regardless of
3109 * DCB as by default everything is mapped to TC0.
3114 le16_to_cpu(ring
->ch
->info
.qs_handle
[ring
->dcb_tc
]);
3117 tx_ctx
.rdylist
= le16_to_cpu(vsi
->info
.qs_handle
[ring
->dcb_tc
]);
3119 tx_ctx
.rdylist_act
= 0;
3121 /* clear the context in the HMC */
3122 err
= i40e_clear_lan_tx_queue_context(hw
, pf_q
);
3124 dev_info(&vsi
->back
->pdev
->dev
,
3125 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3126 ring
->queue_index
, pf_q
, err
);
3130 /* set the context in the HMC */
3131 err
= i40e_set_lan_tx_queue_context(hw
, pf_q
, &tx_ctx
);
3133 dev_info(&vsi
->back
->pdev
->dev
,
3134 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3135 ring
->queue_index
, pf_q
, err
);
3139 /* Now associate this queue with this PCI function */
3141 if (ring
->ch
->type
== I40E_VSI_VMDQ2
)
3142 qtx_ctl
= I40E_QTX_CTL_VM_QUEUE
;
3146 qtx_ctl
|= (ring
->ch
->vsi_number
<<
3147 I40E_QTX_CTL_VFVM_INDX_SHIFT
) &
3148 I40E_QTX_CTL_VFVM_INDX_MASK
;
3150 if (vsi
->type
== I40E_VSI_VMDQ2
) {
3151 qtx_ctl
= I40E_QTX_CTL_VM_QUEUE
;
3152 qtx_ctl
|= ((vsi
->id
) << I40E_QTX_CTL_VFVM_INDX_SHIFT
) &
3153 I40E_QTX_CTL_VFVM_INDX_MASK
;
3155 qtx_ctl
= I40E_QTX_CTL_PF_QUEUE
;
3159 qtx_ctl
|= ((hw
->pf_id
<< I40E_QTX_CTL_PF_INDX_SHIFT
) &
3160 I40E_QTX_CTL_PF_INDX_MASK
);
3161 wr32(hw
, I40E_QTX_CTL(pf_q
), qtx_ctl
);
3164 /* cache tail off for easier writes later */
3165 ring
->tail
= hw
->hw_addr
+ I40E_QTX_TAIL(pf_q
);
3171 * i40e_configure_rx_ring - Configure a receive ring context
3172 * @ring: The Rx ring to configure
3174 * Configure the Rx descriptor ring in the HMC context.
3176 static int i40e_configure_rx_ring(struct i40e_ring
*ring
)
3178 struct i40e_vsi
*vsi
= ring
->vsi
;
3179 u32 chain_len
= vsi
->back
->hw
.func_caps
.rx_buf_chain_len
;
3180 u16 pf_q
= vsi
->base_queue
+ ring
->queue_index
;
3181 struct i40e_hw
*hw
= &vsi
->back
->hw
;
3182 struct i40e_hmc_obj_rxq rx_ctx
;
3183 i40e_status err
= 0;
3185 bitmap_zero(ring
->state
, __I40E_RING_STATE_NBITS
);
3187 /* clear the context structure first */
3188 memset(&rx_ctx
, 0, sizeof(rx_ctx
));
3190 ring
->rx_buf_len
= vsi
->rx_buf_len
;
3192 rx_ctx
.dbuff
= DIV_ROUND_UP(ring
->rx_buf_len
,
3193 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT
));
3195 rx_ctx
.base
= (ring
->dma
/ 128);
3196 rx_ctx
.qlen
= ring
->count
;
3198 /* use 32 byte descriptors */
3201 /* descriptor type is always zero
3204 rx_ctx
.hsplit_0
= 0;
3206 rx_ctx
.rxmax
= min_t(u16
, vsi
->max_frame
, chain_len
* ring
->rx_buf_len
);
3207 if (hw
->revision_id
== 0)
3208 rx_ctx
.lrxqthresh
= 0;
3210 rx_ctx
.lrxqthresh
= 1;
3211 rx_ctx
.crcstrip
= 1;
3213 /* this controls whether VLAN is stripped from inner headers */
3215 /* set the prefena field to 1 because the manual says to */
3218 /* clear the context in the HMC */
3219 err
= i40e_clear_lan_rx_queue_context(hw
, pf_q
);
3221 dev_info(&vsi
->back
->pdev
->dev
,
3222 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3223 ring
->queue_index
, pf_q
, err
);
3227 /* set the context in the HMC */
3228 err
= i40e_set_lan_rx_queue_context(hw
, pf_q
, &rx_ctx
);
3230 dev_info(&vsi
->back
->pdev
->dev
,
3231 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3232 ring
->queue_index
, pf_q
, err
);
3236 /* configure Rx buffer alignment */
3237 if (!vsi
->netdev
|| (vsi
->back
->flags
& I40E_FLAG_LEGACY_RX
))
3238 clear_ring_build_skb_enabled(ring
);
3240 set_ring_build_skb_enabled(ring
);
3242 /* cache tail for quicker writes, and clear the reg before use */
3243 ring
->tail
= hw
->hw_addr
+ I40E_QRX_TAIL(pf_q
);
3244 writel(0, ring
->tail
);
3246 i40e_alloc_rx_buffers(ring
, I40E_DESC_UNUSED(ring
));
3252 * i40e_vsi_configure_tx - Configure the VSI for Tx
3253 * @vsi: VSI structure describing this set of rings and resources
3255 * Configure the Tx VSI for operation.
3257 static int i40e_vsi_configure_tx(struct i40e_vsi
*vsi
)
3262 for (i
= 0; (i
< vsi
->num_queue_pairs
) && !err
; i
++)
3263 err
= i40e_configure_tx_ring(vsi
->tx_rings
[i
]);
3265 if (!i40e_enabled_xdp_vsi(vsi
))
3268 for (i
= 0; (i
< vsi
->num_queue_pairs
) && !err
; i
++)
3269 err
= i40e_configure_tx_ring(vsi
->xdp_rings
[i
]);
3275 * i40e_vsi_configure_rx - Configure the VSI for Rx
3276 * @vsi: the VSI being configured
3278 * Configure the Rx VSI for operation.
3280 static int i40e_vsi_configure_rx(struct i40e_vsi
*vsi
)
3285 if (!vsi
->netdev
|| (vsi
->back
->flags
& I40E_FLAG_LEGACY_RX
)) {
3286 vsi
->max_frame
= I40E_MAX_RXBUFFER
;
3287 vsi
->rx_buf_len
= I40E_RXBUFFER_2048
;
3288 #if (PAGE_SIZE < 8192)
3289 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING
&&
3290 (vsi
->netdev
->mtu
<= ETH_DATA_LEN
)) {
3291 vsi
->max_frame
= I40E_RXBUFFER_1536
- NET_IP_ALIGN
;
3292 vsi
->rx_buf_len
= I40E_RXBUFFER_1536
- NET_IP_ALIGN
;
3295 vsi
->max_frame
= I40E_MAX_RXBUFFER
;
3296 vsi
->rx_buf_len
= (PAGE_SIZE
< 8192) ? I40E_RXBUFFER_3072
:
3300 /* set up individual rings */
3301 for (i
= 0; i
< vsi
->num_queue_pairs
&& !err
; i
++)
3302 err
= i40e_configure_rx_ring(vsi
->rx_rings
[i
]);
3308 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3309 * @vsi: ptr to the VSI
3311 static void i40e_vsi_config_dcb_rings(struct i40e_vsi
*vsi
)
3313 struct i40e_ring
*tx_ring
, *rx_ring
;
3314 u16 qoffset
, qcount
;
3317 if (!(vsi
->back
->flags
& I40E_FLAG_DCB_ENABLED
)) {
3318 /* Reset the TC information */
3319 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++) {
3320 rx_ring
= vsi
->rx_rings
[i
];
3321 tx_ring
= vsi
->tx_rings
[i
];
3322 rx_ring
->dcb_tc
= 0;
3323 tx_ring
->dcb_tc
= 0;
3328 for (n
= 0; n
< I40E_MAX_TRAFFIC_CLASS
; n
++) {
3329 if (!(vsi
->tc_config
.enabled_tc
& BIT_ULL(n
)))
3332 qoffset
= vsi
->tc_config
.tc_info
[n
].qoffset
;
3333 qcount
= vsi
->tc_config
.tc_info
[n
].qcount
;
3334 for (i
= qoffset
; i
< (qoffset
+ qcount
); i
++) {
3335 rx_ring
= vsi
->rx_rings
[i
];
3336 tx_ring
= vsi
->tx_rings
[i
];
3337 rx_ring
->dcb_tc
= n
;
3338 tx_ring
->dcb_tc
= n
;
3344 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3345 * @vsi: ptr to the VSI
3347 static void i40e_set_vsi_rx_mode(struct i40e_vsi
*vsi
)
3350 i40e_set_rx_mode(vsi
->netdev
);
3354 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3355 * @vsi: Pointer to the targeted VSI
3357 * This function replays the hlist on the hw where all the SB Flow Director
3358 * filters were saved.
3360 static void i40e_fdir_filter_restore(struct i40e_vsi
*vsi
)
3362 struct i40e_fdir_filter
*filter
;
3363 struct i40e_pf
*pf
= vsi
->back
;
3364 struct hlist_node
*node
;
3366 if (!(pf
->flags
& I40E_FLAG_FD_SB_ENABLED
))
3369 /* Reset FDir counters as we're replaying all existing filters */
3370 pf
->fd_tcp4_filter_cnt
= 0;
3371 pf
->fd_udp4_filter_cnt
= 0;
3372 pf
->fd_sctp4_filter_cnt
= 0;
3373 pf
->fd_ip4_filter_cnt
= 0;
3375 hlist_for_each_entry_safe(filter
, node
,
3376 &pf
->fdir_filter_list
, fdir_node
) {
3377 i40e_add_del_fdir(vsi
, filter
, true);
3382 * i40e_vsi_configure - Set up the VSI for action
3383 * @vsi: the VSI being configured
3385 static int i40e_vsi_configure(struct i40e_vsi
*vsi
)
3389 i40e_set_vsi_rx_mode(vsi
);
3390 i40e_restore_vlan(vsi
);
3391 i40e_vsi_config_dcb_rings(vsi
);
3392 err
= i40e_vsi_configure_tx(vsi
);
3394 err
= i40e_vsi_configure_rx(vsi
);
3400 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3401 * @vsi: the VSI being configured
3403 static void i40e_vsi_configure_msix(struct i40e_vsi
*vsi
)
3405 bool has_xdp
= i40e_enabled_xdp_vsi(vsi
);
3406 struct i40e_pf
*pf
= vsi
->back
;
3407 struct i40e_hw
*hw
= &pf
->hw
;
3412 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3413 * and PFINT_LNKLSTn registers, e.g.:
3414 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3416 qp
= vsi
->base_queue
;
3417 vector
= vsi
->base_vector
;
3418 for (i
= 0; i
< vsi
->num_q_vectors
; i
++, vector
++) {
3419 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[i
];
3421 q_vector
->rx
.next_update
= jiffies
+ 1;
3422 q_vector
->rx
.target_itr
=
3423 ITR_TO_REG(vsi
->rx_rings
[i
]->itr_setting
);
3424 wr32(hw
, I40E_PFINT_ITRN(I40E_RX_ITR
, vector
- 1),
3425 q_vector
->rx
.target_itr
);
3426 q_vector
->rx
.current_itr
= q_vector
->rx
.target_itr
;
3428 q_vector
->tx
.next_update
= jiffies
+ 1;
3429 q_vector
->tx
.target_itr
=
3430 ITR_TO_REG(vsi
->tx_rings
[i
]->itr_setting
);
3431 wr32(hw
, I40E_PFINT_ITRN(I40E_TX_ITR
, vector
- 1),
3432 q_vector
->tx
.target_itr
);
3433 q_vector
->tx
.current_itr
= q_vector
->tx
.target_itr
;
3435 wr32(hw
, I40E_PFINT_RATEN(vector
- 1),
3436 i40e_intrl_usec_to_reg(vsi
->int_rate_limit
));
3438 /* Linked list for the queuepairs assigned to this vector */
3439 wr32(hw
, I40E_PFINT_LNKLSTN(vector
- 1), qp
);
3440 for (q
= 0; q
< q_vector
->num_ringpairs
; q
++) {
3441 u32 nextqp
= has_xdp
? qp
+ vsi
->alloc_queue_pairs
: qp
;
3444 val
= I40E_QINT_RQCTL_CAUSE_ENA_MASK
|
3445 (I40E_RX_ITR
<< I40E_QINT_RQCTL_ITR_INDX_SHIFT
) |
3446 (vector
<< I40E_QINT_RQCTL_MSIX_INDX_SHIFT
) |
3447 (nextqp
<< I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT
) |
3448 (I40E_QUEUE_TYPE_TX
<<
3449 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT
);
3451 wr32(hw
, I40E_QINT_RQCTL(qp
), val
);
3454 val
= I40E_QINT_TQCTL_CAUSE_ENA_MASK
|
3455 (I40E_TX_ITR
<< I40E_QINT_TQCTL_ITR_INDX_SHIFT
) |
3456 (vector
<< I40E_QINT_TQCTL_MSIX_INDX_SHIFT
) |
3457 (qp
<< I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT
) |
3458 (I40E_QUEUE_TYPE_TX
<<
3459 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT
);
3461 wr32(hw
, I40E_QINT_TQCTL(nextqp
), val
);
3464 val
= I40E_QINT_TQCTL_CAUSE_ENA_MASK
|
3465 (I40E_TX_ITR
<< I40E_QINT_TQCTL_ITR_INDX_SHIFT
) |
3466 (vector
<< I40E_QINT_TQCTL_MSIX_INDX_SHIFT
) |
3467 ((qp
+ 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT
) |
3468 (I40E_QUEUE_TYPE_RX
<<
3469 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT
);
3471 /* Terminate the linked list */
3472 if (q
== (q_vector
->num_ringpairs
- 1))
3473 val
|= (I40E_QUEUE_END_OF_LIST
<<
3474 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT
);
3476 wr32(hw
, I40E_QINT_TQCTL(qp
), val
);
3485 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3486 * @pf: pointer to private device data structure
3488 static void i40e_enable_misc_int_causes(struct i40e_pf
*pf
)
3490 struct i40e_hw
*hw
= &pf
->hw
;
3493 /* clear things first */
3494 wr32(hw
, I40E_PFINT_ICR0_ENA
, 0); /* disable all */
3495 rd32(hw
, I40E_PFINT_ICR0
); /* read to clear */
3497 val
= I40E_PFINT_ICR0_ENA_ECC_ERR_MASK
|
3498 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK
|
3499 I40E_PFINT_ICR0_ENA_GRST_MASK
|
3500 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK
|
3501 I40E_PFINT_ICR0_ENA_GPIO_MASK
|
3502 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK
|
3503 I40E_PFINT_ICR0_ENA_VFLR_MASK
|
3504 I40E_PFINT_ICR0_ENA_ADMINQ_MASK
;
3506 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
)
3507 val
|= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK
;
3509 if (pf
->flags
& I40E_FLAG_PTP
)
3510 val
|= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK
;
3512 wr32(hw
, I40E_PFINT_ICR0_ENA
, val
);
3514 /* SW_ITR_IDX = 0, but don't change INTENA */
3515 wr32(hw
, I40E_PFINT_DYN_CTL0
, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK
|
3516 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK
);
3518 /* OTHER_ITR_IDX = 0 */
3519 wr32(hw
, I40E_PFINT_STAT_CTL0
, 0);
3523 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3524 * @vsi: the VSI being configured
3526 static void i40e_configure_msi_and_legacy(struct i40e_vsi
*vsi
)
3528 u32 nextqp
= i40e_enabled_xdp_vsi(vsi
) ? vsi
->alloc_queue_pairs
: 0;
3529 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[0];
3530 struct i40e_pf
*pf
= vsi
->back
;
3531 struct i40e_hw
*hw
= &pf
->hw
;
3534 /* set the ITR configuration */
3535 q_vector
->rx
.next_update
= jiffies
+ 1;
3536 q_vector
->rx
.target_itr
= ITR_TO_REG(vsi
->rx_rings
[0]->itr_setting
);
3537 wr32(hw
, I40E_PFINT_ITR0(I40E_RX_ITR
), q_vector
->rx
.target_itr
);
3538 q_vector
->rx
.current_itr
= q_vector
->rx
.target_itr
;
3539 q_vector
->tx
.next_update
= jiffies
+ 1;
3540 q_vector
->tx
.target_itr
= ITR_TO_REG(vsi
->tx_rings
[0]->itr_setting
);
3541 wr32(hw
, I40E_PFINT_ITR0(I40E_TX_ITR
), q_vector
->tx
.target_itr
);
3542 q_vector
->tx
.current_itr
= q_vector
->tx
.target_itr
;
3544 i40e_enable_misc_int_causes(pf
);
3546 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3547 wr32(hw
, I40E_PFINT_LNKLST0
, 0);
3549 /* Associate the queue pair to the vector and enable the queue int */
3550 val
= I40E_QINT_RQCTL_CAUSE_ENA_MASK
|
3551 (I40E_RX_ITR
<< I40E_QINT_RQCTL_ITR_INDX_SHIFT
) |
3552 (nextqp
<< I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT
)|
3553 (I40E_QUEUE_TYPE_TX
<< I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT
);
3555 wr32(hw
, I40E_QINT_RQCTL(0), val
);
3557 if (i40e_enabled_xdp_vsi(vsi
)) {
3558 val
= I40E_QINT_TQCTL_CAUSE_ENA_MASK
|
3559 (I40E_TX_ITR
<< I40E_QINT_TQCTL_ITR_INDX_SHIFT
)|
3561 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT
);
3563 wr32(hw
, I40E_QINT_TQCTL(nextqp
), val
);
3566 val
= I40E_QINT_TQCTL_CAUSE_ENA_MASK
|
3567 (I40E_TX_ITR
<< I40E_QINT_TQCTL_ITR_INDX_SHIFT
) |
3568 (I40E_QUEUE_END_OF_LIST
<< I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT
);
3570 wr32(hw
, I40E_QINT_TQCTL(0), val
);
3575 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3576 * @pf: board private structure
3578 void i40e_irq_dynamic_disable_icr0(struct i40e_pf
*pf
)
3580 struct i40e_hw
*hw
= &pf
->hw
;
3582 wr32(hw
, I40E_PFINT_DYN_CTL0
,
3583 I40E_ITR_NONE
<< I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT
);
3588 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3589 * @pf: board private structure
3591 void i40e_irq_dynamic_enable_icr0(struct i40e_pf
*pf
)
3593 struct i40e_hw
*hw
= &pf
->hw
;
3596 val
= I40E_PFINT_DYN_CTL0_INTENA_MASK
|
3597 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK
|
3598 (I40E_ITR_NONE
<< I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT
);
3600 wr32(hw
, I40E_PFINT_DYN_CTL0
, val
);
3605 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3606 * @irq: interrupt number
3607 * @data: pointer to a q_vector
3609 static irqreturn_t
i40e_msix_clean_rings(int irq
, void *data
)
3611 struct i40e_q_vector
*q_vector
= data
;
3613 if (!q_vector
->tx
.ring
&& !q_vector
->rx
.ring
)
3616 napi_schedule_irqoff(&q_vector
->napi
);
3622 * i40e_irq_affinity_notify - Callback for affinity changes
3623 * @notify: context as to what irq was changed
3624 * @mask: the new affinity mask
3626 * This is a callback function used by the irq_set_affinity_notifier function
3627 * so that we may register to receive changes to the irq affinity masks.
3629 static void i40e_irq_affinity_notify(struct irq_affinity_notify
*notify
,
3630 const cpumask_t
*mask
)
3632 struct i40e_q_vector
*q_vector
=
3633 container_of(notify
, struct i40e_q_vector
, affinity_notify
);
3635 cpumask_copy(&q_vector
->affinity_mask
, mask
);
3639 * i40e_irq_affinity_release - Callback for affinity notifier release
3640 * @ref: internal core kernel usage
3642 * This is a callback function used by the irq_set_affinity_notifier function
3643 * to inform the current notification subscriber that they will no longer
3644 * receive notifications.
3646 static void i40e_irq_affinity_release(struct kref
*ref
) {}
3649 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3650 * @vsi: the VSI being configured
3651 * @basename: name for the vector
3653 * Allocates MSI-X vectors and requests interrupts from the kernel.
3655 static int i40e_vsi_request_irq_msix(struct i40e_vsi
*vsi
, char *basename
)
3657 int q_vectors
= vsi
->num_q_vectors
;
3658 struct i40e_pf
*pf
= vsi
->back
;
3659 int base
= vsi
->base_vector
;
3666 for (vector
= 0; vector
< q_vectors
; vector
++) {
3667 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[vector
];
3669 irq_num
= pf
->msix_entries
[base
+ vector
].vector
;
3671 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
3672 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
3673 "%s-%s-%d", basename
, "TxRx", rx_int_idx
++);
3675 } else if (q_vector
->rx
.ring
) {
3676 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
3677 "%s-%s-%d", basename
, "rx", rx_int_idx
++);
3678 } else if (q_vector
->tx
.ring
) {
3679 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
3680 "%s-%s-%d", basename
, "tx", tx_int_idx
++);
3682 /* skip this unused q_vector */
3685 err
= request_irq(irq_num
,
3691 dev_info(&pf
->pdev
->dev
,
3692 "MSIX request_irq failed, error: %d\n", err
);
3693 goto free_queue_irqs
;
3696 /* register for affinity change notifications */
3697 q_vector
->affinity_notify
.notify
= i40e_irq_affinity_notify
;
3698 q_vector
->affinity_notify
.release
= i40e_irq_affinity_release
;
3699 irq_set_affinity_notifier(irq_num
, &q_vector
->affinity_notify
);
3700 /* Spread affinity hints out across online CPUs.
3702 * get_cpu_mask returns a static constant mask with
3703 * a permanent lifetime so it's ok to pass to
3704 * irq_set_affinity_hint without making a copy.
3706 cpu
= cpumask_local_spread(q_vector
->v_idx
, -1);
3707 irq_set_affinity_hint(irq_num
, get_cpu_mask(cpu
));
3710 vsi
->irqs_ready
= true;
3716 irq_num
= pf
->msix_entries
[base
+ vector
].vector
;
3717 irq_set_affinity_notifier(irq_num
, NULL
);
3718 irq_set_affinity_hint(irq_num
, NULL
);
3719 free_irq(irq_num
, &vsi
->q_vectors
[vector
]);
3725 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3726 * @vsi: the VSI being un-configured
3728 static void i40e_vsi_disable_irq(struct i40e_vsi
*vsi
)
3730 struct i40e_pf
*pf
= vsi
->back
;
3731 struct i40e_hw
*hw
= &pf
->hw
;
3732 int base
= vsi
->base_vector
;
3735 /* disable interrupt causation from each queue */
3736 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++) {
3739 val
= rd32(hw
, I40E_QINT_TQCTL(vsi
->tx_rings
[i
]->reg_idx
));
3740 val
&= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK
;
3741 wr32(hw
, I40E_QINT_TQCTL(vsi
->tx_rings
[i
]->reg_idx
), val
);
3743 val
= rd32(hw
, I40E_QINT_RQCTL(vsi
->rx_rings
[i
]->reg_idx
));
3744 val
&= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK
;
3745 wr32(hw
, I40E_QINT_RQCTL(vsi
->rx_rings
[i
]->reg_idx
), val
);
3747 if (!i40e_enabled_xdp_vsi(vsi
))
3749 wr32(hw
, I40E_QINT_TQCTL(vsi
->xdp_rings
[i
]->reg_idx
), 0);
3752 /* disable each interrupt */
3753 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
3754 for (i
= vsi
->base_vector
;
3755 i
< (vsi
->num_q_vectors
+ vsi
->base_vector
); i
++)
3756 wr32(hw
, I40E_PFINT_DYN_CTLN(i
- 1), 0);
3759 for (i
= 0; i
< vsi
->num_q_vectors
; i
++)
3760 synchronize_irq(pf
->msix_entries
[i
+ base
].vector
);
3762 /* Legacy and MSI mode - this stops all interrupt handling */
3763 wr32(hw
, I40E_PFINT_ICR0_ENA
, 0);
3764 wr32(hw
, I40E_PFINT_DYN_CTL0
, 0);
3766 synchronize_irq(pf
->pdev
->irq
);
3771 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3772 * @vsi: the VSI being configured
3774 static int i40e_vsi_enable_irq(struct i40e_vsi
*vsi
)
3776 struct i40e_pf
*pf
= vsi
->back
;
3779 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
3780 for (i
= 0; i
< vsi
->num_q_vectors
; i
++)
3781 i40e_irq_dynamic_enable(vsi
, i
);
3783 i40e_irq_dynamic_enable_icr0(pf
);
3786 i40e_flush(&pf
->hw
);
3791 * i40e_free_misc_vector - Free the vector that handles non-queue events
3792 * @pf: board private structure
3794 static void i40e_free_misc_vector(struct i40e_pf
*pf
)
3797 wr32(&pf
->hw
, I40E_PFINT_ICR0_ENA
, 0);
3798 i40e_flush(&pf
->hw
);
3800 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
&& pf
->msix_entries
) {
3801 synchronize_irq(pf
->msix_entries
[0].vector
);
3802 free_irq(pf
->msix_entries
[0].vector
, pf
);
3803 clear_bit(__I40E_MISC_IRQ_REQUESTED
, pf
->state
);
3808 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3809 * @irq: interrupt number
3810 * @data: pointer to a q_vector
3812 * This is the handler used for all MSI/Legacy interrupts, and deals
3813 * with both queue and non-queue interrupts. This is also used in
3814 * MSIX mode to handle the non-queue interrupts.
3816 static irqreturn_t
i40e_intr(int irq
, void *data
)
3818 struct i40e_pf
*pf
= (struct i40e_pf
*)data
;
3819 struct i40e_hw
*hw
= &pf
->hw
;
3820 irqreturn_t ret
= IRQ_NONE
;
3821 u32 icr0
, icr0_remaining
;
3824 icr0
= rd32(hw
, I40E_PFINT_ICR0
);
3825 ena_mask
= rd32(hw
, I40E_PFINT_ICR0_ENA
);
3827 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3828 if ((icr0
& I40E_PFINT_ICR0_INTEVENT_MASK
) == 0)
3831 /* if interrupt but no bits showing, must be SWINT */
3832 if (((icr0
& ~I40E_PFINT_ICR0_INTEVENT_MASK
) == 0) ||
3833 (icr0
& I40E_PFINT_ICR0_SWINT_MASK
))
3836 if ((pf
->flags
& I40E_FLAG_IWARP_ENABLED
) &&
3837 (icr0
& I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK
)) {
3838 ena_mask
&= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK
;
3839 dev_dbg(&pf
->pdev
->dev
, "cleared PE_CRITERR\n");
3840 set_bit(__I40E_CORE_RESET_REQUESTED
, pf
->state
);
3843 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3844 if (icr0
& I40E_PFINT_ICR0_QUEUE_0_MASK
) {
3845 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
3846 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[0];
3848 /* We do not have a way to disarm Queue causes while leaving
3849 * interrupt enabled for all other causes, ideally
3850 * interrupt should be disabled while we are in NAPI but
3851 * this is not a performance path and napi_schedule()
3852 * can deal with rescheduling.
3854 if (!test_bit(__I40E_DOWN
, pf
->state
))
3855 napi_schedule_irqoff(&q_vector
->napi
);
3858 if (icr0
& I40E_PFINT_ICR0_ADMINQ_MASK
) {
3859 ena_mask
&= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK
;
3860 set_bit(__I40E_ADMINQ_EVENT_PENDING
, pf
->state
);
3861 i40e_debug(&pf
->hw
, I40E_DEBUG_NVM
, "AdminQ event\n");
3864 if (icr0
& I40E_PFINT_ICR0_MAL_DETECT_MASK
) {
3865 ena_mask
&= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK
;
3866 set_bit(__I40E_MDD_EVENT_PENDING
, pf
->state
);
3869 if (icr0
& I40E_PFINT_ICR0_VFLR_MASK
) {
3870 ena_mask
&= ~I40E_PFINT_ICR0_ENA_VFLR_MASK
;
3871 set_bit(__I40E_VFLR_EVENT_PENDING
, pf
->state
);
3874 if (icr0
& I40E_PFINT_ICR0_GRST_MASK
) {
3875 if (!test_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
))
3876 set_bit(__I40E_RESET_INTR_RECEIVED
, pf
->state
);
3877 ena_mask
&= ~I40E_PFINT_ICR0_ENA_GRST_MASK
;
3878 val
= rd32(hw
, I40E_GLGEN_RSTAT
);
3879 val
= (val
& I40E_GLGEN_RSTAT_RESET_TYPE_MASK
)
3880 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT
;
3881 if (val
== I40E_RESET_CORER
) {
3883 } else if (val
== I40E_RESET_GLOBR
) {
3885 } else if (val
== I40E_RESET_EMPR
) {
3887 set_bit(__I40E_EMP_RESET_INTR_RECEIVED
, pf
->state
);
3891 if (icr0
& I40E_PFINT_ICR0_HMC_ERR_MASK
) {
3892 icr0
&= ~I40E_PFINT_ICR0_HMC_ERR_MASK
;
3893 dev_info(&pf
->pdev
->dev
, "HMC error interrupt\n");
3894 dev_info(&pf
->pdev
->dev
, "HMC error info 0x%x, HMC error data 0x%x\n",
3895 rd32(hw
, I40E_PFHMC_ERRORINFO
),
3896 rd32(hw
, I40E_PFHMC_ERRORDATA
));
3899 if (icr0
& I40E_PFINT_ICR0_TIMESYNC_MASK
) {
3900 u32 prttsyn_stat
= rd32(hw
, I40E_PRTTSYN_STAT_0
);
3902 if (prttsyn_stat
& I40E_PRTTSYN_STAT_0_TXTIME_MASK
) {
3903 icr0
&= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK
;
3904 i40e_ptp_tx_hwtstamp(pf
);
3908 /* If a critical error is pending we have no choice but to reset the
3910 * Report and mask out any remaining unexpected interrupts.
3912 icr0_remaining
= icr0
& ena_mask
;
3913 if (icr0_remaining
) {
3914 dev_info(&pf
->pdev
->dev
, "unhandled interrupt icr0=0x%08x\n",
3916 if ((icr0_remaining
& I40E_PFINT_ICR0_PE_CRITERR_MASK
) ||
3917 (icr0_remaining
& I40E_PFINT_ICR0_PCI_EXCEPTION_MASK
) ||
3918 (icr0_remaining
& I40E_PFINT_ICR0_ECC_ERR_MASK
)) {
3919 dev_info(&pf
->pdev
->dev
, "device will be reset\n");
3920 set_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
);
3921 i40e_service_event_schedule(pf
);
3923 ena_mask
&= ~icr0_remaining
;
3928 /* re-enable interrupt causes */
3929 wr32(hw
, I40E_PFINT_ICR0_ENA
, ena_mask
);
3930 if (!test_bit(__I40E_DOWN
, pf
->state
)) {
3931 i40e_service_event_schedule(pf
);
3932 i40e_irq_dynamic_enable_icr0(pf
);
3939 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3940 * @tx_ring: tx ring to clean
3941 * @budget: how many cleans we're allowed
3943 * Returns true if there's any budget left (e.g. the clean is finished)
3945 static bool i40e_clean_fdir_tx_irq(struct i40e_ring
*tx_ring
, int budget
)
3947 struct i40e_vsi
*vsi
= tx_ring
->vsi
;
3948 u16 i
= tx_ring
->next_to_clean
;
3949 struct i40e_tx_buffer
*tx_buf
;
3950 struct i40e_tx_desc
*tx_desc
;
3952 tx_buf
= &tx_ring
->tx_bi
[i
];
3953 tx_desc
= I40E_TX_DESC(tx_ring
, i
);
3954 i
-= tx_ring
->count
;
3957 struct i40e_tx_desc
*eop_desc
= tx_buf
->next_to_watch
;
3959 /* if next_to_watch is not set then there is no work pending */
3963 /* prevent any other reads prior to eop_desc */
3966 /* if the descriptor isn't done, no work yet to do */
3967 if (!(eop_desc
->cmd_type_offset_bsz
&
3968 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE
)))
3971 /* clear next_to_watch to prevent false hangs */
3972 tx_buf
->next_to_watch
= NULL
;
3974 tx_desc
->buffer_addr
= 0;
3975 tx_desc
->cmd_type_offset_bsz
= 0;
3976 /* move past filter desc */
3981 i
-= tx_ring
->count
;
3982 tx_buf
= tx_ring
->tx_bi
;
3983 tx_desc
= I40E_TX_DESC(tx_ring
, 0);
3985 /* unmap skb header data */
3986 dma_unmap_single(tx_ring
->dev
,
3987 dma_unmap_addr(tx_buf
, dma
),
3988 dma_unmap_len(tx_buf
, len
),
3990 if (tx_buf
->tx_flags
& I40E_TX_FLAGS_FD_SB
)
3991 kfree(tx_buf
->raw_buf
);
3993 tx_buf
->raw_buf
= NULL
;
3994 tx_buf
->tx_flags
= 0;
3995 tx_buf
->next_to_watch
= NULL
;
3996 dma_unmap_len_set(tx_buf
, len
, 0);
3997 tx_desc
->buffer_addr
= 0;
3998 tx_desc
->cmd_type_offset_bsz
= 0;
4000 /* move us past the eop_desc for start of next FD desc */
4005 i
-= tx_ring
->count
;
4006 tx_buf
= tx_ring
->tx_bi
;
4007 tx_desc
= I40E_TX_DESC(tx_ring
, 0);
4010 /* update budget accounting */
4012 } while (likely(budget
));
4014 i
+= tx_ring
->count
;
4015 tx_ring
->next_to_clean
= i
;
4017 if (vsi
->back
->flags
& I40E_FLAG_MSIX_ENABLED
)
4018 i40e_irq_dynamic_enable(vsi
, tx_ring
->q_vector
->v_idx
);
4024 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4025 * @irq: interrupt number
4026 * @data: pointer to a q_vector
4028 static irqreturn_t
i40e_fdir_clean_ring(int irq
, void *data
)
4030 struct i40e_q_vector
*q_vector
= data
;
4031 struct i40e_vsi
*vsi
;
4033 if (!q_vector
->tx
.ring
)
4036 vsi
= q_vector
->tx
.ring
->vsi
;
4037 i40e_clean_fdir_tx_irq(q_vector
->tx
.ring
, vsi
->work_limit
);
4043 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4044 * @vsi: the VSI being configured
4045 * @v_idx: vector index
4046 * @qp_idx: queue pair index
4048 static void i40e_map_vector_to_qp(struct i40e_vsi
*vsi
, int v_idx
, int qp_idx
)
4050 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[v_idx
];
4051 struct i40e_ring
*tx_ring
= vsi
->tx_rings
[qp_idx
];
4052 struct i40e_ring
*rx_ring
= vsi
->rx_rings
[qp_idx
];
4054 tx_ring
->q_vector
= q_vector
;
4055 tx_ring
->next
= q_vector
->tx
.ring
;
4056 q_vector
->tx
.ring
= tx_ring
;
4057 q_vector
->tx
.count
++;
4059 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4060 if (i40e_enabled_xdp_vsi(vsi
)) {
4061 struct i40e_ring
*xdp_ring
= vsi
->xdp_rings
[qp_idx
];
4063 xdp_ring
->q_vector
= q_vector
;
4064 xdp_ring
->next
= q_vector
->tx
.ring
;
4065 q_vector
->tx
.ring
= xdp_ring
;
4066 q_vector
->tx
.count
++;
4069 rx_ring
->q_vector
= q_vector
;
4070 rx_ring
->next
= q_vector
->rx
.ring
;
4071 q_vector
->rx
.ring
= rx_ring
;
4072 q_vector
->rx
.count
++;
4076 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4077 * @vsi: the VSI being configured
4079 * This function maps descriptor rings to the queue-specific vectors
4080 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4081 * one vector per queue pair, but on a constrained vector budget, we
4082 * group the queue pairs as "efficiently" as possible.
4084 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi
*vsi
)
4086 int qp_remaining
= vsi
->num_queue_pairs
;
4087 int q_vectors
= vsi
->num_q_vectors
;
4092 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4093 * group them so there are multiple queues per vector.
4094 * It is also important to go through all the vectors available to be
4095 * sure that if we don't use all the vectors, that the remaining vectors
4096 * are cleared. This is especially important when decreasing the
4097 * number of queues in use.
4099 for (; v_start
< q_vectors
; v_start
++) {
4100 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[v_start
];
4102 num_ringpairs
= DIV_ROUND_UP(qp_remaining
, q_vectors
- v_start
);
4104 q_vector
->num_ringpairs
= num_ringpairs
;
4105 q_vector
->reg_idx
= q_vector
->v_idx
+ vsi
->base_vector
- 1;
4107 q_vector
->rx
.count
= 0;
4108 q_vector
->tx
.count
= 0;
4109 q_vector
->rx
.ring
= NULL
;
4110 q_vector
->tx
.ring
= NULL
;
4112 while (num_ringpairs
--) {
4113 i40e_map_vector_to_qp(vsi
, v_start
, qp_idx
);
4121 * i40e_vsi_request_irq - Request IRQ from the OS
4122 * @vsi: the VSI being configured
4123 * @basename: name for the vector
4125 static int i40e_vsi_request_irq(struct i40e_vsi
*vsi
, char *basename
)
4127 struct i40e_pf
*pf
= vsi
->back
;
4130 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
4131 err
= i40e_vsi_request_irq_msix(vsi
, basename
);
4132 else if (pf
->flags
& I40E_FLAG_MSI_ENABLED
)
4133 err
= request_irq(pf
->pdev
->irq
, i40e_intr
, 0,
4136 err
= request_irq(pf
->pdev
->irq
, i40e_intr
, IRQF_SHARED
,
4140 dev_info(&pf
->pdev
->dev
, "request_irq failed, Error %d\n", err
);
4145 #ifdef CONFIG_NET_POLL_CONTROLLER
4147 * i40e_netpoll - A Polling 'interrupt' handler
4148 * @netdev: network interface device structure
4150 * This is used by netconsole to send skbs without having to re-enable
4151 * interrupts. It's not called while the normal interrupt routine is executing.
4153 static void i40e_netpoll(struct net_device
*netdev
)
4155 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
4156 struct i40e_vsi
*vsi
= np
->vsi
;
4157 struct i40e_pf
*pf
= vsi
->back
;
4160 /* if interface is down do nothing */
4161 if (test_bit(__I40E_VSI_DOWN
, vsi
->state
))
4164 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
4165 for (i
= 0; i
< vsi
->num_q_vectors
; i
++)
4166 i40e_msix_clean_rings(0, vsi
->q_vectors
[i
]);
4168 i40e_intr(pf
->pdev
->irq
, netdev
);
4173 #define I40E_QTX_ENA_WAIT_COUNT 50
4176 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4177 * @pf: the PF being configured
4178 * @pf_q: the PF queue
4179 * @enable: enable or disable state of the queue
4181 * This routine will wait for the given Tx queue of the PF to reach the
4182 * enabled or disabled state.
4183 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4184 * multiple retries; else will return 0 in case of success.
4186 static int i40e_pf_txq_wait(struct i40e_pf
*pf
, int pf_q
, bool enable
)
4191 for (i
= 0; i
< I40E_QUEUE_WAIT_RETRY_LIMIT
; i
++) {
4192 tx_reg
= rd32(&pf
->hw
, I40E_QTX_ENA(pf_q
));
4193 if (enable
== !!(tx_reg
& I40E_QTX_ENA_QENA_STAT_MASK
))
4196 usleep_range(10, 20);
4198 if (i
>= I40E_QUEUE_WAIT_RETRY_LIMIT
)
4205 * i40e_control_tx_q - Start or stop a particular Tx queue
4206 * @pf: the PF structure
4207 * @pf_q: the PF queue to configure
4208 * @enable: start or stop the queue
4210 * This function enables or disables a single queue. Note that any delay
4211 * required after the operation is expected to be handled by the caller of
4214 static void i40e_control_tx_q(struct i40e_pf
*pf
, int pf_q
, bool enable
)
4216 struct i40e_hw
*hw
= &pf
->hw
;
4220 /* warn the TX unit of coming changes */
4221 i40e_pre_tx_queue_cfg(&pf
->hw
, pf_q
, enable
);
4223 usleep_range(10, 20);
4225 for (i
= 0; i
< I40E_QTX_ENA_WAIT_COUNT
; i
++) {
4226 tx_reg
= rd32(hw
, I40E_QTX_ENA(pf_q
));
4227 if (((tx_reg
>> I40E_QTX_ENA_QENA_REQ_SHIFT
) & 1) ==
4228 ((tx_reg
>> I40E_QTX_ENA_QENA_STAT_SHIFT
) & 1))
4230 usleep_range(1000, 2000);
4233 /* Skip if the queue is already in the requested state */
4234 if (enable
== !!(tx_reg
& I40E_QTX_ENA_QENA_STAT_MASK
))
4237 /* turn on/off the queue */
4239 wr32(hw
, I40E_QTX_HEAD(pf_q
), 0);
4240 tx_reg
|= I40E_QTX_ENA_QENA_REQ_MASK
;
4242 tx_reg
&= ~I40E_QTX_ENA_QENA_REQ_MASK
;
4245 wr32(hw
, I40E_QTX_ENA(pf_q
), tx_reg
);
4249 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4251 * @pf: the PF structure
4252 * @pf_q: the PF queue to configure
4253 * @is_xdp: true if the queue is used for XDP
4254 * @enable: start or stop the queue
4256 int i40e_control_wait_tx_q(int seid
, struct i40e_pf
*pf
, int pf_q
,
4257 bool is_xdp
, bool enable
)
4261 i40e_control_tx_q(pf
, pf_q
, enable
);
4263 /* wait for the change to finish */
4264 ret
= i40e_pf_txq_wait(pf
, pf_q
, enable
);
4266 dev_info(&pf
->pdev
->dev
,
4267 "VSI seid %d %sTx ring %d %sable timeout\n",
4268 seid
, (is_xdp
? "XDP " : ""), pf_q
,
4269 (enable
? "en" : "dis"));
4276 * i40e_vsi_control_tx - Start or stop a VSI's rings
4277 * @vsi: the VSI being configured
4278 * @enable: start or stop the rings
4280 static int i40e_vsi_control_tx(struct i40e_vsi
*vsi
, bool enable
)
4282 struct i40e_pf
*pf
= vsi
->back
;
4283 int i
, pf_q
, ret
= 0;
4285 pf_q
= vsi
->base_queue
;
4286 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++, pf_q
++) {
4287 ret
= i40e_control_wait_tx_q(vsi
->seid
, pf
,
4289 false /*is xdp*/, enable
);
4293 if (!i40e_enabled_xdp_vsi(vsi
))
4296 ret
= i40e_control_wait_tx_q(vsi
->seid
, pf
,
4297 pf_q
+ vsi
->alloc_queue_pairs
,
4298 true /*is xdp*/, enable
);
4306 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4307 * @pf: the PF being configured
4308 * @pf_q: the PF queue
4309 * @enable: enable or disable state of the queue
4311 * This routine will wait for the given Rx queue of the PF to reach the
4312 * enabled or disabled state.
4313 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4314 * multiple retries; else will return 0 in case of success.
4316 static int i40e_pf_rxq_wait(struct i40e_pf
*pf
, int pf_q
, bool enable
)
4321 for (i
= 0; i
< I40E_QUEUE_WAIT_RETRY_LIMIT
; i
++) {
4322 rx_reg
= rd32(&pf
->hw
, I40E_QRX_ENA(pf_q
));
4323 if (enable
== !!(rx_reg
& I40E_QRX_ENA_QENA_STAT_MASK
))
4326 usleep_range(10, 20);
4328 if (i
>= I40E_QUEUE_WAIT_RETRY_LIMIT
)
4335 * i40e_control_rx_q - Start or stop a particular Rx queue
4336 * @pf: the PF structure
4337 * @pf_q: the PF queue to configure
4338 * @enable: start or stop the queue
4340 * This function enables or disables a single queue. Note that
4341 * any delay required after the operation is expected to be
4342 * handled by the caller of this function.
4344 static void i40e_control_rx_q(struct i40e_pf
*pf
, int pf_q
, bool enable
)
4346 struct i40e_hw
*hw
= &pf
->hw
;
4350 for (i
= 0; i
< I40E_QTX_ENA_WAIT_COUNT
; i
++) {
4351 rx_reg
= rd32(hw
, I40E_QRX_ENA(pf_q
));
4352 if (((rx_reg
>> I40E_QRX_ENA_QENA_REQ_SHIFT
) & 1) ==
4353 ((rx_reg
>> I40E_QRX_ENA_QENA_STAT_SHIFT
) & 1))
4355 usleep_range(1000, 2000);
4358 /* Skip if the queue is already in the requested state */
4359 if (enable
== !!(rx_reg
& I40E_QRX_ENA_QENA_STAT_MASK
))
4362 /* turn on/off the queue */
4364 rx_reg
|= I40E_QRX_ENA_QENA_REQ_MASK
;
4366 rx_reg
&= ~I40E_QRX_ENA_QENA_REQ_MASK
;
4368 wr32(hw
, I40E_QRX_ENA(pf_q
), rx_reg
);
4372 * i40e_control_wait_rx_q
4373 * @pf: the PF structure
4374 * @pf_q: queue being configured
4375 * @enable: start or stop the rings
4377 * This function enables or disables a single queue along with waiting
4378 * for the change to finish. The caller of this function should handle
4379 * the delays needed in the case of disabling queues.
4381 int i40e_control_wait_rx_q(struct i40e_pf
*pf
, int pf_q
, bool enable
)
4385 i40e_control_rx_q(pf
, pf_q
, enable
);
4387 /* wait for the change to finish */
4388 ret
= i40e_pf_rxq_wait(pf
, pf_q
, enable
);
4396 * i40e_vsi_control_rx - Start or stop a VSI's rings
4397 * @vsi: the VSI being configured
4398 * @enable: start or stop the rings
4400 static int i40e_vsi_control_rx(struct i40e_vsi
*vsi
, bool enable
)
4402 struct i40e_pf
*pf
= vsi
->back
;
4403 int i
, pf_q
, ret
= 0;
4405 pf_q
= vsi
->base_queue
;
4406 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++, pf_q
++) {
4407 ret
= i40e_control_wait_rx_q(pf
, pf_q
, enable
);
4409 dev_info(&pf
->pdev
->dev
,
4410 "VSI seid %d Rx ring %d %sable timeout\n",
4411 vsi
->seid
, pf_q
, (enable
? "en" : "dis"));
4416 /* Due to HW errata, on Rx disable only, the register can indicate done
4417 * before it really is. Needs 50ms to be sure
4426 * i40e_vsi_start_rings - Start a VSI's rings
4427 * @vsi: the VSI being configured
4429 int i40e_vsi_start_rings(struct i40e_vsi
*vsi
)
4433 /* do rx first for enable and last for disable */
4434 ret
= i40e_vsi_control_rx(vsi
, true);
4437 ret
= i40e_vsi_control_tx(vsi
, true);
4443 * i40e_vsi_stop_rings - Stop a VSI's rings
4444 * @vsi: the VSI being configured
4446 void i40e_vsi_stop_rings(struct i40e_vsi
*vsi
)
4448 /* When port TX is suspended, don't wait */
4449 if (test_bit(__I40E_PORT_SUSPENDED
, vsi
->back
->state
))
4450 return i40e_vsi_stop_rings_no_wait(vsi
);
4452 /* do rx first for enable and last for disable
4453 * Ignore return value, we need to shutdown whatever we can
4455 i40e_vsi_control_tx(vsi
, false);
4456 i40e_vsi_control_rx(vsi
, false);
4460 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4461 * @vsi: the VSI being shutdown
4463 * This function stops all the rings for a VSI but does not delay to verify
4464 * that rings have been disabled. It is expected that the caller is shutting
4465 * down multiple VSIs at once and will delay together for all the VSIs after
4466 * initiating the shutdown. This is particularly useful for shutting down lots
4467 * of VFs together. Otherwise, a large delay can be incurred while configuring
4468 * each VSI in serial.
4470 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi
*vsi
)
4472 struct i40e_pf
*pf
= vsi
->back
;
4475 pf_q
= vsi
->base_queue
;
4476 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++, pf_q
++) {
4477 i40e_control_tx_q(pf
, pf_q
, false);
4478 i40e_control_rx_q(pf
, pf_q
, false);
4483 * i40e_vsi_free_irq - Free the irq association with the OS
4484 * @vsi: the VSI being configured
4486 static void i40e_vsi_free_irq(struct i40e_vsi
*vsi
)
4488 struct i40e_pf
*pf
= vsi
->back
;
4489 struct i40e_hw
*hw
= &pf
->hw
;
4490 int base
= vsi
->base_vector
;
4494 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
4495 if (!vsi
->q_vectors
)
4498 if (!vsi
->irqs_ready
)
4501 vsi
->irqs_ready
= false;
4502 for (i
= 0; i
< vsi
->num_q_vectors
; i
++) {
4507 irq_num
= pf
->msix_entries
[vector
].vector
;
4509 /* free only the irqs that were actually requested */
4510 if (!vsi
->q_vectors
[i
] ||
4511 !vsi
->q_vectors
[i
]->num_ringpairs
)
4514 /* clear the affinity notifier in the IRQ descriptor */
4515 irq_set_affinity_notifier(irq_num
, NULL
);
4516 /* remove our suggested affinity mask for this IRQ */
4517 irq_set_affinity_hint(irq_num
, NULL
);
4518 synchronize_irq(irq_num
);
4519 free_irq(irq_num
, vsi
->q_vectors
[i
]);
4521 /* Tear down the interrupt queue link list
4523 * We know that they come in pairs and always
4524 * the Rx first, then the Tx. To clear the
4525 * link list, stick the EOL value into the
4526 * next_q field of the registers.
4528 val
= rd32(hw
, I40E_PFINT_LNKLSTN(vector
- 1));
4529 qp
= (val
& I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK
)
4530 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT
;
4531 val
|= I40E_QUEUE_END_OF_LIST
4532 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT
;
4533 wr32(hw
, I40E_PFINT_LNKLSTN(vector
- 1), val
);
4535 while (qp
!= I40E_QUEUE_END_OF_LIST
) {
4538 val
= rd32(hw
, I40E_QINT_RQCTL(qp
));
4540 val
&= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK
|
4541 I40E_QINT_RQCTL_MSIX0_INDX_MASK
|
4542 I40E_QINT_RQCTL_CAUSE_ENA_MASK
|
4543 I40E_QINT_RQCTL_INTEVENT_MASK
);
4545 val
|= (I40E_QINT_RQCTL_ITR_INDX_MASK
|
4546 I40E_QINT_RQCTL_NEXTQ_INDX_MASK
);
4548 wr32(hw
, I40E_QINT_RQCTL(qp
), val
);
4550 val
= rd32(hw
, I40E_QINT_TQCTL(qp
));
4552 next
= (val
& I40E_QINT_TQCTL_NEXTQ_INDX_MASK
)
4553 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT
;
4555 val
&= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK
|
4556 I40E_QINT_TQCTL_MSIX0_INDX_MASK
|
4557 I40E_QINT_TQCTL_CAUSE_ENA_MASK
|
4558 I40E_QINT_TQCTL_INTEVENT_MASK
);
4560 val
|= (I40E_QINT_TQCTL_ITR_INDX_MASK
|
4561 I40E_QINT_TQCTL_NEXTQ_INDX_MASK
);
4563 wr32(hw
, I40E_QINT_TQCTL(qp
), val
);
4568 free_irq(pf
->pdev
->irq
, pf
);
4570 val
= rd32(hw
, I40E_PFINT_LNKLST0
);
4571 qp
= (val
& I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK
)
4572 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT
;
4573 val
|= I40E_QUEUE_END_OF_LIST
4574 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT
;
4575 wr32(hw
, I40E_PFINT_LNKLST0
, val
);
4577 val
= rd32(hw
, I40E_QINT_RQCTL(qp
));
4578 val
&= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK
|
4579 I40E_QINT_RQCTL_MSIX0_INDX_MASK
|
4580 I40E_QINT_RQCTL_CAUSE_ENA_MASK
|
4581 I40E_QINT_RQCTL_INTEVENT_MASK
);
4583 val
|= (I40E_QINT_RQCTL_ITR_INDX_MASK
|
4584 I40E_QINT_RQCTL_NEXTQ_INDX_MASK
);
4586 wr32(hw
, I40E_QINT_RQCTL(qp
), val
);
4588 val
= rd32(hw
, I40E_QINT_TQCTL(qp
));
4590 val
&= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK
|
4591 I40E_QINT_TQCTL_MSIX0_INDX_MASK
|
4592 I40E_QINT_TQCTL_CAUSE_ENA_MASK
|
4593 I40E_QINT_TQCTL_INTEVENT_MASK
);
4595 val
|= (I40E_QINT_TQCTL_ITR_INDX_MASK
|
4596 I40E_QINT_TQCTL_NEXTQ_INDX_MASK
);
4598 wr32(hw
, I40E_QINT_TQCTL(qp
), val
);
4603 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4604 * @vsi: the VSI being configured
4605 * @v_idx: Index of vector to be freed
4607 * This function frees the memory allocated to the q_vector. In addition if
4608 * NAPI is enabled it will delete any references to the NAPI struct prior
4609 * to freeing the q_vector.
4611 static void i40e_free_q_vector(struct i40e_vsi
*vsi
, int v_idx
)
4613 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[v_idx
];
4614 struct i40e_ring
*ring
;
4619 /* disassociate q_vector from rings */
4620 i40e_for_each_ring(ring
, q_vector
->tx
)
4621 ring
->q_vector
= NULL
;
4623 i40e_for_each_ring(ring
, q_vector
->rx
)
4624 ring
->q_vector
= NULL
;
4626 /* only VSI w/ an associated netdev is set up w/ NAPI */
4628 netif_napi_del(&q_vector
->napi
);
4630 vsi
->q_vectors
[v_idx
] = NULL
;
4632 kfree_rcu(q_vector
, rcu
);
4636 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4637 * @vsi: the VSI being un-configured
4639 * This frees the memory allocated to the q_vectors and
4640 * deletes references to the NAPI struct.
4642 static void i40e_vsi_free_q_vectors(struct i40e_vsi
*vsi
)
4646 for (v_idx
= 0; v_idx
< vsi
->num_q_vectors
; v_idx
++)
4647 i40e_free_q_vector(vsi
, v_idx
);
4651 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4652 * @pf: board private structure
4654 static void i40e_reset_interrupt_capability(struct i40e_pf
*pf
)
4656 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4657 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
4658 pci_disable_msix(pf
->pdev
);
4659 kfree(pf
->msix_entries
);
4660 pf
->msix_entries
= NULL
;
4661 kfree(pf
->irq_pile
);
4662 pf
->irq_pile
= NULL
;
4663 } else if (pf
->flags
& I40E_FLAG_MSI_ENABLED
) {
4664 pci_disable_msi(pf
->pdev
);
4666 pf
->flags
&= ~(I40E_FLAG_MSIX_ENABLED
| I40E_FLAG_MSI_ENABLED
);
4670 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4671 * @pf: board private structure
4673 * We go through and clear interrupt specific resources and reset the structure
4674 * to pre-load conditions
4676 static void i40e_clear_interrupt_scheme(struct i40e_pf
*pf
)
4680 i40e_free_misc_vector(pf
);
4682 i40e_put_lump(pf
->irq_pile
, pf
->iwarp_base_vector
,
4683 I40E_IWARP_IRQ_PILE_ID
);
4685 i40e_put_lump(pf
->irq_pile
, 0, I40E_PILE_VALID_BIT
-1);
4686 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++)
4688 i40e_vsi_free_q_vectors(pf
->vsi
[i
]);
4689 i40e_reset_interrupt_capability(pf
);
4693 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4694 * @vsi: the VSI being configured
4696 static void i40e_napi_enable_all(struct i40e_vsi
*vsi
)
4703 for (q_idx
= 0; q_idx
< vsi
->num_q_vectors
; q_idx
++) {
4704 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[q_idx
];
4706 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
4707 napi_enable(&q_vector
->napi
);
4712 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4713 * @vsi: the VSI being configured
4715 static void i40e_napi_disable_all(struct i40e_vsi
*vsi
)
4722 for (q_idx
= 0; q_idx
< vsi
->num_q_vectors
; q_idx
++) {
4723 struct i40e_q_vector
*q_vector
= vsi
->q_vectors
[q_idx
];
4725 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
4726 napi_disable(&q_vector
->napi
);
4731 * i40e_vsi_close - Shut down a VSI
4732 * @vsi: the vsi to be quelled
4734 static void i40e_vsi_close(struct i40e_vsi
*vsi
)
4736 struct i40e_pf
*pf
= vsi
->back
;
4737 if (!test_and_set_bit(__I40E_VSI_DOWN
, vsi
->state
))
4739 i40e_vsi_free_irq(vsi
);
4740 i40e_vsi_free_tx_resources(vsi
);
4741 i40e_vsi_free_rx_resources(vsi
);
4742 vsi
->current_netdev_flags
= 0;
4743 set_bit(__I40E_CLIENT_SERVICE_REQUESTED
, pf
->state
);
4744 if (test_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
))
4745 set_bit(__I40E_CLIENT_RESET
, pf
->state
);
4749 * i40e_quiesce_vsi - Pause a given VSI
4750 * @vsi: the VSI being paused
4752 static void i40e_quiesce_vsi(struct i40e_vsi
*vsi
)
4754 if (test_bit(__I40E_VSI_DOWN
, vsi
->state
))
4757 set_bit(__I40E_VSI_NEEDS_RESTART
, vsi
->state
);
4758 if (vsi
->netdev
&& netif_running(vsi
->netdev
))
4759 vsi
->netdev
->netdev_ops
->ndo_stop(vsi
->netdev
);
4761 i40e_vsi_close(vsi
);
4765 * i40e_unquiesce_vsi - Resume a given VSI
4766 * @vsi: the VSI being resumed
4768 static void i40e_unquiesce_vsi(struct i40e_vsi
*vsi
)
4770 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART
, vsi
->state
))
4773 if (vsi
->netdev
&& netif_running(vsi
->netdev
))
4774 vsi
->netdev
->netdev_ops
->ndo_open(vsi
->netdev
);
4776 i40e_vsi_open(vsi
); /* this clears the DOWN bit */
4780 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4783 static void i40e_pf_quiesce_all_vsi(struct i40e_pf
*pf
)
4787 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
4789 i40e_quiesce_vsi(pf
->vsi
[v
]);
4794 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4797 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf
*pf
)
4801 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
4803 i40e_unquiesce_vsi(pf
->vsi
[v
]);
4808 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4809 * @vsi: the VSI being configured
4811 * Wait until all queues on a given VSI have been disabled.
4813 int i40e_vsi_wait_queues_disabled(struct i40e_vsi
*vsi
)
4815 struct i40e_pf
*pf
= vsi
->back
;
4818 pf_q
= vsi
->base_queue
;
4819 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++, pf_q
++) {
4820 /* Check and wait for the Tx queue */
4821 ret
= i40e_pf_txq_wait(pf
, pf_q
, false);
4823 dev_info(&pf
->pdev
->dev
,
4824 "VSI seid %d Tx ring %d disable timeout\n",
4829 if (!i40e_enabled_xdp_vsi(vsi
))
4832 /* Check and wait for the XDP Tx queue */
4833 ret
= i40e_pf_txq_wait(pf
, pf_q
+ vsi
->alloc_queue_pairs
,
4836 dev_info(&pf
->pdev
->dev
,
4837 "VSI seid %d XDP Tx ring %d disable timeout\n",
4842 /* Check and wait for the Rx queue */
4843 ret
= i40e_pf_rxq_wait(pf
, pf_q
, false);
4845 dev_info(&pf
->pdev
->dev
,
4846 "VSI seid %d Rx ring %d disable timeout\n",
4855 #ifdef CONFIG_I40E_DCB
4857 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4860 * This function waits for the queues to be in disabled state for all the
4861 * VSIs that are managed by this PF.
4863 static int i40e_pf_wait_queues_disabled(struct i40e_pf
*pf
)
4867 for (v
= 0; v
< pf
->hw
.func_caps
.num_vsis
; v
++) {
4869 ret
= i40e_vsi_wait_queues_disabled(pf
->vsi
[v
]);
4881 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4882 * @pf: pointer to PF
4884 * Get TC map for ISCSI PF type that will include iSCSI TC
4887 static u8
i40e_get_iscsi_tc_map(struct i40e_pf
*pf
)
4889 struct i40e_dcb_app_priority_table app
;
4890 struct i40e_hw
*hw
= &pf
->hw
;
4891 u8 enabled_tc
= 1; /* TC0 is always enabled */
4893 /* Get the iSCSI APP TLV */
4894 struct i40e_dcbx_config
*dcbcfg
= &hw
->local_dcbx_config
;
4896 for (i
= 0; i
< dcbcfg
->numapps
; i
++) {
4897 app
= dcbcfg
->app
[i
];
4898 if (app
.selector
== I40E_APP_SEL_TCPIP
&&
4899 app
.protocolid
== I40E_APP_PROTOID_ISCSI
) {
4900 tc
= dcbcfg
->etscfg
.prioritytable
[app
.priority
];
4901 enabled_tc
|= BIT(tc
);
4910 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4911 * @dcbcfg: the corresponding DCBx configuration structure
4913 * Return the number of TCs from given DCBx configuration
4915 static u8
i40e_dcb_get_num_tc(struct i40e_dcbx_config
*dcbcfg
)
4917 int i
, tc_unused
= 0;
4921 /* Scan the ETS Config Priority Table to find
4922 * traffic class enabled for a given priority
4923 * and create a bitmask of enabled TCs
4925 for (i
= 0; i
< I40E_MAX_USER_PRIORITY
; i
++)
4926 num_tc
|= BIT(dcbcfg
->etscfg
.prioritytable
[i
]);
4928 /* Now scan the bitmask to check for
4929 * contiguous TCs starting with TC0
4931 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
4932 if (num_tc
& BIT(i
)) {
4936 pr_err("Non-contiguous TC - Disabling DCB\n");
4944 /* There is always at least TC0 */
4952 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4953 * @dcbcfg: the corresponding DCBx configuration structure
4955 * Query the current DCB configuration and return the number of
4956 * traffic classes enabled from the given DCBX config
4958 static u8
i40e_dcb_get_enabled_tc(struct i40e_dcbx_config
*dcbcfg
)
4960 u8 num_tc
= i40e_dcb_get_num_tc(dcbcfg
);
4964 for (i
= 0; i
< num_tc
; i
++)
4965 enabled_tc
|= BIT(i
);
4971 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
4972 * @pf: PF being queried
4974 * Query the current MQPRIO configuration and return the number of
4975 * traffic classes enabled.
4977 static u8
i40e_mqprio_get_enabled_tc(struct i40e_pf
*pf
)
4979 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
4980 u8 num_tc
= vsi
->mqprio_qopt
.qopt
.num_tc
;
4981 u8 enabled_tc
= 1, i
;
4983 for (i
= 1; i
< num_tc
; i
++)
4984 enabled_tc
|= BIT(i
);
4989 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4990 * @pf: PF being queried
4992 * Return number of traffic classes enabled for the given PF
4994 static u8
i40e_pf_get_num_tc(struct i40e_pf
*pf
)
4996 struct i40e_hw
*hw
= &pf
->hw
;
4997 u8 i
, enabled_tc
= 1;
4999 struct i40e_dcbx_config
*dcbcfg
= &hw
->local_dcbx_config
;
5001 if (pf
->flags
& I40E_FLAG_TC_MQPRIO
)
5002 return pf
->vsi
[pf
->lan_vsi
]->mqprio_qopt
.qopt
.num_tc
;
5004 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5005 if (!(pf
->flags
& I40E_FLAG_DCB_ENABLED
))
5008 /* SFP mode will be enabled for all TCs on port */
5009 if (!(pf
->flags
& I40E_FLAG_MFP_ENABLED
))
5010 return i40e_dcb_get_num_tc(dcbcfg
);
5012 /* MFP mode return count of enabled TCs for this PF */
5013 if (pf
->hw
.func_caps
.iscsi
)
5014 enabled_tc
= i40e_get_iscsi_tc_map(pf
);
5016 return 1; /* Only TC0 */
5018 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
5019 if (enabled_tc
& BIT(i
))
5026 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5027 * @pf: PF being queried
5029 * Return a bitmap for enabled traffic classes for this PF.
5031 static u8
i40e_pf_get_tc_map(struct i40e_pf
*pf
)
5033 if (pf
->flags
& I40E_FLAG_TC_MQPRIO
)
5034 return i40e_mqprio_get_enabled_tc(pf
);
5036 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5039 if (!(pf
->flags
& I40E_FLAG_DCB_ENABLED
))
5040 return I40E_DEFAULT_TRAFFIC_CLASS
;
5042 /* SFP mode we want PF to be enabled for all TCs */
5043 if (!(pf
->flags
& I40E_FLAG_MFP_ENABLED
))
5044 return i40e_dcb_get_enabled_tc(&pf
->hw
.local_dcbx_config
);
5046 /* MFP enabled and iSCSI PF type */
5047 if (pf
->hw
.func_caps
.iscsi
)
5048 return i40e_get_iscsi_tc_map(pf
);
5050 return I40E_DEFAULT_TRAFFIC_CLASS
;
5054 * i40e_vsi_get_bw_info - Query VSI BW Information
5055 * @vsi: the VSI being queried
5057 * Returns 0 on success, negative value on failure
5059 static int i40e_vsi_get_bw_info(struct i40e_vsi
*vsi
)
5061 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config
= {0};
5062 struct i40e_aqc_query_vsi_bw_config_resp bw_config
= {0};
5063 struct i40e_pf
*pf
= vsi
->back
;
5064 struct i40e_hw
*hw
= &pf
->hw
;
5069 /* Get the VSI level BW configuration */
5070 ret
= i40e_aq_query_vsi_bw_config(hw
, vsi
->seid
, &bw_config
, NULL
);
5072 dev_info(&pf
->pdev
->dev
,
5073 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5074 i40e_stat_str(&pf
->hw
, ret
),
5075 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
5079 /* Get the VSI level BW configuration per TC */
5080 ret
= i40e_aq_query_vsi_ets_sla_config(hw
, vsi
->seid
, &bw_ets_config
,
5083 dev_info(&pf
->pdev
->dev
,
5084 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5085 i40e_stat_str(&pf
->hw
, ret
),
5086 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
5090 if (bw_config
.tc_valid_bits
!= bw_ets_config
.tc_valid_bits
) {
5091 dev_info(&pf
->pdev
->dev
,
5092 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5093 bw_config
.tc_valid_bits
,
5094 bw_ets_config
.tc_valid_bits
);
5095 /* Still continuing */
5098 vsi
->bw_limit
= le16_to_cpu(bw_config
.port_bw_limit
);
5099 vsi
->bw_max_quanta
= bw_config
.max_bw
;
5100 tc_bw_max
= le16_to_cpu(bw_ets_config
.tc_bw_max
[0]) |
5101 (le16_to_cpu(bw_ets_config
.tc_bw_max
[1]) << 16);
5102 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
5103 vsi
->bw_ets_share_credits
[i
] = bw_ets_config
.share_credits
[i
];
5104 vsi
->bw_ets_limit_credits
[i
] =
5105 le16_to_cpu(bw_ets_config
.credits
[i
]);
5106 /* 3 bits out of 4 for each TC */
5107 vsi
->bw_ets_max_quanta
[i
] = (u8
)((tc_bw_max
>> (i
*4)) & 0x7);
5114 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5115 * @vsi: the VSI being configured
5116 * @enabled_tc: TC bitmap
5117 * @bw_share: BW shared credits per TC
5119 * Returns 0 on success, negative value on failure
5121 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi
*vsi
, u8 enabled_tc
,
5124 struct i40e_aqc_configure_vsi_tc_bw_data bw_data
;
5125 struct i40e_pf
*pf
= vsi
->back
;
5129 /* There is no need to reset BW when mqprio mode is on. */
5130 if (pf
->flags
& I40E_FLAG_TC_MQPRIO
)
5132 if (!vsi
->mqprio_qopt
.qopt
.hw
&& !(pf
->flags
& I40E_FLAG_DCB_ENABLED
)) {
5133 ret
= i40e_set_bw_limit(vsi
, vsi
->seid
, 0);
5135 dev_info(&pf
->pdev
->dev
,
5136 "Failed to reset tx rate for vsi->seid %u\n",
5140 bw_data
.tc_valid_bits
= enabled_tc
;
5141 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++)
5142 bw_data
.tc_bw_credits
[i
] = bw_share
[i
];
5144 ret
= i40e_aq_config_vsi_tc_bw(&pf
->hw
, vsi
->seid
, &bw_data
, NULL
);
5146 dev_info(&pf
->pdev
->dev
,
5147 "AQ command Config VSI BW allocation per TC failed = %d\n",
5148 pf
->hw
.aq
.asq_last_status
);
5152 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++)
5153 vsi
->info
.qs_handle
[i
] = bw_data
.qs_handles
[i
];
5159 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5160 * @vsi: the VSI being configured
5161 * @enabled_tc: TC map to be enabled
5164 static void i40e_vsi_config_netdev_tc(struct i40e_vsi
*vsi
, u8 enabled_tc
)
5166 struct net_device
*netdev
= vsi
->netdev
;
5167 struct i40e_pf
*pf
= vsi
->back
;
5168 struct i40e_hw
*hw
= &pf
->hw
;
5171 struct i40e_dcbx_config
*dcbcfg
= &hw
->local_dcbx_config
;
5177 netdev_reset_tc(netdev
);
5181 /* Set up actual enabled TCs on the VSI */
5182 if (netdev_set_num_tc(netdev
, vsi
->tc_config
.numtc
))
5185 /* set per TC queues for the VSI */
5186 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
5187 /* Only set TC queues for enabled tcs
5189 * e.g. For a VSI that has TC0 and TC3 enabled the
5190 * enabled_tc bitmap would be 0x00001001; the driver
5191 * will set the numtc for netdev as 2 that will be
5192 * referenced by the netdev layer as TC 0 and 1.
5194 if (vsi
->tc_config
.enabled_tc
& BIT(i
))
5195 netdev_set_tc_queue(netdev
,
5196 vsi
->tc_config
.tc_info
[i
].netdev_tc
,
5197 vsi
->tc_config
.tc_info
[i
].qcount
,
5198 vsi
->tc_config
.tc_info
[i
].qoffset
);
5201 if (pf
->flags
& I40E_FLAG_TC_MQPRIO
)
5204 /* Assign UP2TC map for the VSI */
5205 for (i
= 0; i
< I40E_MAX_USER_PRIORITY
; i
++) {
5206 /* Get the actual TC# for the UP */
5207 u8 ets_tc
= dcbcfg
->etscfg
.prioritytable
[i
];
5208 /* Get the mapped netdev TC# for the UP */
5209 netdev_tc
= vsi
->tc_config
.tc_info
[ets_tc
].netdev_tc
;
5210 netdev_set_prio_tc_map(netdev
, i
, netdev_tc
);
5215 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5216 * @vsi: the VSI being configured
5217 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5219 static void i40e_vsi_update_queue_map(struct i40e_vsi
*vsi
,
5220 struct i40e_vsi_context
*ctxt
)
5222 /* copy just the sections touched not the entire info
5223 * since not all sections are valid as returned by
5226 vsi
->info
.mapping_flags
= ctxt
->info
.mapping_flags
;
5227 memcpy(&vsi
->info
.queue_mapping
,
5228 &ctxt
->info
.queue_mapping
, sizeof(vsi
->info
.queue_mapping
));
5229 memcpy(&vsi
->info
.tc_mapping
, ctxt
->info
.tc_mapping
,
5230 sizeof(vsi
->info
.tc_mapping
));
5234 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5235 * @vsi: VSI to be configured
5236 * @enabled_tc: TC bitmap
5238 * This configures a particular VSI for TCs that are mapped to the
5239 * given TC bitmap. It uses default bandwidth share for TCs across
5240 * VSIs to configure TC for a particular VSI.
5243 * It is expected that the VSI queues have been quisced before calling
5246 static int i40e_vsi_config_tc(struct i40e_vsi
*vsi
, u8 enabled_tc
)
5248 u8 bw_share
[I40E_MAX_TRAFFIC_CLASS
] = {0};
5249 struct i40e_pf
*pf
= vsi
->back
;
5250 struct i40e_hw
*hw
= &pf
->hw
;
5251 struct i40e_vsi_context ctxt
;
5255 /* Check if enabled_tc is same as existing or new TCs */
5256 if (vsi
->tc_config
.enabled_tc
== enabled_tc
&&
5257 vsi
->mqprio_qopt
.mode
!= TC_MQPRIO_MODE_CHANNEL
)
5260 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5261 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
5262 if (enabled_tc
& BIT(i
))
5266 ret
= i40e_vsi_configure_bw_alloc(vsi
, enabled_tc
, bw_share
);
5268 struct i40e_aqc_query_vsi_bw_config_resp bw_config
= {0};
5270 dev_info(&pf
->pdev
->dev
,
5271 "Failed configuring TC map %d for VSI %d\n",
5272 enabled_tc
, vsi
->seid
);
5273 ret
= i40e_aq_query_vsi_bw_config(hw
, vsi
->seid
,
5276 dev_info(&pf
->pdev
->dev
,
5277 "Failed querying vsi bw info, err %s aq_err %s\n",
5278 i40e_stat_str(hw
, ret
),
5279 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
5282 if ((bw_config
.tc_valid_bits
& enabled_tc
) != enabled_tc
) {
5283 u8 valid_tc
= bw_config
.tc_valid_bits
& enabled_tc
;
5286 valid_tc
= bw_config
.tc_valid_bits
;
5287 /* Always enable TC0, no matter what */
5289 dev_info(&pf
->pdev
->dev
,
5290 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5291 enabled_tc
, bw_config
.tc_valid_bits
, valid_tc
);
5292 enabled_tc
= valid_tc
;
5295 ret
= i40e_vsi_configure_bw_alloc(vsi
, enabled_tc
, bw_share
);
5297 dev_err(&pf
->pdev
->dev
,
5298 "Unable to configure TC map %d for VSI %d\n",
5299 enabled_tc
, vsi
->seid
);
5304 /* Update Queue Pairs Mapping for currently enabled UPs */
5305 ctxt
.seid
= vsi
->seid
;
5306 ctxt
.pf_num
= vsi
->back
->hw
.pf_id
;
5308 ctxt
.uplink_seid
= vsi
->uplink_seid
;
5309 ctxt
.info
= vsi
->info
;
5310 if (vsi
->back
->flags
& I40E_FLAG_TC_MQPRIO
) {
5311 ret
= i40e_vsi_setup_queue_map_mqprio(vsi
, &ctxt
, enabled_tc
);
5315 i40e_vsi_setup_queue_map(vsi
, &ctxt
, enabled_tc
, false);
5318 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5321 if (!vsi
->mqprio_qopt
.qopt
.hw
&& vsi
->reconfig_rss
) {
5322 vsi
->rss_size
= min_t(int, vsi
->back
->alloc_rss_size
,
5323 vsi
->num_queue_pairs
);
5324 ret
= i40e_vsi_config_rss(vsi
);
5326 dev_info(&vsi
->back
->pdev
->dev
,
5327 "Failed to reconfig rss for num_queues\n");
5330 vsi
->reconfig_rss
= false;
5332 if (vsi
->back
->flags
& I40E_FLAG_IWARP_ENABLED
) {
5333 ctxt
.info
.valid_sections
|=
5334 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID
);
5335 ctxt
.info
.queueing_opt_flags
|= I40E_AQ_VSI_QUE_OPT_TCP_ENA
;
5338 /* Update the VSI after updating the VSI queue-mapping
5341 ret
= i40e_aq_update_vsi_params(hw
, &ctxt
, NULL
);
5343 dev_info(&pf
->pdev
->dev
,
5344 "Update vsi tc config failed, err %s aq_err %s\n",
5345 i40e_stat_str(hw
, ret
),
5346 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
5349 /* update the local VSI info with updated queue map */
5350 i40e_vsi_update_queue_map(vsi
, &ctxt
);
5351 vsi
->info
.valid_sections
= 0;
5353 /* Update current VSI BW information */
5354 ret
= i40e_vsi_get_bw_info(vsi
);
5356 dev_info(&pf
->pdev
->dev
,
5357 "Failed updating vsi bw info, err %s aq_err %s\n",
5358 i40e_stat_str(hw
, ret
),
5359 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
5363 /* Update the netdev TC setup */
5364 i40e_vsi_config_netdev_tc(vsi
, enabled_tc
);
5370 * i40e_get_link_speed - Returns link speed for the interface
5371 * @vsi: VSI to be configured
5374 static int i40e_get_link_speed(struct i40e_vsi
*vsi
)
5376 struct i40e_pf
*pf
= vsi
->back
;
5378 switch (pf
->hw
.phy
.link_info
.link_speed
) {
5379 case I40E_LINK_SPEED_40GB
:
5381 case I40E_LINK_SPEED_25GB
:
5383 case I40E_LINK_SPEED_20GB
:
5385 case I40E_LINK_SPEED_10GB
:
5387 case I40E_LINK_SPEED_1GB
:
5395 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5396 * @vsi: VSI to be configured
5397 * @seid: seid of the channel/VSI
5398 * @max_tx_rate: max TX rate to be configured as BW limit
5400 * Helper function to set BW limit for a given VSI
5402 int i40e_set_bw_limit(struct i40e_vsi
*vsi
, u16 seid
, u64 max_tx_rate
)
5404 struct i40e_pf
*pf
= vsi
->back
;
5409 speed
= i40e_get_link_speed(vsi
);
5410 if (max_tx_rate
> speed
) {
5411 dev_err(&pf
->pdev
->dev
,
5412 "Invalid max tx rate %llu specified for VSI seid %d.",
5416 if (max_tx_rate
&& max_tx_rate
< 50) {
5417 dev_warn(&pf
->pdev
->dev
,
5418 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5422 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5423 credits
= max_tx_rate
;
5424 do_div(credits
, I40E_BW_CREDIT_DIVISOR
);
5425 ret
= i40e_aq_config_vsi_bw_limit(&pf
->hw
, seid
, credits
,
5426 I40E_MAX_BW_INACTIVE_ACCUM
, NULL
);
5428 dev_err(&pf
->pdev
->dev
,
5429 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5430 max_tx_rate
, seid
, i40e_stat_str(&pf
->hw
, ret
),
5431 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
5436 * i40e_remove_queue_channels - Remove queue channels for the TCs
5437 * @vsi: VSI to be configured
5439 * Remove queue channels for the TCs
5441 static void i40e_remove_queue_channels(struct i40e_vsi
*vsi
)
5443 enum i40e_admin_queue_err last_aq_status
;
5444 struct i40e_cloud_filter
*cfilter
;
5445 struct i40e_channel
*ch
, *ch_tmp
;
5446 struct i40e_pf
*pf
= vsi
->back
;
5447 struct hlist_node
*node
;
5450 /* Reset rss size that was stored when reconfiguring rss for
5451 * channel VSIs with non-power-of-2 queue count.
5453 vsi
->current_rss_size
= 0;
5455 /* perform cleanup for channels if they exist */
5456 if (list_empty(&vsi
->ch_list
))
5459 list_for_each_entry_safe(ch
, ch_tmp
, &vsi
->ch_list
, list
) {
5460 struct i40e_vsi
*p_vsi
;
5462 list_del(&ch
->list
);
5463 p_vsi
= ch
->parent_vsi
;
5464 if (!p_vsi
|| !ch
->initialized
) {
5468 /* Reset queue contexts */
5469 for (i
= 0; i
< ch
->num_queue_pairs
; i
++) {
5470 struct i40e_ring
*tx_ring
, *rx_ring
;
5473 pf_q
= ch
->base_queue
+ i
;
5474 tx_ring
= vsi
->tx_rings
[pf_q
];
5477 rx_ring
= vsi
->rx_rings
[pf_q
];
5481 /* Reset BW configured for this VSI via mqprio */
5482 ret
= i40e_set_bw_limit(vsi
, ch
->seid
, 0);
5484 dev_info(&vsi
->back
->pdev
->dev
,
5485 "Failed to reset tx rate for ch->seid %u\n",
5488 /* delete cloud filters associated with this channel */
5489 hlist_for_each_entry_safe(cfilter
, node
,
5490 &pf
->cloud_filter_list
, cloud_node
) {
5491 if (cfilter
->seid
!= ch
->seid
)
5494 hash_del(&cfilter
->cloud_node
);
5495 if (cfilter
->dst_port
)
5496 ret
= i40e_add_del_cloud_filter_big_buf(vsi
,
5500 ret
= i40e_add_del_cloud_filter(vsi
, cfilter
,
5502 last_aq_status
= pf
->hw
.aq
.asq_last_status
;
5504 dev_info(&pf
->pdev
->dev
,
5505 "Failed to delete cloud filter, err %s aq_err %s\n",
5506 i40e_stat_str(&pf
->hw
, ret
),
5507 i40e_aq_str(&pf
->hw
, last_aq_status
));
5511 /* delete VSI from FW */
5512 ret
= i40e_aq_delete_element(&vsi
->back
->hw
, ch
->seid
,
5515 dev_err(&vsi
->back
->pdev
->dev
,
5516 "unable to remove channel (%d) for parent VSI(%d)\n",
5517 ch
->seid
, p_vsi
->seid
);
5520 INIT_LIST_HEAD(&vsi
->ch_list
);
5524 * i40e_is_any_channel - channel exist or not
5525 * @vsi: ptr to VSI to which channels are associated with
5527 * Returns true or false if channel(s) exist for associated VSI or not
5529 static bool i40e_is_any_channel(struct i40e_vsi
*vsi
)
5531 struct i40e_channel
*ch
, *ch_tmp
;
5533 list_for_each_entry_safe(ch
, ch_tmp
, &vsi
->ch_list
, list
) {
5534 if (ch
->initialized
)
5542 * i40e_get_max_queues_for_channel
5543 * @vsi: ptr to VSI to which channels are associated with
5545 * Helper function which returns max value among the queue counts set on the
5546 * channels/TCs created.
5548 static int i40e_get_max_queues_for_channel(struct i40e_vsi
*vsi
)
5550 struct i40e_channel
*ch
, *ch_tmp
;
5553 list_for_each_entry_safe(ch
, ch_tmp
, &vsi
->ch_list
, list
) {
5554 if (!ch
->initialized
)
5556 if (ch
->num_queue_pairs
> max
)
5557 max
= ch
->num_queue_pairs
;
5564 * i40e_validate_num_queues - validate num_queues w.r.t channel
5565 * @pf: ptr to PF device
5566 * @num_queues: number of queues
5567 * @vsi: the parent VSI
5568 * @reconfig_rss: indicates should the RSS be reconfigured or not
5570 * This function validates number of queues in the context of new channel
5571 * which is being established and determines if RSS should be reconfigured
5572 * or not for parent VSI.
5574 static int i40e_validate_num_queues(struct i40e_pf
*pf
, int num_queues
,
5575 struct i40e_vsi
*vsi
, bool *reconfig_rss
)
5582 *reconfig_rss
= false;
5583 if (vsi
->current_rss_size
) {
5584 if (num_queues
> vsi
->current_rss_size
) {
5585 dev_dbg(&pf
->pdev
->dev
,
5586 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5587 num_queues
, vsi
->current_rss_size
);
5589 } else if ((num_queues
< vsi
->current_rss_size
) &&
5590 (!is_power_of_2(num_queues
))) {
5591 dev_dbg(&pf
->pdev
->dev
,
5592 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5593 num_queues
, vsi
->current_rss_size
);
5598 if (!is_power_of_2(num_queues
)) {
5599 /* Find the max num_queues configured for channel if channel
5601 * if channel exist, then enforce 'num_queues' to be more than
5602 * max ever queues configured for channel.
5604 max_ch_queues
= i40e_get_max_queues_for_channel(vsi
);
5605 if (num_queues
< max_ch_queues
) {
5606 dev_dbg(&pf
->pdev
->dev
,
5607 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5608 num_queues
, max_ch_queues
);
5611 *reconfig_rss
= true;
5618 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5619 * @vsi: the VSI being setup
5620 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5622 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5624 static int i40e_vsi_reconfig_rss(struct i40e_vsi
*vsi
, u16 rss_size
)
5626 struct i40e_pf
*pf
= vsi
->back
;
5627 u8 seed
[I40E_HKEY_ARRAY_SIZE
];
5628 struct i40e_hw
*hw
= &pf
->hw
;
5636 if (rss_size
> vsi
->rss_size
)
5639 local_rss_size
= min_t(int, vsi
->rss_size
, rss_size
);
5640 lut
= kzalloc(vsi
->rss_table_size
, GFP_KERNEL
);
5644 /* Ignoring user configured lut if there is one */
5645 i40e_fill_rss_lut(pf
, lut
, vsi
->rss_table_size
, local_rss_size
);
5647 /* Use user configured hash key if there is one, otherwise
5650 if (vsi
->rss_hkey_user
)
5651 memcpy(seed
, vsi
->rss_hkey_user
, I40E_HKEY_ARRAY_SIZE
);
5653 netdev_rss_key_fill((void *)seed
, I40E_HKEY_ARRAY_SIZE
);
5655 ret
= i40e_config_rss(vsi
, seed
, lut
, vsi
->rss_table_size
);
5657 dev_info(&pf
->pdev
->dev
,
5658 "Cannot set RSS lut, err %s aq_err %s\n",
5659 i40e_stat_str(hw
, ret
),
5660 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
5666 /* Do the update w.r.t. storing rss_size */
5667 if (!vsi
->orig_rss_size
)
5668 vsi
->orig_rss_size
= vsi
->rss_size
;
5669 vsi
->current_rss_size
= local_rss_size
;
5675 * i40e_channel_setup_queue_map - Setup a channel queue map
5676 * @pf: ptr to PF device
5677 * @vsi: the VSI being setup
5678 * @ctxt: VSI context structure
5679 * @ch: ptr to channel structure
5681 * Setup queue map for a specific channel
5683 static void i40e_channel_setup_queue_map(struct i40e_pf
*pf
,
5684 struct i40e_vsi_context
*ctxt
,
5685 struct i40e_channel
*ch
)
5687 u16 qcount
, qmap
, sections
= 0;
5691 sections
= I40E_AQ_VSI_PROP_QUEUE_MAP_VALID
;
5692 sections
|= I40E_AQ_VSI_PROP_SCHED_VALID
;
5694 qcount
= min_t(int, ch
->num_queue_pairs
, pf
->num_lan_msix
);
5695 ch
->num_queue_pairs
= qcount
;
5697 /* find the next higher power-of-2 of num queue pairs */
5698 pow
= ilog2(qcount
);
5699 if (!is_power_of_2(qcount
))
5702 qmap
= (offset
<< I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT
) |
5703 (pow
<< I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT
);
5705 /* Setup queue TC[0].qmap for given VSI context */
5706 ctxt
->info
.tc_mapping
[0] = cpu_to_le16(qmap
);
5708 ctxt
->info
.up_enable_bits
= 0x1; /* TC0 enabled */
5709 ctxt
->info
.mapping_flags
|= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG
);
5710 ctxt
->info
.queue_mapping
[0] = cpu_to_le16(ch
->base_queue
);
5711 ctxt
->info
.valid_sections
|= cpu_to_le16(sections
);
5715 * i40e_add_channel - add a channel by adding VSI
5716 * @pf: ptr to PF device
5717 * @uplink_seid: underlying HW switching element (VEB) ID
5718 * @ch: ptr to channel structure
5720 * Add a channel (VSI) using add_vsi and queue_map
5722 static int i40e_add_channel(struct i40e_pf
*pf
, u16 uplink_seid
,
5723 struct i40e_channel
*ch
)
5725 struct i40e_hw
*hw
= &pf
->hw
;
5726 struct i40e_vsi_context ctxt
;
5727 u8 enabled_tc
= 0x1; /* TC0 enabled */
5730 if (ch
->type
!= I40E_VSI_VMDQ2
) {
5731 dev_info(&pf
->pdev
->dev
,
5732 "add new vsi failed, ch->type %d\n", ch
->type
);
5736 memset(&ctxt
, 0, sizeof(ctxt
));
5737 ctxt
.pf_num
= hw
->pf_id
;
5739 ctxt
.uplink_seid
= uplink_seid
;
5740 ctxt
.connection_type
= I40E_AQ_VSI_CONN_TYPE_NORMAL
;
5741 if (ch
->type
== I40E_VSI_VMDQ2
)
5742 ctxt
.flags
= I40E_AQ_VSI_TYPE_VMDQ2
;
5744 if (pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
) {
5745 ctxt
.info
.valid_sections
|=
5746 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
5747 ctxt
.info
.switch_id
=
5748 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB
);
5751 /* Set queue map for a given VSI context */
5752 i40e_channel_setup_queue_map(pf
, &ctxt
, ch
);
5754 /* Now time to create VSI */
5755 ret
= i40e_aq_add_vsi(hw
, &ctxt
, NULL
);
5757 dev_info(&pf
->pdev
->dev
,
5758 "add new vsi failed, err %s aq_err %s\n",
5759 i40e_stat_str(&pf
->hw
, ret
),
5760 i40e_aq_str(&pf
->hw
,
5761 pf
->hw
.aq
.asq_last_status
));
5765 /* Success, update channel */
5766 ch
->enabled_tc
= enabled_tc
;
5767 ch
->seid
= ctxt
.seid
;
5768 ch
->vsi_number
= ctxt
.vsi_number
;
5769 ch
->stat_counter_idx
= cpu_to_le16(ctxt
.info
.stat_counter_idx
);
5771 /* copy just the sections touched not the entire info
5772 * since not all sections are valid as returned by
5775 ch
->info
.mapping_flags
= ctxt
.info
.mapping_flags
;
5776 memcpy(&ch
->info
.queue_mapping
,
5777 &ctxt
.info
.queue_mapping
, sizeof(ctxt
.info
.queue_mapping
));
5778 memcpy(&ch
->info
.tc_mapping
, ctxt
.info
.tc_mapping
,
5779 sizeof(ctxt
.info
.tc_mapping
));
5784 static int i40e_channel_config_bw(struct i40e_vsi
*vsi
, struct i40e_channel
*ch
,
5787 struct i40e_aqc_configure_vsi_tc_bw_data bw_data
;
5791 bw_data
.tc_valid_bits
= ch
->enabled_tc
;
5792 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++)
5793 bw_data
.tc_bw_credits
[i
] = bw_share
[i
];
5795 ret
= i40e_aq_config_vsi_tc_bw(&vsi
->back
->hw
, ch
->seid
,
5798 dev_info(&vsi
->back
->pdev
->dev
,
5799 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5800 vsi
->back
->hw
.aq
.asq_last_status
, ch
->seid
);
5804 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++)
5805 ch
->info
.qs_handle
[i
] = bw_data
.qs_handles
[i
];
5811 * i40e_channel_config_tx_ring - config TX ring associated with new channel
5812 * @pf: ptr to PF device
5813 * @vsi: the VSI being setup
5814 * @ch: ptr to channel structure
5816 * Configure TX rings associated with channel (VSI) since queues are being
5819 static int i40e_channel_config_tx_ring(struct i40e_pf
*pf
,
5820 struct i40e_vsi
*vsi
,
5821 struct i40e_channel
*ch
)
5825 u8 bw_share
[I40E_MAX_TRAFFIC_CLASS
] = {0};
5827 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5828 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
5829 if (ch
->enabled_tc
& BIT(i
))
5833 /* configure BW for new VSI */
5834 ret
= i40e_channel_config_bw(vsi
, ch
, bw_share
);
5836 dev_info(&vsi
->back
->pdev
->dev
,
5837 "Failed configuring TC map %d for channel (seid %u)\n",
5838 ch
->enabled_tc
, ch
->seid
);
5842 for (i
= 0; i
< ch
->num_queue_pairs
; i
++) {
5843 struct i40e_ring
*tx_ring
, *rx_ring
;
5846 pf_q
= ch
->base_queue
+ i
;
5848 /* Get to TX ring ptr of main VSI, for re-setup TX queue
5851 tx_ring
= vsi
->tx_rings
[pf_q
];
5854 /* Get the RX ring ptr */
5855 rx_ring
= vsi
->rx_rings
[pf_q
];
5863 * i40e_setup_hw_channel - setup new channel
5864 * @pf: ptr to PF device
5865 * @vsi: the VSI being setup
5866 * @ch: ptr to channel structure
5867 * @uplink_seid: underlying HW switching element (VEB) ID
5868 * @type: type of channel to be created (VMDq2/VF)
5870 * Setup new channel (VSI) based on specified type (VMDq2/VF)
5871 * and configures TX rings accordingly
5873 static inline int i40e_setup_hw_channel(struct i40e_pf
*pf
,
5874 struct i40e_vsi
*vsi
,
5875 struct i40e_channel
*ch
,
5876 u16 uplink_seid
, u8 type
)
5880 ch
->initialized
= false;
5881 ch
->base_queue
= vsi
->next_base_queue
;
5884 /* Proceed with creation of channel (VMDq2) VSI */
5885 ret
= i40e_add_channel(pf
, uplink_seid
, ch
);
5887 dev_info(&pf
->pdev
->dev
,
5888 "failed to add_channel using uplink_seid %u\n",
5893 /* Mark the successful creation of channel */
5894 ch
->initialized
= true;
5896 /* Reconfigure TX queues using QTX_CTL register */
5897 ret
= i40e_channel_config_tx_ring(pf
, vsi
, ch
);
5899 dev_info(&pf
->pdev
->dev
,
5900 "failed to configure TX rings for channel %u\n",
5905 /* update 'next_base_queue' */
5906 vsi
->next_base_queue
= vsi
->next_base_queue
+ ch
->num_queue_pairs
;
5907 dev_dbg(&pf
->pdev
->dev
,
5908 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
5909 ch
->seid
, ch
->vsi_number
, ch
->stat_counter_idx
,
5910 ch
->num_queue_pairs
,
5911 vsi
->next_base_queue
);
5916 * i40e_setup_channel - setup new channel using uplink element
5917 * @pf: ptr to PF device
5918 * @type: type of channel to be created (VMDq2/VF)
5919 * @uplink_seid: underlying HW switching element (VEB) ID
5920 * @ch: ptr to channel structure
5922 * Setup new channel (VSI) based on specified type (VMDq2/VF)
5923 * and uplink switching element (uplink_seid)
5925 static bool i40e_setup_channel(struct i40e_pf
*pf
, struct i40e_vsi
*vsi
,
5926 struct i40e_channel
*ch
)
5932 if (vsi
->type
== I40E_VSI_MAIN
) {
5933 vsi_type
= I40E_VSI_VMDQ2
;
5935 dev_err(&pf
->pdev
->dev
, "unsupported parent vsi type(%d)\n",
5940 /* underlying switching element */
5941 seid
= pf
->vsi
[pf
->lan_vsi
]->uplink_seid
;
5943 /* create channel (VSI), configure TX rings */
5944 ret
= i40e_setup_hw_channel(pf
, vsi
, ch
, seid
, vsi_type
);
5946 dev_err(&pf
->pdev
->dev
, "failed to setup hw_channel\n");
5950 return ch
->initialized
? true : false;
5954 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
5955 * @vsi: ptr to VSI which has PF backing
5957 * Sets up switch mode correctly if it needs to be changed and perform
5958 * what are allowed modes.
5960 static int i40e_validate_and_set_switch_mode(struct i40e_vsi
*vsi
)
5963 struct i40e_pf
*pf
= vsi
->back
;
5964 struct i40e_hw
*hw
= &pf
->hw
;
5967 ret
= i40e_get_capabilities(pf
, i40e_aqc_opc_list_dev_capabilities
);
5971 if (hw
->dev_caps
.switch_mode
) {
5972 /* if switch mode is set, support mode2 (non-tunneled for
5973 * cloud filter) for now
5975 u32 switch_mode
= hw
->dev_caps
.switch_mode
&
5976 I40E_SWITCH_MODE_MASK
;
5977 if (switch_mode
>= I40E_CLOUD_FILTER_MODE1
) {
5978 if (switch_mode
== I40E_CLOUD_FILTER_MODE2
)
5980 dev_err(&pf
->pdev
->dev
,
5981 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
5982 hw
->dev_caps
.switch_mode
);
5987 /* Set Bit 7 to be valid */
5988 mode
= I40E_AQ_SET_SWITCH_BIT7_VALID
;
5990 /* Set L4type for TCP support */
5991 mode
|= I40E_AQ_SET_SWITCH_L4_TYPE_TCP
;
5993 /* Set cloud filter mode */
5994 mode
|= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL
;
5996 /* Prep mode field for set_switch_config */
5997 ret
= i40e_aq_set_switch_config(hw
, pf
->last_sw_conf_flags
,
5998 pf
->last_sw_conf_valid_flags
,
6000 if (ret
&& hw
->aq
.asq_last_status
!= I40E_AQ_RC_ESRCH
)
6001 dev_err(&pf
->pdev
->dev
,
6002 "couldn't set switch config bits, err %s aq_err %s\n",
6003 i40e_stat_str(hw
, ret
),
6005 hw
->aq
.asq_last_status
));
6011 * i40e_create_queue_channel - function to create channel
6012 * @vsi: VSI to be configured
6013 * @ch: ptr to channel (it contains channel specific params)
6015 * This function creates channel (VSI) using num_queues specified by user,
6016 * reconfigs RSS if needed.
6018 int i40e_create_queue_channel(struct i40e_vsi
*vsi
,
6019 struct i40e_channel
*ch
)
6021 struct i40e_pf
*pf
= vsi
->back
;
6028 if (!ch
->num_queue_pairs
) {
6029 dev_err(&pf
->pdev
->dev
, "Invalid num_queues requested: %d\n",
6030 ch
->num_queue_pairs
);
6034 /* validate user requested num_queues for channel */
6035 err
= i40e_validate_num_queues(pf
, ch
->num_queue_pairs
, vsi
,
6038 dev_info(&pf
->pdev
->dev
, "Failed to validate num_queues (%d)\n",
6039 ch
->num_queue_pairs
);
6043 /* By default we are in VEPA mode, if this is the first VF/VMDq
6044 * VSI to be added switch to VEB mode.
6046 if ((!(pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
)) ||
6047 (!i40e_is_any_channel(vsi
))) {
6048 if (!is_power_of_2(vsi
->tc_config
.tc_info
[0].qcount
)) {
6049 dev_dbg(&pf
->pdev
->dev
,
6050 "Failed to create channel. Override queues (%u) not power of 2\n",
6051 vsi
->tc_config
.tc_info
[0].qcount
);
6055 if (!(pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
)) {
6056 pf
->flags
|= I40E_FLAG_VEB_MODE_ENABLED
;
6058 if (vsi
->type
== I40E_VSI_MAIN
) {
6059 if (pf
->flags
& I40E_FLAG_TC_MQPRIO
)
6060 i40e_do_reset(pf
, I40E_PF_RESET_FLAG
,
6063 i40e_do_reset_safe(pf
,
6064 I40E_PF_RESET_FLAG
);
6067 /* now onwards for main VSI, number of queues will be value
6068 * of TC0's queue count
6072 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6073 * it should be more than num_queues
6075 if (!vsi
->cnt_q_avail
|| vsi
->cnt_q_avail
< ch
->num_queue_pairs
) {
6076 dev_dbg(&pf
->pdev
->dev
,
6077 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6078 vsi
->cnt_q_avail
, ch
->num_queue_pairs
);
6082 /* reconfig_rss only if vsi type is MAIN_VSI */
6083 if (reconfig_rss
&& (vsi
->type
== I40E_VSI_MAIN
)) {
6084 err
= i40e_vsi_reconfig_rss(vsi
, ch
->num_queue_pairs
);
6086 dev_info(&pf
->pdev
->dev
,
6087 "Error: unable to reconfig rss for num_queues (%u)\n",
6088 ch
->num_queue_pairs
);
6093 if (!i40e_setup_channel(pf
, vsi
, ch
)) {
6094 dev_info(&pf
->pdev
->dev
, "Failed to setup channel\n");
6098 dev_info(&pf
->pdev
->dev
,
6099 "Setup channel (id:%u) utilizing num_queues %d\n",
6100 ch
->seid
, ch
->num_queue_pairs
);
6102 /* configure VSI for BW limit */
6103 if (ch
->max_tx_rate
) {
6104 u64 credits
= ch
->max_tx_rate
;
6106 if (i40e_set_bw_limit(vsi
, ch
->seid
, ch
->max_tx_rate
))
6109 do_div(credits
, I40E_BW_CREDIT_DIVISOR
);
6110 dev_dbg(&pf
->pdev
->dev
,
6111 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6117 /* in case of VF, this will be main SRIOV VSI */
6118 ch
->parent_vsi
= vsi
;
6120 /* and update main_vsi's count for queue_available to use */
6121 vsi
->cnt_q_avail
-= ch
->num_queue_pairs
;
6127 * i40e_configure_queue_channels - Add queue channel for the given TCs
6128 * @vsi: VSI to be configured
6130 * Configures queue channel mapping to the given TCs
6132 static int i40e_configure_queue_channels(struct i40e_vsi
*vsi
)
6134 struct i40e_channel
*ch
;
6138 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6139 vsi
->tc_seid_map
[0] = vsi
->seid
;
6140 for (i
= 1; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
6141 if (vsi
->tc_config
.enabled_tc
& BIT(i
)) {
6142 ch
= kzalloc(sizeof(*ch
), GFP_KERNEL
);
6148 INIT_LIST_HEAD(&ch
->list
);
6149 ch
->num_queue_pairs
=
6150 vsi
->tc_config
.tc_info
[i
].qcount
;
6152 vsi
->tc_config
.tc_info
[i
].qoffset
;
6154 /* Bandwidth limit through tc interface is in bytes/s,
6157 max_rate
= vsi
->mqprio_qopt
.max_rate
[i
];
6158 do_div(max_rate
, I40E_BW_MBPS_DIVISOR
);
6159 ch
->max_tx_rate
= max_rate
;
6161 list_add_tail(&ch
->list
, &vsi
->ch_list
);
6163 ret
= i40e_create_queue_channel(vsi
, ch
);
6165 dev_err(&vsi
->back
->pdev
->dev
,
6166 "Failed creating queue channel with TC%d: queues %d\n",
6167 i
, ch
->num_queue_pairs
);
6170 vsi
->tc_seid_map
[i
] = ch
->seid
;
6176 i40e_remove_queue_channels(vsi
);
6181 * i40e_veb_config_tc - Configure TCs for given VEB
6183 * @enabled_tc: TC bitmap
6185 * Configures given TC bitmap for VEB (switching) element
6187 int i40e_veb_config_tc(struct i40e_veb
*veb
, u8 enabled_tc
)
6189 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data
= {0};
6190 struct i40e_pf
*pf
= veb
->pf
;
6194 /* No TCs or already enabled TCs just return */
6195 if (!enabled_tc
|| veb
->enabled_tc
== enabled_tc
)
6198 bw_data
.tc_valid_bits
= enabled_tc
;
6199 /* bw_data.absolute_credits is not set (relative) */
6201 /* Enable ETS TCs with equal BW Share for now */
6202 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
6203 if (enabled_tc
& BIT(i
))
6204 bw_data
.tc_bw_share_credits
[i
] = 1;
6207 ret
= i40e_aq_config_switch_comp_bw_config(&pf
->hw
, veb
->seid
,
6210 dev_info(&pf
->pdev
->dev
,
6211 "VEB bw config failed, err %s aq_err %s\n",
6212 i40e_stat_str(&pf
->hw
, ret
),
6213 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
6217 /* Update the BW information */
6218 ret
= i40e_veb_get_bw_info(veb
);
6220 dev_info(&pf
->pdev
->dev
,
6221 "Failed getting veb bw config, err %s aq_err %s\n",
6222 i40e_stat_str(&pf
->hw
, ret
),
6223 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
6230 #ifdef CONFIG_I40E_DCB
6232 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6235 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6236 * the caller would've quiesce all the VSIs before calling
6239 static void i40e_dcb_reconfigure(struct i40e_pf
*pf
)
6245 /* Enable the TCs available on PF to all VEBs */
6246 tc_map
= i40e_pf_get_tc_map(pf
);
6247 for (v
= 0; v
< I40E_MAX_VEB
; v
++) {
6250 ret
= i40e_veb_config_tc(pf
->veb
[v
], tc_map
);
6252 dev_info(&pf
->pdev
->dev
,
6253 "Failed configuring TC for VEB seid=%d\n",
6255 /* Will try to configure as many components */
6259 /* Update each VSI */
6260 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
6264 /* - Enable all TCs for the LAN VSI
6265 * - For all others keep them at TC0 for now
6267 if (v
== pf
->lan_vsi
)
6268 tc_map
= i40e_pf_get_tc_map(pf
);
6270 tc_map
= I40E_DEFAULT_TRAFFIC_CLASS
;
6272 ret
= i40e_vsi_config_tc(pf
->vsi
[v
], tc_map
);
6274 dev_info(&pf
->pdev
->dev
,
6275 "Failed configuring TC for VSI seid=%d\n",
6277 /* Will try to configure as many components */
6279 /* Re-configure VSI vectors based on updated TC map */
6280 i40e_vsi_map_rings_to_vectors(pf
->vsi
[v
]);
6281 if (pf
->vsi
[v
]->netdev
)
6282 i40e_dcbnl_set_all(pf
->vsi
[v
]);
6288 * i40e_resume_port_tx - Resume port Tx
6291 * Resume a port's Tx and issue a PF reset in case of failure to
6294 static int i40e_resume_port_tx(struct i40e_pf
*pf
)
6296 struct i40e_hw
*hw
= &pf
->hw
;
6299 ret
= i40e_aq_resume_port_tx(hw
, NULL
);
6301 dev_info(&pf
->pdev
->dev
,
6302 "Resume Port Tx failed, err %s aq_err %s\n",
6303 i40e_stat_str(&pf
->hw
, ret
),
6304 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
6305 /* Schedule PF reset to recover */
6306 set_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
);
6307 i40e_service_event_schedule(pf
);
6314 * i40e_init_pf_dcb - Initialize DCB configuration
6315 * @pf: PF being configured
6317 * Query the current DCB configuration and cache it
6318 * in the hardware structure
6320 static int i40e_init_pf_dcb(struct i40e_pf
*pf
)
6322 struct i40e_hw
*hw
= &pf
->hw
;
6325 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6326 * Also do not enable DCBx if FW LLDP agent is disabled
6328 if ((pf
->hw_features
& I40E_HW_NO_DCB_SUPPORT
) ||
6329 (pf
->flags
& I40E_FLAG_DISABLE_FW_LLDP
))
6332 /* Get the initial DCB configuration */
6333 err
= i40e_init_dcb(hw
);
6335 /* Device/Function is not DCBX capable */
6336 if ((!hw
->func_caps
.dcb
) ||
6337 (hw
->dcbx_status
== I40E_DCBX_STATUS_DISABLED
)) {
6338 dev_info(&pf
->pdev
->dev
,
6339 "DCBX offload is not supported or is disabled for this PF.\n");
6341 /* When status is not DISABLED then DCBX in FW */
6342 pf
->dcbx_cap
= DCB_CAP_DCBX_LLD_MANAGED
|
6343 DCB_CAP_DCBX_VER_IEEE
;
6345 pf
->flags
|= I40E_FLAG_DCB_CAPABLE
;
6346 /* Enable DCB tagging only when more than one TC
6347 * or explicitly disable if only one TC
6349 if (i40e_dcb_get_num_tc(&hw
->local_dcbx_config
) > 1)
6350 pf
->flags
|= I40E_FLAG_DCB_ENABLED
;
6352 pf
->flags
&= ~I40E_FLAG_DCB_ENABLED
;
6353 dev_dbg(&pf
->pdev
->dev
,
6354 "DCBX offload is supported for this PF.\n");
6356 } else if (pf
->hw
.aq
.asq_last_status
== I40E_AQ_RC_EPERM
) {
6357 dev_info(&pf
->pdev
->dev
, "FW LLDP disabled for this PF.\n");
6358 pf
->flags
|= I40E_FLAG_DISABLE_FW_LLDP
;
6360 dev_info(&pf
->pdev
->dev
,
6361 "Query for DCB configuration failed, err %s aq_err %s\n",
6362 i40e_stat_str(&pf
->hw
, err
),
6363 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
6369 #endif /* CONFIG_I40E_DCB */
6370 #define SPEED_SIZE 14
6373 * i40e_print_link_message - print link up or down
6374 * @vsi: the VSI for which link needs a message
6375 * @isup: true of link is up, false otherwise
6377 void i40e_print_link_message(struct i40e_vsi
*vsi
, bool isup
)
6379 enum i40e_aq_link_speed new_speed
;
6380 struct i40e_pf
*pf
= vsi
->back
;
6381 char *speed
= "Unknown";
6382 char *fc
= "Unknown";
6387 new_speed
= pf
->hw
.phy
.link_info
.link_speed
;
6389 if ((vsi
->current_isup
== isup
) && (vsi
->current_speed
== new_speed
))
6391 vsi
->current_isup
= isup
;
6392 vsi
->current_speed
= new_speed
;
6394 netdev_info(vsi
->netdev
, "NIC Link is Down\n");
6398 /* Warn user if link speed on NPAR enabled partition is not at
6401 if (pf
->hw
.func_caps
.npar_enable
&&
6402 (pf
->hw
.phy
.link_info
.link_speed
== I40E_LINK_SPEED_1GB
||
6403 pf
->hw
.phy
.link_info
.link_speed
== I40E_LINK_SPEED_100MB
))
6404 netdev_warn(vsi
->netdev
,
6405 "The partition detected link speed that is less than 10Gbps\n");
6407 switch (pf
->hw
.phy
.link_info
.link_speed
) {
6408 case I40E_LINK_SPEED_40GB
:
6411 case I40E_LINK_SPEED_20GB
:
6414 case I40E_LINK_SPEED_25GB
:
6417 case I40E_LINK_SPEED_10GB
:
6420 case I40E_LINK_SPEED_1GB
:
6423 case I40E_LINK_SPEED_100MB
:
6430 switch (pf
->hw
.fc
.current_mode
) {
6434 case I40E_FC_TX_PAUSE
:
6437 case I40E_FC_RX_PAUSE
:
6445 if (pf
->hw
.phy
.link_info
.link_speed
== I40E_LINK_SPEED_25GB
) {
6446 req_fec
= ", Requested FEC: None";
6447 fec
= ", FEC: None";
6448 an
= ", Autoneg: False";
6450 if (pf
->hw
.phy
.link_info
.an_info
& I40E_AQ_AN_COMPLETED
)
6451 an
= ", Autoneg: True";
6453 if (pf
->hw
.phy
.link_info
.fec_info
&
6454 I40E_AQ_CONFIG_FEC_KR_ENA
)
6455 fec
= ", FEC: CL74 FC-FEC/BASE-R";
6456 else if (pf
->hw
.phy
.link_info
.fec_info
&
6457 I40E_AQ_CONFIG_FEC_RS_ENA
)
6458 fec
= ", FEC: CL108 RS-FEC";
6460 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
6461 * both RS and FC are requested
6463 if (vsi
->back
->hw
.phy
.link_info
.req_fec_info
&
6464 (I40E_AQ_REQUEST_FEC_KR
| I40E_AQ_REQUEST_FEC_RS
)) {
6465 if (vsi
->back
->hw
.phy
.link_info
.req_fec_info
&
6466 I40E_AQ_REQUEST_FEC_RS
)
6467 req_fec
= ", Requested FEC: CL108 RS-FEC";
6469 req_fec
= ", Requested FEC: CL74 FC-FEC/BASE-R";
6473 netdev_info(vsi
->netdev
, "NIC Link is Up, %sbps Full Duplex%s%s%s, Flow Control: %s\n",
6474 speed
, req_fec
, fec
, an
, fc
);
6478 * i40e_up_complete - Finish the last steps of bringing up a connection
6479 * @vsi: the VSI being configured
6481 static int i40e_up_complete(struct i40e_vsi
*vsi
)
6483 struct i40e_pf
*pf
= vsi
->back
;
6486 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
6487 i40e_vsi_configure_msix(vsi
);
6489 i40e_configure_msi_and_legacy(vsi
);
6492 err
= i40e_vsi_start_rings(vsi
);
6496 clear_bit(__I40E_VSI_DOWN
, vsi
->state
);
6497 i40e_napi_enable_all(vsi
);
6498 i40e_vsi_enable_irq(vsi
);
6500 if ((pf
->hw
.phy
.link_info
.link_info
& I40E_AQ_LINK_UP
) &&
6502 i40e_print_link_message(vsi
, true);
6503 netif_tx_start_all_queues(vsi
->netdev
);
6504 netif_carrier_on(vsi
->netdev
);
6507 /* replay FDIR SB filters */
6508 if (vsi
->type
== I40E_VSI_FDIR
) {
6509 /* reset fd counters */
6512 i40e_fdir_filter_restore(vsi
);
6515 /* On the next run of the service_task, notify any clients of the new
6518 set_bit(__I40E_CLIENT_SERVICE_REQUESTED
, pf
->state
);
6519 i40e_service_event_schedule(pf
);
6525 * i40e_vsi_reinit_locked - Reset the VSI
6526 * @vsi: the VSI being configured
6528 * Rebuild the ring structs after some configuration
6529 * has changed, e.g. MTU size.
6531 static void i40e_vsi_reinit_locked(struct i40e_vsi
*vsi
)
6533 struct i40e_pf
*pf
= vsi
->back
;
6535 WARN_ON(in_interrupt());
6536 while (test_and_set_bit(__I40E_CONFIG_BUSY
, pf
->state
))
6537 usleep_range(1000, 2000);
6541 clear_bit(__I40E_CONFIG_BUSY
, pf
->state
);
6545 * i40e_up - Bring the connection back up after being down
6546 * @vsi: the VSI being configured
6548 int i40e_up(struct i40e_vsi
*vsi
)
6552 err
= i40e_vsi_configure(vsi
);
6554 err
= i40e_up_complete(vsi
);
6560 * i40e_force_link_state - Force the link status
6561 * @pf: board private structure
6562 * @is_up: whether the link state should be forced up or down
6564 static i40e_status
i40e_force_link_state(struct i40e_pf
*pf
, bool is_up
)
6566 struct i40e_aq_get_phy_abilities_resp abilities
;
6567 struct i40e_aq_set_phy_config config
= {0};
6568 struct i40e_hw
*hw
= &pf
->hw
;
6572 /* Get the current phy config */
6573 err
= i40e_aq_get_phy_capabilities(hw
, false, false, &abilities
,
6576 dev_err(&pf
->pdev
->dev
,
6577 "failed to get phy cap., ret = %s last_status = %s\n",
6578 i40e_stat_str(hw
, err
),
6579 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
6583 /* If link needs to go up, but was not forced to go down,
6584 * no need for a flap
6586 if (is_up
&& abilities
.phy_type
!= 0)
6587 return I40E_SUCCESS
;
6589 /* To force link we need to set bits for all supported PHY types,
6590 * but there are now more than 32, so we need to split the bitmap
6591 * across two fields.
6593 mask
= I40E_PHY_TYPES_BITMASK
;
6594 config
.phy_type
= is_up
? cpu_to_le32((u32
)(mask
& 0xffffffff)) : 0;
6595 config
.phy_type_ext
= is_up
? (u8
)((mask
>> 32) & 0xff) : 0;
6596 /* Copy the old settings, except of phy_type */
6597 config
.abilities
= abilities
.abilities
;
6598 config
.link_speed
= abilities
.link_speed
;
6599 config
.eee_capability
= abilities
.eee_capability
;
6600 config
.eeer
= abilities
.eeer_val
;
6601 config
.low_power_ctrl
= abilities
.d3_lpan
;
6602 config
.fec_config
= abilities
.fec_cfg_curr_mod_ext_info
&
6603 I40E_AQ_PHY_FEC_CONFIG_MASK
;
6604 err
= i40e_aq_set_phy_config(hw
, &config
, NULL
);
6607 dev_err(&pf
->pdev
->dev
,
6608 "set phy config ret = %s last_status = %s\n",
6609 i40e_stat_str(&pf
->hw
, err
),
6610 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
6614 /* Update the link info */
6615 err
= i40e_update_link_info(hw
);
6617 /* Wait a little bit (on 40G cards it sometimes takes a really
6618 * long time for link to come back from the atomic reset)
6622 i40e_update_link_info(hw
);
6625 i40e_aq_set_link_restart_an(hw
, true, NULL
);
6627 return I40E_SUCCESS
;
6631 * i40e_down - Shutdown the connection processing
6632 * @vsi: the VSI being stopped
6634 void i40e_down(struct i40e_vsi
*vsi
)
6638 /* It is assumed that the caller of this function
6639 * sets the vsi->state __I40E_VSI_DOWN bit.
6642 netif_carrier_off(vsi
->netdev
);
6643 netif_tx_disable(vsi
->netdev
);
6645 i40e_vsi_disable_irq(vsi
);
6646 i40e_vsi_stop_rings(vsi
);
6647 if (vsi
->type
== I40E_VSI_MAIN
&&
6648 vsi
->back
->flags
& I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED
)
6649 i40e_force_link_state(vsi
->back
, false);
6650 i40e_napi_disable_all(vsi
);
6652 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++) {
6653 i40e_clean_tx_ring(vsi
->tx_rings
[i
]);
6654 if (i40e_enabled_xdp_vsi(vsi
))
6655 i40e_clean_tx_ring(vsi
->xdp_rings
[i
]);
6656 i40e_clean_rx_ring(vsi
->rx_rings
[i
]);
6662 * i40e_validate_mqprio_qopt- validate queue mapping info
6663 * @vsi: the VSI being configured
6664 * @mqprio_qopt: queue parametrs
6666 static int i40e_validate_mqprio_qopt(struct i40e_vsi
*vsi
,
6667 struct tc_mqprio_qopt_offload
*mqprio_qopt
)
6669 u64 sum_max_rate
= 0;
6673 if (mqprio_qopt
->qopt
.offset
[0] != 0 ||
6674 mqprio_qopt
->qopt
.num_tc
< 1 ||
6675 mqprio_qopt
->qopt
.num_tc
> I40E_MAX_TRAFFIC_CLASS
)
6677 for (i
= 0; ; i
++) {
6678 if (!mqprio_qopt
->qopt
.count
[i
])
6680 if (mqprio_qopt
->min_rate
[i
]) {
6681 dev_err(&vsi
->back
->pdev
->dev
,
6682 "Invalid min tx rate (greater than 0) specified\n");
6685 max_rate
= mqprio_qopt
->max_rate
[i
];
6686 do_div(max_rate
, I40E_BW_MBPS_DIVISOR
);
6687 sum_max_rate
+= max_rate
;
6689 if (i
>= mqprio_qopt
->qopt
.num_tc
- 1)
6691 if (mqprio_qopt
->qopt
.offset
[i
+ 1] !=
6692 (mqprio_qopt
->qopt
.offset
[i
] + mqprio_qopt
->qopt
.count
[i
]))
6695 if (vsi
->num_queue_pairs
<
6696 (mqprio_qopt
->qopt
.offset
[i
] + mqprio_qopt
->qopt
.count
[i
])) {
6699 if (sum_max_rate
> i40e_get_link_speed(vsi
)) {
6700 dev_err(&vsi
->back
->pdev
->dev
,
6701 "Invalid max tx rate specified\n");
6708 * i40e_vsi_set_default_tc_config - set default values for tc configuration
6709 * @vsi: the VSI being configured
6711 static void i40e_vsi_set_default_tc_config(struct i40e_vsi
*vsi
)
6716 /* Only TC0 is enabled */
6717 vsi
->tc_config
.numtc
= 1;
6718 vsi
->tc_config
.enabled_tc
= 1;
6719 qcount
= min_t(int, vsi
->alloc_queue_pairs
,
6720 i40e_pf_get_max_q_per_tc(vsi
->back
));
6721 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
6722 /* For the TC that is not enabled set the offset to to default
6723 * queue and allocate one queue for the given TC.
6725 vsi
->tc_config
.tc_info
[i
].qoffset
= 0;
6727 vsi
->tc_config
.tc_info
[i
].qcount
= qcount
;
6729 vsi
->tc_config
.tc_info
[i
].qcount
= 1;
6730 vsi
->tc_config
.tc_info
[i
].netdev_tc
= 0;
6735 * i40e_setup_tc - configure multiple traffic classes
6736 * @netdev: net device to configure
6737 * @type_data: tc offload data
6739 static int i40e_setup_tc(struct net_device
*netdev
, void *type_data
)
6741 struct tc_mqprio_qopt_offload
*mqprio_qopt
= type_data
;
6742 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
6743 struct i40e_vsi
*vsi
= np
->vsi
;
6744 struct i40e_pf
*pf
= vsi
->back
;
6745 u8 enabled_tc
= 0, num_tc
, hw
;
6746 bool need_reset
= false;
6751 num_tc
= mqprio_qopt
->qopt
.num_tc
;
6752 hw
= mqprio_qopt
->qopt
.hw
;
6753 mode
= mqprio_qopt
->mode
;
6755 pf
->flags
&= ~I40E_FLAG_TC_MQPRIO
;
6756 memcpy(&vsi
->mqprio_qopt
, mqprio_qopt
, sizeof(*mqprio_qopt
));
6760 /* Check if MFP enabled */
6761 if (pf
->flags
& I40E_FLAG_MFP_ENABLED
) {
6763 "Configuring TC not supported in MFP mode\n");
6767 case TC_MQPRIO_MODE_DCB
:
6768 pf
->flags
&= ~I40E_FLAG_TC_MQPRIO
;
6770 /* Check if DCB enabled to continue */
6771 if (!(pf
->flags
& I40E_FLAG_DCB_ENABLED
)) {
6773 "DCB is not enabled for adapter\n");
6777 /* Check whether tc count is within enabled limit */
6778 if (num_tc
> i40e_pf_get_num_tc(pf
)) {
6780 "TC count greater than enabled on link for adapter\n");
6784 case TC_MQPRIO_MODE_CHANNEL
:
6785 if (pf
->flags
& I40E_FLAG_DCB_ENABLED
) {
6787 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
6790 if (!(pf
->flags
& I40E_FLAG_MSIX_ENABLED
))
6792 ret
= i40e_validate_mqprio_qopt(vsi
, mqprio_qopt
);
6795 memcpy(&vsi
->mqprio_qopt
, mqprio_qopt
,
6796 sizeof(*mqprio_qopt
));
6797 pf
->flags
|= I40E_FLAG_TC_MQPRIO
;
6798 pf
->flags
&= ~I40E_FLAG_DCB_ENABLED
;
6805 /* Generate TC map for number of tc requested */
6806 for (i
= 0; i
< num_tc
; i
++)
6807 enabled_tc
|= BIT(i
);
6809 /* Requesting same TC configuration as already enabled */
6810 if (enabled_tc
== vsi
->tc_config
.enabled_tc
&&
6811 mode
!= TC_MQPRIO_MODE_CHANNEL
)
6814 /* Quiesce VSI queues */
6815 i40e_quiesce_vsi(vsi
);
6817 if (!hw
&& !(pf
->flags
& I40E_FLAG_TC_MQPRIO
))
6818 i40e_remove_queue_channels(vsi
);
6820 /* Configure VSI for enabled TCs */
6821 ret
= i40e_vsi_config_tc(vsi
, enabled_tc
);
6823 netdev_info(netdev
, "Failed configuring TC for VSI seid=%d\n",
6829 if (pf
->flags
& I40E_FLAG_TC_MQPRIO
) {
6830 if (vsi
->mqprio_qopt
.max_rate
[0]) {
6831 u64 max_tx_rate
= vsi
->mqprio_qopt
.max_rate
[0];
6833 do_div(max_tx_rate
, I40E_BW_MBPS_DIVISOR
);
6834 ret
= i40e_set_bw_limit(vsi
, vsi
->seid
, max_tx_rate
);
6836 u64 credits
= max_tx_rate
;
6838 do_div(credits
, I40E_BW_CREDIT_DIVISOR
);
6839 dev_dbg(&vsi
->back
->pdev
->dev
,
6840 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6849 ret
= i40e_configure_queue_channels(vsi
);
6852 "Failed configuring queue channels\n");
6859 /* Reset the configuration data to defaults, only TC0 is enabled */
6861 i40e_vsi_set_default_tc_config(vsi
);
6866 i40e_unquiesce_vsi(vsi
);
6871 * i40e_set_cld_element - sets cloud filter element data
6872 * @filter: cloud filter rule
6873 * @cld: ptr to cloud filter element data
6875 * This is helper function to copy data into cloud filter element
6878 i40e_set_cld_element(struct i40e_cloud_filter
*filter
,
6879 struct i40e_aqc_cloud_filters_element_data
*cld
)
6884 memset(cld
, 0, sizeof(*cld
));
6885 ether_addr_copy(cld
->outer_mac
, filter
->dst_mac
);
6886 ether_addr_copy(cld
->inner_mac
, filter
->src_mac
);
6888 if (filter
->n_proto
!= ETH_P_IP
&& filter
->n_proto
!= ETH_P_IPV6
)
6891 if (filter
->n_proto
== ETH_P_IPV6
) {
6892 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
6893 for (i
= 0, j
= 0; i
< ARRAY_SIZE(filter
->dst_ipv6
);
6895 ipa
= be32_to_cpu(filter
->dst_ipv6
[IPV6_MAX_INDEX
- i
]);
6896 ipa
= cpu_to_le32(ipa
);
6897 memcpy(&cld
->ipaddr
.raw_v6
.data
[j
], &ipa
, sizeof(ipa
));
6900 ipa
= be32_to_cpu(filter
->dst_ipv4
);
6901 memcpy(&cld
->ipaddr
.v4
.data
, &ipa
, sizeof(ipa
));
6904 cld
->inner_vlan
= cpu_to_le16(ntohs(filter
->vlan_id
));
6906 /* tenant_id is not supported by FW now, once the support is enabled
6907 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
6909 if (filter
->tenant_id
)
6914 * i40e_add_del_cloud_filter - Add/del cloud filter
6915 * @vsi: pointer to VSI
6916 * @filter: cloud filter rule
6917 * @add: if true, add, if false, delete
6919 * Add or delete a cloud filter for a specific flow spec.
6920 * Returns 0 if the filter were successfully added.
6922 int i40e_add_del_cloud_filter(struct i40e_vsi
*vsi
,
6923 struct i40e_cloud_filter
*filter
, bool add
)
6925 struct i40e_aqc_cloud_filters_element_data cld_filter
;
6926 struct i40e_pf
*pf
= vsi
->back
;
6928 static const u16 flag_table
[128] = {
6929 [I40E_CLOUD_FILTER_FLAGS_OMAC
] =
6930 I40E_AQC_ADD_CLOUD_FILTER_OMAC
,
6931 [I40E_CLOUD_FILTER_FLAGS_IMAC
] =
6932 I40E_AQC_ADD_CLOUD_FILTER_IMAC
,
6933 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN
] =
6934 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN
,
6935 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID
] =
6936 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID
,
6937 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC
] =
6938 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC
,
6939 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID
] =
6940 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID
,
6941 [I40E_CLOUD_FILTER_FLAGS_IIP
] =
6942 I40E_AQC_ADD_CLOUD_FILTER_IIP
,
6945 if (filter
->flags
>= ARRAY_SIZE(flag_table
))
6946 return I40E_ERR_CONFIG
;
6948 /* copy element needed to add cloud filter from filter */
6949 i40e_set_cld_element(filter
, &cld_filter
);
6951 if (filter
->tunnel_type
!= I40E_CLOUD_TNL_TYPE_NONE
)
6952 cld_filter
.flags
= cpu_to_le16(filter
->tunnel_type
<<
6953 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT
);
6955 if (filter
->n_proto
== ETH_P_IPV6
)
6956 cld_filter
.flags
|= cpu_to_le16(flag_table
[filter
->flags
] |
6957 I40E_AQC_ADD_CLOUD_FLAGS_IPV6
);
6959 cld_filter
.flags
|= cpu_to_le16(flag_table
[filter
->flags
] |
6960 I40E_AQC_ADD_CLOUD_FLAGS_IPV4
);
6963 ret
= i40e_aq_add_cloud_filters(&pf
->hw
, filter
->seid
,
6966 ret
= i40e_aq_rem_cloud_filters(&pf
->hw
, filter
->seid
,
6969 dev_dbg(&pf
->pdev
->dev
,
6970 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
6971 add
? "add" : "delete", filter
->dst_port
, ret
,
6972 pf
->hw
.aq
.asq_last_status
);
6974 dev_info(&pf
->pdev
->dev
,
6975 "%s cloud filter for VSI: %d\n",
6976 add
? "Added" : "Deleted", filter
->seid
);
6981 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
6982 * @vsi: pointer to VSI
6983 * @filter: cloud filter rule
6984 * @add: if true, add, if false, delete
6986 * Add or delete a cloud filter for a specific flow spec using big buffer.
6987 * Returns 0 if the filter were successfully added.
6989 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi
*vsi
,
6990 struct i40e_cloud_filter
*filter
,
6993 struct i40e_aqc_cloud_filters_element_bb cld_filter
;
6994 struct i40e_pf
*pf
= vsi
->back
;
6997 /* Both (src/dst) valid mac_addr are not supported */
6998 if ((is_valid_ether_addr(filter
->dst_mac
) &&
6999 is_valid_ether_addr(filter
->src_mac
)) ||
7000 (is_multicast_ether_addr(filter
->dst_mac
) &&
7001 is_multicast_ether_addr(filter
->src_mac
)))
7004 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
7005 * ports are not supported via big buffer now.
7007 if (!filter
->dst_port
|| filter
->ip_proto
== IPPROTO_UDP
)
7010 /* adding filter using src_port/src_ip is not supported at this stage */
7011 if (filter
->src_port
|| filter
->src_ipv4
||
7012 !ipv6_addr_any(&filter
->ip
.v6
.src_ip6
))
7015 /* copy element needed to add cloud filter from filter */
7016 i40e_set_cld_element(filter
, &cld_filter
.element
);
7018 if (is_valid_ether_addr(filter
->dst_mac
) ||
7019 is_valid_ether_addr(filter
->src_mac
) ||
7020 is_multicast_ether_addr(filter
->dst_mac
) ||
7021 is_multicast_ether_addr(filter
->src_mac
)) {
7022 /* MAC + IP : unsupported mode */
7023 if (filter
->dst_ipv4
)
7026 /* since we validated that L4 port must be valid before
7027 * we get here, start with respective "flags" value
7028 * and update if vlan is present or not
7030 cld_filter
.element
.flags
=
7031 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT
);
7033 if (filter
->vlan_id
) {
7034 cld_filter
.element
.flags
=
7035 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT
);
7038 } else if (filter
->dst_ipv4
||
7039 !ipv6_addr_any(&filter
->ip
.v6
.dst_ip6
)) {
7040 cld_filter
.element
.flags
=
7041 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT
);
7042 if (filter
->n_proto
== ETH_P_IPV6
)
7043 cld_filter
.element
.flags
|=
7044 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6
);
7046 cld_filter
.element
.flags
|=
7047 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4
);
7049 dev_err(&pf
->pdev
->dev
,
7050 "either mac or ip has to be valid for cloud filter\n");
7054 /* Now copy L4 port in Byte 6..7 in general fields */
7055 cld_filter
.general_fields
[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0
] =
7056 be16_to_cpu(filter
->dst_port
);
7059 /* Validate current device switch mode, change if necessary */
7060 ret
= i40e_validate_and_set_switch_mode(vsi
);
7062 dev_err(&pf
->pdev
->dev
,
7063 "failed to set switch mode, ret %d\n",
7068 ret
= i40e_aq_add_cloud_filters_bb(&pf
->hw
, filter
->seid
,
7071 ret
= i40e_aq_rem_cloud_filters_bb(&pf
->hw
, filter
->seid
,
7076 dev_dbg(&pf
->pdev
->dev
,
7077 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
7078 add
? "add" : "delete", ret
, pf
->hw
.aq
.asq_last_status
);
7080 dev_info(&pf
->pdev
->dev
,
7081 "%s cloud filter for VSI: %d, L4 port: %d\n",
7082 add
? "add" : "delete", filter
->seid
,
7083 ntohs(filter
->dst_port
));
7088 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
7089 * @vsi: Pointer to VSI
7090 * @cls_flower: Pointer to struct tc_cls_flower_offload
7091 * @filter: Pointer to cloud filter structure
7094 static int i40e_parse_cls_flower(struct i40e_vsi
*vsi
,
7095 struct tc_cls_flower_offload
*f
,
7096 struct i40e_cloud_filter
*filter
)
7098 u16 n_proto_mask
= 0, n_proto_key
= 0, addr_type
= 0;
7099 struct i40e_pf
*pf
= vsi
->back
;
7102 if (f
->dissector
->used_keys
&
7103 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL
) |
7104 BIT(FLOW_DISSECTOR_KEY_BASIC
) |
7105 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS
) |
7106 BIT(FLOW_DISSECTOR_KEY_VLAN
) |
7107 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS
) |
7108 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS
) |
7109 BIT(FLOW_DISSECTOR_KEY_PORTS
) |
7110 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID
))) {
7111 dev_err(&pf
->pdev
->dev
, "Unsupported key used: 0x%x\n",
7112 f
->dissector
->used_keys
);
7116 if (dissector_uses_key(f
->dissector
, FLOW_DISSECTOR_KEY_ENC_KEYID
)) {
7117 struct flow_dissector_key_keyid
*key
=
7118 skb_flow_dissector_target(f
->dissector
,
7119 FLOW_DISSECTOR_KEY_ENC_KEYID
,
7122 struct flow_dissector_key_keyid
*mask
=
7123 skb_flow_dissector_target(f
->dissector
,
7124 FLOW_DISSECTOR_KEY_ENC_KEYID
,
7127 if (mask
->keyid
!= 0)
7128 field_flags
|= I40E_CLOUD_FIELD_TEN_ID
;
7130 filter
->tenant_id
= be32_to_cpu(key
->keyid
);
7133 if (dissector_uses_key(f
->dissector
, FLOW_DISSECTOR_KEY_BASIC
)) {
7134 struct flow_dissector_key_basic
*key
=
7135 skb_flow_dissector_target(f
->dissector
,
7136 FLOW_DISSECTOR_KEY_BASIC
,
7139 struct flow_dissector_key_basic
*mask
=
7140 skb_flow_dissector_target(f
->dissector
,
7141 FLOW_DISSECTOR_KEY_BASIC
,
7144 n_proto_key
= ntohs(key
->n_proto
);
7145 n_proto_mask
= ntohs(mask
->n_proto
);
7147 if (n_proto_key
== ETH_P_ALL
) {
7151 filter
->n_proto
= n_proto_key
& n_proto_mask
;
7152 filter
->ip_proto
= key
->ip_proto
;
7155 if (dissector_uses_key(f
->dissector
, FLOW_DISSECTOR_KEY_ETH_ADDRS
)) {
7156 struct flow_dissector_key_eth_addrs
*key
=
7157 skb_flow_dissector_target(f
->dissector
,
7158 FLOW_DISSECTOR_KEY_ETH_ADDRS
,
7161 struct flow_dissector_key_eth_addrs
*mask
=
7162 skb_flow_dissector_target(f
->dissector
,
7163 FLOW_DISSECTOR_KEY_ETH_ADDRS
,
7166 /* use is_broadcast and is_zero to check for all 0xf or 0 */
7167 if (!is_zero_ether_addr(mask
->dst
)) {
7168 if (is_broadcast_ether_addr(mask
->dst
)) {
7169 field_flags
|= I40E_CLOUD_FIELD_OMAC
;
7171 dev_err(&pf
->pdev
->dev
, "Bad ether dest mask %pM\n",
7173 return I40E_ERR_CONFIG
;
7177 if (!is_zero_ether_addr(mask
->src
)) {
7178 if (is_broadcast_ether_addr(mask
->src
)) {
7179 field_flags
|= I40E_CLOUD_FIELD_IMAC
;
7181 dev_err(&pf
->pdev
->dev
, "Bad ether src mask %pM\n",
7183 return I40E_ERR_CONFIG
;
7186 ether_addr_copy(filter
->dst_mac
, key
->dst
);
7187 ether_addr_copy(filter
->src_mac
, key
->src
);
7190 if (dissector_uses_key(f
->dissector
, FLOW_DISSECTOR_KEY_VLAN
)) {
7191 struct flow_dissector_key_vlan
*key
=
7192 skb_flow_dissector_target(f
->dissector
,
7193 FLOW_DISSECTOR_KEY_VLAN
,
7195 struct flow_dissector_key_vlan
*mask
=
7196 skb_flow_dissector_target(f
->dissector
,
7197 FLOW_DISSECTOR_KEY_VLAN
,
7200 if (mask
->vlan_id
) {
7201 if (mask
->vlan_id
== VLAN_VID_MASK
) {
7202 field_flags
|= I40E_CLOUD_FIELD_IVLAN
;
7205 dev_err(&pf
->pdev
->dev
, "Bad vlan mask 0x%04x\n",
7207 return I40E_ERR_CONFIG
;
7211 filter
->vlan_id
= cpu_to_be16(key
->vlan_id
);
7214 if (dissector_uses_key(f
->dissector
, FLOW_DISSECTOR_KEY_CONTROL
)) {
7215 struct flow_dissector_key_control
*key
=
7216 skb_flow_dissector_target(f
->dissector
,
7217 FLOW_DISSECTOR_KEY_CONTROL
,
7220 addr_type
= key
->addr_type
;
7223 if (addr_type
== FLOW_DISSECTOR_KEY_IPV4_ADDRS
) {
7224 struct flow_dissector_key_ipv4_addrs
*key
=
7225 skb_flow_dissector_target(f
->dissector
,
7226 FLOW_DISSECTOR_KEY_IPV4_ADDRS
,
7228 struct flow_dissector_key_ipv4_addrs
*mask
=
7229 skb_flow_dissector_target(f
->dissector
,
7230 FLOW_DISSECTOR_KEY_IPV4_ADDRS
,
7234 if (mask
->dst
== cpu_to_be32(0xffffffff)) {
7235 field_flags
|= I40E_CLOUD_FIELD_IIP
;
7237 dev_err(&pf
->pdev
->dev
, "Bad ip dst mask %pI4b\n",
7239 return I40E_ERR_CONFIG
;
7244 if (mask
->src
== cpu_to_be32(0xffffffff)) {
7245 field_flags
|= I40E_CLOUD_FIELD_IIP
;
7247 dev_err(&pf
->pdev
->dev
, "Bad ip src mask %pI4b\n",
7249 return I40E_ERR_CONFIG
;
7253 if (field_flags
& I40E_CLOUD_FIELD_TEN_ID
) {
7254 dev_err(&pf
->pdev
->dev
, "Tenant id not allowed for ip filter\n");
7255 return I40E_ERR_CONFIG
;
7257 filter
->dst_ipv4
= key
->dst
;
7258 filter
->src_ipv4
= key
->src
;
7261 if (addr_type
== FLOW_DISSECTOR_KEY_IPV6_ADDRS
) {
7262 struct flow_dissector_key_ipv6_addrs
*key
=
7263 skb_flow_dissector_target(f
->dissector
,
7264 FLOW_DISSECTOR_KEY_IPV6_ADDRS
,
7266 struct flow_dissector_key_ipv6_addrs
*mask
=
7267 skb_flow_dissector_target(f
->dissector
,
7268 FLOW_DISSECTOR_KEY_IPV6_ADDRS
,
7271 /* src and dest IPV6 address should not be LOOPBACK
7272 * (0:0:0:0:0:0:0:1), which can be represented as ::1
7274 if (ipv6_addr_loopback(&key
->dst
) ||
7275 ipv6_addr_loopback(&key
->src
)) {
7276 dev_err(&pf
->pdev
->dev
,
7277 "Bad ipv6, addr is LOOPBACK\n");
7278 return I40E_ERR_CONFIG
;
7280 if (!ipv6_addr_any(&mask
->dst
) || !ipv6_addr_any(&mask
->src
))
7281 field_flags
|= I40E_CLOUD_FIELD_IIP
;
7283 memcpy(&filter
->src_ipv6
, &key
->src
.s6_addr32
,
7284 sizeof(filter
->src_ipv6
));
7285 memcpy(&filter
->dst_ipv6
, &key
->dst
.s6_addr32
,
7286 sizeof(filter
->dst_ipv6
));
7289 if (dissector_uses_key(f
->dissector
, FLOW_DISSECTOR_KEY_PORTS
)) {
7290 struct flow_dissector_key_ports
*key
=
7291 skb_flow_dissector_target(f
->dissector
,
7292 FLOW_DISSECTOR_KEY_PORTS
,
7294 struct flow_dissector_key_ports
*mask
=
7295 skb_flow_dissector_target(f
->dissector
,
7296 FLOW_DISSECTOR_KEY_PORTS
,
7300 if (mask
->src
== cpu_to_be16(0xffff)) {
7301 field_flags
|= I40E_CLOUD_FIELD_IIP
;
7303 dev_err(&pf
->pdev
->dev
, "Bad src port mask 0x%04x\n",
7304 be16_to_cpu(mask
->src
));
7305 return I40E_ERR_CONFIG
;
7310 if (mask
->dst
== cpu_to_be16(0xffff)) {
7311 field_flags
|= I40E_CLOUD_FIELD_IIP
;
7313 dev_err(&pf
->pdev
->dev
, "Bad dst port mask 0x%04x\n",
7314 be16_to_cpu(mask
->dst
));
7315 return I40E_ERR_CONFIG
;
7319 filter
->dst_port
= key
->dst
;
7320 filter
->src_port
= key
->src
;
7322 switch (filter
->ip_proto
) {
7327 dev_err(&pf
->pdev
->dev
,
7328 "Only UDP and TCP transport are supported\n");
7332 filter
->flags
= field_flags
;
7337 * i40e_handle_tclass: Forward to a traffic class on the device
7338 * @vsi: Pointer to VSI
7339 * @tc: traffic class index on the device
7340 * @filter: Pointer to cloud filter structure
7343 static int i40e_handle_tclass(struct i40e_vsi
*vsi
, u32 tc
,
7344 struct i40e_cloud_filter
*filter
)
7346 struct i40e_channel
*ch
, *ch_tmp
;
7348 /* direct to a traffic class on the same device */
7350 filter
->seid
= vsi
->seid
;
7352 } else if (vsi
->tc_config
.enabled_tc
& BIT(tc
)) {
7353 if (!filter
->dst_port
) {
7354 dev_err(&vsi
->back
->pdev
->dev
,
7355 "Specify destination port to direct to traffic class that is not default\n");
7358 if (list_empty(&vsi
->ch_list
))
7360 list_for_each_entry_safe(ch
, ch_tmp
, &vsi
->ch_list
,
7362 if (ch
->seid
== vsi
->tc_seid_map
[tc
])
7363 filter
->seid
= ch
->seid
;
7367 dev_err(&vsi
->back
->pdev
->dev
, "TC is not enabled\n");
7372 * i40e_configure_clsflower - Configure tc flower filters
7373 * @vsi: Pointer to VSI
7374 * @cls_flower: Pointer to struct tc_cls_flower_offload
7377 static int i40e_configure_clsflower(struct i40e_vsi
*vsi
,
7378 struct tc_cls_flower_offload
*cls_flower
)
7380 int tc
= tc_classid_to_hwtc(vsi
->netdev
, cls_flower
->classid
);
7381 struct i40e_cloud_filter
*filter
= NULL
;
7382 struct i40e_pf
*pf
= vsi
->back
;
7386 dev_err(&vsi
->back
->pdev
->dev
, "Invalid traffic class\n");
7390 if (test_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
) ||
7391 test_bit(__I40E_RESET_INTR_RECEIVED
, pf
->state
))
7394 if (pf
->fdir_pf_active_filters
||
7395 (!hlist_empty(&pf
->fdir_filter_list
))) {
7396 dev_err(&vsi
->back
->pdev
->dev
,
7397 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
7401 if (vsi
->back
->flags
& I40E_FLAG_FD_SB_ENABLED
) {
7402 dev_err(&vsi
->back
->pdev
->dev
,
7403 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
7404 vsi
->back
->flags
&= ~I40E_FLAG_FD_SB_ENABLED
;
7405 vsi
->back
->flags
|= I40E_FLAG_FD_SB_TO_CLOUD_FILTER
;
7408 filter
= kzalloc(sizeof(*filter
), GFP_KERNEL
);
7412 filter
->cookie
= cls_flower
->cookie
;
7414 err
= i40e_parse_cls_flower(vsi
, cls_flower
, filter
);
7418 err
= i40e_handle_tclass(vsi
, tc
, filter
);
7422 /* Add cloud filter */
7423 if (filter
->dst_port
)
7424 err
= i40e_add_del_cloud_filter_big_buf(vsi
, filter
, true);
7426 err
= i40e_add_del_cloud_filter(vsi
, filter
, true);
7429 dev_err(&pf
->pdev
->dev
,
7430 "Failed to add cloud filter, err %s\n",
7431 i40e_stat_str(&pf
->hw
, err
));
7435 /* add filter to the ordered list */
7436 INIT_HLIST_NODE(&filter
->cloud_node
);
7438 hlist_add_head(&filter
->cloud_node
, &pf
->cloud_filter_list
);
7440 pf
->num_cloud_filters
++;
7449 * i40e_find_cloud_filter - Find the could filter in the list
7450 * @vsi: Pointer to VSI
7451 * @cookie: filter specific cookie
7454 static struct i40e_cloud_filter
*i40e_find_cloud_filter(struct i40e_vsi
*vsi
,
7455 unsigned long *cookie
)
7457 struct i40e_cloud_filter
*filter
= NULL
;
7458 struct hlist_node
*node2
;
7460 hlist_for_each_entry_safe(filter
, node2
,
7461 &vsi
->back
->cloud_filter_list
, cloud_node
)
7462 if (!memcmp(cookie
, &filter
->cookie
, sizeof(filter
->cookie
)))
7468 * i40e_delete_clsflower - Remove tc flower filters
7469 * @vsi: Pointer to VSI
7470 * @cls_flower: Pointer to struct tc_cls_flower_offload
7473 static int i40e_delete_clsflower(struct i40e_vsi
*vsi
,
7474 struct tc_cls_flower_offload
*cls_flower
)
7476 struct i40e_cloud_filter
*filter
= NULL
;
7477 struct i40e_pf
*pf
= vsi
->back
;
7480 filter
= i40e_find_cloud_filter(vsi
, &cls_flower
->cookie
);
7485 hash_del(&filter
->cloud_node
);
7487 if (filter
->dst_port
)
7488 err
= i40e_add_del_cloud_filter_big_buf(vsi
, filter
, false);
7490 err
= i40e_add_del_cloud_filter(vsi
, filter
, false);
7494 dev_err(&pf
->pdev
->dev
,
7495 "Failed to delete cloud filter, err %s\n",
7496 i40e_stat_str(&pf
->hw
, err
));
7497 return i40e_aq_rc_to_posix(err
, pf
->hw
.aq
.asq_last_status
);
7500 pf
->num_cloud_filters
--;
7501 if (!pf
->num_cloud_filters
)
7502 if ((pf
->flags
& I40E_FLAG_FD_SB_TO_CLOUD_FILTER
) &&
7503 !(pf
->flags
& I40E_FLAG_FD_SB_INACTIVE
)) {
7504 pf
->flags
|= I40E_FLAG_FD_SB_ENABLED
;
7505 pf
->flags
&= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER
;
7506 pf
->flags
&= ~I40E_FLAG_FD_SB_INACTIVE
;
7512 * i40e_setup_tc_cls_flower - flower classifier offloads
7513 * @netdev: net device to configure
7514 * @type_data: offload data
7516 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv
*np
,
7517 struct tc_cls_flower_offload
*cls_flower
)
7519 struct i40e_vsi
*vsi
= np
->vsi
;
7521 switch (cls_flower
->command
) {
7522 case TC_CLSFLOWER_REPLACE
:
7523 return i40e_configure_clsflower(vsi
, cls_flower
);
7524 case TC_CLSFLOWER_DESTROY
:
7525 return i40e_delete_clsflower(vsi
, cls_flower
);
7526 case TC_CLSFLOWER_STATS
:
7533 static int i40e_setup_tc_block_cb(enum tc_setup_type type
, void *type_data
,
7536 struct i40e_netdev_priv
*np
= cb_priv
;
7538 if (!tc_cls_can_offload_and_chain0(np
->vsi
->netdev
, type_data
))
7542 case TC_SETUP_CLSFLOWER
:
7543 return i40e_setup_tc_cls_flower(np
, type_data
);
7550 static int i40e_setup_tc_block(struct net_device
*dev
,
7551 struct tc_block_offload
*f
)
7553 struct i40e_netdev_priv
*np
= netdev_priv(dev
);
7555 if (f
->binder_type
!= TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS
)
7558 switch (f
->command
) {
7560 return tcf_block_cb_register(f
->block
, i40e_setup_tc_block_cb
,
7562 case TC_BLOCK_UNBIND
:
7563 tcf_block_cb_unregister(f
->block
, i40e_setup_tc_block_cb
, np
);
7570 static int __i40e_setup_tc(struct net_device
*netdev
, enum tc_setup_type type
,
7574 case TC_SETUP_QDISC_MQPRIO
:
7575 return i40e_setup_tc(netdev
, type_data
);
7576 case TC_SETUP_BLOCK
:
7577 return i40e_setup_tc_block(netdev
, type_data
);
7584 * i40e_open - Called when a network interface is made active
7585 * @netdev: network interface device structure
7587 * The open entry point is called when a network interface is made
7588 * active by the system (IFF_UP). At this point all resources needed
7589 * for transmit and receive operations are allocated, the interrupt
7590 * handler is registered with the OS, the netdev watchdog subtask is
7591 * enabled, and the stack is notified that the interface is ready.
7593 * Returns 0 on success, negative value on failure
7595 int i40e_open(struct net_device
*netdev
)
7597 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
7598 struct i40e_vsi
*vsi
= np
->vsi
;
7599 struct i40e_pf
*pf
= vsi
->back
;
7602 /* disallow open during test or if eeprom is broken */
7603 if (test_bit(__I40E_TESTING
, pf
->state
) ||
7604 test_bit(__I40E_BAD_EEPROM
, pf
->state
))
7607 netif_carrier_off(netdev
);
7609 if (i40e_force_link_state(pf
, true))
7612 err
= i40e_vsi_open(vsi
);
7616 /* configure global TSO hardware offload settings */
7617 wr32(&pf
->hw
, I40E_GLLAN_TSOMSK_F
, be32_to_cpu(TCP_FLAG_PSH
|
7618 TCP_FLAG_FIN
) >> 16);
7619 wr32(&pf
->hw
, I40E_GLLAN_TSOMSK_M
, be32_to_cpu(TCP_FLAG_PSH
|
7621 TCP_FLAG_CWR
) >> 16);
7622 wr32(&pf
->hw
, I40E_GLLAN_TSOMSK_L
, be32_to_cpu(TCP_FLAG_CWR
) >> 16);
7624 udp_tunnel_get_rx_info(netdev
);
7631 * @vsi: the VSI to open
7633 * Finish initialization of the VSI.
7635 * Returns 0 on success, negative value on failure
7637 * Note: expects to be called while under rtnl_lock()
7639 int i40e_vsi_open(struct i40e_vsi
*vsi
)
7641 struct i40e_pf
*pf
= vsi
->back
;
7642 char int_name
[I40E_INT_NAME_STR_LEN
];
7645 /* allocate descriptors */
7646 err
= i40e_vsi_setup_tx_resources(vsi
);
7649 err
= i40e_vsi_setup_rx_resources(vsi
);
7653 err
= i40e_vsi_configure(vsi
);
7658 snprintf(int_name
, sizeof(int_name
) - 1, "%s-%s",
7659 dev_driver_string(&pf
->pdev
->dev
), vsi
->netdev
->name
);
7660 err
= i40e_vsi_request_irq(vsi
, int_name
);
7664 /* Notify the stack of the actual queue counts. */
7665 err
= netif_set_real_num_tx_queues(vsi
->netdev
,
7666 vsi
->num_queue_pairs
);
7668 goto err_set_queues
;
7670 err
= netif_set_real_num_rx_queues(vsi
->netdev
,
7671 vsi
->num_queue_pairs
);
7673 goto err_set_queues
;
7675 } else if (vsi
->type
== I40E_VSI_FDIR
) {
7676 snprintf(int_name
, sizeof(int_name
) - 1, "%s-%s:fdir",
7677 dev_driver_string(&pf
->pdev
->dev
),
7678 dev_name(&pf
->pdev
->dev
));
7679 err
= i40e_vsi_request_irq(vsi
, int_name
);
7686 err
= i40e_up_complete(vsi
);
7688 goto err_up_complete
;
7695 i40e_vsi_free_irq(vsi
);
7697 i40e_vsi_free_rx_resources(vsi
);
7699 i40e_vsi_free_tx_resources(vsi
);
7700 if (vsi
== pf
->vsi
[pf
->lan_vsi
])
7701 i40e_do_reset(pf
, I40E_PF_RESET_FLAG
, true);
7707 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
7708 * @pf: Pointer to PF
7710 * This function destroys the hlist where all the Flow Director
7711 * filters were saved.
7713 static void i40e_fdir_filter_exit(struct i40e_pf
*pf
)
7715 struct i40e_fdir_filter
*filter
;
7716 struct i40e_flex_pit
*pit_entry
, *tmp
;
7717 struct hlist_node
*node2
;
7719 hlist_for_each_entry_safe(filter
, node2
,
7720 &pf
->fdir_filter_list
, fdir_node
) {
7721 hlist_del(&filter
->fdir_node
);
7725 list_for_each_entry_safe(pit_entry
, tmp
, &pf
->l3_flex_pit_list
, list
) {
7726 list_del(&pit_entry
->list
);
7729 INIT_LIST_HEAD(&pf
->l3_flex_pit_list
);
7731 list_for_each_entry_safe(pit_entry
, tmp
, &pf
->l4_flex_pit_list
, list
) {
7732 list_del(&pit_entry
->list
);
7735 INIT_LIST_HEAD(&pf
->l4_flex_pit_list
);
7737 pf
->fdir_pf_active_filters
= 0;
7738 pf
->fd_tcp4_filter_cnt
= 0;
7739 pf
->fd_udp4_filter_cnt
= 0;
7740 pf
->fd_sctp4_filter_cnt
= 0;
7741 pf
->fd_ip4_filter_cnt
= 0;
7743 /* Reprogram the default input set for TCP/IPv4 */
7744 i40e_write_fd_input_set(pf
, I40E_FILTER_PCTYPE_NONF_IPV4_TCP
,
7745 I40E_L3_SRC_MASK
| I40E_L3_DST_MASK
|
7746 I40E_L4_SRC_MASK
| I40E_L4_DST_MASK
);
7748 /* Reprogram the default input set for UDP/IPv4 */
7749 i40e_write_fd_input_set(pf
, I40E_FILTER_PCTYPE_NONF_IPV4_UDP
,
7750 I40E_L3_SRC_MASK
| I40E_L3_DST_MASK
|
7751 I40E_L4_SRC_MASK
| I40E_L4_DST_MASK
);
7753 /* Reprogram the default input set for SCTP/IPv4 */
7754 i40e_write_fd_input_set(pf
, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP
,
7755 I40E_L3_SRC_MASK
| I40E_L3_DST_MASK
|
7756 I40E_L4_SRC_MASK
| I40E_L4_DST_MASK
);
7758 /* Reprogram the default input set for Other/IPv4 */
7759 i40e_write_fd_input_set(pf
, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER
,
7760 I40E_L3_SRC_MASK
| I40E_L3_DST_MASK
);
7762 i40e_write_fd_input_set(pf
, I40E_FILTER_PCTYPE_FRAG_IPV4
,
7763 I40E_L3_SRC_MASK
| I40E_L3_DST_MASK
);
7767 * i40e_cloud_filter_exit - Cleans up the cloud filters
7768 * @pf: Pointer to PF
7770 * This function destroys the hlist where all the cloud filters
7773 static void i40e_cloud_filter_exit(struct i40e_pf
*pf
)
7775 struct i40e_cloud_filter
*cfilter
;
7776 struct hlist_node
*node
;
7778 hlist_for_each_entry_safe(cfilter
, node
,
7779 &pf
->cloud_filter_list
, cloud_node
) {
7780 hlist_del(&cfilter
->cloud_node
);
7783 pf
->num_cloud_filters
= 0;
7785 if ((pf
->flags
& I40E_FLAG_FD_SB_TO_CLOUD_FILTER
) &&
7786 !(pf
->flags
& I40E_FLAG_FD_SB_INACTIVE
)) {
7787 pf
->flags
|= I40E_FLAG_FD_SB_ENABLED
;
7788 pf
->flags
&= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER
;
7789 pf
->flags
&= ~I40E_FLAG_FD_SB_INACTIVE
;
7794 * i40e_close - Disables a network interface
7795 * @netdev: network interface device structure
7797 * The close entry point is called when an interface is de-activated
7798 * by the OS. The hardware is still under the driver's control, but
7799 * this netdev interface is disabled.
7801 * Returns 0, this is not allowed to fail
7803 int i40e_close(struct net_device
*netdev
)
7805 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
7806 struct i40e_vsi
*vsi
= np
->vsi
;
7808 i40e_vsi_close(vsi
);
7814 * i40e_do_reset - Start a PF or Core Reset sequence
7815 * @pf: board private structure
7816 * @reset_flags: which reset is requested
7817 * @lock_acquired: indicates whether or not the lock has been acquired
7818 * before this function was called.
7820 * The essential difference in resets is that the PF Reset
7821 * doesn't clear the packet buffers, doesn't reset the PE
7822 * firmware, and doesn't bother the other PFs on the chip.
7824 void i40e_do_reset(struct i40e_pf
*pf
, u32 reset_flags
, bool lock_acquired
)
7828 WARN_ON(in_interrupt());
7831 /* do the biggest reset indicated */
7832 if (reset_flags
& BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED
)) {
7834 /* Request a Global Reset
7836 * This will start the chip's countdown to the actual full
7837 * chip reset event, and a warning interrupt to be sent
7838 * to all PFs, including the requestor. Our handler
7839 * for the warning interrupt will deal with the shutdown
7840 * and recovery of the switch setup.
7842 dev_dbg(&pf
->pdev
->dev
, "GlobalR requested\n");
7843 val
= rd32(&pf
->hw
, I40E_GLGEN_RTRIG
);
7844 val
|= I40E_GLGEN_RTRIG_GLOBR_MASK
;
7845 wr32(&pf
->hw
, I40E_GLGEN_RTRIG
, val
);
7847 } else if (reset_flags
& BIT_ULL(__I40E_CORE_RESET_REQUESTED
)) {
7849 /* Request a Core Reset
7851 * Same as Global Reset, except does *not* include the MAC/PHY
7853 dev_dbg(&pf
->pdev
->dev
, "CoreR requested\n");
7854 val
= rd32(&pf
->hw
, I40E_GLGEN_RTRIG
);
7855 val
|= I40E_GLGEN_RTRIG_CORER_MASK
;
7856 wr32(&pf
->hw
, I40E_GLGEN_RTRIG
, val
);
7857 i40e_flush(&pf
->hw
);
7859 } else if (reset_flags
& I40E_PF_RESET_FLAG
) {
7861 /* Request a PF Reset
7863 * Resets only the PF-specific registers
7865 * This goes directly to the tear-down and rebuild of
7866 * the switch, since we need to do all the recovery as
7867 * for the Core Reset.
7869 dev_dbg(&pf
->pdev
->dev
, "PFR requested\n");
7870 i40e_handle_reset_warning(pf
, lock_acquired
);
7872 } else if (reset_flags
& BIT_ULL(__I40E_REINIT_REQUESTED
)) {
7875 /* Find the VSI(s) that requested a re-init */
7876 dev_info(&pf
->pdev
->dev
,
7877 "VSI reinit requested\n");
7878 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
7879 struct i40e_vsi
*vsi
= pf
->vsi
[v
];
7882 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED
,
7884 i40e_vsi_reinit_locked(pf
->vsi
[v
]);
7886 } else if (reset_flags
& BIT_ULL(__I40E_DOWN_REQUESTED
)) {
7889 /* Find the VSI(s) that needs to be brought down */
7890 dev_info(&pf
->pdev
->dev
, "VSI down requested\n");
7891 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
7892 struct i40e_vsi
*vsi
= pf
->vsi
[v
];
7895 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED
,
7897 set_bit(__I40E_VSI_DOWN
, vsi
->state
);
7902 dev_info(&pf
->pdev
->dev
,
7903 "bad reset request 0x%08x\n", reset_flags
);
7907 #ifdef CONFIG_I40E_DCB
7909 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
7910 * @pf: board private structure
7911 * @old_cfg: current DCB config
7912 * @new_cfg: new DCB config
7914 bool i40e_dcb_need_reconfig(struct i40e_pf
*pf
,
7915 struct i40e_dcbx_config
*old_cfg
,
7916 struct i40e_dcbx_config
*new_cfg
)
7918 bool need_reconfig
= false;
7920 /* Check if ETS configuration has changed */
7921 if (memcmp(&new_cfg
->etscfg
,
7923 sizeof(new_cfg
->etscfg
))) {
7924 /* If Priority Table has changed reconfig is needed */
7925 if (memcmp(&new_cfg
->etscfg
.prioritytable
,
7926 &old_cfg
->etscfg
.prioritytable
,
7927 sizeof(new_cfg
->etscfg
.prioritytable
))) {
7928 need_reconfig
= true;
7929 dev_dbg(&pf
->pdev
->dev
, "ETS UP2TC changed.\n");
7932 if (memcmp(&new_cfg
->etscfg
.tcbwtable
,
7933 &old_cfg
->etscfg
.tcbwtable
,
7934 sizeof(new_cfg
->etscfg
.tcbwtable
)))
7935 dev_dbg(&pf
->pdev
->dev
, "ETS TC BW Table changed.\n");
7937 if (memcmp(&new_cfg
->etscfg
.tsatable
,
7938 &old_cfg
->etscfg
.tsatable
,
7939 sizeof(new_cfg
->etscfg
.tsatable
)))
7940 dev_dbg(&pf
->pdev
->dev
, "ETS TSA Table changed.\n");
7943 /* Check if PFC configuration has changed */
7944 if (memcmp(&new_cfg
->pfc
,
7946 sizeof(new_cfg
->pfc
))) {
7947 need_reconfig
= true;
7948 dev_dbg(&pf
->pdev
->dev
, "PFC config change detected.\n");
7951 /* Check if APP Table has changed */
7952 if (memcmp(&new_cfg
->app
,
7954 sizeof(new_cfg
->app
))) {
7955 need_reconfig
= true;
7956 dev_dbg(&pf
->pdev
->dev
, "APP Table change detected.\n");
7959 dev_dbg(&pf
->pdev
->dev
, "dcb need_reconfig=%d\n", need_reconfig
);
7960 return need_reconfig
;
7964 * i40e_handle_lldp_event - Handle LLDP Change MIB event
7965 * @pf: board private structure
7966 * @e: event info posted on ARQ
7968 static int i40e_handle_lldp_event(struct i40e_pf
*pf
,
7969 struct i40e_arq_event_info
*e
)
7971 struct i40e_aqc_lldp_get_mib
*mib
=
7972 (struct i40e_aqc_lldp_get_mib
*)&e
->desc
.params
.raw
;
7973 struct i40e_hw
*hw
= &pf
->hw
;
7974 struct i40e_dcbx_config tmp_dcbx_cfg
;
7975 bool need_reconfig
= false;
7979 /* Not DCB capable or capability disabled */
7980 if (!(pf
->flags
& I40E_FLAG_DCB_CAPABLE
))
7983 /* Ignore if event is not for Nearest Bridge */
7984 type
= ((mib
->type
>> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT
)
7985 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK
);
7986 dev_dbg(&pf
->pdev
->dev
, "LLDP event mib bridge type 0x%x\n", type
);
7987 if (type
!= I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE
)
7990 /* Check MIB Type and return if event for Remote MIB update */
7991 type
= mib
->type
& I40E_AQ_LLDP_MIB_TYPE_MASK
;
7992 dev_dbg(&pf
->pdev
->dev
,
7993 "LLDP event mib type %s\n", type
? "remote" : "local");
7994 if (type
== I40E_AQ_LLDP_MIB_REMOTE
) {
7995 /* Update the remote cached instance and return */
7996 ret
= i40e_aq_get_dcb_config(hw
, I40E_AQ_LLDP_MIB_REMOTE
,
7997 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE
,
7998 &hw
->remote_dcbx_config
);
8002 /* Store the old configuration */
8003 tmp_dcbx_cfg
= hw
->local_dcbx_config
;
8005 /* Reset the old DCBx configuration data */
8006 memset(&hw
->local_dcbx_config
, 0, sizeof(hw
->local_dcbx_config
));
8007 /* Get updated DCBX data from firmware */
8008 ret
= i40e_get_dcb_config(&pf
->hw
);
8010 dev_info(&pf
->pdev
->dev
,
8011 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
8012 i40e_stat_str(&pf
->hw
, ret
),
8013 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
8017 /* No change detected in DCBX configs */
8018 if (!memcmp(&tmp_dcbx_cfg
, &hw
->local_dcbx_config
,
8019 sizeof(tmp_dcbx_cfg
))) {
8020 dev_dbg(&pf
->pdev
->dev
, "No change detected in DCBX configuration.\n");
8024 need_reconfig
= i40e_dcb_need_reconfig(pf
, &tmp_dcbx_cfg
,
8025 &hw
->local_dcbx_config
);
8027 i40e_dcbnl_flush_apps(pf
, &tmp_dcbx_cfg
, &hw
->local_dcbx_config
);
8032 /* Enable DCB tagging only when more than one TC */
8033 if (i40e_dcb_get_num_tc(&hw
->local_dcbx_config
) > 1)
8034 pf
->flags
|= I40E_FLAG_DCB_ENABLED
;
8036 pf
->flags
&= ~I40E_FLAG_DCB_ENABLED
;
8038 set_bit(__I40E_PORT_SUSPENDED
, pf
->state
);
8039 /* Reconfiguration needed quiesce all VSIs */
8040 i40e_pf_quiesce_all_vsi(pf
);
8042 /* Changes in configuration update VEB/VSI */
8043 i40e_dcb_reconfigure(pf
);
8045 ret
= i40e_resume_port_tx(pf
);
8047 clear_bit(__I40E_PORT_SUSPENDED
, pf
->state
);
8048 /* In case of error no point in resuming VSIs */
8052 /* Wait for the PF's queues to be disabled */
8053 ret
= i40e_pf_wait_queues_disabled(pf
);
8055 /* Schedule PF reset to recover */
8056 set_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
);
8057 i40e_service_event_schedule(pf
);
8059 i40e_pf_unquiesce_all_vsi(pf
);
8060 set_bit(__I40E_CLIENT_SERVICE_REQUESTED
, pf
->state
);
8061 set_bit(__I40E_CLIENT_L2_CHANGE
, pf
->state
);
8067 #endif /* CONFIG_I40E_DCB */
8070 * i40e_do_reset_safe - Protected reset path for userland calls.
8071 * @pf: board private structure
8072 * @reset_flags: which reset is requested
8075 void i40e_do_reset_safe(struct i40e_pf
*pf
, u32 reset_flags
)
8078 i40e_do_reset(pf
, reset_flags
, true);
8083 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
8084 * @pf: board private structure
8085 * @e: event info posted on ARQ
8087 * Handler for LAN Queue Overflow Event generated by the firmware for PF
8090 static void i40e_handle_lan_overflow_event(struct i40e_pf
*pf
,
8091 struct i40e_arq_event_info
*e
)
8093 struct i40e_aqc_lan_overflow
*data
=
8094 (struct i40e_aqc_lan_overflow
*)&e
->desc
.params
.raw
;
8095 u32 queue
= le32_to_cpu(data
->prtdcb_rupto
);
8096 u32 qtx_ctl
= le32_to_cpu(data
->otx_ctl
);
8097 struct i40e_hw
*hw
= &pf
->hw
;
8101 dev_dbg(&pf
->pdev
->dev
, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
8104 /* Queue belongs to VF, find the VF and issue VF reset */
8105 if (((qtx_ctl
& I40E_QTX_CTL_PFVF_Q_MASK
)
8106 >> I40E_QTX_CTL_PFVF_Q_SHIFT
) == I40E_QTX_CTL_VF_QUEUE
) {
8107 vf_id
= (u16
)((qtx_ctl
& I40E_QTX_CTL_VFVM_INDX_MASK
)
8108 >> I40E_QTX_CTL_VFVM_INDX_SHIFT
);
8109 vf_id
-= hw
->func_caps
.vf_base_id
;
8110 vf
= &pf
->vf
[vf_id
];
8111 i40e_vc_notify_vf_reset(vf
);
8112 /* Allow VF to process pending reset notification */
8114 i40e_reset_vf(vf
, false);
8119 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
8120 * @pf: board private structure
8122 u32
i40e_get_cur_guaranteed_fd_count(struct i40e_pf
*pf
)
8126 val
= rd32(&pf
->hw
, I40E_PFQF_FDSTAT
);
8127 fcnt_prog
= (val
& I40E_PFQF_FDSTAT_GUARANT_CNT_MASK
);
8132 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
8133 * @pf: board private structure
8135 u32
i40e_get_current_fd_count(struct i40e_pf
*pf
)
8139 val
= rd32(&pf
->hw
, I40E_PFQF_FDSTAT
);
8140 fcnt_prog
= (val
& I40E_PFQF_FDSTAT_GUARANT_CNT_MASK
) +
8141 ((val
& I40E_PFQF_FDSTAT_BEST_CNT_MASK
) >>
8142 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT
);
8147 * i40e_get_global_fd_count - Get total FD filters programmed on device
8148 * @pf: board private structure
8150 u32
i40e_get_global_fd_count(struct i40e_pf
*pf
)
8154 val
= rd32(&pf
->hw
, I40E_GLQF_FDCNT_0
);
8155 fcnt_prog
= (val
& I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK
) +
8156 ((val
& I40E_GLQF_FDCNT_0_BESTCNT_MASK
) >>
8157 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT
);
8162 * i40e_reenable_fdir_sb - Restore FDir SB capability
8163 * @pf: board private structure
8165 static void i40e_reenable_fdir_sb(struct i40e_pf
*pf
)
8167 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED
, pf
->state
))
8168 if ((pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) &&
8169 (I40E_DEBUG_FD
& pf
->hw
.debug_mask
))
8170 dev_info(&pf
->pdev
->dev
, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
8174 * i40e_reenable_fdir_atr - Restore FDir ATR capability
8175 * @pf: board private structure
8177 static void i40e_reenable_fdir_atr(struct i40e_pf
*pf
)
8179 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED
, pf
->state
)) {
8180 /* ATR uses the same filtering logic as SB rules. It only
8181 * functions properly if the input set mask is at the default
8182 * settings. It is safe to restore the default input set
8183 * because there are no active TCPv4 filter rules.
8185 i40e_write_fd_input_set(pf
, I40E_FILTER_PCTYPE_NONF_IPV4_TCP
,
8186 I40E_L3_SRC_MASK
| I40E_L3_DST_MASK
|
8187 I40E_L4_SRC_MASK
| I40E_L4_DST_MASK
);
8189 if ((pf
->flags
& I40E_FLAG_FD_ATR_ENABLED
) &&
8190 (I40E_DEBUG_FD
& pf
->hw
.debug_mask
))
8191 dev_info(&pf
->pdev
->dev
, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
8196 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
8197 * @pf: board private structure
8198 * @filter: FDir filter to remove
8200 static void i40e_delete_invalid_filter(struct i40e_pf
*pf
,
8201 struct i40e_fdir_filter
*filter
)
8203 /* Update counters */
8204 pf
->fdir_pf_active_filters
--;
8207 switch (filter
->flow_type
) {
8209 pf
->fd_tcp4_filter_cnt
--;
8212 pf
->fd_udp4_filter_cnt
--;
8215 pf
->fd_sctp4_filter_cnt
--;
8218 switch (filter
->ip4_proto
) {
8220 pf
->fd_tcp4_filter_cnt
--;
8223 pf
->fd_udp4_filter_cnt
--;
8226 pf
->fd_sctp4_filter_cnt
--;
8229 pf
->fd_ip4_filter_cnt
--;
8235 /* Remove the filter from the list and free memory */
8236 hlist_del(&filter
->fdir_node
);
8241 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
8242 * @pf: board private structure
8244 void i40e_fdir_check_and_reenable(struct i40e_pf
*pf
)
8246 struct i40e_fdir_filter
*filter
;
8247 u32 fcnt_prog
, fcnt_avail
;
8248 struct hlist_node
*node
;
8250 if (test_bit(__I40E_FD_FLUSH_REQUESTED
, pf
->state
))
8253 /* Check if we have enough room to re-enable FDir SB capability. */
8254 fcnt_prog
= i40e_get_global_fd_count(pf
);
8255 fcnt_avail
= pf
->fdir_pf_filter_count
;
8256 if ((fcnt_prog
< (fcnt_avail
- I40E_FDIR_BUFFER_HEAD_ROOM
)) ||
8257 (pf
->fd_add_err
== 0) ||
8258 (i40e_get_current_atr_cnt(pf
) < pf
->fd_atr_cnt
))
8259 i40e_reenable_fdir_sb(pf
);
8261 /* We should wait for even more space before re-enabling ATR.
8262 * Additionally, we cannot enable ATR as long as we still have TCP SB
8265 if ((fcnt_prog
< (fcnt_avail
- I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR
)) &&
8266 (pf
->fd_tcp4_filter_cnt
== 0))
8267 i40e_reenable_fdir_atr(pf
);
8269 /* if hw had a problem adding a filter, delete it */
8270 if (pf
->fd_inv
> 0) {
8271 hlist_for_each_entry_safe(filter
, node
,
8272 &pf
->fdir_filter_list
, fdir_node
)
8273 if (filter
->fd_id
== pf
->fd_inv
)
8274 i40e_delete_invalid_filter(pf
, filter
);
8278 #define I40E_MIN_FD_FLUSH_INTERVAL 10
8279 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
8281 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
8282 * @pf: board private structure
8284 static void i40e_fdir_flush_and_replay(struct i40e_pf
*pf
)
8286 unsigned long min_flush_time
;
8287 int flush_wait_retry
= 50;
8288 bool disable_atr
= false;
8292 if (!time_after(jiffies
, pf
->fd_flush_timestamp
+
8293 (I40E_MIN_FD_FLUSH_INTERVAL
* HZ
)))
8296 /* If the flush is happening too quick and we have mostly SB rules we
8297 * should not re-enable ATR for some time.
8299 min_flush_time
= pf
->fd_flush_timestamp
+
8300 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE
* HZ
);
8301 fd_room
= pf
->fdir_pf_filter_count
- pf
->fdir_pf_active_filters
;
8303 if (!(time_after(jiffies
, min_flush_time
)) &&
8304 (fd_room
< I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR
)) {
8305 if (I40E_DEBUG_FD
& pf
->hw
.debug_mask
)
8306 dev_info(&pf
->pdev
->dev
, "ATR disabled, not enough FD filter space.\n");
8310 pf
->fd_flush_timestamp
= jiffies
;
8311 set_bit(__I40E_FD_ATR_AUTO_DISABLED
, pf
->state
);
8312 /* flush all filters */
8313 wr32(&pf
->hw
, I40E_PFQF_CTL_1
,
8314 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK
);
8315 i40e_flush(&pf
->hw
);
8319 /* Check FD flush status every 5-6msec */
8320 usleep_range(5000, 6000);
8321 reg
= rd32(&pf
->hw
, I40E_PFQF_CTL_1
);
8322 if (!(reg
& I40E_PFQF_CTL_1_CLEARFDTABLE_MASK
))
8324 } while (flush_wait_retry
--);
8325 if (reg
& I40E_PFQF_CTL_1_CLEARFDTABLE_MASK
) {
8326 dev_warn(&pf
->pdev
->dev
, "FD table did not flush, needs more time\n");
8328 /* replay sideband filters */
8329 i40e_fdir_filter_restore(pf
->vsi
[pf
->lan_vsi
]);
8330 if (!disable_atr
&& !pf
->fd_tcp4_filter_cnt
)
8331 clear_bit(__I40E_FD_ATR_AUTO_DISABLED
, pf
->state
);
8332 clear_bit(__I40E_FD_FLUSH_REQUESTED
, pf
->state
);
8333 if (I40E_DEBUG_FD
& pf
->hw
.debug_mask
)
8334 dev_info(&pf
->pdev
->dev
, "FD Filter table flushed and FD-SB replayed.\n");
8339 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
8340 * @pf: board private structure
8342 u32
i40e_get_current_atr_cnt(struct i40e_pf
*pf
)
8344 return i40e_get_current_fd_count(pf
) - pf
->fdir_pf_active_filters
;
8347 /* We can see up to 256 filter programming desc in transit if the filters are
8348 * being applied really fast; before we see the first
8349 * filter miss error on Rx queue 0. Accumulating enough error messages before
8350 * reacting will make sure we don't cause flush too often.
8352 #define I40E_MAX_FD_PROGRAM_ERROR 256
8355 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
8356 * @pf: board private structure
8358 static void i40e_fdir_reinit_subtask(struct i40e_pf
*pf
)
8361 /* if interface is down do nothing */
8362 if (test_bit(__I40E_DOWN
, pf
->state
))
8365 if (test_bit(__I40E_FD_FLUSH_REQUESTED
, pf
->state
))
8366 i40e_fdir_flush_and_replay(pf
);
8368 i40e_fdir_check_and_reenable(pf
);
8373 * i40e_vsi_link_event - notify VSI of a link event
8374 * @vsi: vsi to be notified
8375 * @link_up: link up or down
8377 static void i40e_vsi_link_event(struct i40e_vsi
*vsi
, bool link_up
)
8379 if (!vsi
|| test_bit(__I40E_VSI_DOWN
, vsi
->state
))
8382 switch (vsi
->type
) {
8384 if (!vsi
->netdev
|| !vsi
->netdev_registered
)
8388 netif_carrier_on(vsi
->netdev
);
8389 netif_tx_wake_all_queues(vsi
->netdev
);
8391 netif_carrier_off(vsi
->netdev
);
8392 netif_tx_stop_all_queues(vsi
->netdev
);
8396 case I40E_VSI_SRIOV
:
8397 case I40E_VSI_VMDQ2
:
8399 case I40E_VSI_IWARP
:
8400 case I40E_VSI_MIRROR
:
8402 /* there is no notification for other VSIs */
8408 * i40e_veb_link_event - notify elements on the veb of a link event
8409 * @veb: veb to be notified
8410 * @link_up: link up or down
8412 static void i40e_veb_link_event(struct i40e_veb
*veb
, bool link_up
)
8417 if (!veb
|| !veb
->pf
)
8421 /* depth first... */
8422 for (i
= 0; i
< I40E_MAX_VEB
; i
++)
8423 if (pf
->veb
[i
] && (pf
->veb
[i
]->uplink_seid
== veb
->seid
))
8424 i40e_veb_link_event(pf
->veb
[i
], link_up
);
8426 /* ... now the local VSIs */
8427 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++)
8428 if (pf
->vsi
[i
] && (pf
->vsi
[i
]->uplink_seid
== veb
->seid
))
8429 i40e_vsi_link_event(pf
->vsi
[i
], link_up
);
8433 * i40e_link_event - Update netif_carrier status
8434 * @pf: board private structure
8436 static void i40e_link_event(struct i40e_pf
*pf
)
8438 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
8439 u8 new_link_speed
, old_link_speed
;
8441 bool new_link
, old_link
;
8443 /* save off old link status information */
8444 pf
->hw
.phy
.link_info_old
= pf
->hw
.phy
.link_info
;
8446 /* set this to force the get_link_status call to refresh state */
8447 pf
->hw
.phy
.get_link_info
= true;
8449 old_link
= (pf
->hw
.phy
.link_info_old
.link_info
& I40E_AQ_LINK_UP
);
8451 status
= i40e_get_link_status(&pf
->hw
, &new_link
);
8453 /* On success, disable temp link polling */
8454 if (status
== I40E_SUCCESS
) {
8455 clear_bit(__I40E_TEMP_LINK_POLLING
, pf
->state
);
8457 /* Enable link polling temporarily until i40e_get_link_status
8458 * returns I40E_SUCCESS
8460 set_bit(__I40E_TEMP_LINK_POLLING
, pf
->state
);
8461 dev_dbg(&pf
->pdev
->dev
, "couldn't get link state, status: %d\n",
8466 old_link_speed
= pf
->hw
.phy
.link_info_old
.link_speed
;
8467 new_link_speed
= pf
->hw
.phy
.link_info
.link_speed
;
8469 if (new_link
== old_link
&&
8470 new_link_speed
== old_link_speed
&&
8471 (test_bit(__I40E_VSI_DOWN
, vsi
->state
) ||
8472 new_link
== netif_carrier_ok(vsi
->netdev
)))
8475 i40e_print_link_message(vsi
, new_link
);
8477 /* Notify the base of the switch tree connected to
8478 * the link. Floating VEBs are not notified.
8480 if (pf
->lan_veb
!= I40E_NO_VEB
&& pf
->veb
[pf
->lan_veb
])
8481 i40e_veb_link_event(pf
->veb
[pf
->lan_veb
], new_link
);
8483 i40e_vsi_link_event(vsi
, new_link
);
8486 i40e_vc_notify_link_state(pf
);
8488 if (pf
->flags
& I40E_FLAG_PTP
)
8489 i40e_ptp_set_increment(pf
);
8493 * i40e_watchdog_subtask - periodic checks not using event driven response
8494 * @pf: board private structure
8496 static void i40e_watchdog_subtask(struct i40e_pf
*pf
)
8500 /* if interface is down do nothing */
8501 if (test_bit(__I40E_DOWN
, pf
->state
) ||
8502 test_bit(__I40E_CONFIG_BUSY
, pf
->state
))
8505 /* make sure we don't do these things too often */
8506 if (time_before(jiffies
, (pf
->service_timer_previous
+
8507 pf
->service_timer_period
)))
8509 pf
->service_timer_previous
= jiffies
;
8511 if ((pf
->flags
& I40E_FLAG_LINK_POLLING_ENABLED
) ||
8512 test_bit(__I40E_TEMP_LINK_POLLING
, pf
->state
))
8513 i40e_link_event(pf
);
8515 /* Update the stats for active netdevs so the network stack
8516 * can look at updated numbers whenever it cares to
8518 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++)
8519 if (pf
->vsi
[i
] && pf
->vsi
[i
]->netdev
)
8520 i40e_update_stats(pf
->vsi
[i
]);
8522 if (pf
->flags
& I40E_FLAG_VEB_STATS_ENABLED
) {
8523 /* Update the stats for the active switching components */
8524 for (i
= 0; i
< I40E_MAX_VEB
; i
++)
8526 i40e_update_veb_stats(pf
->veb
[i
]);
8529 i40e_ptp_rx_hang(pf
);
8530 i40e_ptp_tx_hang(pf
);
8534 * i40e_reset_subtask - Set up for resetting the device and driver
8535 * @pf: board private structure
8537 static void i40e_reset_subtask(struct i40e_pf
*pf
)
8539 u32 reset_flags
= 0;
8541 if (test_bit(__I40E_REINIT_REQUESTED
, pf
->state
)) {
8542 reset_flags
|= BIT(__I40E_REINIT_REQUESTED
);
8543 clear_bit(__I40E_REINIT_REQUESTED
, pf
->state
);
8545 if (test_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
)) {
8546 reset_flags
|= BIT(__I40E_PF_RESET_REQUESTED
);
8547 clear_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
);
8549 if (test_bit(__I40E_CORE_RESET_REQUESTED
, pf
->state
)) {
8550 reset_flags
|= BIT(__I40E_CORE_RESET_REQUESTED
);
8551 clear_bit(__I40E_CORE_RESET_REQUESTED
, pf
->state
);
8553 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED
, pf
->state
)) {
8554 reset_flags
|= BIT(__I40E_GLOBAL_RESET_REQUESTED
);
8555 clear_bit(__I40E_GLOBAL_RESET_REQUESTED
, pf
->state
);
8557 if (test_bit(__I40E_DOWN_REQUESTED
, pf
->state
)) {
8558 reset_flags
|= BIT(__I40E_DOWN_REQUESTED
);
8559 clear_bit(__I40E_DOWN_REQUESTED
, pf
->state
);
8562 /* If there's a recovery already waiting, it takes
8563 * precedence before starting a new reset sequence.
8565 if (test_bit(__I40E_RESET_INTR_RECEIVED
, pf
->state
)) {
8566 i40e_prep_for_reset(pf
, false);
8568 i40e_rebuild(pf
, false, false);
8571 /* If we're already down or resetting, just bail */
8573 !test_bit(__I40E_DOWN
, pf
->state
) &&
8574 !test_bit(__I40E_CONFIG_BUSY
, pf
->state
)) {
8575 i40e_do_reset(pf
, reset_flags
, false);
8580 * i40e_handle_link_event - Handle link event
8581 * @pf: board private structure
8582 * @e: event info posted on ARQ
8584 static void i40e_handle_link_event(struct i40e_pf
*pf
,
8585 struct i40e_arq_event_info
*e
)
8587 struct i40e_aqc_get_link_status
*status
=
8588 (struct i40e_aqc_get_link_status
*)&e
->desc
.params
.raw
;
8590 /* Do a new status request to re-enable LSE reporting
8591 * and load new status information into the hw struct
8592 * This completely ignores any state information
8593 * in the ARQ event info, instead choosing to always
8594 * issue the AQ update link status command.
8596 i40e_link_event(pf
);
8598 /* Check if module meets thermal requirements */
8599 if (status
->phy_type
== I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP
) {
8600 dev_err(&pf
->pdev
->dev
,
8601 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
8602 dev_err(&pf
->pdev
->dev
,
8603 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
8605 /* check for unqualified module, if link is down, suppress
8606 * the message if link was forced to be down.
8608 if ((status
->link_info
& I40E_AQ_MEDIA_AVAILABLE
) &&
8609 (!(status
->an_info
& I40E_AQ_QUALIFIED_MODULE
)) &&
8610 (!(status
->link_info
& I40E_AQ_LINK_UP
)) &&
8611 (!(pf
->flags
& I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED
))) {
8612 dev_err(&pf
->pdev
->dev
,
8613 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
8614 dev_err(&pf
->pdev
->dev
,
8615 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
8621 * i40e_clean_adminq_subtask - Clean the AdminQ rings
8622 * @pf: board private structure
8624 static void i40e_clean_adminq_subtask(struct i40e_pf
*pf
)
8626 struct i40e_arq_event_info event
;
8627 struct i40e_hw
*hw
= &pf
->hw
;
8634 /* Do not run clean AQ when PF reset fails */
8635 if (test_bit(__I40E_RESET_FAILED
, pf
->state
))
8638 /* check for error indications */
8639 val
= rd32(&pf
->hw
, pf
->hw
.aq
.arq
.len
);
8641 if (val
& I40E_PF_ARQLEN_ARQVFE_MASK
) {
8642 if (hw
->debug_mask
& I40E_DEBUG_AQ
)
8643 dev_info(&pf
->pdev
->dev
, "ARQ VF Error detected\n");
8644 val
&= ~I40E_PF_ARQLEN_ARQVFE_MASK
;
8646 if (val
& I40E_PF_ARQLEN_ARQOVFL_MASK
) {
8647 if (hw
->debug_mask
& I40E_DEBUG_AQ
)
8648 dev_info(&pf
->pdev
->dev
, "ARQ Overflow Error detected\n");
8649 val
&= ~I40E_PF_ARQLEN_ARQOVFL_MASK
;
8650 pf
->arq_overflows
++;
8652 if (val
& I40E_PF_ARQLEN_ARQCRIT_MASK
) {
8653 if (hw
->debug_mask
& I40E_DEBUG_AQ
)
8654 dev_info(&pf
->pdev
->dev
, "ARQ Critical Error detected\n");
8655 val
&= ~I40E_PF_ARQLEN_ARQCRIT_MASK
;
8658 wr32(&pf
->hw
, pf
->hw
.aq
.arq
.len
, val
);
8660 val
= rd32(&pf
->hw
, pf
->hw
.aq
.asq
.len
);
8662 if (val
& I40E_PF_ATQLEN_ATQVFE_MASK
) {
8663 if (pf
->hw
.debug_mask
& I40E_DEBUG_AQ
)
8664 dev_info(&pf
->pdev
->dev
, "ASQ VF Error detected\n");
8665 val
&= ~I40E_PF_ATQLEN_ATQVFE_MASK
;
8667 if (val
& I40E_PF_ATQLEN_ATQOVFL_MASK
) {
8668 if (pf
->hw
.debug_mask
& I40E_DEBUG_AQ
)
8669 dev_info(&pf
->pdev
->dev
, "ASQ Overflow Error detected\n");
8670 val
&= ~I40E_PF_ATQLEN_ATQOVFL_MASK
;
8672 if (val
& I40E_PF_ATQLEN_ATQCRIT_MASK
) {
8673 if (pf
->hw
.debug_mask
& I40E_DEBUG_AQ
)
8674 dev_info(&pf
->pdev
->dev
, "ASQ Critical Error detected\n");
8675 val
&= ~I40E_PF_ATQLEN_ATQCRIT_MASK
;
8678 wr32(&pf
->hw
, pf
->hw
.aq
.asq
.len
, val
);
8680 event
.buf_len
= I40E_MAX_AQ_BUF_SIZE
;
8681 event
.msg_buf
= kzalloc(event
.buf_len
, GFP_KERNEL
);
8686 ret
= i40e_clean_arq_element(hw
, &event
, &pending
);
8687 if (ret
== I40E_ERR_ADMIN_QUEUE_NO_WORK
)
8690 dev_info(&pf
->pdev
->dev
, "ARQ event error %d\n", ret
);
8694 opcode
= le16_to_cpu(event
.desc
.opcode
);
8697 case i40e_aqc_opc_get_link_status
:
8698 i40e_handle_link_event(pf
, &event
);
8700 case i40e_aqc_opc_send_msg_to_pf
:
8701 ret
= i40e_vc_process_vf_msg(pf
,
8702 le16_to_cpu(event
.desc
.retval
),
8703 le32_to_cpu(event
.desc
.cookie_high
),
8704 le32_to_cpu(event
.desc
.cookie_low
),
8708 case i40e_aqc_opc_lldp_update_mib
:
8709 dev_dbg(&pf
->pdev
->dev
, "ARQ: Update LLDP MIB event received\n");
8710 #ifdef CONFIG_I40E_DCB
8712 ret
= i40e_handle_lldp_event(pf
, &event
);
8714 #endif /* CONFIG_I40E_DCB */
8716 case i40e_aqc_opc_event_lan_overflow
:
8717 dev_dbg(&pf
->pdev
->dev
, "ARQ LAN queue overflow event received\n");
8718 i40e_handle_lan_overflow_event(pf
, &event
);
8720 case i40e_aqc_opc_send_msg_to_peer
:
8721 dev_info(&pf
->pdev
->dev
, "ARQ: Msg from other pf\n");
8723 case i40e_aqc_opc_nvm_erase
:
8724 case i40e_aqc_opc_nvm_update
:
8725 case i40e_aqc_opc_oem_post_update
:
8726 i40e_debug(&pf
->hw
, I40E_DEBUG_NVM
,
8727 "ARQ NVM operation 0x%04x completed\n",
8731 dev_info(&pf
->pdev
->dev
,
8732 "ARQ: Unknown event 0x%04x ignored\n",
8736 } while (i
++ < pf
->adminq_work_limit
);
8738 if (i
< pf
->adminq_work_limit
)
8739 clear_bit(__I40E_ADMINQ_EVENT_PENDING
, pf
->state
);
8741 /* re-enable Admin queue interrupt cause */
8742 val
= rd32(hw
, I40E_PFINT_ICR0_ENA
);
8743 val
|= I40E_PFINT_ICR0_ENA_ADMINQ_MASK
;
8744 wr32(hw
, I40E_PFINT_ICR0_ENA
, val
);
8747 kfree(event
.msg_buf
);
8751 * i40e_verify_eeprom - make sure eeprom is good to use
8752 * @pf: board private structure
8754 static void i40e_verify_eeprom(struct i40e_pf
*pf
)
8758 err
= i40e_diag_eeprom_test(&pf
->hw
);
8760 /* retry in case of garbage read */
8761 err
= i40e_diag_eeprom_test(&pf
->hw
);
8763 dev_info(&pf
->pdev
->dev
, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
8765 set_bit(__I40E_BAD_EEPROM
, pf
->state
);
8769 if (!err
&& test_bit(__I40E_BAD_EEPROM
, pf
->state
)) {
8770 dev_info(&pf
->pdev
->dev
, "eeprom check passed, Tx/Rx traffic enabled\n");
8771 clear_bit(__I40E_BAD_EEPROM
, pf
->state
);
8776 * i40e_enable_pf_switch_lb
8777 * @pf: pointer to the PF structure
8779 * enable switch loop back or die - no point in a return value
8781 static void i40e_enable_pf_switch_lb(struct i40e_pf
*pf
)
8783 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
8784 struct i40e_vsi_context ctxt
;
8787 ctxt
.seid
= pf
->main_vsi_seid
;
8788 ctxt
.pf_num
= pf
->hw
.pf_id
;
8790 ret
= i40e_aq_get_vsi_params(&pf
->hw
, &ctxt
, NULL
);
8792 dev_info(&pf
->pdev
->dev
,
8793 "couldn't get PF vsi config, err %s aq_err %s\n",
8794 i40e_stat_str(&pf
->hw
, ret
),
8795 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
8798 ctxt
.flags
= I40E_AQ_VSI_TYPE_PF
;
8799 ctxt
.info
.valid_sections
= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
8800 ctxt
.info
.switch_id
|= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB
);
8802 ret
= i40e_aq_update_vsi_params(&vsi
->back
->hw
, &ctxt
, NULL
);
8804 dev_info(&pf
->pdev
->dev
,
8805 "update vsi switch failed, err %s aq_err %s\n",
8806 i40e_stat_str(&pf
->hw
, ret
),
8807 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
8812 * i40e_disable_pf_switch_lb
8813 * @pf: pointer to the PF structure
8815 * disable switch loop back or die - no point in a return value
8817 static void i40e_disable_pf_switch_lb(struct i40e_pf
*pf
)
8819 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
8820 struct i40e_vsi_context ctxt
;
8823 ctxt
.seid
= pf
->main_vsi_seid
;
8824 ctxt
.pf_num
= pf
->hw
.pf_id
;
8826 ret
= i40e_aq_get_vsi_params(&pf
->hw
, &ctxt
, NULL
);
8828 dev_info(&pf
->pdev
->dev
,
8829 "couldn't get PF vsi config, err %s aq_err %s\n",
8830 i40e_stat_str(&pf
->hw
, ret
),
8831 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
8834 ctxt
.flags
= I40E_AQ_VSI_TYPE_PF
;
8835 ctxt
.info
.valid_sections
= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
8836 ctxt
.info
.switch_id
&= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB
);
8838 ret
= i40e_aq_update_vsi_params(&vsi
->back
->hw
, &ctxt
, NULL
);
8840 dev_info(&pf
->pdev
->dev
,
8841 "update vsi switch failed, err %s aq_err %s\n",
8842 i40e_stat_str(&pf
->hw
, ret
),
8843 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
8848 * i40e_config_bridge_mode - Configure the HW bridge mode
8849 * @veb: pointer to the bridge instance
8851 * Configure the loop back mode for the LAN VSI that is downlink to the
8852 * specified HW bridge instance. It is expected this function is called
8853 * when a new HW bridge is instantiated.
8855 static void i40e_config_bridge_mode(struct i40e_veb
*veb
)
8857 struct i40e_pf
*pf
= veb
->pf
;
8859 if (pf
->hw
.debug_mask
& I40E_DEBUG_LAN
)
8860 dev_info(&pf
->pdev
->dev
, "enabling bridge mode: %s\n",
8861 veb
->bridge_mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
8862 if (veb
->bridge_mode
& BRIDGE_MODE_VEPA
)
8863 i40e_disable_pf_switch_lb(pf
);
8865 i40e_enable_pf_switch_lb(pf
);
8869 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
8870 * @veb: pointer to the VEB instance
8872 * This is a recursive function that first builds the attached VSIs then
8873 * recurses in to build the next layer of VEB. We track the connections
8874 * through our own index numbers because the seid's from the HW could
8875 * change across the reset.
8877 static int i40e_reconstitute_veb(struct i40e_veb
*veb
)
8879 struct i40e_vsi
*ctl_vsi
= NULL
;
8880 struct i40e_pf
*pf
= veb
->pf
;
8884 /* build VSI that owns this VEB, temporarily attached to base VEB */
8885 for (v
= 0; v
< pf
->num_alloc_vsi
&& !ctl_vsi
; v
++) {
8887 pf
->vsi
[v
]->veb_idx
== veb
->idx
&&
8888 pf
->vsi
[v
]->flags
& I40E_VSI_FLAG_VEB_OWNER
) {
8889 ctl_vsi
= pf
->vsi
[v
];
8894 dev_info(&pf
->pdev
->dev
,
8895 "missing owner VSI for veb_idx %d\n", veb
->idx
);
8897 goto end_reconstitute
;
8899 if (ctl_vsi
!= pf
->vsi
[pf
->lan_vsi
])
8900 ctl_vsi
->uplink_seid
= pf
->vsi
[pf
->lan_vsi
]->uplink_seid
;
8901 ret
= i40e_add_vsi(ctl_vsi
);
8903 dev_info(&pf
->pdev
->dev
,
8904 "rebuild of veb_idx %d owner VSI failed: %d\n",
8906 goto end_reconstitute
;
8908 i40e_vsi_reset_stats(ctl_vsi
);
8910 /* create the VEB in the switch and move the VSI onto the VEB */
8911 ret
= i40e_add_veb(veb
, ctl_vsi
);
8913 goto end_reconstitute
;
8915 if (pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
)
8916 veb
->bridge_mode
= BRIDGE_MODE_VEB
;
8918 veb
->bridge_mode
= BRIDGE_MODE_VEPA
;
8919 i40e_config_bridge_mode(veb
);
8921 /* create the remaining VSIs attached to this VEB */
8922 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
8923 if (!pf
->vsi
[v
] || pf
->vsi
[v
] == ctl_vsi
)
8926 if (pf
->vsi
[v
]->veb_idx
== veb
->idx
) {
8927 struct i40e_vsi
*vsi
= pf
->vsi
[v
];
8929 vsi
->uplink_seid
= veb
->seid
;
8930 ret
= i40e_add_vsi(vsi
);
8932 dev_info(&pf
->pdev
->dev
,
8933 "rebuild of vsi_idx %d failed: %d\n",
8935 goto end_reconstitute
;
8937 i40e_vsi_reset_stats(vsi
);
8941 /* create any VEBs attached to this VEB - RECURSION */
8942 for (veb_idx
= 0; veb_idx
< I40E_MAX_VEB
; veb_idx
++) {
8943 if (pf
->veb
[veb_idx
] && pf
->veb
[veb_idx
]->veb_idx
== veb
->idx
) {
8944 pf
->veb
[veb_idx
]->uplink_seid
= veb
->seid
;
8945 ret
= i40e_reconstitute_veb(pf
->veb
[veb_idx
]);
8956 * i40e_get_capabilities - get info about the HW
8957 * @pf: the PF struct
8959 static int i40e_get_capabilities(struct i40e_pf
*pf
,
8960 enum i40e_admin_queue_opc list_type
)
8962 struct i40e_aqc_list_capabilities_element_resp
*cap_buf
;
8967 buf_len
= 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp
);
8969 cap_buf
= kzalloc(buf_len
, GFP_KERNEL
);
8973 /* this loads the data into the hw struct for us */
8974 err
= i40e_aq_discover_capabilities(&pf
->hw
, cap_buf
, buf_len
,
8975 &data_size
, list_type
,
8977 /* data loaded, buffer no longer needed */
8980 if (pf
->hw
.aq
.asq_last_status
== I40E_AQ_RC_ENOMEM
) {
8981 /* retry with a larger buffer */
8982 buf_len
= data_size
;
8983 } else if (pf
->hw
.aq
.asq_last_status
!= I40E_AQ_RC_OK
) {
8984 dev_info(&pf
->pdev
->dev
,
8985 "capability discovery failed, err %s aq_err %s\n",
8986 i40e_stat_str(&pf
->hw
, err
),
8987 i40e_aq_str(&pf
->hw
,
8988 pf
->hw
.aq
.asq_last_status
));
8993 if (pf
->hw
.debug_mask
& I40E_DEBUG_USER
) {
8994 if (list_type
== i40e_aqc_opc_list_func_capabilities
) {
8995 dev_info(&pf
->pdev
->dev
,
8996 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
8997 pf
->hw
.pf_id
, pf
->hw
.func_caps
.num_vfs
,
8998 pf
->hw
.func_caps
.num_msix_vectors
,
8999 pf
->hw
.func_caps
.num_msix_vectors_vf
,
9000 pf
->hw
.func_caps
.fd_filters_guaranteed
,
9001 pf
->hw
.func_caps
.fd_filters_best_effort
,
9002 pf
->hw
.func_caps
.num_tx_qp
,
9003 pf
->hw
.func_caps
.num_vsis
);
9004 } else if (list_type
== i40e_aqc_opc_list_dev_capabilities
) {
9005 dev_info(&pf
->pdev
->dev
,
9006 "switch_mode=0x%04x, function_valid=0x%08x\n",
9007 pf
->hw
.dev_caps
.switch_mode
,
9008 pf
->hw
.dev_caps
.valid_functions
);
9009 dev_info(&pf
->pdev
->dev
,
9010 "SR-IOV=%d, num_vfs for all function=%u\n",
9011 pf
->hw
.dev_caps
.sr_iov_1_1
,
9012 pf
->hw
.dev_caps
.num_vfs
);
9013 dev_info(&pf
->pdev
->dev
,
9014 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
9015 pf
->hw
.dev_caps
.num_vsis
,
9016 pf
->hw
.dev_caps
.num_rx_qp
,
9017 pf
->hw
.dev_caps
.num_tx_qp
);
9020 if (list_type
== i40e_aqc_opc_list_func_capabilities
) {
9021 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
9022 + pf->hw.func_caps.num_vfs)
9023 if (pf
->hw
.revision_id
== 0 &&
9024 pf
->hw
.func_caps
.num_vsis
< DEF_NUM_VSI
) {
9025 dev_info(&pf
->pdev
->dev
,
9026 "got num_vsis %d, setting num_vsis to %d\n",
9027 pf
->hw
.func_caps
.num_vsis
, DEF_NUM_VSI
);
9028 pf
->hw
.func_caps
.num_vsis
= DEF_NUM_VSI
;
9034 static int i40e_vsi_clear(struct i40e_vsi
*vsi
);
9037 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
9038 * @pf: board private structure
9040 static void i40e_fdir_sb_setup(struct i40e_pf
*pf
)
9042 struct i40e_vsi
*vsi
;
9044 /* quick workaround for an NVM issue that leaves a critical register
9047 if (!rd32(&pf
->hw
, I40E_GLQF_HKEY(0))) {
9048 static const u32 hkey
[] = {
9049 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
9050 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
9051 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
9055 for (i
= 0; i
<= I40E_GLQF_HKEY_MAX_INDEX
; i
++)
9056 wr32(&pf
->hw
, I40E_GLQF_HKEY(i
), hkey
[i
]);
9059 if (!(pf
->flags
& I40E_FLAG_FD_SB_ENABLED
))
9062 /* find existing VSI and see if it needs configuring */
9063 vsi
= i40e_find_vsi_by_type(pf
, I40E_VSI_FDIR
);
9065 /* create a new VSI if none exists */
9067 vsi
= i40e_vsi_setup(pf
, I40E_VSI_FDIR
,
9068 pf
->vsi
[pf
->lan_vsi
]->seid
, 0);
9070 dev_info(&pf
->pdev
->dev
, "Couldn't create FDir VSI\n");
9071 pf
->flags
&= ~I40E_FLAG_FD_SB_ENABLED
;
9072 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
9077 i40e_vsi_setup_irqhandler(vsi
, i40e_fdir_clean_ring
);
9081 * i40e_fdir_teardown - release the Flow Director resources
9082 * @pf: board private structure
9084 static void i40e_fdir_teardown(struct i40e_pf
*pf
)
9086 struct i40e_vsi
*vsi
;
9088 i40e_fdir_filter_exit(pf
);
9089 vsi
= i40e_find_vsi_by_type(pf
, I40E_VSI_FDIR
);
9091 i40e_vsi_release(vsi
);
9095 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
9097 * @seid: seid of main or channel VSIs
9099 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
9100 * existed before reset
9102 static int i40e_rebuild_cloud_filters(struct i40e_vsi
*vsi
, u16 seid
)
9104 struct i40e_cloud_filter
*cfilter
;
9105 struct i40e_pf
*pf
= vsi
->back
;
9106 struct hlist_node
*node
;
9109 /* Add cloud filters back if they exist */
9110 hlist_for_each_entry_safe(cfilter
, node
, &pf
->cloud_filter_list
,
9112 if (cfilter
->seid
!= seid
)
9115 if (cfilter
->dst_port
)
9116 ret
= i40e_add_del_cloud_filter_big_buf(vsi
, cfilter
,
9119 ret
= i40e_add_del_cloud_filter(vsi
, cfilter
, true);
9122 dev_dbg(&pf
->pdev
->dev
,
9123 "Failed to rebuild cloud filter, err %s aq_err %s\n",
9124 i40e_stat_str(&pf
->hw
, ret
),
9125 i40e_aq_str(&pf
->hw
,
9126 pf
->hw
.aq
.asq_last_status
));
9134 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
9137 * Rebuilds channel VSIs if they existed before reset
9139 static int i40e_rebuild_channels(struct i40e_vsi
*vsi
)
9141 struct i40e_channel
*ch
, *ch_tmp
;
9144 if (list_empty(&vsi
->ch_list
))
9147 list_for_each_entry_safe(ch
, ch_tmp
, &vsi
->ch_list
, list
) {
9148 if (!ch
->initialized
)
9150 /* Proceed with creation of channel (VMDq2) VSI */
9151 ret
= i40e_add_channel(vsi
->back
, vsi
->uplink_seid
, ch
);
9153 dev_info(&vsi
->back
->pdev
->dev
,
9154 "failed to rebuild channels using uplink_seid %u\n",
9158 /* Reconfigure TX queues using QTX_CTL register */
9159 ret
= i40e_channel_config_tx_ring(vsi
->back
, vsi
, ch
);
9161 dev_info(&vsi
->back
->pdev
->dev
,
9162 "failed to configure TX rings for channel %u\n",
9166 /* update 'next_base_queue' */
9167 vsi
->next_base_queue
= vsi
->next_base_queue
+
9168 ch
->num_queue_pairs
;
9169 if (ch
->max_tx_rate
) {
9170 u64 credits
= ch
->max_tx_rate
;
9172 if (i40e_set_bw_limit(vsi
, ch
->seid
,
9176 do_div(credits
, I40E_BW_CREDIT_DIVISOR
);
9177 dev_dbg(&vsi
->back
->pdev
->dev
,
9178 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9183 ret
= i40e_rebuild_cloud_filters(vsi
, ch
->seid
);
9185 dev_dbg(&vsi
->back
->pdev
->dev
,
9186 "Failed to rebuild cloud filters for channel VSI %u\n",
9195 * i40e_prep_for_reset - prep for the core to reset
9196 * @pf: board private structure
9197 * @lock_acquired: indicates whether or not the lock has been acquired
9198 * before this function was called.
9200 * Close up the VFs and other things in prep for PF Reset.
9202 static void i40e_prep_for_reset(struct i40e_pf
*pf
, bool lock_acquired
)
9204 struct i40e_hw
*hw
= &pf
->hw
;
9205 i40e_status ret
= 0;
9208 clear_bit(__I40E_RESET_INTR_RECEIVED
, pf
->state
);
9209 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
))
9211 if (i40e_check_asq_alive(&pf
->hw
))
9212 i40e_vc_notify_reset(pf
);
9214 dev_dbg(&pf
->pdev
->dev
, "Tearing down internal switch for reset\n");
9216 /* quiesce the VSIs and their queues that are not already DOWN */
9217 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
9220 i40e_pf_quiesce_all_vsi(pf
);
9224 for (v
= 0; v
< pf
->num_alloc_vsi
; v
++) {
9226 pf
->vsi
[v
]->seid
= 0;
9229 i40e_shutdown_adminq(&pf
->hw
);
9231 /* call shutdown HMC */
9232 if (hw
->hmc
.hmc_obj
) {
9233 ret
= i40e_shutdown_lan_hmc(hw
);
9235 dev_warn(&pf
->pdev
->dev
,
9236 "shutdown_lan_hmc failed: %d\n", ret
);
9241 * i40e_send_version - update firmware with driver version
9244 static void i40e_send_version(struct i40e_pf
*pf
)
9246 struct i40e_driver_version dv
;
9248 dv
.major_version
= DRV_VERSION_MAJOR
;
9249 dv
.minor_version
= DRV_VERSION_MINOR
;
9250 dv
.build_version
= DRV_VERSION_BUILD
;
9251 dv
.subbuild_version
= 0;
9252 strlcpy(dv
.driver_string
, DRV_VERSION
, sizeof(dv
.driver_string
));
9253 i40e_aq_send_driver_version(&pf
->hw
, &dv
, NULL
);
9257 * i40e_get_oem_version - get OEM specific version information
9258 * @hw: pointer to the hardware structure
9260 static void i40e_get_oem_version(struct i40e_hw
*hw
)
9262 u16 block_offset
= 0xffff;
9263 u16 block_length
= 0;
9264 u16 capabilities
= 0;
9268 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
9269 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
9270 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
9271 #define I40E_NVM_OEM_GEN_OFFSET 0x02
9272 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
9273 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
9274 #define I40E_NVM_OEM_LENGTH 3
9276 /* Check if pointer to OEM version block is valid. */
9277 i40e_read_nvm_word(hw
, I40E_SR_NVM_OEM_VERSION_PTR
, &block_offset
);
9278 if (block_offset
== 0xffff)
9281 /* Check if OEM version block has correct length. */
9282 i40e_read_nvm_word(hw
, block_offset
+ I40E_NVM_OEM_LENGTH_OFFSET
,
9284 if (block_length
< I40E_NVM_OEM_LENGTH
)
9287 /* Check if OEM version format is as expected. */
9288 i40e_read_nvm_word(hw
, block_offset
+ I40E_NVM_OEM_CAPABILITIES_OFFSET
,
9290 if ((capabilities
& I40E_NVM_OEM_CAPABILITIES_MASK
) != 0)
9293 i40e_read_nvm_word(hw
, block_offset
+ I40E_NVM_OEM_GEN_OFFSET
,
9295 i40e_read_nvm_word(hw
, block_offset
+ I40E_NVM_OEM_RELEASE_OFFSET
,
9297 hw
->nvm
.oem_ver
= (gen_snap
<< I40E_OEM_SNAP_SHIFT
) | release
;
9298 hw
->nvm
.eetrack
= I40E_OEM_EETRACK_ID
;
9302 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
9303 * @pf: board private structure
9305 static int i40e_reset(struct i40e_pf
*pf
)
9307 struct i40e_hw
*hw
= &pf
->hw
;
9310 ret
= i40e_pf_reset(hw
);
9312 dev_info(&pf
->pdev
->dev
, "PF reset failed, %d\n", ret
);
9313 set_bit(__I40E_RESET_FAILED
, pf
->state
);
9314 clear_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
);
9322 * i40e_rebuild - rebuild using a saved config
9323 * @pf: board private structure
9324 * @reinit: if the Main VSI needs to re-initialized.
9325 * @lock_acquired: indicates whether or not the lock has been acquired
9326 * before this function was called.
9328 static void i40e_rebuild(struct i40e_pf
*pf
, bool reinit
, bool lock_acquired
)
9330 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
9331 struct i40e_hw
*hw
= &pf
->hw
;
9332 u8 set_fc_aq_fail
= 0;
9337 if (test_bit(__I40E_DOWN
, pf
->state
))
9338 goto clear_recovery
;
9339 dev_dbg(&pf
->pdev
->dev
, "Rebuilding internal switch\n");
9341 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
9342 ret
= i40e_init_adminq(&pf
->hw
);
9344 dev_info(&pf
->pdev
->dev
, "Rebuild AdminQ failed, err %s aq_err %s\n",
9345 i40e_stat_str(&pf
->hw
, ret
),
9346 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
9347 goto clear_recovery
;
9349 i40e_get_oem_version(&pf
->hw
);
9351 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED
, pf
->state
) &&
9352 ((hw
->aq
.fw_maj_ver
== 4 && hw
->aq
.fw_min_ver
<= 33) ||
9353 hw
->aq
.fw_maj_ver
< 4) && hw
->mac
.type
== I40E_MAC_XL710
) {
9354 /* The following delay is necessary for 4.33 firmware and older
9355 * to recover after EMP reset. 200 ms should suffice but we
9356 * put here 300 ms to be sure that FW is ready to operate
9362 /* re-verify the eeprom if we just had an EMP reset */
9363 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED
, pf
->state
))
9364 i40e_verify_eeprom(pf
);
9366 i40e_clear_pxe_mode(hw
);
9367 ret
= i40e_get_capabilities(pf
, i40e_aqc_opc_list_func_capabilities
);
9369 goto end_core_reset
;
9371 ret
= i40e_init_lan_hmc(hw
, hw
->func_caps
.num_tx_qp
,
9372 hw
->func_caps
.num_rx_qp
, 0, 0);
9374 dev_info(&pf
->pdev
->dev
, "init_lan_hmc failed: %d\n", ret
);
9375 goto end_core_reset
;
9377 ret
= i40e_configure_lan_hmc(hw
, I40E_HMC_MODEL_DIRECT_ONLY
);
9379 dev_info(&pf
->pdev
->dev
, "configure_lan_hmc failed: %d\n", ret
);
9380 goto end_core_reset
;
9383 /* Enable FW to write a default DCB config on link-up */
9384 i40e_aq_set_dcb_parameters(hw
, true, NULL
);
9386 #ifdef CONFIG_I40E_DCB
9387 ret
= i40e_init_pf_dcb(pf
);
9389 dev_info(&pf
->pdev
->dev
, "DCB init failed %d, disabled\n", ret
);
9390 pf
->flags
&= ~I40E_FLAG_DCB_CAPABLE
;
9391 /* Continue without DCB enabled */
9393 #endif /* CONFIG_I40E_DCB */
9394 /* do basic switch setup */
9397 ret
= i40e_setup_pf_switch(pf
, reinit
);
9401 /* The driver only wants link up/down and module qualification
9402 * reports from firmware. Note the negative logic.
9404 ret
= i40e_aq_set_phy_int_mask(&pf
->hw
,
9405 ~(I40E_AQ_EVENT_LINK_UPDOWN
|
9406 I40E_AQ_EVENT_MEDIA_NA
|
9407 I40E_AQ_EVENT_MODULE_QUAL_FAIL
), NULL
);
9409 dev_info(&pf
->pdev
->dev
, "set phy mask fail, err %s aq_err %s\n",
9410 i40e_stat_str(&pf
->hw
, ret
),
9411 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
9413 /* make sure our flow control settings are restored */
9414 ret
= i40e_set_fc(&pf
->hw
, &set_fc_aq_fail
, true);
9416 dev_dbg(&pf
->pdev
->dev
, "setting flow control: ret = %s last_status = %s\n",
9417 i40e_stat_str(&pf
->hw
, ret
),
9418 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
9420 /* Rebuild the VSIs and VEBs that existed before reset.
9421 * They are still in our local switch element arrays, so only
9422 * need to rebuild the switch model in the HW.
9424 * If there were VEBs but the reconstitution failed, we'll try
9425 * try to recover minimal use by getting the basic PF VSI working.
9427 if (vsi
->uplink_seid
!= pf
->mac_seid
) {
9428 dev_dbg(&pf
->pdev
->dev
, "attempting to rebuild switch\n");
9429 /* find the one VEB connected to the MAC, and find orphans */
9430 for (v
= 0; v
< I40E_MAX_VEB
; v
++) {
9434 if (pf
->veb
[v
]->uplink_seid
== pf
->mac_seid
||
9435 pf
->veb
[v
]->uplink_seid
== 0) {
9436 ret
= i40e_reconstitute_veb(pf
->veb
[v
]);
9441 /* If Main VEB failed, we're in deep doodoo,
9442 * so give up rebuilding the switch and set up
9443 * for minimal rebuild of PF VSI.
9444 * If orphan failed, we'll report the error
9445 * but try to keep going.
9447 if (pf
->veb
[v
]->uplink_seid
== pf
->mac_seid
) {
9448 dev_info(&pf
->pdev
->dev
,
9449 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
9451 vsi
->uplink_seid
= pf
->mac_seid
;
9453 } else if (pf
->veb
[v
]->uplink_seid
== 0) {
9454 dev_info(&pf
->pdev
->dev
,
9455 "rebuild of orphan VEB failed: %d\n",
9462 if (vsi
->uplink_seid
== pf
->mac_seid
) {
9463 dev_dbg(&pf
->pdev
->dev
, "attempting to rebuild PF VSI\n");
9464 /* no VEB, so rebuild only the Main VSI */
9465 ret
= i40e_add_vsi(vsi
);
9467 dev_info(&pf
->pdev
->dev
,
9468 "rebuild of Main VSI failed: %d\n", ret
);
9473 if (vsi
->mqprio_qopt
.max_rate
[0]) {
9474 u64 max_tx_rate
= vsi
->mqprio_qopt
.max_rate
[0];
9477 do_div(max_tx_rate
, I40E_BW_MBPS_DIVISOR
);
9478 ret
= i40e_set_bw_limit(vsi
, vsi
->seid
, max_tx_rate
);
9482 credits
= max_tx_rate
;
9483 do_div(credits
, I40E_BW_CREDIT_DIVISOR
);
9484 dev_dbg(&vsi
->back
->pdev
->dev
,
9485 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9491 ret
= i40e_rebuild_cloud_filters(vsi
, vsi
->seid
);
9495 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
9496 * for this main VSI if they exist
9498 ret
= i40e_rebuild_channels(vsi
);
9502 /* Reconfigure hardware for allowing smaller MSS in the case
9503 * of TSO, so that we avoid the MDD being fired and causing
9504 * a reset in the case of small MSS+TSO.
9506 #define I40E_REG_MSS 0x000E64DC
9507 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
9508 #define I40E_64BYTE_MSS 0x400000
9509 val
= rd32(hw
, I40E_REG_MSS
);
9510 if ((val
& I40E_REG_MSS_MIN_MASK
) > I40E_64BYTE_MSS
) {
9511 val
&= ~I40E_REG_MSS_MIN_MASK
;
9512 val
|= I40E_64BYTE_MSS
;
9513 wr32(hw
, I40E_REG_MSS
, val
);
9516 if (pf
->hw_features
& I40E_HW_RESTART_AUTONEG
) {
9518 ret
= i40e_aq_set_link_restart_an(&pf
->hw
, true, NULL
);
9520 dev_info(&pf
->pdev
->dev
, "link restart failed, err %s aq_err %s\n",
9521 i40e_stat_str(&pf
->hw
, ret
),
9522 i40e_aq_str(&pf
->hw
,
9523 pf
->hw
.aq
.asq_last_status
));
9525 /* reinit the misc interrupt */
9526 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
9527 ret
= i40e_setup_misc_vector(pf
);
9529 /* Add a filter to drop all Flow control frames from any VSI from being
9530 * transmitted. By doing so we stop a malicious VF from sending out
9531 * PAUSE or PFC frames and potentially controlling traffic for other
9533 * The FW can still send Flow control frames if enabled.
9535 i40e_add_filter_to_drop_tx_flow_control_frames(&pf
->hw
,
9538 /* restart the VSIs that were rebuilt and running before the reset */
9539 i40e_pf_unquiesce_all_vsi(pf
);
9541 /* Release the RTNL lock before we start resetting VFs */
9545 /* Restore promiscuous settings */
9546 ret
= i40e_set_promiscuous(pf
, pf
->cur_promisc
);
9548 dev_warn(&pf
->pdev
->dev
,
9549 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
9550 pf
->cur_promisc
? "on" : "off",
9551 i40e_stat_str(&pf
->hw
, ret
),
9552 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
9554 i40e_reset_all_vfs(pf
, true);
9556 /* tell the firmware that we're starting */
9557 i40e_send_version(pf
);
9559 /* We've already released the lock, so don't do it again */
9560 goto end_core_reset
;
9566 clear_bit(__I40E_RESET_FAILED
, pf
->state
);
9568 clear_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
);
9572 * i40e_reset_and_rebuild - reset and rebuild using a saved config
9573 * @pf: board private structure
9574 * @reinit: if the Main VSI needs to re-initialized.
9575 * @lock_acquired: indicates whether or not the lock has been acquired
9576 * before this function was called.
9578 static void i40e_reset_and_rebuild(struct i40e_pf
*pf
, bool reinit
,
9582 /* Now we wait for GRST to settle out.
9583 * We don't have to delete the VEBs or VSIs from the hw switch
9584 * because the reset will make them disappear.
9586 ret
= i40e_reset(pf
);
9588 i40e_rebuild(pf
, reinit
, lock_acquired
);
9592 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
9593 * @pf: board private structure
9595 * Close up the VFs and other things in prep for a Core Reset,
9596 * then get ready to rebuild the world.
9597 * @lock_acquired: indicates whether or not the lock has been acquired
9598 * before this function was called.
9600 static void i40e_handle_reset_warning(struct i40e_pf
*pf
, bool lock_acquired
)
9602 i40e_prep_for_reset(pf
, lock_acquired
);
9603 i40e_reset_and_rebuild(pf
, false, lock_acquired
);
9607 * i40e_handle_mdd_event
9608 * @pf: pointer to the PF structure
9610 * Called from the MDD irq handler to identify possibly malicious vfs
9612 static void i40e_handle_mdd_event(struct i40e_pf
*pf
)
9614 struct i40e_hw
*hw
= &pf
->hw
;
9615 bool mdd_detected
= false;
9616 bool pf_mdd_detected
= false;
9621 if (!test_bit(__I40E_MDD_EVENT_PENDING
, pf
->state
))
9624 /* find what triggered the MDD event */
9625 reg
= rd32(hw
, I40E_GL_MDET_TX
);
9626 if (reg
& I40E_GL_MDET_TX_VALID_MASK
) {
9627 u8 pf_num
= (reg
& I40E_GL_MDET_TX_PF_NUM_MASK
) >>
9628 I40E_GL_MDET_TX_PF_NUM_SHIFT
;
9629 u16 vf_num
= (reg
& I40E_GL_MDET_TX_VF_NUM_MASK
) >>
9630 I40E_GL_MDET_TX_VF_NUM_SHIFT
;
9631 u8 event
= (reg
& I40E_GL_MDET_TX_EVENT_MASK
) >>
9632 I40E_GL_MDET_TX_EVENT_SHIFT
;
9633 u16 queue
= ((reg
& I40E_GL_MDET_TX_QUEUE_MASK
) >>
9634 I40E_GL_MDET_TX_QUEUE_SHIFT
) -
9635 pf
->hw
.func_caps
.base_queue
;
9636 if (netif_msg_tx_err(pf
))
9637 dev_info(&pf
->pdev
->dev
, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
9638 event
, queue
, pf_num
, vf_num
);
9639 wr32(hw
, I40E_GL_MDET_TX
, 0xffffffff);
9640 mdd_detected
= true;
9642 reg
= rd32(hw
, I40E_GL_MDET_RX
);
9643 if (reg
& I40E_GL_MDET_RX_VALID_MASK
) {
9644 u8 func
= (reg
& I40E_GL_MDET_RX_FUNCTION_MASK
) >>
9645 I40E_GL_MDET_RX_FUNCTION_SHIFT
;
9646 u8 event
= (reg
& I40E_GL_MDET_RX_EVENT_MASK
) >>
9647 I40E_GL_MDET_RX_EVENT_SHIFT
;
9648 u16 queue
= ((reg
& I40E_GL_MDET_RX_QUEUE_MASK
) >>
9649 I40E_GL_MDET_RX_QUEUE_SHIFT
) -
9650 pf
->hw
.func_caps
.base_queue
;
9651 if (netif_msg_rx_err(pf
))
9652 dev_info(&pf
->pdev
->dev
, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
9653 event
, queue
, func
);
9654 wr32(hw
, I40E_GL_MDET_RX
, 0xffffffff);
9655 mdd_detected
= true;
9659 reg
= rd32(hw
, I40E_PF_MDET_TX
);
9660 if (reg
& I40E_PF_MDET_TX_VALID_MASK
) {
9661 wr32(hw
, I40E_PF_MDET_TX
, 0xFFFF);
9662 dev_info(&pf
->pdev
->dev
, "TX driver issue detected, PF reset issued\n");
9663 pf_mdd_detected
= true;
9665 reg
= rd32(hw
, I40E_PF_MDET_RX
);
9666 if (reg
& I40E_PF_MDET_RX_VALID_MASK
) {
9667 wr32(hw
, I40E_PF_MDET_RX
, 0xFFFF);
9668 dev_info(&pf
->pdev
->dev
, "RX driver issue detected, PF reset issued\n");
9669 pf_mdd_detected
= true;
9671 /* Queue belongs to the PF, initiate a reset */
9672 if (pf_mdd_detected
) {
9673 set_bit(__I40E_PF_RESET_REQUESTED
, pf
->state
);
9674 i40e_service_event_schedule(pf
);
9678 /* see if one of the VFs needs its hand slapped */
9679 for (i
= 0; i
< pf
->num_alloc_vfs
&& mdd_detected
; i
++) {
9681 reg
= rd32(hw
, I40E_VP_MDET_TX(i
));
9682 if (reg
& I40E_VP_MDET_TX_VALID_MASK
) {
9683 wr32(hw
, I40E_VP_MDET_TX(i
), 0xFFFF);
9684 vf
->num_mdd_events
++;
9685 dev_info(&pf
->pdev
->dev
, "TX driver issue detected on VF %d\n",
9689 reg
= rd32(hw
, I40E_VP_MDET_RX(i
));
9690 if (reg
& I40E_VP_MDET_RX_VALID_MASK
) {
9691 wr32(hw
, I40E_VP_MDET_RX(i
), 0xFFFF);
9692 vf
->num_mdd_events
++;
9693 dev_info(&pf
->pdev
->dev
, "RX driver issue detected on VF %d\n",
9697 if (vf
->num_mdd_events
> I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED
) {
9698 dev_info(&pf
->pdev
->dev
,
9699 "Too many MDD events on VF %d, disabled\n", i
);
9700 dev_info(&pf
->pdev
->dev
,
9701 "Use PF Control I/F to re-enable the VF\n");
9702 set_bit(I40E_VF_STATE_DISABLED
, &vf
->vf_states
);
9706 /* re-enable mdd interrupt cause */
9707 clear_bit(__I40E_MDD_EVENT_PENDING
, pf
->state
);
9708 reg
= rd32(hw
, I40E_PFINT_ICR0_ENA
);
9709 reg
|= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK
;
9710 wr32(hw
, I40E_PFINT_ICR0_ENA
, reg
);
9714 static const char *i40e_tunnel_name(u8 type
)
9717 case UDP_TUNNEL_TYPE_VXLAN
:
9719 case UDP_TUNNEL_TYPE_GENEVE
:
9727 * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters
9728 * @pf: board private structure
9730 static void i40e_sync_udp_filters(struct i40e_pf
*pf
)
9734 /* loop through and set pending bit for all active UDP filters */
9735 for (i
= 0; i
< I40E_MAX_PF_UDP_OFFLOAD_PORTS
; i
++) {
9736 if (pf
->udp_ports
[i
].port
)
9737 pf
->pending_udp_bitmap
|= BIT_ULL(i
);
9740 set_bit(__I40E_UDP_FILTER_SYNC_PENDING
, pf
->state
);
9744 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
9745 * @pf: board private structure
9747 static void i40e_sync_udp_filters_subtask(struct i40e_pf
*pf
)
9749 struct i40e_hw
*hw
= &pf
->hw
;
9750 u8 filter_index
, type
;
9754 if (!test_and_clear_bit(__I40E_UDP_FILTER_SYNC_PENDING
, pf
->state
))
9757 /* acquire RTNL to maintain state of flags and port requests */
9760 for (i
= 0; i
< I40E_MAX_PF_UDP_OFFLOAD_PORTS
; i
++) {
9761 if (pf
->pending_udp_bitmap
& BIT_ULL(i
)) {
9762 struct i40e_udp_port_config
*udp_port
;
9763 i40e_status ret
= 0;
9765 udp_port
= &pf
->udp_ports
[i
];
9766 pf
->pending_udp_bitmap
&= ~BIT_ULL(i
);
9768 port
= READ_ONCE(udp_port
->port
);
9769 type
= READ_ONCE(udp_port
->type
);
9770 filter_index
= READ_ONCE(udp_port
->filter_index
);
9772 /* release RTNL while we wait on AQ command */
9776 ret
= i40e_aq_add_udp_tunnel(hw
, port
,
9780 else if (filter_index
!= I40E_UDP_PORT_INDEX_UNUSED
)
9781 ret
= i40e_aq_del_udp_tunnel(hw
, filter_index
,
9784 /* reacquire RTNL so we can update filter_index */
9788 dev_info(&pf
->pdev
->dev
,
9789 "%s %s port %d, index %d failed, err %s aq_err %s\n",
9790 i40e_tunnel_name(type
),
9791 port
? "add" : "delete",
9794 i40e_stat_str(&pf
->hw
, ret
),
9795 i40e_aq_str(&pf
->hw
,
9796 pf
->hw
.aq
.asq_last_status
));
9798 /* failed to add, just reset port,
9799 * drop pending bit for any deletion
9802 pf
->pending_udp_bitmap
&= ~BIT_ULL(i
);
9805 /* record filter index on success */
9806 udp_port
->filter_index
= filter_index
;
9815 * i40e_service_task - Run the driver's async subtasks
9816 * @work: pointer to work_struct containing our data
9818 static void i40e_service_task(struct work_struct
*work
)
9820 struct i40e_pf
*pf
= container_of(work
,
9823 unsigned long start_time
= jiffies
;
9825 /* don't bother with service tasks if a reset is in progress */
9826 if (test_bit(__I40E_RESET_RECOVERY_PENDING
, pf
->state
))
9829 if (test_and_set_bit(__I40E_SERVICE_SCHED
, pf
->state
))
9832 i40e_detect_recover_hung(pf
->vsi
[pf
->lan_vsi
]);
9833 i40e_sync_filters_subtask(pf
);
9834 i40e_reset_subtask(pf
);
9835 i40e_handle_mdd_event(pf
);
9836 i40e_vc_process_vflr_event(pf
);
9837 i40e_watchdog_subtask(pf
);
9838 i40e_fdir_reinit_subtask(pf
);
9839 if (test_and_clear_bit(__I40E_CLIENT_RESET
, pf
->state
)) {
9840 /* Client subtask will reopen next time through. */
9841 i40e_notify_client_of_netdev_close(pf
->vsi
[pf
->lan_vsi
], true);
9843 i40e_client_subtask(pf
);
9844 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE
,
9846 i40e_notify_client_of_l2_param_changes(
9847 pf
->vsi
[pf
->lan_vsi
]);
9849 i40e_sync_filters_subtask(pf
);
9850 i40e_sync_udp_filters_subtask(pf
);
9851 i40e_clean_adminq_subtask(pf
);
9853 /* flush memory to make sure state is correct before next watchdog */
9854 smp_mb__before_atomic();
9855 clear_bit(__I40E_SERVICE_SCHED
, pf
->state
);
9857 /* If the tasks have taken longer than one timer cycle or there
9858 * is more work to be done, reschedule the service task now
9859 * rather than wait for the timer to tick again.
9861 if (time_after(jiffies
, (start_time
+ pf
->service_timer_period
)) ||
9862 test_bit(__I40E_ADMINQ_EVENT_PENDING
, pf
->state
) ||
9863 test_bit(__I40E_MDD_EVENT_PENDING
, pf
->state
) ||
9864 test_bit(__I40E_VFLR_EVENT_PENDING
, pf
->state
))
9865 i40e_service_event_schedule(pf
);
9869 * i40e_service_timer - timer callback
9870 * @data: pointer to PF struct
9872 static void i40e_service_timer(struct timer_list
*t
)
9874 struct i40e_pf
*pf
= from_timer(pf
, t
, service_timer
);
9876 mod_timer(&pf
->service_timer
,
9877 round_jiffies(jiffies
+ pf
->service_timer_period
));
9878 i40e_service_event_schedule(pf
);
9882 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
9883 * @vsi: the VSI being configured
9885 static int i40e_set_num_rings_in_vsi(struct i40e_vsi
*vsi
)
9887 struct i40e_pf
*pf
= vsi
->back
;
9889 switch (vsi
->type
) {
9891 vsi
->alloc_queue_pairs
= pf
->num_lan_qps
;
9892 vsi
->num_desc
= ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS
,
9893 I40E_REQ_DESCRIPTOR_MULTIPLE
);
9894 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
9895 vsi
->num_q_vectors
= pf
->num_lan_msix
;
9897 vsi
->num_q_vectors
= 1;
9902 vsi
->alloc_queue_pairs
= 1;
9903 vsi
->num_desc
= ALIGN(I40E_FDIR_RING_COUNT
,
9904 I40E_REQ_DESCRIPTOR_MULTIPLE
);
9905 vsi
->num_q_vectors
= pf
->num_fdsb_msix
;
9908 case I40E_VSI_VMDQ2
:
9909 vsi
->alloc_queue_pairs
= pf
->num_vmdq_qps
;
9910 vsi
->num_desc
= ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS
,
9911 I40E_REQ_DESCRIPTOR_MULTIPLE
);
9912 vsi
->num_q_vectors
= pf
->num_vmdq_msix
;
9915 case I40E_VSI_SRIOV
:
9916 vsi
->alloc_queue_pairs
= pf
->num_vf_qps
;
9917 vsi
->num_desc
= ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS
,
9918 I40E_REQ_DESCRIPTOR_MULTIPLE
);
9930 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
9932 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
9934 * On error: returns error code (negative)
9935 * On success: returns 0
9937 static int i40e_vsi_alloc_arrays(struct i40e_vsi
*vsi
, bool alloc_qvectors
)
9939 struct i40e_ring
**next_rings
;
9943 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
9944 size
= sizeof(struct i40e_ring
*) * vsi
->alloc_queue_pairs
*
9945 (i40e_enabled_xdp_vsi(vsi
) ? 3 : 2);
9946 vsi
->tx_rings
= kzalloc(size
, GFP_KERNEL
);
9949 next_rings
= vsi
->tx_rings
+ vsi
->alloc_queue_pairs
;
9950 if (i40e_enabled_xdp_vsi(vsi
)) {
9951 vsi
->xdp_rings
= next_rings
;
9952 next_rings
+= vsi
->alloc_queue_pairs
;
9954 vsi
->rx_rings
= next_rings
;
9956 if (alloc_qvectors
) {
9957 /* allocate memory for q_vector pointers */
9958 size
= sizeof(struct i40e_q_vector
*) * vsi
->num_q_vectors
;
9959 vsi
->q_vectors
= kzalloc(size
, GFP_KERNEL
);
9960 if (!vsi
->q_vectors
) {
9968 kfree(vsi
->tx_rings
);
9973 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
9974 * @pf: board private structure
9975 * @type: type of VSI
9977 * On error: returns error code (negative)
9978 * On success: returns vsi index in PF (positive)
9980 static int i40e_vsi_mem_alloc(struct i40e_pf
*pf
, enum i40e_vsi_type type
)
9983 struct i40e_vsi
*vsi
;
9987 /* Need to protect the allocation of the VSIs at the PF level */
9988 mutex_lock(&pf
->switch_mutex
);
9990 /* VSI list may be fragmented if VSI creation/destruction has
9991 * been happening. We can afford to do a quick scan to look
9992 * for any free VSIs in the list.
9994 * find next empty vsi slot, looping back around if necessary
9997 while (i
< pf
->num_alloc_vsi
&& pf
->vsi
[i
])
9999 if (i
>= pf
->num_alloc_vsi
) {
10001 while (i
< pf
->next_vsi
&& pf
->vsi
[i
])
10005 if (i
< pf
->num_alloc_vsi
&& !pf
->vsi
[i
]) {
10006 vsi_idx
= i
; /* Found one! */
10009 goto unlock_pf
; /* out of VSI slots! */
10011 pf
->next_vsi
= ++i
;
10013 vsi
= kzalloc(sizeof(*vsi
), GFP_KERNEL
);
10020 set_bit(__I40E_VSI_DOWN
, vsi
->state
);
10022 vsi
->idx
= vsi_idx
;
10023 vsi
->int_rate_limit
= 0;
10024 vsi
->rss_table_size
= (vsi
->type
== I40E_VSI_MAIN
) ?
10025 pf
->rss_table_size
: 64;
10026 vsi
->netdev_registered
= false;
10027 vsi
->work_limit
= I40E_DEFAULT_IRQ_WORK
;
10028 hash_init(vsi
->mac_filter_hash
);
10029 vsi
->irqs_ready
= false;
10031 ret
= i40e_set_num_rings_in_vsi(vsi
);
10035 ret
= i40e_vsi_alloc_arrays(vsi
, true);
10039 /* Setup default MSIX irq handler for VSI */
10040 i40e_vsi_setup_irqhandler(vsi
, i40e_msix_clean_rings
);
10042 /* Initialize VSI lock */
10043 spin_lock_init(&vsi
->mac_filter_hash_lock
);
10044 pf
->vsi
[vsi_idx
] = vsi
;
10049 pf
->next_vsi
= i
- 1;
10052 mutex_unlock(&pf
->switch_mutex
);
10057 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
10058 * @vsi: VSI pointer
10059 * @free_qvectors: a bool to specify if q_vectors need to be freed.
10061 * On error: returns error code (negative)
10062 * On success: returns 0
10064 static void i40e_vsi_free_arrays(struct i40e_vsi
*vsi
, bool free_qvectors
)
10066 /* free the ring and vector containers */
10067 if (free_qvectors
) {
10068 kfree(vsi
->q_vectors
);
10069 vsi
->q_vectors
= NULL
;
10071 kfree(vsi
->tx_rings
);
10072 vsi
->tx_rings
= NULL
;
10073 vsi
->rx_rings
= NULL
;
10074 vsi
->xdp_rings
= NULL
;
10078 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
10080 * @vsi: Pointer to VSI structure
10082 static void i40e_clear_rss_config_user(struct i40e_vsi
*vsi
)
10087 kfree(vsi
->rss_hkey_user
);
10088 vsi
->rss_hkey_user
= NULL
;
10090 kfree(vsi
->rss_lut_user
);
10091 vsi
->rss_lut_user
= NULL
;
10095 * i40e_vsi_clear - Deallocate the VSI provided
10096 * @vsi: the VSI being un-configured
10098 static int i40e_vsi_clear(struct i40e_vsi
*vsi
)
10100 struct i40e_pf
*pf
;
10109 mutex_lock(&pf
->switch_mutex
);
10110 if (!pf
->vsi
[vsi
->idx
]) {
10111 dev_err(&pf
->pdev
->dev
, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
10112 vsi
->idx
, vsi
->idx
, vsi
->type
);
10116 if (pf
->vsi
[vsi
->idx
] != vsi
) {
10117 dev_err(&pf
->pdev
->dev
,
10118 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
10119 pf
->vsi
[vsi
->idx
]->idx
,
10120 pf
->vsi
[vsi
->idx
]->type
,
10121 vsi
->idx
, vsi
->type
);
10125 /* updates the PF for this cleared vsi */
10126 i40e_put_lump(pf
->qp_pile
, vsi
->base_queue
, vsi
->idx
);
10127 i40e_put_lump(pf
->irq_pile
, vsi
->base_vector
, vsi
->idx
);
10129 i40e_vsi_free_arrays(vsi
, true);
10130 i40e_clear_rss_config_user(vsi
);
10132 pf
->vsi
[vsi
->idx
] = NULL
;
10133 if (vsi
->idx
< pf
->next_vsi
)
10134 pf
->next_vsi
= vsi
->idx
;
10137 mutex_unlock(&pf
->switch_mutex
);
10145 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
10146 * @vsi: the VSI being cleaned
10148 static void i40e_vsi_clear_rings(struct i40e_vsi
*vsi
)
10152 if (vsi
->tx_rings
&& vsi
->tx_rings
[0]) {
10153 for (i
= 0; i
< vsi
->alloc_queue_pairs
; i
++) {
10154 kfree_rcu(vsi
->tx_rings
[i
], rcu
);
10155 vsi
->tx_rings
[i
] = NULL
;
10156 vsi
->rx_rings
[i
] = NULL
;
10157 if (vsi
->xdp_rings
)
10158 vsi
->xdp_rings
[i
] = NULL
;
10164 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
10165 * @vsi: the VSI being configured
10167 static int i40e_alloc_rings(struct i40e_vsi
*vsi
)
10169 int i
, qpv
= i40e_enabled_xdp_vsi(vsi
) ? 3 : 2;
10170 struct i40e_pf
*pf
= vsi
->back
;
10171 struct i40e_ring
*ring
;
10173 /* Set basic values in the rings to be used later during open() */
10174 for (i
= 0; i
< vsi
->alloc_queue_pairs
; i
++) {
10175 /* allocate space for both Tx and Rx in one shot */
10176 ring
= kcalloc(qpv
, sizeof(struct i40e_ring
), GFP_KERNEL
);
10180 ring
->queue_index
= i
;
10181 ring
->reg_idx
= vsi
->base_queue
+ i
;
10182 ring
->ring_active
= false;
10184 ring
->netdev
= vsi
->netdev
;
10185 ring
->dev
= &pf
->pdev
->dev
;
10186 ring
->count
= vsi
->num_desc
;
10189 if (vsi
->back
->hw_features
& I40E_HW_WB_ON_ITR_CAPABLE
)
10190 ring
->flags
= I40E_TXR_FLAGS_WB_ON_ITR
;
10191 ring
->itr_setting
= pf
->tx_itr_default
;
10192 vsi
->tx_rings
[i
] = ring
++;
10194 if (!i40e_enabled_xdp_vsi(vsi
))
10197 ring
->queue_index
= vsi
->alloc_queue_pairs
+ i
;
10198 ring
->reg_idx
= vsi
->base_queue
+ ring
->queue_index
;
10199 ring
->ring_active
= false;
10201 ring
->netdev
= NULL
;
10202 ring
->dev
= &pf
->pdev
->dev
;
10203 ring
->count
= vsi
->num_desc
;
10206 if (vsi
->back
->hw_features
& I40E_HW_WB_ON_ITR_CAPABLE
)
10207 ring
->flags
= I40E_TXR_FLAGS_WB_ON_ITR
;
10208 set_ring_xdp(ring
);
10209 ring
->itr_setting
= pf
->tx_itr_default
;
10210 vsi
->xdp_rings
[i
] = ring
++;
10213 ring
->queue_index
= i
;
10214 ring
->reg_idx
= vsi
->base_queue
+ i
;
10215 ring
->ring_active
= false;
10217 ring
->netdev
= vsi
->netdev
;
10218 ring
->dev
= &pf
->pdev
->dev
;
10219 ring
->count
= vsi
->num_desc
;
10222 ring
->itr_setting
= pf
->rx_itr_default
;
10223 vsi
->rx_rings
[i
] = ring
;
10229 i40e_vsi_clear_rings(vsi
);
10234 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
10235 * @pf: board private structure
10236 * @vectors: the number of MSI-X vectors to request
10238 * Returns the number of vectors reserved, or error
10240 static int i40e_reserve_msix_vectors(struct i40e_pf
*pf
, int vectors
)
10242 vectors
= pci_enable_msix_range(pf
->pdev
, pf
->msix_entries
,
10243 I40E_MIN_MSIX
, vectors
);
10245 dev_info(&pf
->pdev
->dev
,
10246 "MSI-X vector reservation failed: %d\n", vectors
);
10254 * i40e_init_msix - Setup the MSIX capability
10255 * @pf: board private structure
10257 * Work with the OS to set up the MSIX vectors needed.
10259 * Returns the number of vectors reserved or negative on failure
10261 static int i40e_init_msix(struct i40e_pf
*pf
)
10263 struct i40e_hw
*hw
= &pf
->hw
;
10264 int cpus
, extra_vectors
;
10268 int iwarp_requested
= 0;
10270 if (!(pf
->flags
& I40E_FLAG_MSIX_ENABLED
))
10273 /* The number of vectors we'll request will be comprised of:
10274 * - Add 1 for "other" cause for Admin Queue events, etc.
10275 * - The number of LAN queue pairs
10276 * - Queues being used for RSS.
10277 * We don't need as many as max_rss_size vectors.
10278 * use rss_size instead in the calculation since that
10279 * is governed by number of cpus in the system.
10280 * - assumes symmetric Tx/Rx pairing
10281 * - The number of VMDq pairs
10282 * - The CPU count within the NUMA node if iWARP is enabled
10283 * Once we count this up, try the request.
10285 * If we can't get what we want, we'll simplify to nearly nothing
10286 * and try again. If that still fails, we punt.
10288 vectors_left
= hw
->func_caps
.num_msix_vectors
;
10291 /* reserve one vector for miscellaneous handler */
10292 if (vectors_left
) {
10297 /* reserve some vectors for the main PF traffic queues. Initially we
10298 * only reserve at most 50% of the available vectors, in the case that
10299 * the number of online CPUs is large. This ensures that we can enable
10300 * extra features as well. Once we've enabled the other features, we
10301 * will use any remaining vectors to reach as close as we can to the
10302 * number of online CPUs.
10304 cpus
= num_online_cpus();
10305 pf
->num_lan_msix
= min_t(int, cpus
, vectors_left
/ 2);
10306 vectors_left
-= pf
->num_lan_msix
;
10308 /* reserve one vector for sideband flow director */
10309 if (pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) {
10310 if (vectors_left
) {
10311 pf
->num_fdsb_msix
= 1;
10315 pf
->num_fdsb_msix
= 0;
10319 /* can we reserve enough for iWARP? */
10320 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
) {
10321 iwarp_requested
= pf
->num_iwarp_msix
;
10324 pf
->num_iwarp_msix
= 0;
10325 else if (vectors_left
< pf
->num_iwarp_msix
)
10326 pf
->num_iwarp_msix
= 1;
10327 v_budget
+= pf
->num_iwarp_msix
;
10328 vectors_left
-= pf
->num_iwarp_msix
;
10331 /* any vectors left over go for VMDq support */
10332 if (pf
->flags
& I40E_FLAG_VMDQ_ENABLED
) {
10333 if (!vectors_left
) {
10334 pf
->num_vmdq_msix
= 0;
10335 pf
->num_vmdq_qps
= 0;
10337 int vmdq_vecs_wanted
=
10338 pf
->num_vmdq_vsis
* pf
->num_vmdq_qps
;
10340 min_t(int, vectors_left
, vmdq_vecs_wanted
);
10342 /* if we're short on vectors for what's desired, we limit
10343 * the queues per vmdq. If this is still more than are
10344 * available, the user will need to change the number of
10345 * queues/vectors used by the PF later with the ethtool
10348 if (vectors_left
< vmdq_vecs_wanted
) {
10349 pf
->num_vmdq_qps
= 1;
10350 vmdq_vecs_wanted
= pf
->num_vmdq_vsis
;
10351 vmdq_vecs
= min_t(int,
10355 pf
->num_vmdq_msix
= pf
->num_vmdq_qps
;
10357 v_budget
+= vmdq_vecs
;
10358 vectors_left
-= vmdq_vecs
;
10362 /* On systems with a large number of SMP cores, we previously limited
10363 * the number of vectors for num_lan_msix to be at most 50% of the
10364 * available vectors, to allow for other features. Now, we add back
10365 * the remaining vectors. However, we ensure that the total
10366 * num_lan_msix will not exceed num_online_cpus(). To do this, we
10367 * calculate the number of vectors we can add without going over the
10368 * cap of CPUs. For systems with a small number of CPUs this will be
10371 extra_vectors
= min_t(int, cpus
- pf
->num_lan_msix
, vectors_left
);
10372 pf
->num_lan_msix
+= extra_vectors
;
10373 vectors_left
-= extra_vectors
;
10375 WARN(vectors_left
< 0,
10376 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
10378 v_budget
+= pf
->num_lan_msix
;
10379 pf
->msix_entries
= kcalloc(v_budget
, sizeof(struct msix_entry
),
10381 if (!pf
->msix_entries
)
10384 for (i
= 0; i
< v_budget
; i
++)
10385 pf
->msix_entries
[i
].entry
= i
;
10386 v_actual
= i40e_reserve_msix_vectors(pf
, v_budget
);
10388 if (v_actual
< I40E_MIN_MSIX
) {
10389 pf
->flags
&= ~I40E_FLAG_MSIX_ENABLED
;
10390 kfree(pf
->msix_entries
);
10391 pf
->msix_entries
= NULL
;
10392 pci_disable_msix(pf
->pdev
);
10395 } else if (v_actual
== I40E_MIN_MSIX
) {
10396 /* Adjust for minimal MSIX use */
10397 pf
->num_vmdq_vsis
= 0;
10398 pf
->num_vmdq_qps
= 0;
10399 pf
->num_lan_qps
= 1;
10400 pf
->num_lan_msix
= 1;
10402 } else if (v_actual
!= v_budget
) {
10403 /* If we have limited resources, we will start with no vectors
10404 * for the special features and then allocate vectors to some
10405 * of these features based on the policy and at the end disable
10406 * the features that did not get any vectors.
10410 dev_info(&pf
->pdev
->dev
,
10411 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
10412 v_actual
, v_budget
);
10413 /* reserve the misc vector */
10414 vec
= v_actual
- 1;
10416 /* Scale vector usage down */
10417 pf
->num_vmdq_msix
= 1; /* force VMDqs to only one vector */
10418 pf
->num_vmdq_vsis
= 1;
10419 pf
->num_vmdq_qps
= 1;
10421 /* partition out the remaining vectors */
10424 pf
->num_lan_msix
= 1;
10427 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
) {
10428 pf
->num_lan_msix
= 1;
10429 pf
->num_iwarp_msix
= 1;
10431 pf
->num_lan_msix
= 2;
10435 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
) {
10436 pf
->num_iwarp_msix
= min_t(int, (vec
/ 3),
10438 pf
->num_vmdq_vsis
= min_t(int, (vec
/ 3),
10439 I40E_DEFAULT_NUM_VMDQ_VSI
);
10441 pf
->num_vmdq_vsis
= min_t(int, (vec
/ 2),
10442 I40E_DEFAULT_NUM_VMDQ_VSI
);
10444 if (pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) {
10445 pf
->num_fdsb_msix
= 1;
10448 pf
->num_lan_msix
= min_t(int,
10449 (vec
- (pf
->num_iwarp_msix
+ pf
->num_vmdq_vsis
)),
10451 pf
->num_lan_qps
= pf
->num_lan_msix
;
10456 if ((pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) &&
10457 (pf
->num_fdsb_msix
== 0)) {
10458 dev_info(&pf
->pdev
->dev
, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
10459 pf
->flags
&= ~I40E_FLAG_FD_SB_ENABLED
;
10460 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
10462 if ((pf
->flags
& I40E_FLAG_VMDQ_ENABLED
) &&
10463 (pf
->num_vmdq_msix
== 0)) {
10464 dev_info(&pf
->pdev
->dev
, "VMDq disabled, not enough MSI-X vectors\n");
10465 pf
->flags
&= ~I40E_FLAG_VMDQ_ENABLED
;
10468 if ((pf
->flags
& I40E_FLAG_IWARP_ENABLED
) &&
10469 (pf
->num_iwarp_msix
== 0)) {
10470 dev_info(&pf
->pdev
->dev
, "IWARP disabled, not enough MSI-X vectors\n");
10471 pf
->flags
&= ~I40E_FLAG_IWARP_ENABLED
;
10473 i40e_debug(&pf
->hw
, I40E_DEBUG_INIT
,
10474 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
10476 pf
->num_vmdq_msix
* pf
->num_vmdq_vsis
,
10478 pf
->num_iwarp_msix
);
10484 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
10485 * @vsi: the VSI being configured
10486 * @v_idx: index of the vector in the vsi struct
10487 * @cpu: cpu to be used on affinity_mask
10489 * We allocate one q_vector. If allocation fails we return -ENOMEM.
10491 static int i40e_vsi_alloc_q_vector(struct i40e_vsi
*vsi
, int v_idx
, int cpu
)
10493 struct i40e_q_vector
*q_vector
;
10495 /* allocate q_vector */
10496 q_vector
= kzalloc(sizeof(struct i40e_q_vector
), GFP_KERNEL
);
10500 q_vector
->vsi
= vsi
;
10501 q_vector
->v_idx
= v_idx
;
10502 cpumask_copy(&q_vector
->affinity_mask
, cpu_possible_mask
);
10505 netif_napi_add(vsi
->netdev
, &q_vector
->napi
,
10506 i40e_napi_poll
, NAPI_POLL_WEIGHT
);
10508 /* tie q_vector and vsi together */
10509 vsi
->q_vectors
[v_idx
] = q_vector
;
10515 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
10516 * @vsi: the VSI being configured
10518 * We allocate one q_vector per queue interrupt. If allocation fails we
10521 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi
*vsi
)
10523 struct i40e_pf
*pf
= vsi
->back
;
10524 int err
, v_idx
, num_q_vectors
, current_cpu
;
10526 /* if not MSIX, give the one vector only to the LAN VSI */
10527 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
)
10528 num_q_vectors
= vsi
->num_q_vectors
;
10529 else if (vsi
== pf
->vsi
[pf
->lan_vsi
])
10534 current_cpu
= cpumask_first(cpu_online_mask
);
10536 for (v_idx
= 0; v_idx
< num_q_vectors
; v_idx
++) {
10537 err
= i40e_vsi_alloc_q_vector(vsi
, v_idx
, current_cpu
);
10540 current_cpu
= cpumask_next(current_cpu
, cpu_online_mask
);
10541 if (unlikely(current_cpu
>= nr_cpu_ids
))
10542 current_cpu
= cpumask_first(cpu_online_mask
);
10549 i40e_free_q_vector(vsi
, v_idx
);
10555 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
10556 * @pf: board private structure to initialize
10558 static int i40e_init_interrupt_scheme(struct i40e_pf
*pf
)
10563 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
10564 vectors
= i40e_init_msix(pf
);
10566 pf
->flags
&= ~(I40E_FLAG_MSIX_ENABLED
|
10567 I40E_FLAG_IWARP_ENABLED
|
10568 I40E_FLAG_RSS_ENABLED
|
10569 I40E_FLAG_DCB_CAPABLE
|
10570 I40E_FLAG_DCB_ENABLED
|
10571 I40E_FLAG_SRIOV_ENABLED
|
10572 I40E_FLAG_FD_SB_ENABLED
|
10573 I40E_FLAG_FD_ATR_ENABLED
|
10574 I40E_FLAG_VMDQ_ENABLED
);
10575 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
10577 /* rework the queue expectations without MSIX */
10578 i40e_determine_queue_usage(pf
);
10582 if (!(pf
->flags
& I40E_FLAG_MSIX_ENABLED
) &&
10583 (pf
->flags
& I40E_FLAG_MSI_ENABLED
)) {
10584 dev_info(&pf
->pdev
->dev
, "MSI-X not available, trying MSI\n");
10585 vectors
= pci_enable_msi(pf
->pdev
);
10587 dev_info(&pf
->pdev
->dev
, "MSI init failed - %d\n",
10589 pf
->flags
&= ~I40E_FLAG_MSI_ENABLED
;
10591 vectors
= 1; /* one MSI or Legacy vector */
10594 if (!(pf
->flags
& (I40E_FLAG_MSIX_ENABLED
| I40E_FLAG_MSI_ENABLED
)))
10595 dev_info(&pf
->pdev
->dev
, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
10597 /* set up vector assignment tracking */
10598 size
= sizeof(struct i40e_lump_tracking
) + (sizeof(u16
) * vectors
);
10599 pf
->irq_pile
= kzalloc(size
, GFP_KERNEL
);
10603 pf
->irq_pile
->num_entries
= vectors
;
10604 pf
->irq_pile
->search_hint
= 0;
10606 /* track first vector for misc interrupts, ignore return */
10607 (void)i40e_get_lump(pf
, pf
->irq_pile
, 1, I40E_PILE_VALID_BIT
- 1);
10613 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
10614 * @pf: private board data structure
10616 * Restore the interrupt scheme that was cleared when we suspended the
10617 * device. This should be called during resume to re-allocate the q_vectors
10618 * and reacquire IRQs.
10620 static int i40e_restore_interrupt_scheme(struct i40e_pf
*pf
)
10624 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
10625 * scheme. We need to re-enabled them here in order to attempt to
10626 * re-acquire the MSI or MSI-X vectors
10628 pf
->flags
|= (I40E_FLAG_MSIX_ENABLED
| I40E_FLAG_MSI_ENABLED
);
10630 err
= i40e_init_interrupt_scheme(pf
);
10634 /* Now that we've re-acquired IRQs, we need to remap the vectors and
10635 * rings together again.
10637 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
10639 err
= i40e_vsi_alloc_q_vectors(pf
->vsi
[i
]);
10642 i40e_vsi_map_rings_to_vectors(pf
->vsi
[i
]);
10646 err
= i40e_setup_misc_vector(pf
);
10650 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
)
10651 i40e_client_update_msix_info(pf
);
10658 i40e_vsi_free_q_vectors(pf
->vsi
[i
]);
10665 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
10666 * @pf: board private structure
10668 * This sets up the handler for MSIX 0, which is used to manage the
10669 * non-queue interrupts, e.g. AdminQ and errors. This is not used
10670 * when in MSI or Legacy interrupt mode.
10672 static int i40e_setup_misc_vector(struct i40e_pf
*pf
)
10674 struct i40e_hw
*hw
= &pf
->hw
;
10677 /* Only request the IRQ once, the first time through. */
10678 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED
, pf
->state
)) {
10679 err
= request_irq(pf
->msix_entries
[0].vector
,
10680 i40e_intr
, 0, pf
->int_name
, pf
);
10682 clear_bit(__I40E_MISC_IRQ_REQUESTED
, pf
->state
);
10683 dev_info(&pf
->pdev
->dev
,
10684 "request_irq for %s failed: %d\n",
10685 pf
->int_name
, err
);
10690 i40e_enable_misc_int_causes(pf
);
10692 /* associate no queues to the misc vector */
10693 wr32(hw
, I40E_PFINT_LNKLST0
, I40E_QUEUE_END_OF_LIST
);
10694 wr32(hw
, I40E_PFINT_ITR0(I40E_RX_ITR
), I40E_ITR_8K
);
10698 i40e_irq_dynamic_enable_icr0(pf
);
10704 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
10705 * @vsi: Pointer to vsi structure
10706 * @seed: Buffter to store the hash keys
10707 * @lut: Buffer to store the lookup table entries
10708 * @lut_size: Size of buffer to store the lookup table entries
10710 * Return 0 on success, negative on failure
10712 static int i40e_get_rss_aq(struct i40e_vsi
*vsi
, const u8
*seed
,
10713 u8
*lut
, u16 lut_size
)
10715 struct i40e_pf
*pf
= vsi
->back
;
10716 struct i40e_hw
*hw
= &pf
->hw
;
10720 ret
= i40e_aq_get_rss_key(hw
, vsi
->id
,
10721 (struct i40e_aqc_get_set_rss_key_data
*)seed
);
10723 dev_info(&pf
->pdev
->dev
,
10724 "Cannot get RSS key, err %s aq_err %s\n",
10725 i40e_stat_str(&pf
->hw
, ret
),
10726 i40e_aq_str(&pf
->hw
,
10727 pf
->hw
.aq
.asq_last_status
));
10733 bool pf_lut
= vsi
->type
== I40E_VSI_MAIN
? true : false;
10735 ret
= i40e_aq_get_rss_lut(hw
, vsi
->id
, pf_lut
, lut
, lut_size
);
10737 dev_info(&pf
->pdev
->dev
,
10738 "Cannot get RSS lut, err %s aq_err %s\n",
10739 i40e_stat_str(&pf
->hw
, ret
),
10740 i40e_aq_str(&pf
->hw
,
10741 pf
->hw
.aq
.asq_last_status
));
10750 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
10751 * @vsi: Pointer to vsi structure
10752 * @seed: RSS hash seed
10753 * @lut: Lookup table
10754 * @lut_size: Lookup table size
10756 * Returns 0 on success, negative on failure
10758 static int i40e_config_rss_reg(struct i40e_vsi
*vsi
, const u8
*seed
,
10759 const u8
*lut
, u16 lut_size
)
10761 struct i40e_pf
*pf
= vsi
->back
;
10762 struct i40e_hw
*hw
= &pf
->hw
;
10763 u16 vf_id
= vsi
->vf_id
;
10766 /* Fill out hash function seed */
10768 u32
*seed_dw
= (u32
*)seed
;
10770 if (vsi
->type
== I40E_VSI_MAIN
) {
10771 for (i
= 0; i
<= I40E_PFQF_HKEY_MAX_INDEX
; i
++)
10772 wr32(hw
, I40E_PFQF_HKEY(i
), seed_dw
[i
]);
10773 } else if (vsi
->type
== I40E_VSI_SRIOV
) {
10774 for (i
= 0; i
<= I40E_VFQF_HKEY1_MAX_INDEX
; i
++)
10775 wr32(hw
, I40E_VFQF_HKEY1(i
, vf_id
), seed_dw
[i
]);
10777 dev_err(&pf
->pdev
->dev
, "Cannot set RSS seed - invalid VSI type\n");
10782 u32
*lut_dw
= (u32
*)lut
;
10784 if (vsi
->type
== I40E_VSI_MAIN
) {
10785 if (lut_size
!= I40E_HLUT_ARRAY_SIZE
)
10787 for (i
= 0; i
<= I40E_PFQF_HLUT_MAX_INDEX
; i
++)
10788 wr32(hw
, I40E_PFQF_HLUT(i
), lut_dw
[i
]);
10789 } else if (vsi
->type
== I40E_VSI_SRIOV
) {
10790 if (lut_size
!= I40E_VF_HLUT_ARRAY_SIZE
)
10792 for (i
= 0; i
<= I40E_VFQF_HLUT_MAX_INDEX
; i
++)
10793 wr32(hw
, I40E_VFQF_HLUT1(i
, vf_id
), lut_dw
[i
]);
10795 dev_err(&pf
->pdev
->dev
, "Cannot set RSS LUT - invalid VSI type\n");
10804 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
10805 * @vsi: Pointer to VSI structure
10806 * @seed: Buffer to store the keys
10807 * @lut: Buffer to store the lookup table entries
10808 * @lut_size: Size of buffer to store the lookup table entries
10810 * Returns 0 on success, negative on failure
10812 static int i40e_get_rss_reg(struct i40e_vsi
*vsi
, u8
*seed
,
10813 u8
*lut
, u16 lut_size
)
10815 struct i40e_pf
*pf
= vsi
->back
;
10816 struct i40e_hw
*hw
= &pf
->hw
;
10820 u32
*seed_dw
= (u32
*)seed
;
10822 for (i
= 0; i
<= I40E_PFQF_HKEY_MAX_INDEX
; i
++)
10823 seed_dw
[i
] = i40e_read_rx_ctl(hw
, I40E_PFQF_HKEY(i
));
10826 u32
*lut_dw
= (u32
*)lut
;
10828 if (lut_size
!= I40E_HLUT_ARRAY_SIZE
)
10830 for (i
= 0; i
<= I40E_PFQF_HLUT_MAX_INDEX
; i
++)
10831 lut_dw
[i
] = rd32(hw
, I40E_PFQF_HLUT(i
));
10838 * i40e_config_rss - Configure RSS keys and lut
10839 * @vsi: Pointer to VSI structure
10840 * @seed: RSS hash seed
10841 * @lut: Lookup table
10842 * @lut_size: Lookup table size
10844 * Returns 0 on success, negative on failure
10846 int i40e_config_rss(struct i40e_vsi
*vsi
, u8
*seed
, u8
*lut
, u16 lut_size
)
10848 struct i40e_pf
*pf
= vsi
->back
;
10850 if (pf
->hw_features
& I40E_HW_RSS_AQ_CAPABLE
)
10851 return i40e_config_rss_aq(vsi
, seed
, lut
, lut_size
);
10853 return i40e_config_rss_reg(vsi
, seed
, lut
, lut_size
);
10857 * i40e_get_rss - Get RSS keys and lut
10858 * @vsi: Pointer to VSI structure
10859 * @seed: Buffer to store the keys
10860 * @lut: Buffer to store the lookup table entries
10861 * @lut_size: Size of buffer to store the lookup table entries
10863 * Returns 0 on success, negative on failure
10865 int i40e_get_rss(struct i40e_vsi
*vsi
, u8
*seed
, u8
*lut
, u16 lut_size
)
10867 struct i40e_pf
*pf
= vsi
->back
;
10869 if (pf
->hw_features
& I40E_HW_RSS_AQ_CAPABLE
)
10870 return i40e_get_rss_aq(vsi
, seed
, lut
, lut_size
);
10872 return i40e_get_rss_reg(vsi
, seed
, lut
, lut_size
);
10876 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
10877 * @pf: Pointer to board private structure
10878 * @lut: Lookup table
10879 * @rss_table_size: Lookup table size
10880 * @rss_size: Range of queue number for hashing
10882 void i40e_fill_rss_lut(struct i40e_pf
*pf
, u8
*lut
,
10883 u16 rss_table_size
, u16 rss_size
)
10887 for (i
= 0; i
< rss_table_size
; i
++)
10888 lut
[i
] = i
% rss_size
;
10892 * i40e_pf_config_rss - Prepare for RSS if used
10893 * @pf: board private structure
10895 static int i40e_pf_config_rss(struct i40e_pf
*pf
)
10897 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
10898 u8 seed
[I40E_HKEY_ARRAY_SIZE
];
10900 struct i40e_hw
*hw
= &pf
->hw
;
10905 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
10906 hena
= (u64
)i40e_read_rx_ctl(hw
, I40E_PFQF_HENA(0)) |
10907 ((u64
)i40e_read_rx_ctl(hw
, I40E_PFQF_HENA(1)) << 32);
10908 hena
|= i40e_pf_get_default_rss_hena(pf
);
10910 i40e_write_rx_ctl(hw
, I40E_PFQF_HENA(0), (u32
)hena
);
10911 i40e_write_rx_ctl(hw
, I40E_PFQF_HENA(1), (u32
)(hena
>> 32));
10913 /* Determine the RSS table size based on the hardware capabilities */
10914 reg_val
= i40e_read_rx_ctl(hw
, I40E_PFQF_CTL_0
);
10915 reg_val
= (pf
->rss_table_size
== 512) ?
10916 (reg_val
| I40E_PFQF_CTL_0_HASHLUTSIZE_512
) :
10917 (reg_val
& ~I40E_PFQF_CTL_0_HASHLUTSIZE_512
);
10918 i40e_write_rx_ctl(hw
, I40E_PFQF_CTL_0
, reg_val
);
10920 /* Determine the RSS size of the VSI */
10921 if (!vsi
->rss_size
) {
10923 /* If the firmware does something weird during VSI init, we
10924 * could end up with zero TCs. Check for that to avoid
10925 * divide-by-zero. It probably won't pass traffic, but it also
10928 qcount
= vsi
->num_queue_pairs
/
10929 (vsi
->tc_config
.numtc
? vsi
->tc_config
.numtc
: 1);
10930 vsi
->rss_size
= min_t(int, pf
->alloc_rss_size
, qcount
);
10932 if (!vsi
->rss_size
)
10935 lut
= kzalloc(vsi
->rss_table_size
, GFP_KERNEL
);
10939 /* Use user configured lut if there is one, otherwise use default */
10940 if (vsi
->rss_lut_user
)
10941 memcpy(lut
, vsi
->rss_lut_user
, vsi
->rss_table_size
);
10943 i40e_fill_rss_lut(pf
, lut
, vsi
->rss_table_size
, vsi
->rss_size
);
10945 /* Use user configured hash key if there is one, otherwise
10948 if (vsi
->rss_hkey_user
)
10949 memcpy(seed
, vsi
->rss_hkey_user
, I40E_HKEY_ARRAY_SIZE
);
10951 netdev_rss_key_fill((void *)seed
, I40E_HKEY_ARRAY_SIZE
);
10952 ret
= i40e_config_rss(vsi
, seed
, lut
, vsi
->rss_table_size
);
10959 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
10960 * @pf: board private structure
10961 * @queue_count: the requested queue count for rss.
10963 * returns 0 if rss is not enabled, if enabled returns the final rss queue
10964 * count which may be different from the requested queue count.
10965 * Note: expects to be called while under rtnl_lock()
10967 int i40e_reconfig_rss_queues(struct i40e_pf
*pf
, int queue_count
)
10969 struct i40e_vsi
*vsi
= pf
->vsi
[pf
->lan_vsi
];
10972 if (!(pf
->flags
& I40E_FLAG_RSS_ENABLED
))
10975 new_rss_size
= min_t(int, queue_count
, pf
->rss_size_max
);
10977 if (queue_count
!= vsi
->num_queue_pairs
) {
10980 vsi
->req_queue_pairs
= queue_count
;
10981 i40e_prep_for_reset(pf
, true);
10983 pf
->alloc_rss_size
= new_rss_size
;
10985 i40e_reset_and_rebuild(pf
, true, true);
10987 /* Discard the user configured hash keys and lut, if less
10988 * queues are enabled.
10990 if (queue_count
< vsi
->rss_size
) {
10991 i40e_clear_rss_config_user(vsi
);
10992 dev_dbg(&pf
->pdev
->dev
,
10993 "discard user configured hash keys and lut\n");
10996 /* Reset vsi->rss_size, as number of enabled queues changed */
10997 qcount
= vsi
->num_queue_pairs
/ vsi
->tc_config
.numtc
;
10998 vsi
->rss_size
= min_t(int, pf
->alloc_rss_size
, qcount
);
11000 i40e_pf_config_rss(pf
);
11002 dev_info(&pf
->pdev
->dev
, "User requested queue count/HW max RSS count: %d/%d\n",
11003 vsi
->req_queue_pairs
, pf
->rss_size_max
);
11004 return pf
->alloc_rss_size
;
11008 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
11009 * @pf: board private structure
11011 i40e_status
i40e_get_partition_bw_setting(struct i40e_pf
*pf
)
11013 i40e_status status
;
11014 bool min_valid
, max_valid
;
11015 u32 max_bw
, min_bw
;
11017 status
= i40e_read_bw_from_alt_ram(&pf
->hw
, &max_bw
, &min_bw
,
11018 &min_valid
, &max_valid
);
11022 pf
->min_bw
= min_bw
;
11024 pf
->max_bw
= max_bw
;
11031 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
11032 * @pf: board private structure
11034 i40e_status
i40e_set_partition_bw_setting(struct i40e_pf
*pf
)
11036 struct i40e_aqc_configure_partition_bw_data bw_data
;
11037 i40e_status status
;
11039 /* Set the valid bit for this PF */
11040 bw_data
.pf_valid_bits
= cpu_to_le16(BIT(pf
->hw
.pf_id
));
11041 bw_data
.max_bw
[pf
->hw
.pf_id
] = pf
->max_bw
& I40E_ALT_BW_VALUE_MASK
;
11042 bw_data
.min_bw
[pf
->hw
.pf_id
] = pf
->min_bw
& I40E_ALT_BW_VALUE_MASK
;
11044 /* Set the new bandwidths */
11045 status
= i40e_aq_configure_partition_bw(&pf
->hw
, &bw_data
, NULL
);
11051 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
11052 * @pf: board private structure
11054 i40e_status
i40e_commit_partition_bw_setting(struct i40e_pf
*pf
)
11056 /* Commit temporary BW setting to permanent NVM image */
11057 enum i40e_admin_queue_err last_aq_status
;
11061 if (pf
->hw
.partition_id
!= 1) {
11062 dev_info(&pf
->pdev
->dev
,
11063 "Commit BW only works on partition 1! This is partition %d",
11064 pf
->hw
.partition_id
);
11065 ret
= I40E_NOT_SUPPORTED
;
11066 goto bw_commit_out
;
11069 /* Acquire NVM for read access */
11070 ret
= i40e_acquire_nvm(&pf
->hw
, I40E_RESOURCE_READ
);
11071 last_aq_status
= pf
->hw
.aq
.asq_last_status
;
11073 dev_info(&pf
->pdev
->dev
,
11074 "Cannot acquire NVM for read access, err %s aq_err %s\n",
11075 i40e_stat_str(&pf
->hw
, ret
),
11076 i40e_aq_str(&pf
->hw
, last_aq_status
));
11077 goto bw_commit_out
;
11080 /* Read word 0x10 of NVM - SW compatibility word 1 */
11081 ret
= i40e_aq_read_nvm(&pf
->hw
,
11082 I40E_SR_NVM_CONTROL_WORD
,
11083 0x10, sizeof(nvm_word
), &nvm_word
,
11085 /* Save off last admin queue command status before releasing
11088 last_aq_status
= pf
->hw
.aq
.asq_last_status
;
11089 i40e_release_nvm(&pf
->hw
);
11091 dev_info(&pf
->pdev
->dev
, "NVM read error, err %s aq_err %s\n",
11092 i40e_stat_str(&pf
->hw
, ret
),
11093 i40e_aq_str(&pf
->hw
, last_aq_status
));
11094 goto bw_commit_out
;
11097 /* Wait a bit for NVM release to complete */
11100 /* Acquire NVM for write access */
11101 ret
= i40e_acquire_nvm(&pf
->hw
, I40E_RESOURCE_WRITE
);
11102 last_aq_status
= pf
->hw
.aq
.asq_last_status
;
11104 dev_info(&pf
->pdev
->dev
,
11105 "Cannot acquire NVM for write access, err %s aq_err %s\n",
11106 i40e_stat_str(&pf
->hw
, ret
),
11107 i40e_aq_str(&pf
->hw
, last_aq_status
));
11108 goto bw_commit_out
;
11110 /* Write it back out unchanged to initiate update NVM,
11111 * which will force a write of the shadow (alt) RAM to
11112 * the NVM - thus storing the bandwidth values permanently.
11114 ret
= i40e_aq_update_nvm(&pf
->hw
,
11115 I40E_SR_NVM_CONTROL_WORD
,
11116 0x10, sizeof(nvm_word
),
11117 &nvm_word
, true, 0, NULL
);
11118 /* Save off last admin queue command status before releasing
11121 last_aq_status
= pf
->hw
.aq
.asq_last_status
;
11122 i40e_release_nvm(&pf
->hw
);
11124 dev_info(&pf
->pdev
->dev
,
11125 "BW settings NOT SAVED, err %s aq_err %s\n",
11126 i40e_stat_str(&pf
->hw
, ret
),
11127 i40e_aq_str(&pf
->hw
, last_aq_status
));
11134 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
11135 * @pf: board private structure to initialize
11137 * i40e_sw_init initializes the Adapter private data structure.
11138 * Fields are initialized based on PCI device information and
11139 * OS network device settings (MTU size).
11141 static int i40e_sw_init(struct i40e_pf
*pf
)
11146 /* Set default capability flags */
11147 pf
->flags
= I40E_FLAG_RX_CSUM_ENABLED
|
11148 I40E_FLAG_MSI_ENABLED
|
11149 I40E_FLAG_MSIX_ENABLED
;
11151 /* Set default ITR */
11152 pf
->rx_itr_default
= I40E_ITR_RX_DEF
;
11153 pf
->tx_itr_default
= I40E_ITR_TX_DEF
;
11155 /* Depending on PF configurations, it is possible that the RSS
11156 * maximum might end up larger than the available queues
11158 pf
->rss_size_max
= BIT(pf
->hw
.func_caps
.rss_table_entry_width
);
11159 pf
->alloc_rss_size
= 1;
11160 pf
->rss_table_size
= pf
->hw
.func_caps
.rss_table_size
;
11161 pf
->rss_size_max
= min_t(int, pf
->rss_size_max
,
11162 pf
->hw
.func_caps
.num_tx_qp
);
11163 if (pf
->hw
.func_caps
.rss
) {
11164 pf
->flags
|= I40E_FLAG_RSS_ENABLED
;
11165 pf
->alloc_rss_size
= min_t(int, pf
->rss_size_max
,
11166 num_online_cpus());
11169 /* MFP mode enabled */
11170 if (pf
->hw
.func_caps
.npar_enable
|| pf
->hw
.func_caps
.flex10_enable
) {
11171 pf
->flags
|= I40E_FLAG_MFP_ENABLED
;
11172 dev_info(&pf
->pdev
->dev
, "MFP mode Enabled\n");
11173 if (i40e_get_partition_bw_setting(pf
)) {
11174 dev_warn(&pf
->pdev
->dev
,
11175 "Could not get partition bw settings\n");
11177 dev_info(&pf
->pdev
->dev
,
11178 "Partition BW Min = %8.8x, Max = %8.8x\n",
11179 pf
->min_bw
, pf
->max_bw
);
11181 /* nudge the Tx scheduler */
11182 i40e_set_partition_bw_setting(pf
);
11186 if ((pf
->hw
.func_caps
.fd_filters_guaranteed
> 0) ||
11187 (pf
->hw
.func_caps
.fd_filters_best_effort
> 0)) {
11188 pf
->flags
|= I40E_FLAG_FD_ATR_ENABLED
;
11189 pf
->atr_sample_rate
= I40E_DEFAULT_ATR_SAMPLE_RATE
;
11190 if (pf
->flags
& I40E_FLAG_MFP_ENABLED
&&
11191 pf
->hw
.num_partitions
> 1)
11192 dev_info(&pf
->pdev
->dev
,
11193 "Flow Director Sideband mode Disabled in MFP mode\n");
11195 pf
->flags
|= I40E_FLAG_FD_SB_ENABLED
;
11196 pf
->fdir_pf_filter_count
=
11197 pf
->hw
.func_caps
.fd_filters_guaranteed
;
11198 pf
->hw
.fdir_shared_filter_count
=
11199 pf
->hw
.func_caps
.fd_filters_best_effort
;
11202 if (pf
->hw
.mac
.type
== I40E_MAC_X722
) {
11203 pf
->hw_features
|= (I40E_HW_RSS_AQ_CAPABLE
|
11204 I40E_HW_128_QP_RSS_CAPABLE
|
11205 I40E_HW_ATR_EVICT_CAPABLE
|
11206 I40E_HW_WB_ON_ITR_CAPABLE
|
11207 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE
|
11208 I40E_HW_NO_PCI_LINK_CHECK
|
11209 I40E_HW_USE_SET_LLDP_MIB
|
11210 I40E_HW_GENEVE_OFFLOAD_CAPABLE
|
11211 I40E_HW_PTP_L4_CAPABLE
|
11212 I40E_HW_WOL_MC_MAGIC_PKT_WAKE
|
11213 I40E_HW_OUTER_UDP_CSUM_CAPABLE
);
11215 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
11216 if (rd32(&pf
->hw
, I40E_GLQF_FDEVICTENA(1)) !=
11217 I40E_FDEVICT_PCTYPE_DEFAULT
) {
11218 dev_warn(&pf
->pdev
->dev
,
11219 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
11220 pf
->hw_features
&= ~I40E_HW_ATR_EVICT_CAPABLE
;
11222 } else if ((pf
->hw
.aq
.api_maj_ver
> 1) ||
11223 ((pf
->hw
.aq
.api_maj_ver
== 1) &&
11224 (pf
->hw
.aq
.api_min_ver
> 4))) {
11225 /* Supported in FW API version higher than 1.4 */
11226 pf
->hw_features
|= I40E_HW_GENEVE_OFFLOAD_CAPABLE
;
11229 /* Enable HW ATR eviction if possible */
11230 if (pf
->hw_features
& I40E_HW_ATR_EVICT_CAPABLE
)
11231 pf
->flags
|= I40E_FLAG_HW_ATR_EVICT_ENABLED
;
11233 if ((pf
->hw
.mac
.type
== I40E_MAC_XL710
) &&
11234 (((pf
->hw
.aq
.fw_maj_ver
== 4) && (pf
->hw
.aq
.fw_min_ver
< 33)) ||
11235 (pf
->hw
.aq
.fw_maj_ver
< 4))) {
11236 pf
->hw_features
|= I40E_HW_RESTART_AUTONEG
;
11237 /* No DCB support for FW < v4.33 */
11238 pf
->hw_features
|= I40E_HW_NO_DCB_SUPPORT
;
11241 /* Disable FW LLDP if FW < v4.3 */
11242 if ((pf
->hw
.mac
.type
== I40E_MAC_XL710
) &&
11243 (((pf
->hw
.aq
.fw_maj_ver
== 4) && (pf
->hw
.aq
.fw_min_ver
< 3)) ||
11244 (pf
->hw
.aq
.fw_maj_ver
< 4)))
11245 pf
->hw_features
|= I40E_HW_STOP_FW_LLDP
;
11247 /* Use the FW Set LLDP MIB API if FW > v4.40 */
11248 if ((pf
->hw
.mac
.type
== I40E_MAC_XL710
) &&
11249 (((pf
->hw
.aq
.fw_maj_ver
== 4) && (pf
->hw
.aq
.fw_min_ver
>= 40)) ||
11250 (pf
->hw
.aq
.fw_maj_ver
>= 5)))
11251 pf
->hw_features
|= I40E_HW_USE_SET_LLDP_MIB
;
11253 /* Enable PTP L4 if FW > v6.0 */
11254 if (pf
->hw
.mac
.type
== I40E_MAC_XL710
&&
11255 pf
->hw
.aq
.fw_maj_ver
>= 6)
11256 pf
->hw_features
|= I40E_HW_PTP_L4_CAPABLE
;
11258 if (pf
->hw
.func_caps
.vmdq
&& num_online_cpus() != 1) {
11259 pf
->num_vmdq_vsis
= I40E_DEFAULT_NUM_VMDQ_VSI
;
11260 pf
->flags
|= I40E_FLAG_VMDQ_ENABLED
;
11261 pf
->num_vmdq_qps
= i40e_default_queues_per_vmdq(pf
);
11264 if (pf
->hw
.func_caps
.iwarp
&& num_online_cpus() != 1) {
11265 pf
->flags
|= I40E_FLAG_IWARP_ENABLED
;
11266 /* IWARP needs one extra vector for CQP just like MISC.*/
11267 pf
->num_iwarp_msix
= (int)num_online_cpus() + 1;
11269 /* Stopping the FW LLDP engine is only supported on the
11270 * XL710 with a FW ver >= 1.7. Also, stopping FW LLDP
11271 * engine is not supported if NPAR is functioning on this
11274 if (pf
->hw
.mac
.type
== I40E_MAC_XL710
&&
11275 !pf
->hw
.func_caps
.npar_enable
&&
11276 (pf
->hw
.aq
.api_maj_ver
> 1 ||
11277 (pf
->hw
.aq
.api_maj_ver
== 1 && pf
->hw
.aq
.api_min_ver
> 6)))
11278 pf
->hw_features
|= I40E_HW_STOPPABLE_FW_LLDP
;
11280 #ifdef CONFIG_PCI_IOV
11281 if (pf
->hw
.func_caps
.num_vfs
&& pf
->hw
.partition_id
== 1) {
11282 pf
->num_vf_qps
= I40E_DEFAULT_QUEUES_PER_VF
;
11283 pf
->flags
|= I40E_FLAG_SRIOV_ENABLED
;
11284 pf
->num_req_vfs
= min_t(int,
11285 pf
->hw
.func_caps
.num_vfs
,
11286 I40E_MAX_VF_COUNT
);
11288 #endif /* CONFIG_PCI_IOV */
11289 pf
->eeprom_version
= 0xDEAD;
11290 pf
->lan_veb
= I40E_NO_VEB
;
11291 pf
->lan_vsi
= I40E_NO_VSI
;
11293 /* By default FW has this off for performance reasons */
11294 pf
->flags
&= ~I40E_FLAG_VEB_STATS_ENABLED
;
11296 /* set up queue assignment tracking */
11297 size
= sizeof(struct i40e_lump_tracking
)
11298 + (sizeof(u16
) * pf
->hw
.func_caps
.num_tx_qp
);
11299 pf
->qp_pile
= kzalloc(size
, GFP_KERNEL
);
11300 if (!pf
->qp_pile
) {
11304 pf
->qp_pile
->num_entries
= pf
->hw
.func_caps
.num_tx_qp
;
11305 pf
->qp_pile
->search_hint
= 0;
11307 pf
->tx_timeout_recovery_level
= 1;
11309 mutex_init(&pf
->switch_mutex
);
11316 * i40e_set_ntuple - set the ntuple feature flag and take action
11317 * @pf: board private structure to initialize
11318 * @features: the feature set that the stack is suggesting
11320 * returns a bool to indicate if reset needs to happen
11322 bool i40e_set_ntuple(struct i40e_pf
*pf
, netdev_features_t features
)
11324 bool need_reset
= false;
11326 /* Check if Flow Director n-tuple support was enabled or disabled. If
11327 * the state changed, we need to reset.
11329 if (features
& NETIF_F_NTUPLE
) {
11330 /* Enable filters and mark for reset */
11331 if (!(pf
->flags
& I40E_FLAG_FD_SB_ENABLED
))
11333 /* enable FD_SB only if there is MSI-X vector and no cloud
11336 if (pf
->num_fdsb_msix
> 0 && !pf
->num_cloud_filters
) {
11337 pf
->flags
|= I40E_FLAG_FD_SB_ENABLED
;
11338 pf
->flags
&= ~I40E_FLAG_FD_SB_INACTIVE
;
11341 /* turn off filters, mark for reset and clear SW filter list */
11342 if (pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) {
11344 i40e_fdir_filter_exit(pf
);
11346 pf
->flags
&= ~I40E_FLAG_FD_SB_ENABLED
;
11347 clear_bit(__I40E_FD_SB_AUTO_DISABLED
, pf
->state
);
11348 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
11350 /* reset fd counters */
11351 pf
->fd_add_err
= 0;
11352 pf
->fd_atr_cnt
= 0;
11353 /* if ATR was auto disabled it can be re-enabled. */
11354 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED
, pf
->state
))
11355 if ((pf
->flags
& I40E_FLAG_FD_ATR_ENABLED
) &&
11356 (I40E_DEBUG_FD
& pf
->hw
.debug_mask
))
11357 dev_info(&pf
->pdev
->dev
, "ATR re-enabled.\n");
11363 * i40e_clear_rss_lut - clear the rx hash lookup table
11364 * @vsi: the VSI being configured
11366 static void i40e_clear_rss_lut(struct i40e_vsi
*vsi
)
11368 struct i40e_pf
*pf
= vsi
->back
;
11369 struct i40e_hw
*hw
= &pf
->hw
;
11370 u16 vf_id
= vsi
->vf_id
;
11373 if (vsi
->type
== I40E_VSI_MAIN
) {
11374 for (i
= 0; i
<= I40E_PFQF_HLUT_MAX_INDEX
; i
++)
11375 wr32(hw
, I40E_PFQF_HLUT(i
), 0);
11376 } else if (vsi
->type
== I40E_VSI_SRIOV
) {
11377 for (i
= 0; i
<= I40E_VFQF_HLUT_MAX_INDEX
; i
++)
11378 i40e_write_rx_ctl(hw
, I40E_VFQF_HLUT1(i
, vf_id
), 0);
11380 dev_err(&pf
->pdev
->dev
, "Cannot set RSS LUT - invalid VSI type\n");
11385 * i40e_set_features - set the netdev feature flags
11386 * @netdev: ptr to the netdev being adjusted
11387 * @features: the feature set that the stack is suggesting
11388 * Note: expects to be called while under rtnl_lock()
11390 static int i40e_set_features(struct net_device
*netdev
,
11391 netdev_features_t features
)
11393 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
11394 struct i40e_vsi
*vsi
= np
->vsi
;
11395 struct i40e_pf
*pf
= vsi
->back
;
11398 if (features
& NETIF_F_RXHASH
&& !(netdev
->features
& NETIF_F_RXHASH
))
11399 i40e_pf_config_rss(pf
);
11400 else if (!(features
& NETIF_F_RXHASH
) &&
11401 netdev
->features
& NETIF_F_RXHASH
)
11402 i40e_clear_rss_lut(vsi
);
11404 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
11405 i40e_vlan_stripping_enable(vsi
);
11407 i40e_vlan_stripping_disable(vsi
);
11409 if (!(features
& NETIF_F_HW_TC
) && pf
->num_cloud_filters
) {
11410 dev_err(&pf
->pdev
->dev
,
11411 "Offloaded tc filters active, can't turn hw_tc_offload off");
11415 need_reset
= i40e_set_ntuple(pf
, features
);
11418 i40e_do_reset(pf
, I40E_PF_RESET_FLAG
, true);
11424 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
11425 * @pf: board private structure
11426 * @port: The UDP port to look up
11428 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
11430 static u8
i40e_get_udp_port_idx(struct i40e_pf
*pf
, u16 port
)
11434 for (i
= 0; i
< I40E_MAX_PF_UDP_OFFLOAD_PORTS
; i
++) {
11435 /* Do not report ports with pending deletions as
11438 if (!port
&& (pf
->pending_udp_bitmap
& BIT_ULL(i
)))
11440 if (pf
->udp_ports
[i
].port
== port
)
11448 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
11449 * @netdev: This physical port's netdev
11450 * @ti: Tunnel endpoint information
11452 static void i40e_udp_tunnel_add(struct net_device
*netdev
,
11453 struct udp_tunnel_info
*ti
)
11455 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
11456 struct i40e_vsi
*vsi
= np
->vsi
;
11457 struct i40e_pf
*pf
= vsi
->back
;
11458 u16 port
= ntohs(ti
->port
);
11462 idx
= i40e_get_udp_port_idx(pf
, port
);
11464 /* Check if port already exists */
11465 if (idx
< I40E_MAX_PF_UDP_OFFLOAD_PORTS
) {
11466 netdev_info(netdev
, "port %d already offloaded\n", port
);
11470 /* Now check if there is space to add the new port */
11471 next_idx
= i40e_get_udp_port_idx(pf
, 0);
11473 if (next_idx
== I40E_MAX_PF_UDP_OFFLOAD_PORTS
) {
11474 netdev_info(netdev
, "maximum number of offloaded UDP ports reached, not adding port %d\n",
11479 switch (ti
->type
) {
11480 case UDP_TUNNEL_TYPE_VXLAN
:
11481 pf
->udp_ports
[next_idx
].type
= I40E_AQC_TUNNEL_TYPE_VXLAN
;
11483 case UDP_TUNNEL_TYPE_GENEVE
:
11484 if (!(pf
->hw_features
& I40E_HW_GENEVE_OFFLOAD_CAPABLE
))
11486 pf
->udp_ports
[next_idx
].type
= I40E_AQC_TUNNEL_TYPE_NGE
;
11492 /* New port: add it and mark its index in the bitmap */
11493 pf
->udp_ports
[next_idx
].port
= port
;
11494 pf
->udp_ports
[next_idx
].filter_index
= I40E_UDP_PORT_INDEX_UNUSED
;
11495 pf
->pending_udp_bitmap
|= BIT_ULL(next_idx
);
11496 set_bit(__I40E_UDP_FILTER_SYNC_PENDING
, pf
->state
);
11500 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
11501 * @netdev: This physical port's netdev
11502 * @ti: Tunnel endpoint information
11504 static void i40e_udp_tunnel_del(struct net_device
*netdev
,
11505 struct udp_tunnel_info
*ti
)
11507 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
11508 struct i40e_vsi
*vsi
= np
->vsi
;
11509 struct i40e_pf
*pf
= vsi
->back
;
11510 u16 port
= ntohs(ti
->port
);
11513 idx
= i40e_get_udp_port_idx(pf
, port
);
11515 /* Check if port already exists */
11516 if (idx
>= I40E_MAX_PF_UDP_OFFLOAD_PORTS
)
11519 switch (ti
->type
) {
11520 case UDP_TUNNEL_TYPE_VXLAN
:
11521 if (pf
->udp_ports
[idx
].type
!= I40E_AQC_TUNNEL_TYPE_VXLAN
)
11524 case UDP_TUNNEL_TYPE_GENEVE
:
11525 if (pf
->udp_ports
[idx
].type
!= I40E_AQC_TUNNEL_TYPE_NGE
)
11532 /* if port exists, set it to 0 (mark for deletion)
11533 * and make it pending
11535 pf
->udp_ports
[idx
].port
= 0;
11537 /* Toggle pending bit instead of setting it. This way if we are
11538 * deleting a port that has yet to be added we just clear the pending
11539 * bit and don't have to worry about it.
11541 pf
->pending_udp_bitmap
^= BIT_ULL(idx
);
11542 set_bit(__I40E_UDP_FILTER_SYNC_PENDING
, pf
->state
);
11546 netdev_warn(netdev
, "UDP port %d was not found, not deleting\n",
11550 static int i40e_get_phys_port_id(struct net_device
*netdev
,
11551 struct netdev_phys_item_id
*ppid
)
11553 struct i40e_netdev_priv
*np
= netdev_priv(netdev
);
11554 struct i40e_pf
*pf
= np
->vsi
->back
;
11555 struct i40e_hw
*hw
= &pf
->hw
;
11557 if (!(pf
->hw_features
& I40E_HW_PORT_ID_VALID
))
11558 return -EOPNOTSUPP
;
11560 ppid
->id_len
= min_t(int, sizeof(hw
->mac
.port_addr
), sizeof(ppid
->id
));
11561 memcpy(ppid
->id
, hw
->mac
.port_addr
, ppid
->id_len
);
11567 * i40e_ndo_fdb_add - add an entry to the hardware database
11568 * @ndm: the input from the stack
11569 * @tb: pointer to array of nladdr (unused)
11570 * @dev: the net device pointer
11571 * @addr: the MAC address entry being added
11573 * @flags: instructions from stack about fdb operation
11575 static int i40e_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
11576 struct net_device
*dev
,
11577 const unsigned char *addr
, u16 vid
,
11580 struct i40e_netdev_priv
*np
= netdev_priv(dev
);
11581 struct i40e_pf
*pf
= np
->vsi
->back
;
11584 if (!(pf
->flags
& I40E_FLAG_SRIOV_ENABLED
))
11585 return -EOPNOTSUPP
;
11588 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev
->name
);
11592 /* Hardware does not support aging addresses so if a
11593 * ndm_state is given only allow permanent addresses
11595 if (ndm
->ndm_state
&& !(ndm
->ndm_state
& NUD_PERMANENT
)) {
11596 netdev_info(dev
, "FDB only supports static addresses\n");
11600 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
))
11601 err
= dev_uc_add_excl(dev
, addr
);
11602 else if (is_multicast_ether_addr(addr
))
11603 err
= dev_mc_add_excl(dev
, addr
);
11607 /* Only return duplicate errors if NLM_F_EXCL is set */
11608 if (err
== -EEXIST
&& !(flags
& NLM_F_EXCL
))
11615 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
11616 * @dev: the netdev being configured
11617 * @nlh: RTNL message
11618 * @flags: bridge flags
11620 * Inserts a new hardware bridge if not already created and
11621 * enables the bridging mode requested (VEB or VEPA). If the
11622 * hardware bridge has already been inserted and the request
11623 * is to change the mode then that requires a PF reset to
11624 * allow rebuild of the components with required hardware
11625 * bridge mode enabled.
11627 * Note: expects to be called while under rtnl_lock()
11629 static int i40e_ndo_bridge_setlink(struct net_device
*dev
,
11630 struct nlmsghdr
*nlh
,
11633 struct i40e_netdev_priv
*np
= netdev_priv(dev
);
11634 struct i40e_vsi
*vsi
= np
->vsi
;
11635 struct i40e_pf
*pf
= vsi
->back
;
11636 struct i40e_veb
*veb
= NULL
;
11637 struct nlattr
*attr
, *br_spec
;
11640 /* Only for PF VSI for now */
11641 if (vsi
->seid
!= pf
->vsi
[pf
->lan_vsi
]->seid
)
11642 return -EOPNOTSUPP
;
11644 /* Find the HW bridge for PF VSI */
11645 for (i
= 0; i
< I40E_MAX_VEB
&& !veb
; i
++) {
11646 if (pf
->veb
[i
] && pf
->veb
[i
]->seid
== vsi
->uplink_seid
)
11650 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
11652 nla_for_each_nested(attr
, br_spec
, rem
) {
11655 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
11658 mode
= nla_get_u16(attr
);
11659 if ((mode
!= BRIDGE_MODE_VEPA
) &&
11660 (mode
!= BRIDGE_MODE_VEB
))
11663 /* Insert a new HW bridge */
11665 veb
= i40e_veb_setup(pf
, 0, vsi
->uplink_seid
, vsi
->seid
,
11666 vsi
->tc_config
.enabled_tc
);
11668 veb
->bridge_mode
= mode
;
11669 i40e_config_bridge_mode(veb
);
11671 /* No Bridge HW offload available */
11675 } else if (mode
!= veb
->bridge_mode
) {
11676 /* Existing HW bridge but different mode needs reset */
11677 veb
->bridge_mode
= mode
;
11678 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
11679 if (mode
== BRIDGE_MODE_VEB
)
11680 pf
->flags
|= I40E_FLAG_VEB_MODE_ENABLED
;
11682 pf
->flags
&= ~I40E_FLAG_VEB_MODE_ENABLED
;
11683 i40e_do_reset(pf
, I40E_PF_RESET_FLAG
, true);
11692 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
11695 * @seq: RTNL message seq #
11696 * @dev: the netdev being configured
11697 * @filter_mask: unused
11698 * @nlflags: netlink flags passed in
11700 * Return the mode in which the hardware bridge is operating in
11703 static int i40e_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
11704 struct net_device
*dev
,
11705 u32 __always_unused filter_mask
,
11708 struct i40e_netdev_priv
*np
= netdev_priv(dev
);
11709 struct i40e_vsi
*vsi
= np
->vsi
;
11710 struct i40e_pf
*pf
= vsi
->back
;
11711 struct i40e_veb
*veb
= NULL
;
11714 /* Only for PF VSI for now */
11715 if (vsi
->seid
!= pf
->vsi
[pf
->lan_vsi
]->seid
)
11716 return -EOPNOTSUPP
;
11718 /* Find the HW bridge for the PF VSI */
11719 for (i
= 0; i
< I40E_MAX_VEB
&& !veb
; i
++) {
11720 if (pf
->veb
[i
] && pf
->veb
[i
]->seid
== vsi
->uplink_seid
)
11727 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
, veb
->bridge_mode
,
11728 0, 0, nlflags
, filter_mask
, NULL
);
11732 * i40e_features_check - Validate encapsulated packet conforms to limits
11734 * @dev: This physical port's netdev
11735 * @features: Offload features that the stack believes apply
11737 static netdev_features_t
i40e_features_check(struct sk_buff
*skb
,
11738 struct net_device
*dev
,
11739 netdev_features_t features
)
11743 /* No point in doing any of this if neither checksum nor GSO are
11744 * being requested for this frame. We can rule out both by just
11745 * checking for CHECKSUM_PARTIAL
11747 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
11750 /* We cannot support GSO if the MSS is going to be less than
11751 * 64 bytes. If it is then we need to drop support for GSO.
11753 if (skb_is_gso(skb
) && (skb_shinfo(skb
)->gso_size
< 64))
11754 features
&= ~NETIF_F_GSO_MASK
;
11756 /* MACLEN can support at most 63 words */
11757 len
= skb_network_header(skb
) - skb
->data
;
11758 if (len
& ~(63 * 2))
11761 /* IPLEN and EIPLEN can support at most 127 dwords */
11762 len
= skb_transport_header(skb
) - skb_network_header(skb
);
11763 if (len
& ~(127 * 4))
11766 if (skb
->encapsulation
) {
11767 /* L4TUNLEN can support 127 words */
11768 len
= skb_inner_network_header(skb
) - skb_transport_header(skb
);
11769 if (len
& ~(127 * 2))
11772 /* IPLEN can support at most 127 dwords */
11773 len
= skb_inner_transport_header(skb
) -
11774 skb_inner_network_header(skb
);
11775 if (len
& ~(127 * 4))
11779 /* No need to validate L4LEN as TCP is the only protocol with a
11780 * a flexible value and we support all possible values supported
11781 * by TCP, which is at most 15 dwords
11786 return features
& ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
11790 * i40e_xdp_setup - add/remove an XDP program
11791 * @vsi: VSI to changed
11792 * @prog: XDP program
11794 static int i40e_xdp_setup(struct i40e_vsi
*vsi
,
11795 struct bpf_prog
*prog
)
11797 int frame_size
= vsi
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
11798 struct i40e_pf
*pf
= vsi
->back
;
11799 struct bpf_prog
*old_prog
;
11803 /* Don't allow frames that span over multiple buffers */
11804 if (frame_size
> vsi
->rx_buf_len
)
11807 if (!i40e_enabled_xdp_vsi(vsi
) && !prog
)
11810 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
11811 need_reset
= (i40e_enabled_xdp_vsi(vsi
) != !!prog
);
11814 i40e_prep_for_reset(pf
, true);
11816 old_prog
= xchg(&vsi
->xdp_prog
, prog
);
11819 i40e_reset_and_rebuild(pf
, true, true);
11821 for (i
= 0; i
< vsi
->num_queue_pairs
; i
++)
11822 WRITE_ONCE(vsi
->rx_rings
[i
]->xdp_prog
, vsi
->xdp_prog
);
11825 bpf_prog_put(old_prog
);
11831 * i40e_xdp - implements ndo_bpf for i40e
11833 * @xdp: XDP command
11835 static int i40e_xdp(struct net_device
*dev
,
11836 struct netdev_bpf
*xdp
)
11838 struct i40e_netdev_priv
*np
= netdev_priv(dev
);
11839 struct i40e_vsi
*vsi
= np
->vsi
;
11841 if (vsi
->type
!= I40E_VSI_MAIN
)
11844 switch (xdp
->command
) {
11845 case XDP_SETUP_PROG
:
11846 return i40e_xdp_setup(vsi
, xdp
->prog
);
11847 case XDP_QUERY_PROG
:
11848 xdp
->prog_id
= vsi
->xdp_prog
? vsi
->xdp_prog
->aux
->id
: 0;
11855 static const struct net_device_ops i40e_netdev_ops
= {
11856 .ndo_open
= i40e_open
,
11857 .ndo_stop
= i40e_close
,
11858 .ndo_start_xmit
= i40e_lan_xmit_frame
,
11859 .ndo_get_stats64
= i40e_get_netdev_stats_struct
,
11860 .ndo_set_rx_mode
= i40e_set_rx_mode
,
11861 .ndo_validate_addr
= eth_validate_addr
,
11862 .ndo_set_mac_address
= i40e_set_mac
,
11863 .ndo_change_mtu
= i40e_change_mtu
,
11864 .ndo_do_ioctl
= i40e_ioctl
,
11865 .ndo_tx_timeout
= i40e_tx_timeout
,
11866 .ndo_vlan_rx_add_vid
= i40e_vlan_rx_add_vid
,
11867 .ndo_vlan_rx_kill_vid
= i40e_vlan_rx_kill_vid
,
11868 #ifdef CONFIG_NET_POLL_CONTROLLER
11869 .ndo_poll_controller
= i40e_netpoll
,
11871 .ndo_setup_tc
= __i40e_setup_tc
,
11872 .ndo_set_features
= i40e_set_features
,
11873 .ndo_set_vf_mac
= i40e_ndo_set_vf_mac
,
11874 .ndo_set_vf_vlan
= i40e_ndo_set_vf_port_vlan
,
11875 .ndo_set_vf_rate
= i40e_ndo_set_vf_bw
,
11876 .ndo_get_vf_config
= i40e_ndo_get_vf_config
,
11877 .ndo_set_vf_link_state
= i40e_ndo_set_vf_link_state
,
11878 .ndo_set_vf_spoofchk
= i40e_ndo_set_vf_spoofchk
,
11879 .ndo_set_vf_trust
= i40e_ndo_set_vf_trust
,
11880 .ndo_udp_tunnel_add
= i40e_udp_tunnel_add
,
11881 .ndo_udp_tunnel_del
= i40e_udp_tunnel_del
,
11882 .ndo_get_phys_port_id
= i40e_get_phys_port_id
,
11883 .ndo_fdb_add
= i40e_ndo_fdb_add
,
11884 .ndo_features_check
= i40e_features_check
,
11885 .ndo_bridge_getlink
= i40e_ndo_bridge_getlink
,
11886 .ndo_bridge_setlink
= i40e_ndo_bridge_setlink
,
11887 .ndo_bpf
= i40e_xdp
,
11888 .ndo_xdp_xmit
= i40e_xdp_xmit
,
11892 * i40e_config_netdev - Setup the netdev flags
11893 * @vsi: the VSI being configured
11895 * Returns 0 on success, negative value on failure
11897 static int i40e_config_netdev(struct i40e_vsi
*vsi
)
11899 struct i40e_pf
*pf
= vsi
->back
;
11900 struct i40e_hw
*hw
= &pf
->hw
;
11901 struct i40e_netdev_priv
*np
;
11902 struct net_device
*netdev
;
11903 u8 broadcast
[ETH_ALEN
];
11904 u8 mac_addr
[ETH_ALEN
];
11906 netdev_features_t hw_enc_features
;
11907 netdev_features_t hw_features
;
11909 etherdev_size
= sizeof(struct i40e_netdev_priv
);
11910 netdev
= alloc_etherdev_mq(etherdev_size
, vsi
->alloc_queue_pairs
);
11914 vsi
->netdev
= netdev
;
11915 np
= netdev_priv(netdev
);
11918 hw_enc_features
= NETIF_F_SG
|
11920 NETIF_F_IPV6_CSUM
|
11922 NETIF_F_SOFT_FEATURES
|
11927 NETIF_F_GSO_GRE_CSUM
|
11928 NETIF_F_GSO_PARTIAL
|
11929 NETIF_F_GSO_UDP_TUNNEL
|
11930 NETIF_F_GSO_UDP_TUNNEL_CSUM
|
11936 if (!(pf
->hw_features
& I40E_HW_OUTER_UDP_CSUM_CAPABLE
))
11937 netdev
->gso_partial_features
|= NETIF_F_GSO_UDP_TUNNEL_CSUM
;
11939 netdev
->gso_partial_features
|= NETIF_F_GSO_GRE_CSUM
;
11941 netdev
->hw_enc_features
|= hw_enc_features
;
11943 /* record features VLANs can make use of */
11944 netdev
->vlan_features
|= hw_enc_features
| NETIF_F_TSO_MANGLEID
;
11946 if (!(pf
->flags
& I40E_FLAG_MFP_ENABLED
))
11947 netdev
->hw_features
|= NETIF_F_NTUPLE
| NETIF_F_HW_TC
;
11949 hw_features
= hw_enc_features
|
11950 NETIF_F_HW_VLAN_CTAG_TX
|
11951 NETIF_F_HW_VLAN_CTAG_RX
;
11953 netdev
->hw_features
|= hw_features
;
11955 netdev
->features
|= hw_features
| NETIF_F_HW_VLAN_CTAG_FILTER
;
11956 netdev
->hw_enc_features
|= NETIF_F_TSO_MANGLEID
;
11958 if (vsi
->type
== I40E_VSI_MAIN
) {
11959 SET_NETDEV_DEV(netdev
, &pf
->pdev
->dev
);
11960 ether_addr_copy(mac_addr
, hw
->mac
.perm_addr
);
11961 /* The following steps are necessary for two reasons. First,
11962 * some older NVM configurations load a default MAC-VLAN
11963 * filter that will accept any tagged packet, and we want to
11964 * replace this with a normal filter. Additionally, it is
11965 * possible our MAC address was provided by the platform using
11966 * Open Firmware or similar.
11968 * Thus, we need to remove the default filter and install one
11969 * specific to the MAC address.
11971 i40e_rm_default_mac_filter(vsi
, mac_addr
);
11972 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
11973 i40e_add_mac_filter(vsi
, mac_addr
);
11974 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
11976 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
11977 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
11978 * the end, which is 4 bytes long, so force truncation of the
11979 * original name by IFNAMSIZ - 4
11981 snprintf(netdev
->name
, IFNAMSIZ
, "%.*sv%%d",
11983 pf
->vsi
[pf
->lan_vsi
]->netdev
->name
);
11984 eth_random_addr(mac_addr
);
11986 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
11987 i40e_add_mac_filter(vsi
, mac_addr
);
11988 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
11991 /* Add the broadcast filter so that we initially will receive
11992 * broadcast packets. Note that when a new VLAN is first added the
11993 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
11994 * specific filters as part of transitioning into "vlan" operation.
11995 * When more VLANs are added, the driver will copy each existing MAC
11996 * filter and add it for the new VLAN.
11998 * Broadcast filters are handled specially by
11999 * i40e_sync_filters_subtask, as the driver must to set the broadcast
12000 * promiscuous bit instead of adding this directly as a MAC/VLAN
12001 * filter. The subtask will update the correct broadcast promiscuous
12002 * bits as VLANs become active or inactive.
12004 eth_broadcast_addr(broadcast
);
12005 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
12006 i40e_add_mac_filter(vsi
, broadcast
);
12007 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
12009 ether_addr_copy(netdev
->dev_addr
, mac_addr
);
12010 ether_addr_copy(netdev
->perm_addr
, mac_addr
);
12012 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
12013 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
12014 /* Setup netdev TC information */
12015 i40e_vsi_config_netdev_tc(vsi
, vsi
->tc_config
.enabled_tc
);
12017 netdev
->netdev_ops
= &i40e_netdev_ops
;
12018 netdev
->watchdog_timeo
= 5 * HZ
;
12019 i40e_set_ethtool_ops(netdev
);
12021 /* MTU range: 68 - 9706 */
12022 netdev
->min_mtu
= ETH_MIN_MTU
;
12023 netdev
->max_mtu
= I40E_MAX_RXBUFFER
- I40E_PACKET_HDR_PAD
;
12029 * i40e_vsi_delete - Delete a VSI from the switch
12030 * @vsi: the VSI being removed
12032 * Returns 0 on success, negative value on failure
12034 static void i40e_vsi_delete(struct i40e_vsi
*vsi
)
12036 /* remove default VSI is not allowed */
12037 if (vsi
== vsi
->back
->vsi
[vsi
->back
->lan_vsi
])
12040 i40e_aq_delete_element(&vsi
->back
->hw
, vsi
->seid
, NULL
);
12044 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
12045 * @vsi: the VSI being queried
12047 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
12049 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi
*vsi
)
12051 struct i40e_veb
*veb
;
12052 struct i40e_pf
*pf
= vsi
->back
;
12054 /* Uplink is not a bridge so default to VEB */
12055 if (vsi
->veb_idx
== I40E_NO_VEB
)
12058 veb
= pf
->veb
[vsi
->veb_idx
];
12060 dev_info(&pf
->pdev
->dev
,
12061 "There is no veb associated with the bridge\n");
12065 /* Uplink is a bridge in VEPA mode */
12066 if (veb
->bridge_mode
& BRIDGE_MODE_VEPA
) {
12069 /* Uplink is a bridge in VEB mode */
12073 /* VEPA is now default bridge, so return 0 */
12078 * i40e_add_vsi - Add a VSI to the switch
12079 * @vsi: the VSI being configured
12081 * This initializes a VSI context depending on the VSI type to be added and
12082 * passes it down to the add_vsi aq command.
12084 static int i40e_add_vsi(struct i40e_vsi
*vsi
)
12087 struct i40e_pf
*pf
= vsi
->back
;
12088 struct i40e_hw
*hw
= &pf
->hw
;
12089 struct i40e_vsi_context ctxt
;
12090 struct i40e_mac_filter
*f
;
12091 struct hlist_node
*h
;
12094 u8 enabled_tc
= 0x1; /* TC0 enabled */
12097 memset(&ctxt
, 0, sizeof(ctxt
));
12098 switch (vsi
->type
) {
12099 case I40E_VSI_MAIN
:
12100 /* The PF's main VSI is already setup as part of the
12101 * device initialization, so we'll not bother with
12102 * the add_vsi call, but we will retrieve the current
12105 ctxt
.seid
= pf
->main_vsi_seid
;
12106 ctxt
.pf_num
= pf
->hw
.pf_id
;
12108 ret
= i40e_aq_get_vsi_params(&pf
->hw
, &ctxt
, NULL
);
12109 ctxt
.flags
= I40E_AQ_VSI_TYPE_PF
;
12111 dev_info(&pf
->pdev
->dev
,
12112 "couldn't get PF vsi config, err %s aq_err %s\n",
12113 i40e_stat_str(&pf
->hw
, ret
),
12114 i40e_aq_str(&pf
->hw
,
12115 pf
->hw
.aq
.asq_last_status
));
12118 vsi
->info
= ctxt
.info
;
12119 vsi
->info
.valid_sections
= 0;
12121 vsi
->seid
= ctxt
.seid
;
12122 vsi
->id
= ctxt
.vsi_number
;
12124 enabled_tc
= i40e_pf_get_tc_map(pf
);
12126 /* Source pruning is enabled by default, so the flag is
12127 * negative logic - if it's set, we need to fiddle with
12128 * the VSI to disable source pruning.
12130 if (pf
->flags
& I40E_FLAG_SOURCE_PRUNING_DISABLED
) {
12131 memset(&ctxt
, 0, sizeof(ctxt
));
12132 ctxt
.seid
= pf
->main_vsi_seid
;
12133 ctxt
.pf_num
= pf
->hw
.pf_id
;
12135 ctxt
.info
.valid_sections
|=
12136 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
12137 ctxt
.info
.switch_id
=
12138 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB
);
12139 ret
= i40e_aq_update_vsi_params(hw
, &ctxt
, NULL
);
12141 dev_info(&pf
->pdev
->dev
,
12142 "update vsi failed, err %s aq_err %s\n",
12143 i40e_stat_str(&pf
->hw
, ret
),
12144 i40e_aq_str(&pf
->hw
,
12145 pf
->hw
.aq
.asq_last_status
));
12151 /* MFP mode setup queue map and update VSI */
12152 if ((pf
->flags
& I40E_FLAG_MFP_ENABLED
) &&
12153 !(pf
->hw
.func_caps
.iscsi
)) { /* NIC type PF */
12154 memset(&ctxt
, 0, sizeof(ctxt
));
12155 ctxt
.seid
= pf
->main_vsi_seid
;
12156 ctxt
.pf_num
= pf
->hw
.pf_id
;
12158 i40e_vsi_setup_queue_map(vsi
, &ctxt
, enabled_tc
, false);
12159 ret
= i40e_aq_update_vsi_params(hw
, &ctxt
, NULL
);
12161 dev_info(&pf
->pdev
->dev
,
12162 "update vsi failed, err %s aq_err %s\n",
12163 i40e_stat_str(&pf
->hw
, ret
),
12164 i40e_aq_str(&pf
->hw
,
12165 pf
->hw
.aq
.asq_last_status
));
12169 /* update the local VSI info queue map */
12170 i40e_vsi_update_queue_map(vsi
, &ctxt
);
12171 vsi
->info
.valid_sections
= 0;
12173 /* Default/Main VSI is only enabled for TC0
12174 * reconfigure it to enable all TCs that are
12175 * available on the port in SFP mode.
12176 * For MFP case the iSCSI PF would use this
12177 * flow to enable LAN+iSCSI TC.
12179 ret
= i40e_vsi_config_tc(vsi
, enabled_tc
);
12181 /* Single TC condition is not fatal,
12182 * message and continue
12184 dev_info(&pf
->pdev
->dev
,
12185 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
12187 i40e_stat_str(&pf
->hw
, ret
),
12188 i40e_aq_str(&pf
->hw
,
12189 pf
->hw
.aq
.asq_last_status
));
12194 case I40E_VSI_FDIR
:
12195 ctxt
.pf_num
= hw
->pf_id
;
12197 ctxt
.uplink_seid
= vsi
->uplink_seid
;
12198 ctxt
.connection_type
= I40E_AQ_VSI_CONN_TYPE_NORMAL
;
12199 ctxt
.flags
= I40E_AQ_VSI_TYPE_PF
;
12200 if ((pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
) &&
12201 (i40e_is_vsi_uplink_mode_veb(vsi
))) {
12202 ctxt
.info
.valid_sections
|=
12203 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
12204 ctxt
.info
.switch_id
=
12205 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB
);
12207 i40e_vsi_setup_queue_map(vsi
, &ctxt
, enabled_tc
, true);
12210 case I40E_VSI_VMDQ2
:
12211 ctxt
.pf_num
= hw
->pf_id
;
12213 ctxt
.uplink_seid
= vsi
->uplink_seid
;
12214 ctxt
.connection_type
= I40E_AQ_VSI_CONN_TYPE_NORMAL
;
12215 ctxt
.flags
= I40E_AQ_VSI_TYPE_VMDQ2
;
12217 /* This VSI is connected to VEB so the switch_id
12218 * should be set to zero by default.
12220 if (i40e_is_vsi_uplink_mode_veb(vsi
)) {
12221 ctxt
.info
.valid_sections
|=
12222 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
12223 ctxt
.info
.switch_id
=
12224 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB
);
12227 /* Setup the VSI tx/rx queue map for TC0 only for now */
12228 i40e_vsi_setup_queue_map(vsi
, &ctxt
, enabled_tc
, true);
12231 case I40E_VSI_SRIOV
:
12232 ctxt
.pf_num
= hw
->pf_id
;
12233 ctxt
.vf_num
= vsi
->vf_id
+ hw
->func_caps
.vf_base_id
;
12234 ctxt
.uplink_seid
= vsi
->uplink_seid
;
12235 ctxt
.connection_type
= I40E_AQ_VSI_CONN_TYPE_NORMAL
;
12236 ctxt
.flags
= I40E_AQ_VSI_TYPE_VF
;
12238 /* This VSI is connected to VEB so the switch_id
12239 * should be set to zero by default.
12241 if (i40e_is_vsi_uplink_mode_veb(vsi
)) {
12242 ctxt
.info
.valid_sections
|=
12243 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID
);
12244 ctxt
.info
.switch_id
=
12245 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB
);
12248 if (vsi
->back
->flags
& I40E_FLAG_IWARP_ENABLED
) {
12249 ctxt
.info
.valid_sections
|=
12250 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID
);
12251 ctxt
.info
.queueing_opt_flags
|=
12252 (I40E_AQ_VSI_QUE_OPT_TCP_ENA
|
12253 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI
);
12256 ctxt
.info
.valid_sections
|= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID
);
12257 ctxt
.info
.port_vlan_flags
|= I40E_AQ_VSI_PVLAN_MODE_ALL
;
12258 if (pf
->vf
[vsi
->vf_id
].spoofchk
) {
12259 ctxt
.info
.valid_sections
|=
12260 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID
);
12261 ctxt
.info
.sec_flags
|=
12262 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK
|
12263 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK
);
12265 /* Setup the VSI tx/rx queue map for TC0 only for now */
12266 i40e_vsi_setup_queue_map(vsi
, &ctxt
, enabled_tc
, true);
12269 case I40E_VSI_IWARP
:
12270 /* send down message to iWARP */
12277 if (vsi
->type
!= I40E_VSI_MAIN
) {
12278 ret
= i40e_aq_add_vsi(hw
, &ctxt
, NULL
);
12280 dev_info(&vsi
->back
->pdev
->dev
,
12281 "add vsi failed, err %s aq_err %s\n",
12282 i40e_stat_str(&pf
->hw
, ret
),
12283 i40e_aq_str(&pf
->hw
,
12284 pf
->hw
.aq
.asq_last_status
));
12288 vsi
->info
= ctxt
.info
;
12289 vsi
->info
.valid_sections
= 0;
12290 vsi
->seid
= ctxt
.seid
;
12291 vsi
->id
= ctxt
.vsi_number
;
12294 vsi
->active_filters
= 0;
12295 clear_bit(__I40E_VSI_OVERFLOW_PROMISC
, vsi
->state
);
12296 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
12297 /* If macvlan filters already exist, force them to get loaded */
12298 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
) {
12299 f
->state
= I40E_FILTER_NEW
;
12302 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
12305 vsi
->flags
|= I40E_VSI_FLAG_FILTER_CHANGED
;
12306 set_bit(__I40E_MACVLAN_SYNC_PENDING
, pf
->state
);
12309 /* Update VSI BW information */
12310 ret
= i40e_vsi_get_bw_info(vsi
);
12312 dev_info(&pf
->pdev
->dev
,
12313 "couldn't get vsi bw info, err %s aq_err %s\n",
12314 i40e_stat_str(&pf
->hw
, ret
),
12315 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
12316 /* VSI is already added so not tearing that up */
12325 * i40e_vsi_release - Delete a VSI and free its resources
12326 * @vsi: the VSI being removed
12328 * Returns 0 on success or < 0 on error
12330 int i40e_vsi_release(struct i40e_vsi
*vsi
)
12332 struct i40e_mac_filter
*f
;
12333 struct hlist_node
*h
;
12334 struct i40e_veb
*veb
= NULL
;
12335 struct i40e_pf
*pf
;
12341 /* release of a VEB-owner or last VSI is not allowed */
12342 if (vsi
->flags
& I40E_VSI_FLAG_VEB_OWNER
) {
12343 dev_info(&pf
->pdev
->dev
, "VSI %d has existing VEB %d\n",
12344 vsi
->seid
, vsi
->uplink_seid
);
12347 if (vsi
== pf
->vsi
[pf
->lan_vsi
] &&
12348 !test_bit(__I40E_DOWN
, pf
->state
)) {
12349 dev_info(&pf
->pdev
->dev
, "Can't remove PF VSI\n");
12353 uplink_seid
= vsi
->uplink_seid
;
12354 if (vsi
->type
!= I40E_VSI_SRIOV
) {
12355 if (vsi
->netdev_registered
) {
12356 vsi
->netdev_registered
= false;
12358 /* results in a call to i40e_close() */
12359 unregister_netdev(vsi
->netdev
);
12362 i40e_vsi_close(vsi
);
12364 i40e_vsi_disable_irq(vsi
);
12367 spin_lock_bh(&vsi
->mac_filter_hash_lock
);
12369 /* clear the sync flag on all filters */
12371 __dev_uc_unsync(vsi
->netdev
, NULL
);
12372 __dev_mc_unsync(vsi
->netdev
, NULL
);
12375 /* make sure any remaining filters are marked for deletion */
12376 hash_for_each_safe(vsi
->mac_filter_hash
, bkt
, h
, f
, hlist
)
12377 __i40e_del_filter(vsi
, f
);
12379 spin_unlock_bh(&vsi
->mac_filter_hash_lock
);
12381 i40e_sync_vsi_filters(vsi
);
12383 i40e_vsi_delete(vsi
);
12384 i40e_vsi_free_q_vectors(vsi
);
12386 free_netdev(vsi
->netdev
);
12387 vsi
->netdev
= NULL
;
12389 i40e_vsi_clear_rings(vsi
);
12390 i40e_vsi_clear(vsi
);
12392 /* If this was the last thing on the VEB, except for the
12393 * controlling VSI, remove the VEB, which puts the controlling
12394 * VSI onto the next level down in the switch.
12396 * Well, okay, there's one more exception here: don't remove
12397 * the orphan VEBs yet. We'll wait for an explicit remove request
12398 * from up the network stack.
12400 for (n
= 0, i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
12402 pf
->vsi
[i
]->uplink_seid
== uplink_seid
&&
12403 (pf
->vsi
[i
]->flags
& I40E_VSI_FLAG_VEB_OWNER
) == 0) {
12404 n
++; /* count the VSIs */
12407 for (i
= 0; i
< I40E_MAX_VEB
; i
++) {
12410 if (pf
->veb
[i
]->uplink_seid
== uplink_seid
)
12411 n
++; /* count the VEBs */
12412 if (pf
->veb
[i
]->seid
== uplink_seid
)
12415 if (n
== 0 && veb
&& veb
->uplink_seid
!= 0)
12416 i40e_veb_release(veb
);
12422 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
12423 * @vsi: ptr to the VSI
12425 * This should only be called after i40e_vsi_mem_alloc() which allocates the
12426 * corresponding SW VSI structure and initializes num_queue_pairs for the
12427 * newly allocated VSI.
12429 * Returns 0 on success or negative on failure
12431 static int i40e_vsi_setup_vectors(struct i40e_vsi
*vsi
)
12434 struct i40e_pf
*pf
= vsi
->back
;
12436 if (vsi
->q_vectors
[0]) {
12437 dev_info(&pf
->pdev
->dev
, "VSI %d has existing q_vectors\n",
12442 if (vsi
->base_vector
) {
12443 dev_info(&pf
->pdev
->dev
, "VSI %d has non-zero base vector %d\n",
12444 vsi
->seid
, vsi
->base_vector
);
12448 ret
= i40e_vsi_alloc_q_vectors(vsi
);
12450 dev_info(&pf
->pdev
->dev
,
12451 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
12452 vsi
->num_q_vectors
, vsi
->seid
, ret
);
12453 vsi
->num_q_vectors
= 0;
12454 goto vector_setup_out
;
12457 /* In Legacy mode, we do not have to get any other vector since we
12458 * piggyback on the misc/ICR0 for queue interrupts.
12460 if (!(pf
->flags
& I40E_FLAG_MSIX_ENABLED
))
12462 if (vsi
->num_q_vectors
)
12463 vsi
->base_vector
= i40e_get_lump(pf
, pf
->irq_pile
,
12464 vsi
->num_q_vectors
, vsi
->idx
);
12465 if (vsi
->base_vector
< 0) {
12466 dev_info(&pf
->pdev
->dev
,
12467 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
12468 vsi
->num_q_vectors
, vsi
->seid
, vsi
->base_vector
);
12469 i40e_vsi_free_q_vectors(vsi
);
12471 goto vector_setup_out
;
12479 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
12480 * @vsi: pointer to the vsi.
12482 * This re-allocates a vsi's queue resources.
12484 * Returns pointer to the successfully allocated and configured VSI sw struct
12485 * on success, otherwise returns NULL on failure.
12487 static struct i40e_vsi
*i40e_vsi_reinit_setup(struct i40e_vsi
*vsi
)
12489 u16 alloc_queue_pairs
;
12490 struct i40e_pf
*pf
;
12499 i40e_put_lump(pf
->qp_pile
, vsi
->base_queue
, vsi
->idx
);
12500 i40e_vsi_clear_rings(vsi
);
12502 i40e_vsi_free_arrays(vsi
, false);
12503 i40e_set_num_rings_in_vsi(vsi
);
12504 ret
= i40e_vsi_alloc_arrays(vsi
, false);
12508 alloc_queue_pairs
= vsi
->alloc_queue_pairs
*
12509 (i40e_enabled_xdp_vsi(vsi
) ? 2 : 1);
12511 ret
= i40e_get_lump(pf
, pf
->qp_pile
, alloc_queue_pairs
, vsi
->idx
);
12513 dev_info(&pf
->pdev
->dev
,
12514 "failed to get tracking for %d queues for VSI %d err %d\n",
12515 alloc_queue_pairs
, vsi
->seid
, ret
);
12518 vsi
->base_queue
= ret
;
12520 /* Update the FW view of the VSI. Force a reset of TC and queue
12521 * layout configurations.
12523 enabled_tc
= pf
->vsi
[pf
->lan_vsi
]->tc_config
.enabled_tc
;
12524 pf
->vsi
[pf
->lan_vsi
]->tc_config
.enabled_tc
= 0;
12525 pf
->vsi
[pf
->lan_vsi
]->seid
= pf
->main_vsi_seid
;
12526 i40e_vsi_config_tc(pf
->vsi
[pf
->lan_vsi
], enabled_tc
);
12527 if (vsi
->type
== I40E_VSI_MAIN
)
12528 i40e_rm_default_mac_filter(vsi
, pf
->hw
.mac
.perm_addr
);
12530 /* assign it some queues */
12531 ret
= i40e_alloc_rings(vsi
);
12535 /* map all of the rings to the q_vectors */
12536 i40e_vsi_map_rings_to_vectors(vsi
);
12540 i40e_vsi_free_q_vectors(vsi
);
12541 if (vsi
->netdev_registered
) {
12542 vsi
->netdev_registered
= false;
12543 unregister_netdev(vsi
->netdev
);
12544 free_netdev(vsi
->netdev
);
12545 vsi
->netdev
= NULL
;
12547 i40e_aq_delete_element(&pf
->hw
, vsi
->seid
, NULL
);
12549 i40e_vsi_clear(vsi
);
12554 * i40e_vsi_setup - Set up a VSI by a given type
12555 * @pf: board private structure
12557 * @uplink_seid: the switch element to link to
12558 * @param1: usage depends upon VSI type. For VF types, indicates VF id
12560 * This allocates the sw VSI structure and its queue resources, then add a VSI
12561 * to the identified VEB.
12563 * Returns pointer to the successfully allocated and configure VSI sw struct on
12564 * success, otherwise returns NULL on failure.
12566 struct i40e_vsi
*i40e_vsi_setup(struct i40e_pf
*pf
, u8 type
,
12567 u16 uplink_seid
, u32 param1
)
12569 struct i40e_vsi
*vsi
= NULL
;
12570 struct i40e_veb
*veb
= NULL
;
12571 u16 alloc_queue_pairs
;
12575 /* The requested uplink_seid must be either
12576 * - the PF's port seid
12577 * no VEB is needed because this is the PF
12578 * or this is a Flow Director special case VSI
12579 * - seid of an existing VEB
12580 * - seid of a VSI that owns an existing VEB
12581 * - seid of a VSI that doesn't own a VEB
12582 * a new VEB is created and the VSI becomes the owner
12583 * - seid of the PF VSI, which is what creates the first VEB
12584 * this is a special case of the previous
12586 * Find which uplink_seid we were given and create a new VEB if needed
12588 for (i
= 0; i
< I40E_MAX_VEB
; i
++) {
12589 if (pf
->veb
[i
] && pf
->veb
[i
]->seid
== uplink_seid
) {
12595 if (!veb
&& uplink_seid
!= pf
->mac_seid
) {
12597 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
12598 if (pf
->vsi
[i
] && pf
->vsi
[i
]->seid
== uplink_seid
) {
12604 dev_info(&pf
->pdev
->dev
, "no such uplink_seid %d\n",
12609 if (vsi
->uplink_seid
== pf
->mac_seid
)
12610 veb
= i40e_veb_setup(pf
, 0, pf
->mac_seid
, vsi
->seid
,
12611 vsi
->tc_config
.enabled_tc
);
12612 else if ((vsi
->flags
& I40E_VSI_FLAG_VEB_OWNER
) == 0)
12613 veb
= i40e_veb_setup(pf
, 0, vsi
->uplink_seid
, vsi
->seid
,
12614 vsi
->tc_config
.enabled_tc
);
12616 if (vsi
->seid
!= pf
->vsi
[pf
->lan_vsi
]->seid
) {
12617 dev_info(&vsi
->back
->pdev
->dev
,
12618 "New VSI creation error, uplink seid of LAN VSI expected.\n");
12621 /* We come up by default in VEPA mode if SRIOV is not
12622 * already enabled, in which case we can't force VEPA
12625 if (!(pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
)) {
12626 veb
->bridge_mode
= BRIDGE_MODE_VEPA
;
12627 pf
->flags
&= ~I40E_FLAG_VEB_MODE_ENABLED
;
12629 i40e_config_bridge_mode(veb
);
12631 for (i
= 0; i
< I40E_MAX_VEB
&& !veb
; i
++) {
12632 if (pf
->veb
[i
] && pf
->veb
[i
]->seid
== vsi
->uplink_seid
)
12636 dev_info(&pf
->pdev
->dev
, "couldn't add VEB\n");
12640 vsi
->flags
|= I40E_VSI_FLAG_VEB_OWNER
;
12641 uplink_seid
= veb
->seid
;
12644 /* get vsi sw struct */
12645 v_idx
= i40e_vsi_mem_alloc(pf
, type
);
12648 vsi
= pf
->vsi
[v_idx
];
12652 vsi
->veb_idx
= (veb
? veb
->idx
: I40E_NO_VEB
);
12654 if (type
== I40E_VSI_MAIN
)
12655 pf
->lan_vsi
= v_idx
;
12656 else if (type
== I40E_VSI_SRIOV
)
12657 vsi
->vf_id
= param1
;
12658 /* assign it some queues */
12659 alloc_queue_pairs
= vsi
->alloc_queue_pairs
*
12660 (i40e_enabled_xdp_vsi(vsi
) ? 2 : 1);
12662 ret
= i40e_get_lump(pf
, pf
->qp_pile
, alloc_queue_pairs
, vsi
->idx
);
12664 dev_info(&pf
->pdev
->dev
,
12665 "failed to get tracking for %d queues for VSI %d err=%d\n",
12666 alloc_queue_pairs
, vsi
->seid
, ret
);
12669 vsi
->base_queue
= ret
;
12671 /* get a VSI from the hardware */
12672 vsi
->uplink_seid
= uplink_seid
;
12673 ret
= i40e_add_vsi(vsi
);
12677 switch (vsi
->type
) {
12678 /* setup the netdev if needed */
12679 case I40E_VSI_MAIN
:
12680 case I40E_VSI_VMDQ2
:
12681 ret
= i40e_config_netdev(vsi
);
12684 ret
= register_netdev(vsi
->netdev
);
12687 vsi
->netdev_registered
= true;
12688 netif_carrier_off(vsi
->netdev
);
12689 #ifdef CONFIG_I40E_DCB
12690 /* Setup DCB netlink interface */
12691 i40e_dcbnl_setup(vsi
);
12692 #endif /* CONFIG_I40E_DCB */
12695 case I40E_VSI_FDIR
:
12696 /* set up vectors and rings if needed */
12697 ret
= i40e_vsi_setup_vectors(vsi
);
12701 ret
= i40e_alloc_rings(vsi
);
12705 /* map all of the rings to the q_vectors */
12706 i40e_vsi_map_rings_to_vectors(vsi
);
12708 i40e_vsi_reset_stats(vsi
);
12712 /* no netdev or rings for the other VSI types */
12716 if ((pf
->hw_features
& I40E_HW_RSS_AQ_CAPABLE
) &&
12717 (vsi
->type
== I40E_VSI_VMDQ2
)) {
12718 ret
= i40e_vsi_config_rss(vsi
);
12723 i40e_vsi_free_q_vectors(vsi
);
12725 if (vsi
->netdev_registered
) {
12726 vsi
->netdev_registered
= false;
12727 unregister_netdev(vsi
->netdev
);
12728 free_netdev(vsi
->netdev
);
12729 vsi
->netdev
= NULL
;
12732 i40e_aq_delete_element(&pf
->hw
, vsi
->seid
, NULL
);
12734 i40e_vsi_clear(vsi
);
12740 * i40e_veb_get_bw_info - Query VEB BW information
12741 * @veb: the veb to query
12743 * Query the Tx scheduler BW configuration data for given VEB
12745 static int i40e_veb_get_bw_info(struct i40e_veb
*veb
)
12747 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data
;
12748 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data
;
12749 struct i40e_pf
*pf
= veb
->pf
;
12750 struct i40e_hw
*hw
= &pf
->hw
;
12755 ret
= i40e_aq_query_switch_comp_bw_config(hw
, veb
->seid
,
12758 dev_info(&pf
->pdev
->dev
,
12759 "query veb bw config failed, err %s aq_err %s\n",
12760 i40e_stat_str(&pf
->hw
, ret
),
12761 i40e_aq_str(&pf
->hw
, hw
->aq
.asq_last_status
));
12765 ret
= i40e_aq_query_switch_comp_ets_config(hw
, veb
->seid
,
12768 dev_info(&pf
->pdev
->dev
,
12769 "query veb bw ets config failed, err %s aq_err %s\n",
12770 i40e_stat_str(&pf
->hw
, ret
),
12771 i40e_aq_str(&pf
->hw
, hw
->aq
.asq_last_status
));
12775 veb
->bw_limit
= le16_to_cpu(ets_data
.port_bw_limit
);
12776 veb
->bw_max_quanta
= ets_data
.tc_bw_max
;
12777 veb
->is_abs_credits
= bw_data
.absolute_credits_enable
;
12778 veb
->enabled_tc
= ets_data
.tc_valid_bits
;
12779 tc_bw_max
= le16_to_cpu(bw_data
.tc_bw_max
[0]) |
12780 (le16_to_cpu(bw_data
.tc_bw_max
[1]) << 16);
12781 for (i
= 0; i
< I40E_MAX_TRAFFIC_CLASS
; i
++) {
12782 veb
->bw_tc_share_credits
[i
] = bw_data
.tc_bw_share_credits
[i
];
12783 veb
->bw_tc_limit_credits
[i
] =
12784 le16_to_cpu(bw_data
.tc_bw_limits
[i
]);
12785 veb
->bw_tc_max_quanta
[i
] = ((tc_bw_max
>> (i
*4)) & 0x7);
12793 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
12794 * @pf: board private structure
12796 * On error: returns error code (negative)
12797 * On success: returns vsi index in PF (positive)
12799 static int i40e_veb_mem_alloc(struct i40e_pf
*pf
)
12802 struct i40e_veb
*veb
;
12805 /* Need to protect the allocation of switch elements at the PF level */
12806 mutex_lock(&pf
->switch_mutex
);
12808 /* VEB list may be fragmented if VEB creation/destruction has
12809 * been happening. We can afford to do a quick scan to look
12810 * for any free slots in the list.
12812 * find next empty veb slot, looping back around if necessary
12815 while ((i
< I40E_MAX_VEB
) && (pf
->veb
[i
] != NULL
))
12817 if (i
>= I40E_MAX_VEB
) {
12819 goto err_alloc_veb
; /* out of VEB slots! */
12822 veb
= kzalloc(sizeof(*veb
), GFP_KERNEL
);
12825 goto err_alloc_veb
;
12829 veb
->enabled_tc
= 1;
12834 mutex_unlock(&pf
->switch_mutex
);
12839 * i40e_switch_branch_release - Delete a branch of the switch tree
12840 * @branch: where to start deleting
12842 * This uses recursion to find the tips of the branch to be
12843 * removed, deleting until we get back to and can delete this VEB.
12845 static void i40e_switch_branch_release(struct i40e_veb
*branch
)
12847 struct i40e_pf
*pf
= branch
->pf
;
12848 u16 branch_seid
= branch
->seid
;
12849 u16 veb_idx
= branch
->idx
;
12852 /* release any VEBs on this VEB - RECURSION */
12853 for (i
= 0; i
< I40E_MAX_VEB
; i
++) {
12856 if (pf
->veb
[i
]->uplink_seid
== branch
->seid
)
12857 i40e_switch_branch_release(pf
->veb
[i
]);
12860 /* Release the VSIs on this VEB, but not the owner VSI.
12862 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
12863 * the VEB itself, so don't use (*branch) after this loop.
12865 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
12868 if (pf
->vsi
[i
]->uplink_seid
== branch_seid
&&
12869 (pf
->vsi
[i
]->flags
& I40E_VSI_FLAG_VEB_OWNER
) == 0) {
12870 i40e_vsi_release(pf
->vsi
[i
]);
12874 /* There's one corner case where the VEB might not have been
12875 * removed, so double check it here and remove it if needed.
12876 * This case happens if the veb was created from the debugfs
12877 * commands and no VSIs were added to it.
12879 if (pf
->veb
[veb_idx
])
12880 i40e_veb_release(pf
->veb
[veb_idx
]);
12884 * i40e_veb_clear - remove veb struct
12885 * @veb: the veb to remove
12887 static void i40e_veb_clear(struct i40e_veb
*veb
)
12893 struct i40e_pf
*pf
= veb
->pf
;
12895 mutex_lock(&pf
->switch_mutex
);
12896 if (pf
->veb
[veb
->idx
] == veb
)
12897 pf
->veb
[veb
->idx
] = NULL
;
12898 mutex_unlock(&pf
->switch_mutex
);
12905 * i40e_veb_release - Delete a VEB and free its resources
12906 * @veb: the VEB being removed
12908 void i40e_veb_release(struct i40e_veb
*veb
)
12910 struct i40e_vsi
*vsi
= NULL
;
12911 struct i40e_pf
*pf
;
12916 /* find the remaining VSI and check for extras */
12917 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
12918 if (pf
->vsi
[i
] && pf
->vsi
[i
]->uplink_seid
== veb
->seid
) {
12924 dev_info(&pf
->pdev
->dev
,
12925 "can't remove VEB %d with %d VSIs left\n",
12930 /* move the remaining VSI to uplink veb */
12931 vsi
->flags
&= ~I40E_VSI_FLAG_VEB_OWNER
;
12932 if (veb
->uplink_seid
) {
12933 vsi
->uplink_seid
= veb
->uplink_seid
;
12934 if (veb
->uplink_seid
== pf
->mac_seid
)
12935 vsi
->veb_idx
= I40E_NO_VEB
;
12937 vsi
->veb_idx
= veb
->veb_idx
;
12940 vsi
->uplink_seid
= pf
->vsi
[pf
->lan_vsi
]->uplink_seid
;
12941 vsi
->veb_idx
= pf
->vsi
[pf
->lan_vsi
]->veb_idx
;
12944 i40e_aq_delete_element(&pf
->hw
, veb
->seid
, NULL
);
12945 i40e_veb_clear(veb
);
12949 * i40e_add_veb - create the VEB in the switch
12950 * @veb: the VEB to be instantiated
12951 * @vsi: the controlling VSI
12953 static int i40e_add_veb(struct i40e_veb
*veb
, struct i40e_vsi
*vsi
)
12955 struct i40e_pf
*pf
= veb
->pf
;
12956 bool enable_stats
= !!(pf
->flags
& I40E_FLAG_VEB_STATS_ENABLED
);
12959 ret
= i40e_aq_add_veb(&pf
->hw
, veb
->uplink_seid
, vsi
->seid
,
12960 veb
->enabled_tc
, false,
12961 &veb
->seid
, enable_stats
, NULL
);
12963 /* get a VEB from the hardware */
12965 dev_info(&pf
->pdev
->dev
,
12966 "couldn't add VEB, err %s aq_err %s\n",
12967 i40e_stat_str(&pf
->hw
, ret
),
12968 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
12972 /* get statistics counter */
12973 ret
= i40e_aq_get_veb_parameters(&pf
->hw
, veb
->seid
, NULL
, NULL
,
12974 &veb
->stats_idx
, NULL
, NULL
, NULL
);
12976 dev_info(&pf
->pdev
->dev
,
12977 "couldn't get VEB statistics idx, err %s aq_err %s\n",
12978 i40e_stat_str(&pf
->hw
, ret
),
12979 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
12982 ret
= i40e_veb_get_bw_info(veb
);
12984 dev_info(&pf
->pdev
->dev
,
12985 "couldn't get VEB bw info, err %s aq_err %s\n",
12986 i40e_stat_str(&pf
->hw
, ret
),
12987 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
12988 i40e_aq_delete_element(&pf
->hw
, veb
->seid
, NULL
);
12992 vsi
->uplink_seid
= veb
->seid
;
12993 vsi
->veb_idx
= veb
->idx
;
12994 vsi
->flags
|= I40E_VSI_FLAG_VEB_OWNER
;
13000 * i40e_veb_setup - Set up a VEB
13001 * @pf: board private structure
13002 * @flags: VEB setup flags
13003 * @uplink_seid: the switch element to link to
13004 * @vsi_seid: the initial VSI seid
13005 * @enabled_tc: Enabled TC bit-map
13007 * This allocates the sw VEB structure and links it into the switch
13008 * It is possible and legal for this to be a duplicate of an already
13009 * existing VEB. It is also possible for both uplink and vsi seids
13010 * to be zero, in order to create a floating VEB.
13012 * Returns pointer to the successfully allocated VEB sw struct on
13013 * success, otherwise returns NULL on failure.
13015 struct i40e_veb
*i40e_veb_setup(struct i40e_pf
*pf
, u16 flags
,
13016 u16 uplink_seid
, u16 vsi_seid
,
13019 struct i40e_veb
*veb
, *uplink_veb
= NULL
;
13020 int vsi_idx
, veb_idx
;
13023 /* if one seid is 0, the other must be 0 to create a floating relay */
13024 if ((uplink_seid
== 0 || vsi_seid
== 0) &&
13025 (uplink_seid
+ vsi_seid
!= 0)) {
13026 dev_info(&pf
->pdev
->dev
,
13027 "one, not both seid's are 0: uplink=%d vsi=%d\n",
13028 uplink_seid
, vsi_seid
);
13032 /* make sure there is such a vsi and uplink */
13033 for (vsi_idx
= 0; vsi_idx
< pf
->num_alloc_vsi
; vsi_idx
++)
13034 if (pf
->vsi
[vsi_idx
] && pf
->vsi
[vsi_idx
]->seid
== vsi_seid
)
13036 if (vsi_idx
>= pf
->num_alloc_vsi
&& vsi_seid
!= 0) {
13037 dev_info(&pf
->pdev
->dev
, "vsi seid %d not found\n",
13042 if (uplink_seid
&& uplink_seid
!= pf
->mac_seid
) {
13043 for (veb_idx
= 0; veb_idx
< I40E_MAX_VEB
; veb_idx
++) {
13044 if (pf
->veb
[veb_idx
] &&
13045 pf
->veb
[veb_idx
]->seid
== uplink_seid
) {
13046 uplink_veb
= pf
->veb
[veb_idx
];
13051 dev_info(&pf
->pdev
->dev
,
13052 "uplink seid %d not found\n", uplink_seid
);
13057 /* get veb sw struct */
13058 veb_idx
= i40e_veb_mem_alloc(pf
);
13061 veb
= pf
->veb
[veb_idx
];
13062 veb
->flags
= flags
;
13063 veb
->uplink_seid
= uplink_seid
;
13064 veb
->veb_idx
= (uplink_veb
? uplink_veb
->idx
: I40E_NO_VEB
);
13065 veb
->enabled_tc
= (enabled_tc
? enabled_tc
: 0x1);
13067 /* create the VEB in the switch */
13068 ret
= i40e_add_veb(veb
, pf
->vsi
[vsi_idx
]);
13071 if (vsi_idx
== pf
->lan_vsi
)
13072 pf
->lan_veb
= veb
->idx
;
13077 i40e_veb_clear(veb
);
13083 * i40e_setup_pf_switch_element - set PF vars based on switch type
13084 * @pf: board private structure
13085 * @ele: element we are building info from
13086 * @num_reported: total number of elements
13087 * @printconfig: should we print the contents
13089 * helper function to assist in extracting a few useful SEID values.
13091 static void i40e_setup_pf_switch_element(struct i40e_pf
*pf
,
13092 struct i40e_aqc_switch_config_element_resp
*ele
,
13093 u16 num_reported
, bool printconfig
)
13095 u16 downlink_seid
= le16_to_cpu(ele
->downlink_seid
);
13096 u16 uplink_seid
= le16_to_cpu(ele
->uplink_seid
);
13097 u8 element_type
= ele
->element_type
;
13098 u16 seid
= le16_to_cpu(ele
->seid
);
13101 dev_info(&pf
->pdev
->dev
,
13102 "type=%d seid=%d uplink=%d downlink=%d\n",
13103 element_type
, seid
, uplink_seid
, downlink_seid
);
13105 switch (element_type
) {
13106 case I40E_SWITCH_ELEMENT_TYPE_MAC
:
13107 pf
->mac_seid
= seid
;
13109 case I40E_SWITCH_ELEMENT_TYPE_VEB
:
13111 if (uplink_seid
!= pf
->mac_seid
)
13113 if (pf
->lan_veb
== I40E_NO_VEB
) {
13116 /* find existing or else empty VEB */
13117 for (v
= 0; v
< I40E_MAX_VEB
; v
++) {
13118 if (pf
->veb
[v
] && (pf
->veb
[v
]->seid
== seid
)) {
13123 if (pf
->lan_veb
== I40E_NO_VEB
) {
13124 v
= i40e_veb_mem_alloc(pf
);
13131 pf
->veb
[pf
->lan_veb
]->seid
= seid
;
13132 pf
->veb
[pf
->lan_veb
]->uplink_seid
= pf
->mac_seid
;
13133 pf
->veb
[pf
->lan_veb
]->pf
= pf
;
13134 pf
->veb
[pf
->lan_veb
]->veb_idx
= I40E_NO_VEB
;
13136 case I40E_SWITCH_ELEMENT_TYPE_VSI
:
13137 if (num_reported
!= 1)
13139 /* This is immediately after a reset so we can assume this is
13142 pf
->mac_seid
= uplink_seid
;
13143 pf
->pf_seid
= downlink_seid
;
13144 pf
->main_vsi_seid
= seid
;
13146 dev_info(&pf
->pdev
->dev
,
13147 "pf_seid=%d main_vsi_seid=%d\n",
13148 pf
->pf_seid
, pf
->main_vsi_seid
);
13150 case I40E_SWITCH_ELEMENT_TYPE_PF
:
13151 case I40E_SWITCH_ELEMENT_TYPE_VF
:
13152 case I40E_SWITCH_ELEMENT_TYPE_EMP
:
13153 case I40E_SWITCH_ELEMENT_TYPE_BMC
:
13154 case I40E_SWITCH_ELEMENT_TYPE_PE
:
13155 case I40E_SWITCH_ELEMENT_TYPE_PA
:
13156 /* ignore these for now */
13159 dev_info(&pf
->pdev
->dev
, "unknown element type=%d seid=%d\n",
13160 element_type
, seid
);
13166 * i40e_fetch_switch_configuration - Get switch config from firmware
13167 * @pf: board private structure
13168 * @printconfig: should we print the contents
13170 * Get the current switch configuration from the device and
13171 * extract a few useful SEID values.
13173 int i40e_fetch_switch_configuration(struct i40e_pf
*pf
, bool printconfig
)
13175 struct i40e_aqc_get_switch_config_resp
*sw_config
;
13181 aq_buf
= kzalloc(I40E_AQ_LARGE_BUF
, GFP_KERNEL
);
13185 sw_config
= (struct i40e_aqc_get_switch_config_resp
*)aq_buf
;
13187 u16 num_reported
, num_total
;
13189 ret
= i40e_aq_get_switch_config(&pf
->hw
, sw_config
,
13193 dev_info(&pf
->pdev
->dev
,
13194 "get switch config failed err %s aq_err %s\n",
13195 i40e_stat_str(&pf
->hw
, ret
),
13196 i40e_aq_str(&pf
->hw
,
13197 pf
->hw
.aq
.asq_last_status
));
13202 num_reported
= le16_to_cpu(sw_config
->header
.num_reported
);
13203 num_total
= le16_to_cpu(sw_config
->header
.num_total
);
13206 dev_info(&pf
->pdev
->dev
,
13207 "header: %d reported %d total\n",
13208 num_reported
, num_total
);
13210 for (i
= 0; i
< num_reported
; i
++) {
13211 struct i40e_aqc_switch_config_element_resp
*ele
=
13212 &sw_config
->element
[i
];
13214 i40e_setup_pf_switch_element(pf
, ele
, num_reported
,
13217 } while (next_seid
!= 0);
13224 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
13225 * @pf: board private structure
13226 * @reinit: if the Main VSI needs to re-initialized.
13228 * Returns 0 on success, negative value on failure
13230 static int i40e_setup_pf_switch(struct i40e_pf
*pf
, bool reinit
)
13235 /* find out what's out there already */
13236 ret
= i40e_fetch_switch_configuration(pf
, false);
13238 dev_info(&pf
->pdev
->dev
,
13239 "couldn't fetch switch config, err %s aq_err %s\n",
13240 i40e_stat_str(&pf
->hw
, ret
),
13241 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
13244 i40e_pf_reset_stats(pf
);
13246 /* set the switch config bit for the whole device to
13247 * support limited promisc or true promisc
13248 * when user requests promisc. The default is limited
13252 if ((pf
->hw
.pf_id
== 0) &&
13253 !(pf
->flags
& I40E_FLAG_TRUE_PROMISC_SUPPORT
)) {
13254 flags
= I40E_AQ_SET_SWITCH_CFG_PROMISC
;
13255 pf
->last_sw_conf_flags
= flags
;
13258 if (pf
->hw
.pf_id
== 0) {
13261 valid_flags
= I40E_AQ_SET_SWITCH_CFG_PROMISC
;
13262 ret
= i40e_aq_set_switch_config(&pf
->hw
, flags
, valid_flags
, 0,
13264 if (ret
&& pf
->hw
.aq
.asq_last_status
!= I40E_AQ_RC_ESRCH
) {
13265 dev_info(&pf
->pdev
->dev
,
13266 "couldn't set switch config bits, err %s aq_err %s\n",
13267 i40e_stat_str(&pf
->hw
, ret
),
13268 i40e_aq_str(&pf
->hw
,
13269 pf
->hw
.aq
.asq_last_status
));
13270 /* not a fatal problem, just keep going */
13272 pf
->last_sw_conf_valid_flags
= valid_flags
;
13275 /* first time setup */
13276 if (pf
->lan_vsi
== I40E_NO_VSI
|| reinit
) {
13277 struct i40e_vsi
*vsi
= NULL
;
13280 /* Set up the PF VSI associated with the PF's main VSI
13281 * that is already in the HW switch
13283 if (pf
->lan_veb
!= I40E_NO_VEB
&& pf
->veb
[pf
->lan_veb
])
13284 uplink_seid
= pf
->veb
[pf
->lan_veb
]->seid
;
13286 uplink_seid
= pf
->mac_seid
;
13287 if (pf
->lan_vsi
== I40E_NO_VSI
)
13288 vsi
= i40e_vsi_setup(pf
, I40E_VSI_MAIN
, uplink_seid
, 0);
13290 vsi
= i40e_vsi_reinit_setup(pf
->vsi
[pf
->lan_vsi
]);
13292 dev_info(&pf
->pdev
->dev
, "setup of MAIN VSI failed\n");
13293 i40e_cloud_filter_exit(pf
);
13294 i40e_fdir_teardown(pf
);
13298 /* force a reset of TC and queue layout configurations */
13299 u8 enabled_tc
= pf
->vsi
[pf
->lan_vsi
]->tc_config
.enabled_tc
;
13301 pf
->vsi
[pf
->lan_vsi
]->tc_config
.enabled_tc
= 0;
13302 pf
->vsi
[pf
->lan_vsi
]->seid
= pf
->main_vsi_seid
;
13303 i40e_vsi_config_tc(pf
->vsi
[pf
->lan_vsi
], enabled_tc
);
13305 i40e_vlan_stripping_disable(pf
->vsi
[pf
->lan_vsi
]);
13307 i40e_fdir_sb_setup(pf
);
13309 /* Setup static PF queue filter control settings */
13310 ret
= i40e_setup_pf_filter_control(pf
);
13312 dev_info(&pf
->pdev
->dev
, "setup_pf_filter_control failed: %d\n",
13314 /* Failure here should not stop continuing other steps */
13317 /* enable RSS in the HW, even for only one queue, as the stack can use
13320 if ((pf
->flags
& I40E_FLAG_RSS_ENABLED
))
13321 i40e_pf_config_rss(pf
);
13323 /* fill in link information and enable LSE reporting */
13324 i40e_link_event(pf
);
13326 /* Initialize user-specific link properties */
13327 pf
->fc_autoneg_status
= ((pf
->hw
.phy
.link_info
.an_info
&
13328 I40E_AQ_AN_COMPLETED
) ? true : false);
13332 /* repopulate tunnel port filters */
13333 i40e_sync_udp_filters(pf
);
13339 * i40e_determine_queue_usage - Work out queue distribution
13340 * @pf: board private structure
13342 static void i40e_determine_queue_usage(struct i40e_pf
*pf
)
13347 pf
->num_lan_qps
= 0;
13349 /* Find the max queues to be put into basic use. We'll always be
13350 * using TC0, whether or not DCB is running, and TC0 will get the
13353 queues_left
= pf
->hw
.func_caps
.num_tx_qp
;
13355 if ((queues_left
== 1) ||
13356 !(pf
->flags
& I40E_FLAG_MSIX_ENABLED
)) {
13357 /* one qp for PF, no queues for anything else */
13359 pf
->alloc_rss_size
= pf
->num_lan_qps
= 1;
13361 /* make sure all the fancies are disabled */
13362 pf
->flags
&= ~(I40E_FLAG_RSS_ENABLED
|
13363 I40E_FLAG_IWARP_ENABLED
|
13364 I40E_FLAG_FD_SB_ENABLED
|
13365 I40E_FLAG_FD_ATR_ENABLED
|
13366 I40E_FLAG_DCB_CAPABLE
|
13367 I40E_FLAG_DCB_ENABLED
|
13368 I40E_FLAG_SRIOV_ENABLED
|
13369 I40E_FLAG_VMDQ_ENABLED
);
13370 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
13371 } else if (!(pf
->flags
& (I40E_FLAG_RSS_ENABLED
|
13372 I40E_FLAG_FD_SB_ENABLED
|
13373 I40E_FLAG_FD_ATR_ENABLED
|
13374 I40E_FLAG_DCB_CAPABLE
))) {
13375 /* one qp for PF */
13376 pf
->alloc_rss_size
= pf
->num_lan_qps
= 1;
13377 queues_left
-= pf
->num_lan_qps
;
13379 pf
->flags
&= ~(I40E_FLAG_RSS_ENABLED
|
13380 I40E_FLAG_IWARP_ENABLED
|
13381 I40E_FLAG_FD_SB_ENABLED
|
13382 I40E_FLAG_FD_ATR_ENABLED
|
13383 I40E_FLAG_DCB_ENABLED
|
13384 I40E_FLAG_VMDQ_ENABLED
);
13385 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
13387 /* Not enough queues for all TCs */
13388 if ((pf
->flags
& I40E_FLAG_DCB_CAPABLE
) &&
13389 (queues_left
< I40E_MAX_TRAFFIC_CLASS
)) {
13390 pf
->flags
&= ~(I40E_FLAG_DCB_CAPABLE
|
13391 I40E_FLAG_DCB_ENABLED
);
13392 dev_info(&pf
->pdev
->dev
, "not enough queues for DCB. DCB is disabled.\n");
13395 /* limit lan qps to the smaller of qps, cpus or msix */
13396 q_max
= max_t(int, pf
->rss_size_max
, num_online_cpus());
13397 q_max
= min_t(int, q_max
, pf
->hw
.func_caps
.num_tx_qp
);
13398 q_max
= min_t(int, q_max
, pf
->hw
.func_caps
.num_msix_vectors
);
13399 pf
->num_lan_qps
= q_max
;
13401 queues_left
-= pf
->num_lan_qps
;
13404 if (pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) {
13405 if (queues_left
> 1) {
13406 queues_left
-= 1; /* save 1 queue for FD */
13408 pf
->flags
&= ~I40E_FLAG_FD_SB_ENABLED
;
13409 pf
->flags
|= I40E_FLAG_FD_SB_INACTIVE
;
13410 dev_info(&pf
->pdev
->dev
, "not enough queues for Flow Director. Flow Director feature is disabled\n");
13414 if ((pf
->flags
& I40E_FLAG_SRIOV_ENABLED
) &&
13415 pf
->num_vf_qps
&& pf
->num_req_vfs
&& queues_left
) {
13416 pf
->num_req_vfs
= min_t(int, pf
->num_req_vfs
,
13417 (queues_left
/ pf
->num_vf_qps
));
13418 queues_left
-= (pf
->num_req_vfs
* pf
->num_vf_qps
);
13421 if ((pf
->flags
& I40E_FLAG_VMDQ_ENABLED
) &&
13422 pf
->num_vmdq_vsis
&& pf
->num_vmdq_qps
&& queues_left
) {
13423 pf
->num_vmdq_vsis
= min_t(int, pf
->num_vmdq_vsis
,
13424 (queues_left
/ pf
->num_vmdq_qps
));
13425 queues_left
-= (pf
->num_vmdq_vsis
* pf
->num_vmdq_qps
);
13428 pf
->queues_left
= queues_left
;
13429 dev_dbg(&pf
->pdev
->dev
,
13430 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
13431 pf
->hw
.func_caps
.num_tx_qp
,
13432 !!(pf
->flags
& I40E_FLAG_FD_SB_ENABLED
),
13433 pf
->num_lan_qps
, pf
->alloc_rss_size
, pf
->num_req_vfs
,
13434 pf
->num_vf_qps
, pf
->num_vmdq_vsis
, pf
->num_vmdq_qps
,
13439 * i40e_setup_pf_filter_control - Setup PF static filter control
13440 * @pf: PF to be setup
13442 * i40e_setup_pf_filter_control sets up a PF's initial filter control
13443 * settings. If PE/FCoE are enabled then it will also set the per PF
13444 * based filter sizes required for them. It also enables Flow director,
13445 * ethertype and macvlan type filter settings for the pf.
13447 * Returns 0 on success, negative on failure
13449 static int i40e_setup_pf_filter_control(struct i40e_pf
*pf
)
13451 struct i40e_filter_control_settings
*settings
= &pf
->filter_settings
;
13453 settings
->hash_lut_size
= I40E_HASH_LUT_SIZE_128
;
13455 /* Flow Director is enabled */
13456 if (pf
->flags
& (I40E_FLAG_FD_SB_ENABLED
| I40E_FLAG_FD_ATR_ENABLED
))
13457 settings
->enable_fdir
= true;
13459 /* Ethtype and MACVLAN filters enabled for PF */
13460 settings
->enable_ethtype
= true;
13461 settings
->enable_macvlan
= true;
13463 if (i40e_set_filter_control(&pf
->hw
, settings
))
13469 #define INFO_STRING_LEN 255
13470 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
13471 static void i40e_print_features(struct i40e_pf
*pf
)
13473 struct i40e_hw
*hw
= &pf
->hw
;
13477 buf
= kmalloc(INFO_STRING_LEN
, GFP_KERNEL
);
13481 i
= snprintf(buf
, INFO_STRING_LEN
, "Features: PF-id[%d]", hw
->pf_id
);
13482 #ifdef CONFIG_PCI_IOV
13483 i
+= snprintf(&buf
[i
], REMAIN(i
), " VFs: %d", pf
->num_req_vfs
);
13485 i
+= snprintf(&buf
[i
], REMAIN(i
), " VSIs: %d QP: %d",
13486 pf
->hw
.func_caps
.num_vsis
,
13487 pf
->vsi
[pf
->lan_vsi
]->num_queue_pairs
);
13488 if (pf
->flags
& I40E_FLAG_RSS_ENABLED
)
13489 i
+= snprintf(&buf
[i
], REMAIN(i
), " RSS");
13490 if (pf
->flags
& I40E_FLAG_FD_ATR_ENABLED
)
13491 i
+= snprintf(&buf
[i
], REMAIN(i
), " FD_ATR");
13492 if (pf
->flags
& I40E_FLAG_FD_SB_ENABLED
) {
13493 i
+= snprintf(&buf
[i
], REMAIN(i
), " FD_SB");
13494 i
+= snprintf(&buf
[i
], REMAIN(i
), " NTUPLE");
13496 if (pf
->flags
& I40E_FLAG_DCB_CAPABLE
)
13497 i
+= snprintf(&buf
[i
], REMAIN(i
), " DCB");
13498 i
+= snprintf(&buf
[i
], REMAIN(i
), " VxLAN");
13499 i
+= snprintf(&buf
[i
], REMAIN(i
), " Geneve");
13500 if (pf
->flags
& I40E_FLAG_PTP
)
13501 i
+= snprintf(&buf
[i
], REMAIN(i
), " PTP");
13502 if (pf
->flags
& I40E_FLAG_VEB_MODE_ENABLED
)
13503 i
+= snprintf(&buf
[i
], REMAIN(i
), " VEB");
13505 i
+= snprintf(&buf
[i
], REMAIN(i
), " VEPA");
13507 dev_info(&pf
->pdev
->dev
, "%s\n", buf
);
13509 WARN_ON(i
> INFO_STRING_LEN
);
13513 * i40e_get_platform_mac_addr - get platform-specific MAC address
13514 * @pdev: PCI device information struct
13515 * @pf: board private structure
13517 * Look up the MAC address for the device. First we'll try
13518 * eth_platform_get_mac_address, which will check Open Firmware, or arch
13519 * specific fallback. Otherwise, we'll default to the stored value in
13522 static void i40e_get_platform_mac_addr(struct pci_dev
*pdev
, struct i40e_pf
*pf
)
13524 if (eth_platform_get_mac_address(&pdev
->dev
, pf
->hw
.mac
.addr
))
13525 i40e_get_mac_addr(&pf
->hw
, pf
->hw
.mac
.addr
);
13529 * i40e_probe - Device initialization routine
13530 * @pdev: PCI device information struct
13531 * @ent: entry in i40e_pci_tbl
13533 * i40e_probe initializes a PF identified by a pci_dev structure.
13534 * The OS initialization, configuring of the PF private structure,
13535 * and a hardware reset occur.
13537 * Returns 0 on success, negative on failure
13539 static int i40e_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
13541 struct i40e_aq_get_phy_abilities_resp abilities
;
13542 struct i40e_pf
*pf
;
13543 struct i40e_hw
*hw
;
13544 static u16 pfs_found
;
13552 err
= pci_enable_device_mem(pdev
);
13556 /* set up for high or low dma */
13557 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
13559 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
13561 dev_err(&pdev
->dev
,
13562 "DMA configuration failed: 0x%x\n", err
);
13567 /* set up pci connections */
13568 err
= pci_request_mem_regions(pdev
, i40e_driver_name
);
13570 dev_info(&pdev
->dev
,
13571 "pci_request_selected_regions failed %d\n", err
);
13575 pci_enable_pcie_error_reporting(pdev
);
13576 pci_set_master(pdev
);
13578 /* Now that we have a PCI connection, we need to do the
13579 * low level device setup. This is primarily setting up
13580 * the Admin Queue structures and then querying for the
13581 * device's current profile information.
13583 pf
= kzalloc(sizeof(*pf
), GFP_KERNEL
);
13590 set_bit(__I40E_DOWN
, pf
->state
);
13595 pf
->ioremap_len
= min_t(int, pci_resource_len(pdev
, 0),
13596 I40E_MAX_CSR_SPACE
);
13598 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0), pf
->ioremap_len
);
13599 if (!hw
->hw_addr
) {
13601 dev_info(&pdev
->dev
, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
13602 (unsigned int)pci_resource_start(pdev
, 0),
13603 pf
->ioremap_len
, err
);
13606 hw
->vendor_id
= pdev
->vendor
;
13607 hw
->device_id
= pdev
->device
;
13608 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &hw
->revision_id
);
13609 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
13610 hw
->subsystem_device_id
= pdev
->subsystem_device
;
13611 hw
->bus
.device
= PCI_SLOT(pdev
->devfn
);
13612 hw
->bus
.func
= PCI_FUNC(pdev
->devfn
);
13613 hw
->bus
.bus_id
= pdev
->bus
->number
;
13614 pf
->instance
= pfs_found
;
13616 /* Select something other than the 802.1ad ethertype for the
13617 * switch to use internally and drop on ingress.
13619 hw
->switch_tag
= 0xffff;
13620 hw
->first_tag
= ETH_P_8021AD
;
13621 hw
->second_tag
= ETH_P_8021Q
;
13623 INIT_LIST_HEAD(&pf
->l3_flex_pit_list
);
13624 INIT_LIST_HEAD(&pf
->l4_flex_pit_list
);
13626 /* set up the locks for the AQ, do this only once in probe
13627 * and destroy them only once in remove
13629 mutex_init(&hw
->aq
.asq_mutex
);
13630 mutex_init(&hw
->aq
.arq_mutex
);
13632 pf
->msg_enable
= netif_msg_init(debug
,
13637 pf
->hw
.debug_mask
= debug
;
13639 /* do a special CORER for clearing PXE mode once at init */
13640 if (hw
->revision_id
== 0 &&
13641 (rd32(hw
, I40E_GLLAN_RCTL_0
) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK
)) {
13642 wr32(hw
, I40E_GLGEN_RTRIG
, I40E_GLGEN_RTRIG_CORER_MASK
);
13647 i40e_clear_pxe_mode(hw
);
13650 /* Reset here to make sure all is clean and to define PF 'n' */
13652 err
= i40e_pf_reset(hw
);
13654 dev_info(&pdev
->dev
, "Initial pf_reset failed: %d\n", err
);
13659 hw
->aq
.num_arq_entries
= I40E_AQ_LEN
;
13660 hw
->aq
.num_asq_entries
= I40E_AQ_LEN
;
13661 hw
->aq
.arq_buf_size
= I40E_MAX_AQ_BUF_SIZE
;
13662 hw
->aq
.asq_buf_size
= I40E_MAX_AQ_BUF_SIZE
;
13663 pf
->adminq_work_limit
= I40E_AQ_WORK_LIMIT
;
13665 snprintf(pf
->int_name
, sizeof(pf
->int_name
) - 1,
13667 dev_driver_string(&pf
->pdev
->dev
), dev_name(&pdev
->dev
));
13669 err
= i40e_init_shared_code(hw
);
13671 dev_warn(&pdev
->dev
, "unidentified MAC or BLANK NVM: %d\n",
13676 /* set up a default setting for link flow control */
13677 pf
->hw
.fc
.requested_mode
= I40E_FC_NONE
;
13679 err
= i40e_init_adminq(hw
);
13681 if (err
== I40E_ERR_FIRMWARE_API_VERSION
)
13682 dev_info(&pdev
->dev
,
13683 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
13685 dev_info(&pdev
->dev
,
13686 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
13690 i40e_get_oem_version(hw
);
13692 /* provide nvm, fw, api versions */
13693 dev_info(&pdev
->dev
, "fw %d.%d.%05d api %d.%d nvm %s\n",
13694 hw
->aq
.fw_maj_ver
, hw
->aq
.fw_min_ver
, hw
->aq
.fw_build
,
13695 hw
->aq
.api_maj_ver
, hw
->aq
.api_min_ver
,
13696 i40e_nvm_version_str(hw
));
13698 if (hw
->aq
.api_maj_ver
== I40E_FW_API_VERSION_MAJOR
&&
13699 hw
->aq
.api_min_ver
> I40E_FW_MINOR_VERSION(hw
))
13700 dev_info(&pdev
->dev
,
13701 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
13702 else if (hw
->aq
.api_maj_ver
== 1 && hw
->aq
.api_min_ver
< 4)
13703 dev_info(&pdev
->dev
,
13704 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
13706 i40e_verify_eeprom(pf
);
13708 /* Rev 0 hardware was never productized */
13709 if (hw
->revision_id
< 1)
13710 dev_warn(&pdev
->dev
, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
13712 i40e_clear_pxe_mode(hw
);
13713 err
= i40e_get_capabilities(pf
, i40e_aqc_opc_list_func_capabilities
);
13715 goto err_adminq_setup
;
13717 err
= i40e_sw_init(pf
);
13719 dev_info(&pdev
->dev
, "sw_init failed: %d\n", err
);
13723 err
= i40e_init_lan_hmc(hw
, hw
->func_caps
.num_tx_qp
,
13724 hw
->func_caps
.num_rx_qp
, 0, 0);
13726 dev_info(&pdev
->dev
, "init_lan_hmc failed: %d\n", err
);
13727 goto err_init_lan_hmc
;
13730 err
= i40e_configure_lan_hmc(hw
, I40E_HMC_MODEL_DIRECT_ONLY
);
13732 dev_info(&pdev
->dev
, "configure_lan_hmc failed: %d\n", err
);
13734 goto err_configure_lan_hmc
;
13737 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
13738 * Ignore error return codes because if it was already disabled via
13739 * hardware settings this will fail
13741 if (pf
->hw_features
& I40E_HW_STOP_FW_LLDP
) {
13742 dev_info(&pdev
->dev
, "Stopping firmware LLDP agent.\n");
13743 i40e_aq_stop_lldp(hw
, true, NULL
);
13746 /* allow a platform config to override the HW addr */
13747 i40e_get_platform_mac_addr(pdev
, pf
);
13749 if (!is_valid_ether_addr(hw
->mac
.addr
)) {
13750 dev_info(&pdev
->dev
, "invalid MAC address %pM\n", hw
->mac
.addr
);
13754 dev_info(&pdev
->dev
, "MAC address: %pM\n", hw
->mac
.addr
);
13755 ether_addr_copy(hw
->mac
.perm_addr
, hw
->mac
.addr
);
13756 i40e_get_port_mac_addr(hw
, hw
->mac
.port_addr
);
13757 if (is_valid_ether_addr(hw
->mac
.port_addr
))
13758 pf
->hw_features
|= I40E_HW_PORT_ID_VALID
;
13760 pci_set_drvdata(pdev
, pf
);
13761 pci_save_state(pdev
);
13763 /* Enable FW to write default DCB config on link-up */
13764 i40e_aq_set_dcb_parameters(hw
, true, NULL
);
13766 #ifdef CONFIG_I40E_DCB
13767 err
= i40e_init_pf_dcb(pf
);
13769 dev_info(&pdev
->dev
, "DCB init failed %d, disabled\n", err
);
13770 pf
->flags
&= ~(I40E_FLAG_DCB_CAPABLE
| I40E_FLAG_DCB_ENABLED
);
13771 /* Continue without DCB enabled */
13773 #endif /* CONFIG_I40E_DCB */
13775 /* set up periodic task facility */
13776 timer_setup(&pf
->service_timer
, i40e_service_timer
, 0);
13777 pf
->service_timer_period
= HZ
;
13779 INIT_WORK(&pf
->service_task
, i40e_service_task
);
13780 clear_bit(__I40E_SERVICE_SCHED
, pf
->state
);
13782 /* NVM bit on means WoL disabled for the port */
13783 i40e_read_nvm_word(hw
, I40E_SR_NVM_WAKE_ON_LAN
, &wol_nvm_bits
);
13784 if (BIT (hw
->port
) & wol_nvm_bits
|| hw
->partition_id
!= 1)
13785 pf
->wol_en
= false;
13788 device_set_wakeup_enable(&pf
->pdev
->dev
, pf
->wol_en
);
13790 /* set up the main switch operations */
13791 i40e_determine_queue_usage(pf
);
13792 err
= i40e_init_interrupt_scheme(pf
);
13794 goto err_switch_setup
;
13796 /* The number of VSIs reported by the FW is the minimum guaranteed
13797 * to us; HW supports far more and we share the remaining pool with
13798 * the other PFs. We allocate space for more than the guarantee with
13799 * the understanding that we might not get them all later.
13801 if (pf
->hw
.func_caps
.num_vsis
< I40E_MIN_VSI_ALLOC
)
13802 pf
->num_alloc_vsi
= I40E_MIN_VSI_ALLOC
;
13804 pf
->num_alloc_vsi
= pf
->hw
.func_caps
.num_vsis
;
13806 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
13807 pf
->vsi
= kcalloc(pf
->num_alloc_vsi
, sizeof(struct i40e_vsi
*),
13811 goto err_switch_setup
;
13814 #ifdef CONFIG_PCI_IOV
13815 /* prep for VF support */
13816 if ((pf
->flags
& I40E_FLAG_SRIOV_ENABLED
) &&
13817 (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) &&
13818 !test_bit(__I40E_BAD_EEPROM
, pf
->state
)) {
13819 if (pci_num_vf(pdev
))
13820 pf
->flags
|= I40E_FLAG_VEB_MODE_ENABLED
;
13823 err
= i40e_setup_pf_switch(pf
, false);
13825 dev_info(&pdev
->dev
, "setup_pf_switch failed: %d\n", err
);
13828 INIT_LIST_HEAD(&pf
->vsi
[pf
->lan_vsi
]->ch_list
);
13830 /* Make sure flow control is set according to current settings */
13831 err
= i40e_set_fc(hw
, &set_fc_aq_fail
, true);
13832 if (set_fc_aq_fail
& I40E_SET_FC_AQ_FAIL_GET
)
13833 dev_dbg(&pf
->pdev
->dev
,
13834 "Set fc with err %s aq_err %s on get_phy_cap\n",
13835 i40e_stat_str(hw
, err
),
13836 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
13837 if (set_fc_aq_fail
& I40E_SET_FC_AQ_FAIL_SET
)
13838 dev_dbg(&pf
->pdev
->dev
,
13839 "Set fc with err %s aq_err %s on set_phy_config\n",
13840 i40e_stat_str(hw
, err
),
13841 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
13842 if (set_fc_aq_fail
& I40E_SET_FC_AQ_FAIL_UPDATE
)
13843 dev_dbg(&pf
->pdev
->dev
,
13844 "Set fc with err %s aq_err %s on get_link_info\n",
13845 i40e_stat_str(hw
, err
),
13846 i40e_aq_str(hw
, hw
->aq
.asq_last_status
));
13848 /* if FDIR VSI was set up, start it now */
13849 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
13850 if (pf
->vsi
[i
] && pf
->vsi
[i
]->type
== I40E_VSI_FDIR
) {
13851 i40e_vsi_open(pf
->vsi
[i
]);
13856 /* The driver only wants link up/down and module qualification
13857 * reports from firmware. Note the negative logic.
13859 err
= i40e_aq_set_phy_int_mask(&pf
->hw
,
13860 ~(I40E_AQ_EVENT_LINK_UPDOWN
|
13861 I40E_AQ_EVENT_MEDIA_NA
|
13862 I40E_AQ_EVENT_MODULE_QUAL_FAIL
), NULL
);
13864 dev_info(&pf
->pdev
->dev
, "set phy mask fail, err %s aq_err %s\n",
13865 i40e_stat_str(&pf
->hw
, err
),
13866 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
13868 /* Reconfigure hardware for allowing smaller MSS in the case
13869 * of TSO, so that we avoid the MDD being fired and causing
13870 * a reset in the case of small MSS+TSO.
13872 val
= rd32(hw
, I40E_REG_MSS
);
13873 if ((val
& I40E_REG_MSS_MIN_MASK
) > I40E_64BYTE_MSS
) {
13874 val
&= ~I40E_REG_MSS_MIN_MASK
;
13875 val
|= I40E_64BYTE_MSS
;
13876 wr32(hw
, I40E_REG_MSS
, val
);
13879 if (pf
->hw_features
& I40E_HW_RESTART_AUTONEG
) {
13881 err
= i40e_aq_set_link_restart_an(&pf
->hw
, true, NULL
);
13883 dev_info(&pf
->pdev
->dev
, "link restart failed, err %s aq_err %s\n",
13884 i40e_stat_str(&pf
->hw
, err
),
13885 i40e_aq_str(&pf
->hw
,
13886 pf
->hw
.aq
.asq_last_status
));
13888 /* The main driver is (mostly) up and happy. We need to set this state
13889 * before setting up the misc vector or we get a race and the vector
13890 * ends up disabled forever.
13892 clear_bit(__I40E_DOWN
, pf
->state
);
13894 /* In case of MSIX we are going to setup the misc vector right here
13895 * to handle admin queue events etc. In case of legacy and MSI
13896 * the misc functionality and queue processing is combined in
13897 * the same vector and that gets setup at open.
13899 if (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) {
13900 err
= i40e_setup_misc_vector(pf
);
13902 dev_info(&pdev
->dev
,
13903 "setup of misc vector failed: %d\n", err
);
13908 #ifdef CONFIG_PCI_IOV
13909 /* prep for VF support */
13910 if ((pf
->flags
& I40E_FLAG_SRIOV_ENABLED
) &&
13911 (pf
->flags
& I40E_FLAG_MSIX_ENABLED
) &&
13912 !test_bit(__I40E_BAD_EEPROM
, pf
->state
)) {
13913 /* disable link interrupts for VFs */
13914 val
= rd32(hw
, I40E_PFGEN_PORTMDIO_NUM
);
13915 val
&= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK
;
13916 wr32(hw
, I40E_PFGEN_PORTMDIO_NUM
, val
);
13919 if (pci_num_vf(pdev
)) {
13920 dev_info(&pdev
->dev
,
13921 "Active VFs found, allocating resources.\n");
13922 err
= i40e_alloc_vfs(pf
, pci_num_vf(pdev
));
13924 dev_info(&pdev
->dev
,
13925 "Error %d allocating resources for existing VFs\n",
13929 #endif /* CONFIG_PCI_IOV */
13931 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
) {
13932 pf
->iwarp_base_vector
= i40e_get_lump(pf
, pf
->irq_pile
,
13933 pf
->num_iwarp_msix
,
13934 I40E_IWARP_IRQ_PILE_ID
);
13935 if (pf
->iwarp_base_vector
< 0) {
13936 dev_info(&pdev
->dev
,
13937 "failed to get tracking for %d vectors for IWARP err=%d\n",
13938 pf
->num_iwarp_msix
, pf
->iwarp_base_vector
);
13939 pf
->flags
&= ~I40E_FLAG_IWARP_ENABLED
;
13943 i40e_dbg_pf_init(pf
);
13945 /* tell the firmware that we're starting */
13946 i40e_send_version(pf
);
13948 /* since everything's happy, start the service_task timer */
13949 mod_timer(&pf
->service_timer
,
13950 round_jiffies(jiffies
+ pf
->service_timer_period
));
13952 /* add this PF to client device list and launch a client service task */
13953 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
) {
13954 err
= i40e_lan_add_device(pf
);
13956 dev_info(&pdev
->dev
, "Failed to add PF to client API service list: %d\n",
13960 #define PCI_SPEED_SIZE 8
13961 #define PCI_WIDTH_SIZE 8
13962 /* Devices on the IOSF bus do not have this information
13963 * and will report PCI Gen 1 x 1 by default so don't bother
13966 if (!(pf
->hw_features
& I40E_HW_NO_PCI_LINK_CHECK
)) {
13967 char speed
[PCI_SPEED_SIZE
] = "Unknown";
13968 char width
[PCI_WIDTH_SIZE
] = "Unknown";
13970 /* Get the negotiated link width and speed from PCI config
13973 pcie_capability_read_word(pf
->pdev
, PCI_EXP_LNKSTA
,
13976 i40e_set_pci_config_data(hw
, link_status
);
13978 switch (hw
->bus
.speed
) {
13979 case i40e_bus_speed_8000
:
13980 strncpy(speed
, "8.0", PCI_SPEED_SIZE
); break;
13981 case i40e_bus_speed_5000
:
13982 strncpy(speed
, "5.0", PCI_SPEED_SIZE
); break;
13983 case i40e_bus_speed_2500
:
13984 strncpy(speed
, "2.5", PCI_SPEED_SIZE
); break;
13988 switch (hw
->bus
.width
) {
13989 case i40e_bus_width_pcie_x8
:
13990 strncpy(width
, "8", PCI_WIDTH_SIZE
); break;
13991 case i40e_bus_width_pcie_x4
:
13992 strncpy(width
, "4", PCI_WIDTH_SIZE
); break;
13993 case i40e_bus_width_pcie_x2
:
13994 strncpy(width
, "2", PCI_WIDTH_SIZE
); break;
13995 case i40e_bus_width_pcie_x1
:
13996 strncpy(width
, "1", PCI_WIDTH_SIZE
); break;
14001 dev_info(&pdev
->dev
, "PCI-Express: Speed %sGT/s Width x%s\n",
14004 if (hw
->bus
.width
< i40e_bus_width_pcie_x8
||
14005 hw
->bus
.speed
< i40e_bus_speed_8000
) {
14006 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
14007 dev_warn(&pdev
->dev
, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
14011 /* get the requested speeds from the fw */
14012 err
= i40e_aq_get_phy_capabilities(hw
, false, false, &abilities
, NULL
);
14014 dev_dbg(&pf
->pdev
->dev
, "get requested speeds ret = %s last_status = %s\n",
14015 i40e_stat_str(&pf
->hw
, err
),
14016 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
14017 pf
->hw
.phy
.link_info
.requested_speeds
= abilities
.link_speed
;
14019 /* get the supported phy types from the fw */
14020 err
= i40e_aq_get_phy_capabilities(hw
, false, true, &abilities
, NULL
);
14022 dev_dbg(&pf
->pdev
->dev
, "get supported phy types ret = %s last_status = %s\n",
14023 i40e_stat_str(&pf
->hw
, err
),
14024 i40e_aq_str(&pf
->hw
, pf
->hw
.aq
.asq_last_status
));
14026 /* Add a filter to drop all Flow control frames from any VSI from being
14027 * transmitted. By doing so we stop a malicious VF from sending out
14028 * PAUSE or PFC frames and potentially controlling traffic for other
14030 * The FW can still send Flow control frames if enabled.
14032 i40e_add_filter_to_drop_tx_flow_control_frames(&pf
->hw
,
14033 pf
->main_vsi_seid
);
14035 if ((pf
->hw
.device_id
== I40E_DEV_ID_10G_BASE_T
) ||
14036 (pf
->hw
.device_id
== I40E_DEV_ID_10G_BASE_T4
))
14037 pf
->hw_features
|= I40E_HW_PHY_CONTROLS_LEDS
;
14038 if (pf
->hw
.device_id
== I40E_DEV_ID_SFP_I_X722
)
14039 pf
->hw_features
|= I40E_HW_HAVE_CRT_RETIMER
;
14040 /* print a string summarizing features */
14041 i40e_print_features(pf
);
14045 /* Unwind what we've done if something failed in the setup */
14047 set_bit(__I40E_DOWN
, pf
->state
);
14048 i40e_clear_interrupt_scheme(pf
);
14051 i40e_reset_interrupt_capability(pf
);
14052 del_timer_sync(&pf
->service_timer
);
14054 err_configure_lan_hmc
:
14055 (void)i40e_shutdown_lan_hmc(hw
);
14057 kfree(pf
->qp_pile
);
14061 iounmap(hw
->hw_addr
);
14065 pci_disable_pcie_error_reporting(pdev
);
14066 pci_release_mem_regions(pdev
);
14069 pci_disable_device(pdev
);
14074 * i40e_remove - Device removal routine
14075 * @pdev: PCI device information struct
14077 * i40e_remove is called by the PCI subsystem to alert the driver
14078 * that is should release a PCI device. This could be caused by a
14079 * Hot-Plug event, or because the driver is going to be removed from
14082 static void i40e_remove(struct pci_dev
*pdev
)
14084 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14085 struct i40e_hw
*hw
= &pf
->hw
;
14086 i40e_status ret_code
;
14089 i40e_dbg_pf_exit(pf
);
14093 /* Disable RSS in hw */
14094 i40e_write_rx_ctl(hw
, I40E_PFQF_HENA(0), 0);
14095 i40e_write_rx_ctl(hw
, I40E_PFQF_HENA(1), 0);
14097 /* no more scheduling of any task */
14098 set_bit(__I40E_SUSPENDED
, pf
->state
);
14099 set_bit(__I40E_DOWN
, pf
->state
);
14100 if (pf
->service_timer
.function
)
14101 del_timer_sync(&pf
->service_timer
);
14102 if (pf
->service_task
.func
)
14103 cancel_work_sync(&pf
->service_task
);
14105 /* Client close must be called explicitly here because the timer
14106 * has been stopped.
14108 i40e_notify_client_of_netdev_close(pf
->vsi
[pf
->lan_vsi
], false);
14110 if (pf
->flags
& I40E_FLAG_SRIOV_ENABLED
) {
14112 pf
->flags
&= ~I40E_FLAG_SRIOV_ENABLED
;
14115 i40e_fdir_teardown(pf
);
14117 /* If there is a switch structure or any orphans, remove them.
14118 * This will leave only the PF's VSI remaining.
14120 for (i
= 0; i
< I40E_MAX_VEB
; i
++) {
14124 if (pf
->veb
[i
]->uplink_seid
== pf
->mac_seid
||
14125 pf
->veb
[i
]->uplink_seid
== 0)
14126 i40e_switch_branch_release(pf
->veb
[i
]);
14129 /* Now we can shutdown the PF's VSI, just before we kill
14132 if (pf
->vsi
[pf
->lan_vsi
])
14133 i40e_vsi_release(pf
->vsi
[pf
->lan_vsi
]);
14135 i40e_cloud_filter_exit(pf
);
14137 /* remove attached clients */
14138 if (pf
->flags
& I40E_FLAG_IWARP_ENABLED
) {
14139 ret_code
= i40e_lan_del_device(pf
);
14141 dev_warn(&pdev
->dev
, "Failed to delete client device: %d\n",
14145 /* shutdown and destroy the HMC */
14146 if (hw
->hmc
.hmc_obj
) {
14147 ret_code
= i40e_shutdown_lan_hmc(hw
);
14149 dev_warn(&pdev
->dev
,
14150 "Failed to destroy the HMC resources: %d\n",
14154 /* shutdown the adminq */
14155 i40e_shutdown_adminq(hw
);
14157 /* destroy the locks only once, here */
14158 mutex_destroy(&hw
->aq
.arq_mutex
);
14159 mutex_destroy(&hw
->aq
.asq_mutex
);
14161 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
14162 i40e_clear_interrupt_scheme(pf
);
14163 for (i
= 0; i
< pf
->num_alloc_vsi
; i
++) {
14165 i40e_vsi_clear_rings(pf
->vsi
[i
]);
14166 i40e_vsi_clear(pf
->vsi
[i
]);
14171 for (i
= 0; i
< I40E_MAX_VEB
; i
++) {
14176 kfree(pf
->qp_pile
);
14179 iounmap(hw
->hw_addr
);
14181 pci_release_mem_regions(pdev
);
14183 pci_disable_pcie_error_reporting(pdev
);
14184 pci_disable_device(pdev
);
14188 * i40e_pci_error_detected - warning that something funky happened in PCI land
14189 * @pdev: PCI device information struct
14190 * @error: the type of PCI error
14192 * Called to warn that something happened and the error handling steps
14193 * are in progress. Allows the driver to quiesce things, be ready for
14196 static pci_ers_result_t
i40e_pci_error_detected(struct pci_dev
*pdev
,
14197 enum pci_channel_state error
)
14199 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14201 dev_info(&pdev
->dev
, "%s: error %d\n", __func__
, error
);
14204 dev_info(&pdev
->dev
,
14205 "Cannot recover - error happened during device probe\n");
14206 return PCI_ERS_RESULT_DISCONNECT
;
14209 /* shutdown all operations */
14210 if (!test_bit(__I40E_SUSPENDED
, pf
->state
))
14211 i40e_prep_for_reset(pf
, false);
14213 /* Request a slot reset */
14214 return PCI_ERS_RESULT_NEED_RESET
;
14218 * i40e_pci_error_slot_reset - a PCI slot reset just happened
14219 * @pdev: PCI device information struct
14221 * Called to find if the driver can work with the device now that
14222 * the pci slot has been reset. If a basic connection seems good
14223 * (registers are readable and have sane content) then return a
14224 * happy little PCI_ERS_RESULT_xxx.
14226 static pci_ers_result_t
i40e_pci_error_slot_reset(struct pci_dev
*pdev
)
14228 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14229 pci_ers_result_t result
;
14233 dev_dbg(&pdev
->dev
, "%s\n", __func__
);
14234 if (pci_enable_device_mem(pdev
)) {
14235 dev_info(&pdev
->dev
,
14236 "Cannot re-enable PCI device after reset.\n");
14237 result
= PCI_ERS_RESULT_DISCONNECT
;
14239 pci_set_master(pdev
);
14240 pci_restore_state(pdev
);
14241 pci_save_state(pdev
);
14242 pci_wake_from_d3(pdev
, false);
14244 reg
= rd32(&pf
->hw
, I40E_GLGEN_RTRIG
);
14246 result
= PCI_ERS_RESULT_RECOVERED
;
14248 result
= PCI_ERS_RESULT_DISCONNECT
;
14251 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
14253 dev_info(&pdev
->dev
,
14254 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
14256 /* non-fatal, continue */
14263 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
14264 * @pdev: PCI device information struct
14266 static void i40e_pci_error_reset_prepare(struct pci_dev
*pdev
)
14268 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14270 i40e_prep_for_reset(pf
, false);
14274 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
14275 * @pdev: PCI device information struct
14277 static void i40e_pci_error_reset_done(struct pci_dev
*pdev
)
14279 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14281 i40e_reset_and_rebuild(pf
, false, false);
14285 * i40e_pci_error_resume - restart operations after PCI error recovery
14286 * @pdev: PCI device information struct
14288 * Called to allow the driver to bring things back up after PCI error
14289 * and/or reset recovery has finished.
14291 static void i40e_pci_error_resume(struct pci_dev
*pdev
)
14293 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14295 dev_dbg(&pdev
->dev
, "%s\n", __func__
);
14296 if (test_bit(__I40E_SUSPENDED
, pf
->state
))
14299 i40e_handle_reset_warning(pf
, false);
14303 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
14304 * using the mac_address_write admin q function
14305 * @pf: pointer to i40e_pf struct
14307 static void i40e_enable_mc_magic_wake(struct i40e_pf
*pf
)
14309 struct i40e_hw
*hw
= &pf
->hw
;
14314 /* Get current MAC address in case it's an LAA */
14315 if (pf
->vsi
[pf
->lan_vsi
] && pf
->vsi
[pf
->lan_vsi
]->netdev
) {
14316 ether_addr_copy(mac_addr
,
14317 pf
->vsi
[pf
->lan_vsi
]->netdev
->dev_addr
);
14319 dev_err(&pf
->pdev
->dev
,
14320 "Failed to retrieve MAC address; using default\n");
14321 ether_addr_copy(mac_addr
, hw
->mac
.addr
);
14324 /* The FW expects the mac address write cmd to first be called with
14325 * one of these flags before calling it again with the multicast
14328 flags
= I40E_AQC_WRITE_TYPE_LAA_WOL
;
14330 if (hw
->func_caps
.flex10_enable
&& hw
->partition_id
!= 1)
14331 flags
= I40E_AQC_WRITE_TYPE_LAA_ONLY
;
14333 ret
= i40e_aq_mac_address_write(hw
, flags
, mac_addr
, NULL
);
14335 dev_err(&pf
->pdev
->dev
,
14336 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
14340 flags
= I40E_AQC_MC_MAG_EN
14341 | I40E_AQC_WOL_PRESERVE_ON_PFR
14342 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG
;
14343 ret
= i40e_aq_mac_address_write(hw
, flags
, mac_addr
, NULL
);
14345 dev_err(&pf
->pdev
->dev
,
14346 "Failed to enable Multicast Magic Packet wake up\n");
14350 * i40e_shutdown - PCI callback for shutting down
14351 * @pdev: PCI device information struct
14353 static void i40e_shutdown(struct pci_dev
*pdev
)
14355 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14356 struct i40e_hw
*hw
= &pf
->hw
;
14358 set_bit(__I40E_SUSPENDED
, pf
->state
);
14359 set_bit(__I40E_DOWN
, pf
->state
);
14361 del_timer_sync(&pf
->service_timer
);
14362 cancel_work_sync(&pf
->service_task
);
14363 i40e_cloud_filter_exit(pf
);
14364 i40e_fdir_teardown(pf
);
14366 /* Client close must be called explicitly here because the timer
14367 * has been stopped.
14369 i40e_notify_client_of_netdev_close(pf
->vsi
[pf
->lan_vsi
], false);
14371 if (pf
->wol_en
&& (pf
->hw_features
& I40E_HW_WOL_MC_MAGIC_PKT_WAKE
))
14372 i40e_enable_mc_magic_wake(pf
);
14374 i40e_prep_for_reset(pf
, false);
14376 wr32(hw
, I40E_PFPM_APM
,
14377 (pf
->wol_en
? I40E_PFPM_APM_APME_MASK
: 0));
14378 wr32(hw
, I40E_PFPM_WUFC
,
14379 (pf
->wol_en
? I40E_PFPM_WUFC_MAG_MASK
: 0));
14381 i40e_clear_interrupt_scheme(pf
);
14383 if (system_state
== SYSTEM_POWER_OFF
) {
14384 pci_wake_from_d3(pdev
, pf
->wol_en
);
14385 pci_set_power_state(pdev
, PCI_D3hot
);
14390 * i40e_suspend - PM callback for moving to D3
14391 * @dev: generic device information structure
14393 static int __maybe_unused
i40e_suspend(struct device
*dev
)
14395 struct pci_dev
*pdev
= to_pci_dev(dev
);
14396 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14397 struct i40e_hw
*hw
= &pf
->hw
;
14399 /* If we're already suspended, then there is nothing to do */
14400 if (test_and_set_bit(__I40E_SUSPENDED
, pf
->state
))
14403 set_bit(__I40E_DOWN
, pf
->state
);
14405 /* Ensure service task will not be running */
14406 del_timer_sync(&pf
->service_timer
);
14407 cancel_work_sync(&pf
->service_task
);
14409 /* Client close must be called explicitly here because the timer
14410 * has been stopped.
14412 i40e_notify_client_of_netdev_close(pf
->vsi
[pf
->lan_vsi
], false);
14414 if (pf
->wol_en
&& (pf
->hw_features
& I40E_HW_WOL_MC_MAGIC_PKT_WAKE
))
14415 i40e_enable_mc_magic_wake(pf
);
14417 /* Since we're going to destroy queues during the
14418 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
14423 i40e_prep_for_reset(pf
, true);
14425 wr32(hw
, I40E_PFPM_APM
, (pf
->wol_en
? I40E_PFPM_APM_APME_MASK
: 0));
14426 wr32(hw
, I40E_PFPM_WUFC
, (pf
->wol_en
? I40E_PFPM_WUFC_MAG_MASK
: 0));
14428 /* Clear the interrupt scheme and release our IRQs so that the system
14429 * can safely hibernate even when there are a large number of CPUs.
14430 * Otherwise hibernation might fail when mapping all the vectors back
14433 i40e_clear_interrupt_scheme(pf
);
14441 * i40e_resume - PM callback for waking up from D3
14442 * @dev: generic device information structure
14444 static int __maybe_unused
i40e_resume(struct device
*dev
)
14446 struct pci_dev
*pdev
= to_pci_dev(dev
);
14447 struct i40e_pf
*pf
= pci_get_drvdata(pdev
);
14450 /* If we're not suspended, then there is nothing to do */
14451 if (!test_bit(__I40E_SUSPENDED
, pf
->state
))
14454 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
14455 * since we're going to be restoring queues
14459 /* We cleared the interrupt scheme when we suspended, so we need to
14460 * restore it now to resume device functionality.
14462 err
= i40e_restore_interrupt_scheme(pf
);
14464 dev_err(&pdev
->dev
, "Cannot restore interrupt scheme: %d\n",
14468 clear_bit(__I40E_DOWN
, pf
->state
);
14469 i40e_reset_and_rebuild(pf
, false, true);
14473 /* Clear suspended state last after everything is recovered */
14474 clear_bit(__I40E_SUSPENDED
, pf
->state
);
14476 /* Restart the service task */
14477 mod_timer(&pf
->service_timer
,
14478 round_jiffies(jiffies
+ pf
->service_timer_period
));
14483 static const struct pci_error_handlers i40e_err_handler
= {
14484 .error_detected
= i40e_pci_error_detected
,
14485 .slot_reset
= i40e_pci_error_slot_reset
,
14486 .reset_prepare
= i40e_pci_error_reset_prepare
,
14487 .reset_done
= i40e_pci_error_reset_done
,
14488 .resume
= i40e_pci_error_resume
,
14491 static SIMPLE_DEV_PM_OPS(i40e_pm_ops
, i40e_suspend
, i40e_resume
);
14493 static struct pci_driver i40e_driver
= {
14494 .name
= i40e_driver_name
,
14495 .id_table
= i40e_pci_tbl
,
14496 .probe
= i40e_probe
,
14497 .remove
= i40e_remove
,
14499 .pm
= &i40e_pm_ops
,
14501 .shutdown
= i40e_shutdown
,
14502 .err_handler
= &i40e_err_handler
,
14503 .sriov_configure
= i40e_pci_sriov_configure
,
14507 * i40e_init_module - Driver registration routine
14509 * i40e_init_module is the first routine called when the driver is
14510 * loaded. All it does is register with the PCI subsystem.
14512 static int __init
i40e_init_module(void)
14514 pr_info("%s: %s - version %s\n", i40e_driver_name
,
14515 i40e_driver_string
, i40e_driver_version_str
);
14516 pr_info("%s: %s\n", i40e_driver_name
, i40e_copyright
);
14518 /* There is no need to throttle the number of active tasks because
14519 * each device limits its own task using a state bit for scheduling
14520 * the service task, and the device tasks do not interfere with each
14521 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
14522 * since we need to be able to guarantee forward progress even under
14525 i40e_wq
= alloc_workqueue("%s", WQ_MEM_RECLAIM
, 0, i40e_driver_name
);
14527 pr_err("%s: Failed to create workqueue\n", i40e_driver_name
);
14532 return pci_register_driver(&i40e_driver
);
14534 module_init(i40e_init_module
);
14537 * i40e_exit_module - Driver exit cleanup routine
14539 * i40e_exit_module is called just before the driver is removed
14542 static void __exit
i40e_exit_module(void)
14544 pci_unregister_driver(&i40e_driver
);
14545 destroy_workqueue(i40e_wq
);
14548 module_exit(i40e_exit_module
);