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[thirdparty/kernel/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en / ptp.c
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 // Copyright (c) 2020 Mellanox Technologies
3
4 #include "en/ptp.h"
5 #include "en/health.h"
6 #include "en/txrx.h"
7 #include "en/params.h"
8 #include "en/fs_tt_redirect.h"
9 #include <linux/list.h>
10 #include <linux/spinlock.h>
11
12 struct mlx5e_ptp_fs {
13 struct mlx5_flow_handle *l2_rule;
14 struct mlx5_flow_handle *udp_v4_rule;
15 struct mlx5_flow_handle *udp_v6_rule;
16 bool valid;
17 };
18
19 struct mlx5e_ptp_params {
20 struct mlx5e_params params;
21 struct mlx5e_sq_param txq_sq_param;
22 struct mlx5e_rq_param rq_param;
23 };
24
25 struct mlx5e_ptp_port_ts_cqe_tracker {
26 u8 metadata_id;
27 bool inuse : 1;
28 struct list_head entry;
29 };
30
31 struct mlx5e_ptp_port_ts_cqe_list {
32 struct mlx5e_ptp_port_ts_cqe_tracker *nodes;
33 struct list_head tracker_list_head;
34 /* Sync list operations in xmit and napi_poll contexts */
35 spinlock_t tracker_list_lock;
36 };
37
38 static inline void
39 mlx5e_ptp_port_ts_cqe_list_add(struct mlx5e_ptp_port_ts_cqe_list *list, u8 metadata)
40 {
41 struct mlx5e_ptp_port_ts_cqe_tracker *tracker = &list->nodes[metadata];
42
43 WARN_ON_ONCE(tracker->inuse);
44 tracker->inuse = true;
45 spin_lock_bh(&list->tracker_list_lock);
46 list_add_tail(&tracker->entry, &list->tracker_list_head);
47 spin_unlock_bh(&list->tracker_list_lock);
48 }
49
50 static void
51 mlx5e_ptp_port_ts_cqe_list_remove(struct mlx5e_ptp_port_ts_cqe_list *list, u8 metadata)
52 {
53 struct mlx5e_ptp_port_ts_cqe_tracker *tracker = &list->nodes[metadata];
54
55 WARN_ON_ONCE(!tracker->inuse);
56 tracker->inuse = false;
57 spin_lock_bh(&list->tracker_list_lock);
58 list_del(&tracker->entry);
59 spin_unlock_bh(&list->tracker_list_lock);
60 }
61
62 void mlx5e_ptpsq_track_metadata(struct mlx5e_ptpsq *ptpsq, u8 metadata)
63 {
64 mlx5e_ptp_port_ts_cqe_list_add(ptpsq->ts_cqe_pending_list, metadata);
65 }
66
67 struct mlx5e_skb_cb_hwtstamp {
68 ktime_t cqe_hwtstamp;
69 ktime_t port_hwtstamp;
70 };
71
72 void mlx5e_skb_cb_hwtstamp_init(struct sk_buff *skb)
73 {
74 memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
75 }
76
77 static struct mlx5e_skb_cb_hwtstamp *mlx5e_skb_cb_get_hwts(struct sk_buff *skb)
78 {
79 BUILD_BUG_ON(sizeof(struct mlx5e_skb_cb_hwtstamp) > sizeof(skb->cb));
80 return (struct mlx5e_skb_cb_hwtstamp *)skb->cb;
81 }
82
83 static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,
84 struct mlx5e_ptp_cq_stats *cq_stats)
85 {
86 struct skb_shared_hwtstamps hwts = {};
87 ktime_t diff;
88
89 diff = abs(mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp -
90 mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp);
91
92 /* Maximal allowed diff is 1 / 128 second */
93 if (diff > (NSEC_PER_SEC >> 7)) {
94 cq_stats->abort++;
95 cq_stats->abort_abs_diff_ns += diff;
96 return;
97 }
98
99 hwts.hwtstamp = mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp;
100 skb_tstamp_tx(skb, &hwts);
101 }
102
103 void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,
104 ktime_t hwtstamp,
105 struct mlx5e_ptp_cq_stats *cq_stats)
106 {
107 switch (hwtstamp_type) {
108 case (MLX5E_SKB_CB_CQE_HWTSTAMP):
109 mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp = hwtstamp;
110 break;
111 case (MLX5E_SKB_CB_PORT_HWTSTAMP):
112 mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp = hwtstamp;
113 break;
114 }
115
116 /* If both CQEs arrive, check and report the port tstamp, and clear skb cb as
117 * skb soon to be released.
118 */
119 if (!mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp ||
120 !mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp)
121 return;
122
123 mlx5e_skb_cb_hwtstamp_tx(skb, cq_stats);
124 memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
125 }
126
127 static struct sk_buff *
128 mlx5e_ptp_metadata_map_lookup(struct mlx5e_ptp_metadata_map *map, u16 metadata)
129 {
130 return map->data[metadata];
131 }
132
133 static struct sk_buff *
134 mlx5e_ptp_metadata_map_remove(struct mlx5e_ptp_metadata_map *map, u16 metadata)
135 {
136 struct sk_buff *skb;
137
138 skb = map->data[metadata];
139 map->data[metadata] = NULL;
140
141 return skb;
142 }
143
144 static bool mlx5e_ptp_metadata_map_unhealthy(struct mlx5e_ptp_metadata_map *map)
145 {
146 /* Considered beginning unhealthy state if size * 15 / 2^4 cannot be reclaimed. */
147 return map->undelivered_counter > (map->capacity >> 4) * 15;
148 }
149
150 static void mlx5e_ptpsq_mark_ts_cqes_undelivered(struct mlx5e_ptpsq *ptpsq,
151 ktime_t port_tstamp)
152 {
153 struct mlx5e_ptp_port_ts_cqe_list *cqe_list = ptpsq->ts_cqe_pending_list;
154 ktime_t timeout = ns_to_ktime(MLX5E_PTP_TS_CQE_UNDELIVERED_TIMEOUT);
155 struct mlx5e_ptp_metadata_map *metadata_map = &ptpsq->metadata_map;
156 struct mlx5e_ptp_port_ts_cqe_tracker *pos, *n;
157
158 spin_lock_bh(&cqe_list->tracker_list_lock);
159 list_for_each_entry_safe(pos, n, &cqe_list->tracker_list_head, entry) {
160 struct sk_buff *skb =
161 mlx5e_ptp_metadata_map_lookup(metadata_map, pos->metadata_id);
162 ktime_t dma_tstamp = mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp;
163
164 if (!dma_tstamp ||
165 ktime_after(ktime_add(dma_tstamp, timeout), port_tstamp))
166 break;
167
168 metadata_map->undelivered_counter++;
169 WARN_ON_ONCE(!pos->inuse);
170 pos->inuse = false;
171 list_del(&pos->entry);
172 }
173 spin_unlock_bh(&cqe_list->tracker_list_lock);
174 }
175
176 #define PTP_WQE_CTR2IDX(val) ((val) & ptpsq->ts_cqe_ctr_mask)
177
178 static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
179 struct mlx5_cqe64 *cqe,
180 u8 *md_buff,
181 u8 *md_buff_sz,
182 int budget)
183 {
184 struct mlx5e_ptp_port_ts_cqe_list *pending_cqe_list = ptpsq->ts_cqe_pending_list;
185 u8 metadata_id = PTP_WQE_CTR2IDX(be16_to_cpu(cqe->wqe_counter));
186 bool is_err_cqe = !!MLX5E_RX_ERR_CQE(cqe);
187 struct mlx5e_txqsq *sq = &ptpsq->txqsq;
188 struct sk_buff *skb;
189 ktime_t hwtstamp;
190
191 if (likely(pending_cqe_list->nodes[metadata_id].inuse)) {
192 mlx5e_ptp_port_ts_cqe_list_remove(pending_cqe_list, metadata_id);
193 } else {
194 /* Reclaim space in the unlikely event CQE was delivered after
195 * marking it late.
196 */
197 ptpsq->metadata_map.undelivered_counter--;
198 ptpsq->cq_stats->late_cqe++;
199 }
200
201 skb = mlx5e_ptp_metadata_map_remove(&ptpsq->metadata_map, metadata_id);
202
203 if (unlikely(is_err_cqe)) {
204 ptpsq->cq_stats->err_cqe++;
205 goto out;
206 }
207
208 hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, get_cqe_ts(cqe));
209 mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_PORT_HWTSTAMP,
210 hwtstamp, ptpsq->cq_stats);
211 ptpsq->cq_stats->cqe++;
212
213 mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);
214 out:
215 napi_consume_skb(skb, budget);
216 md_buff[(*md_buff_sz)++] = metadata_id;
217 if (unlikely(mlx5e_ptp_metadata_map_unhealthy(&ptpsq->metadata_map)) &&
218 !test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
219 queue_work(ptpsq->txqsq.priv->wq, &ptpsq->report_unhealthy_work);
220 }
221
222 static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int napi_budget)
223 {
224 struct mlx5e_ptpsq *ptpsq = container_of(cq, struct mlx5e_ptpsq, ts_cq);
225 int budget = min(napi_budget, MLX5E_TX_CQ_POLL_BUDGET);
226 u8 metadata_buff[MLX5E_TX_CQ_POLL_BUDGET];
227 u8 metadata_buff_sz = 0;
228 struct mlx5_cqwq *cqwq;
229 struct mlx5_cqe64 *cqe;
230 int work_done = 0;
231
232 cqwq = &cq->wq;
233
234 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &ptpsq->txqsq.state)))
235 return false;
236
237 cqe = mlx5_cqwq_get_cqe(cqwq);
238 if (!cqe)
239 return false;
240
241 do {
242 mlx5_cqwq_pop(cqwq);
243
244 mlx5e_ptp_handle_ts_cqe(ptpsq, cqe,
245 metadata_buff, &metadata_buff_sz, napi_budget);
246 } while ((++work_done < budget) && (cqe = mlx5_cqwq_get_cqe(cqwq)));
247
248 mlx5_cqwq_update_db_record(cqwq);
249
250 /* ensure cq space is freed before enabling more cqes */
251 wmb();
252
253 while (metadata_buff_sz > 0)
254 mlx5e_ptp_metadata_fifo_push(&ptpsq->metadata_freelist,
255 metadata_buff[--metadata_buff_sz]);
256
257 mlx5e_txqsq_wake(&ptpsq->txqsq);
258
259 return work_done == budget;
260 }
261
262 static int mlx5e_ptp_napi_poll(struct napi_struct *napi, int budget)
263 {
264 struct mlx5e_ptp *c = container_of(napi, struct mlx5e_ptp, napi);
265 struct mlx5e_ch_stats *ch_stats = c->stats;
266 struct mlx5e_rq *rq = &c->rq;
267 bool busy = false;
268 int work_done = 0;
269 int i;
270
271 rcu_read_lock();
272
273 ch_stats->poll++;
274
275 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
276 for (i = 0; i < c->num_tc; i++) {
277 busy |= mlx5e_poll_tx_cq(&c->ptpsq[i].txqsq.cq, budget);
278 busy |= mlx5e_ptp_poll_ts_cq(&c->ptpsq[i].ts_cq, budget);
279 }
280 }
281 if (test_bit(MLX5E_PTP_STATE_RX, c->state) && likely(budget)) {
282 work_done = mlx5e_poll_rx_cq(&rq->cq, budget);
283 busy |= work_done == budget;
284 busy |= INDIRECT_CALL_2(rq->post_wqes,
285 mlx5e_post_rx_mpwqes,
286 mlx5e_post_rx_wqes,
287 rq);
288 }
289
290 if (busy) {
291 work_done = budget;
292 goto out;
293 }
294
295 if (unlikely(!napi_complete_done(napi, work_done)))
296 goto out;
297
298 ch_stats->arm++;
299
300 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
301 for (i = 0; i < c->num_tc; i++) {
302 mlx5e_cq_arm(&c->ptpsq[i].txqsq.cq);
303 mlx5e_cq_arm(&c->ptpsq[i].ts_cq);
304 }
305 }
306 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
307 mlx5e_cq_arm(&rq->cq);
308
309 out:
310 rcu_read_unlock();
311
312 return work_done;
313 }
314
315 static int mlx5e_ptp_alloc_txqsq(struct mlx5e_ptp *c, int txq_ix,
316 struct mlx5e_params *params,
317 struct mlx5e_sq_param *param,
318 struct mlx5e_txqsq *sq, int tc,
319 struct mlx5e_ptpsq *ptpsq)
320 {
321 void *sqc_wq = MLX5_ADDR_OF(sqc, param->sqc, wq);
322 struct mlx5_core_dev *mdev = c->mdev;
323 struct mlx5_wq_cyc *wq = &sq->wq;
324 int err;
325 int node;
326
327 sq->pdev = c->pdev;
328 sq->clock = &mdev->clock;
329 sq->mkey_be = c->mkey_be;
330 sq->netdev = c->netdev;
331 sq->priv = c->priv;
332 sq->mdev = mdev;
333 sq->ch_ix = MLX5E_PTP_CHANNEL_IX;
334 sq->txq_ix = txq_ix;
335 sq->uar_map = mdev->mlx5e_res.hw_objs.bfreg.map;
336 sq->min_inline_mode = params->tx_min_inline_mode;
337 sq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
338 sq->stats = &c->priv->ptp_stats.sq[tc];
339 sq->ptpsq = ptpsq;
340 INIT_WORK(&sq->recover_work, mlx5e_tx_err_cqe_work);
341 if (!MLX5_CAP_ETH(mdev, wqe_vlan_insert))
342 set_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &sq->state);
343 sq->stop_room = param->stop_room;
344 sq->ptp_cyc2time = mlx5_sq_ts_translator(mdev);
345
346 node = dev_to_node(mlx5_core_dma_dev(mdev));
347
348 param->wq.db_numa_node = node;
349 err = mlx5_wq_cyc_create(mdev, &param->wq, sqc_wq, wq, &sq->wq_ctrl);
350 if (err)
351 return err;
352 wq->db = &wq->db[MLX5_SND_DBR];
353
354 err = mlx5e_alloc_txqsq_db(sq, node);
355 if (err)
356 goto err_sq_wq_destroy;
357
358 return 0;
359
360 err_sq_wq_destroy:
361 mlx5_wq_destroy(&sq->wq_ctrl);
362
363 return err;
364 }
365
366 static void mlx5e_ptp_destroy_sq(struct mlx5_core_dev *mdev, u32 sqn)
367 {
368 mlx5_core_destroy_sq(mdev, sqn);
369 }
370
371 static int mlx5e_ptp_alloc_traffic_db(struct mlx5e_ptpsq *ptpsq, int numa)
372 {
373 struct mlx5e_ptp_metadata_fifo *metadata_freelist = &ptpsq->metadata_freelist;
374 struct mlx5e_ptp_metadata_map *metadata_map = &ptpsq->metadata_map;
375 struct mlx5e_ptp_port_ts_cqe_list *cqe_list;
376 int db_sz;
377 int md;
378
379 cqe_list = kvzalloc_node(sizeof(*ptpsq->ts_cqe_pending_list), GFP_KERNEL, numa);
380 if (!cqe_list)
381 return -ENOMEM;
382 ptpsq->ts_cqe_pending_list = cqe_list;
383
384 db_sz = min_t(u32, mlx5_wq_cyc_get_size(&ptpsq->txqsq.wq),
385 1 << MLX5_CAP_GEN_2(ptpsq->txqsq.mdev,
386 ts_cqe_metadata_size2wqe_counter));
387 ptpsq->ts_cqe_ctr_mask = db_sz - 1;
388
389 cqe_list->nodes = kvzalloc_node(array_size(db_sz, sizeof(*cqe_list->nodes)),
390 GFP_KERNEL, numa);
391 if (!cqe_list->nodes)
392 goto free_cqe_list;
393 INIT_LIST_HEAD(&cqe_list->tracker_list_head);
394 spin_lock_init(&cqe_list->tracker_list_lock);
395
396 metadata_freelist->data =
397 kvzalloc_node(array_size(db_sz, sizeof(*metadata_freelist->data)),
398 GFP_KERNEL, numa);
399 if (!metadata_freelist->data)
400 goto free_cqe_list_nodes;
401 metadata_freelist->mask = ptpsq->ts_cqe_ctr_mask;
402
403 for (md = 0; md < db_sz; ++md) {
404 cqe_list->nodes[md].metadata_id = md;
405 metadata_freelist->data[md] = md;
406 }
407 metadata_freelist->pc = db_sz;
408
409 metadata_map->data =
410 kvzalloc_node(array_size(db_sz, sizeof(*metadata_map->data)),
411 GFP_KERNEL, numa);
412 if (!metadata_map->data)
413 goto free_metadata_freelist;
414 metadata_map->capacity = db_sz;
415
416 return 0;
417
418 free_metadata_freelist:
419 kvfree(metadata_freelist->data);
420 free_cqe_list_nodes:
421 kvfree(cqe_list->nodes);
422 free_cqe_list:
423 kvfree(cqe_list);
424 return -ENOMEM;
425 }
426
427 static void mlx5e_ptp_drain_metadata_map(struct mlx5e_ptp_metadata_map *map)
428 {
429 int idx;
430
431 for (idx = 0; idx < map->capacity; ++idx) {
432 struct sk_buff *skb = map->data[idx];
433
434 dev_kfree_skb_any(skb);
435 }
436 }
437
438 static void mlx5e_ptp_free_traffic_db(struct mlx5e_ptpsq *ptpsq)
439 {
440 mlx5e_ptp_drain_metadata_map(&ptpsq->metadata_map);
441 kvfree(ptpsq->metadata_map.data);
442 kvfree(ptpsq->metadata_freelist.data);
443 kvfree(ptpsq->ts_cqe_pending_list->nodes);
444 kvfree(ptpsq->ts_cqe_pending_list);
445 }
446
447 static void mlx5e_ptpsq_unhealthy_work(struct work_struct *work)
448 {
449 struct mlx5e_ptpsq *ptpsq =
450 container_of(work, struct mlx5e_ptpsq, report_unhealthy_work);
451
452 mlx5e_reporter_tx_ptpsq_unhealthy(ptpsq);
453 }
454
455 static int mlx5e_ptp_open_txqsq(struct mlx5e_ptp *c, u32 tisn,
456 int txq_ix, struct mlx5e_ptp_params *cparams,
457 int tc, struct mlx5e_ptpsq *ptpsq)
458 {
459 struct mlx5e_sq_param *sqp = &cparams->txq_sq_param;
460 struct mlx5e_txqsq *txqsq = &ptpsq->txqsq;
461 struct mlx5e_create_sq_param csp = {};
462 int err;
463
464 err = mlx5e_ptp_alloc_txqsq(c, txq_ix, &cparams->params, sqp,
465 txqsq, tc, ptpsq);
466 if (err)
467 return err;
468
469 csp.tisn = tisn;
470 csp.tis_lst_sz = 1;
471 csp.cqn = txqsq->cq.mcq.cqn;
472 csp.wq_ctrl = &txqsq->wq_ctrl;
473 csp.min_inline_mode = txqsq->min_inline_mode;
474 csp.ts_cqe_to_dest_cqn = ptpsq->ts_cq.mcq.cqn;
475
476 err = mlx5e_create_sq_rdy(c->mdev, sqp, &csp, 0, &txqsq->sqn);
477 if (err)
478 goto err_free_txqsq;
479
480 err = mlx5e_ptp_alloc_traffic_db(ptpsq, dev_to_node(mlx5_core_dma_dev(c->mdev)));
481 if (err)
482 goto err_free_txqsq;
483
484 INIT_WORK(&ptpsq->report_unhealthy_work, mlx5e_ptpsq_unhealthy_work);
485
486 return 0;
487
488 err_free_txqsq:
489 mlx5e_free_txqsq(txqsq);
490
491 return err;
492 }
493
494 static void mlx5e_ptp_close_txqsq(struct mlx5e_ptpsq *ptpsq)
495 {
496 struct mlx5e_txqsq *sq = &ptpsq->txqsq;
497 struct mlx5_core_dev *mdev = sq->mdev;
498
499 if (current_work() != &ptpsq->report_unhealthy_work)
500 cancel_work_sync(&ptpsq->report_unhealthy_work);
501 mlx5e_ptp_free_traffic_db(ptpsq);
502 cancel_work_sync(&sq->recover_work);
503 mlx5e_ptp_destroy_sq(mdev, sq->sqn);
504 mlx5e_free_txqsq_descs(sq);
505 mlx5e_free_txqsq(sq);
506 }
507
508 static int mlx5e_ptp_open_txqsqs(struct mlx5e_ptp *c,
509 struct mlx5e_ptp_params *cparams)
510 {
511 struct mlx5e_params *params = &cparams->params;
512 u8 num_tc = mlx5e_get_dcb_num_tc(params);
513 int ix_base;
514 int err;
515 int tc;
516
517 ix_base = num_tc * params->num_channels;
518
519 for (tc = 0; tc < num_tc; tc++) {
520 int txq_ix = ix_base + tc;
521 u32 tisn;
522
523 tisn = mlx5e_profile_get_tisn(c->mdev, c->priv, c->priv->profile,
524 c->lag_port, tc);
525 err = mlx5e_ptp_open_txqsq(c, tisn, txq_ix, cparams, tc, &c->ptpsq[tc]);
526 if (err)
527 goto close_txqsq;
528 }
529
530 return 0;
531
532 close_txqsq:
533 for (--tc; tc >= 0; tc--)
534 mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
535
536 return err;
537 }
538
539 static void mlx5e_ptp_close_txqsqs(struct mlx5e_ptp *c)
540 {
541 int tc;
542
543 for (tc = 0; tc < c->num_tc; tc++)
544 mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
545 }
546
547 static int mlx5e_ptp_open_tx_cqs(struct mlx5e_ptp *c,
548 struct mlx5e_ptp_params *cparams)
549 {
550 struct mlx5e_params *params = &cparams->params;
551 struct mlx5e_create_cq_param ccp = {};
552 struct dim_cq_moder ptp_moder = {};
553 struct mlx5e_cq_param *cq_param;
554 u8 num_tc;
555 int err;
556 int tc;
557
558 num_tc = mlx5e_get_dcb_num_tc(params);
559
560 ccp.netdev = c->netdev;
561 ccp.wq = c->priv->wq;
562 ccp.node = dev_to_node(mlx5_core_dma_dev(c->mdev));
563 ccp.ch_stats = c->stats;
564 ccp.napi = &c->napi;
565 ccp.ix = MLX5E_PTP_CHANNEL_IX;
566
567 cq_param = &cparams->txq_sq_param.cqp;
568
569 for (tc = 0; tc < num_tc; tc++) {
570 struct mlx5e_cq *cq = &c->ptpsq[tc].txqsq.cq;
571
572 err = mlx5e_open_cq(c->mdev, ptp_moder, cq_param, &ccp, cq);
573 if (err)
574 goto out_err_txqsq_cq;
575 }
576
577 for (tc = 0; tc < num_tc; tc++) {
578 struct mlx5e_cq *cq = &c->ptpsq[tc].ts_cq;
579 struct mlx5e_ptpsq *ptpsq = &c->ptpsq[tc];
580
581 err = mlx5e_open_cq(c->mdev, ptp_moder, cq_param, &ccp, cq);
582 if (err)
583 goto out_err_ts_cq;
584
585 ptpsq->cq_stats = &c->priv->ptp_stats.cq[tc];
586 }
587
588 return 0;
589
590 out_err_ts_cq:
591 for (--tc; tc >= 0; tc--)
592 mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
593 tc = num_tc;
594 out_err_txqsq_cq:
595 for (--tc; tc >= 0; tc--)
596 mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
597
598 return err;
599 }
600
601 static int mlx5e_ptp_open_rx_cq(struct mlx5e_ptp *c,
602 struct mlx5e_ptp_params *cparams)
603 {
604 struct mlx5e_create_cq_param ccp = {};
605 struct dim_cq_moder ptp_moder = {};
606 struct mlx5e_cq_param *cq_param;
607 struct mlx5e_cq *cq = &c->rq.cq;
608
609 ccp.netdev = c->netdev;
610 ccp.wq = c->priv->wq;
611 ccp.node = dev_to_node(mlx5_core_dma_dev(c->mdev));
612 ccp.ch_stats = c->stats;
613 ccp.napi = &c->napi;
614 ccp.ix = MLX5E_PTP_CHANNEL_IX;
615
616 cq_param = &cparams->rq_param.cqp;
617
618 return mlx5e_open_cq(c->mdev, ptp_moder, cq_param, &ccp, cq);
619 }
620
621 static void mlx5e_ptp_close_tx_cqs(struct mlx5e_ptp *c)
622 {
623 int tc;
624
625 for (tc = 0; tc < c->num_tc; tc++)
626 mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
627
628 for (tc = 0; tc < c->num_tc; tc++)
629 mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
630 }
631
632 static void mlx5e_ptp_build_sq_param(struct mlx5_core_dev *mdev,
633 struct mlx5e_params *params,
634 struct mlx5e_sq_param *param)
635 {
636 void *sqc = param->sqc;
637 void *wq;
638
639 mlx5e_build_sq_param_common(mdev, param);
640
641 wq = MLX5_ADDR_OF(sqc, sqc, wq);
642 MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
643 param->stop_room = mlx5e_stop_room_for_max_wqe(mdev);
644 mlx5e_build_tx_cq_param(mdev, params, &param->cqp);
645 }
646
647 static void mlx5e_ptp_build_rq_param(struct mlx5_core_dev *mdev,
648 struct net_device *netdev,
649 u16 q_counter,
650 struct mlx5e_ptp_params *ptp_params)
651 {
652 struct mlx5e_rq_param *rq_params = &ptp_params->rq_param;
653 struct mlx5e_params *params = &ptp_params->params;
654
655 params->rq_wq_type = MLX5_WQ_TYPE_CYCLIC;
656 mlx5e_init_rq_type_params(mdev, params);
657 params->sw_mtu = netdev->max_mtu;
658 mlx5e_build_rq_param(mdev, params, NULL, q_counter, rq_params);
659 }
660
661 static void mlx5e_ptp_build_params(struct mlx5e_ptp *c,
662 struct mlx5e_ptp_params *cparams,
663 struct mlx5e_params *orig)
664 {
665 struct mlx5e_params *params = &cparams->params;
666
667 params->tx_min_inline_mode = orig->tx_min_inline_mode;
668 params->num_channels = orig->num_channels;
669 params->hard_mtu = orig->hard_mtu;
670 params->sw_mtu = orig->sw_mtu;
671 params->mqprio = orig->mqprio;
672
673 /* SQ */
674 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
675 params->log_sq_size =
676 min(MLX5_CAP_GEN_2(c->mdev, ts_cqe_metadata_size2wqe_counter),
677 MLX5E_PTP_MAX_LOG_SQ_SIZE);
678 params->log_sq_size = min(params->log_sq_size, orig->log_sq_size);
679 mlx5e_ptp_build_sq_param(c->mdev, params, &cparams->txq_sq_param);
680 }
681 /* RQ */
682 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
683 params->vlan_strip_disable = orig->vlan_strip_disable;
684 mlx5e_ptp_build_rq_param(c->mdev, c->netdev, c->priv->q_counter, cparams);
685 }
686 }
687
688 static int mlx5e_init_ptp_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
689 struct mlx5e_rq *rq)
690 {
691 struct mlx5_core_dev *mdev = c->mdev;
692 struct mlx5e_priv *priv = c->priv;
693 int err;
694
695 rq->wq_type = params->rq_wq_type;
696 rq->pdev = c->pdev;
697 rq->netdev = priv->netdev;
698 rq->priv = priv;
699 rq->clock = &mdev->clock;
700 rq->tstamp = &priv->tstamp;
701 rq->mdev = mdev;
702 rq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
703 rq->stats = &c->priv->ptp_stats.rq;
704 rq->ix = MLX5E_PTP_CHANNEL_IX;
705 rq->ptp_cyc2time = mlx5_rq_ts_translator(mdev);
706 err = mlx5e_rq_set_handlers(rq, params, false);
707 if (err)
708 return err;
709
710 return xdp_rxq_info_reg(&rq->xdp_rxq, rq->netdev, rq->ix, 0);
711 }
712
713 static int mlx5e_ptp_open_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
714 struct mlx5e_rq_param *rq_param)
715 {
716 int node = dev_to_node(c->mdev->device);
717 int err;
718
719 err = mlx5e_init_ptp_rq(c, params, &c->rq);
720 if (err)
721 return err;
722
723 return mlx5e_open_rq(params, rq_param, NULL, node, &c->rq);
724 }
725
726 static int mlx5e_ptp_open_queues(struct mlx5e_ptp *c,
727 struct mlx5e_ptp_params *cparams)
728 {
729 int err;
730
731 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
732 err = mlx5e_ptp_open_tx_cqs(c, cparams);
733 if (err)
734 return err;
735
736 err = mlx5e_ptp_open_txqsqs(c, cparams);
737 if (err)
738 goto close_tx_cqs;
739 }
740 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
741 err = mlx5e_ptp_open_rx_cq(c, cparams);
742 if (err)
743 goto close_txqsq;
744
745 err = mlx5e_ptp_open_rq(c, &cparams->params, &cparams->rq_param);
746 if (err)
747 goto close_rx_cq;
748 }
749 return 0;
750
751 close_rx_cq:
752 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
753 mlx5e_close_cq(&c->rq.cq);
754 close_txqsq:
755 if (test_bit(MLX5E_PTP_STATE_TX, c->state))
756 mlx5e_ptp_close_txqsqs(c);
757 close_tx_cqs:
758 if (test_bit(MLX5E_PTP_STATE_TX, c->state))
759 mlx5e_ptp_close_tx_cqs(c);
760
761 return err;
762 }
763
764 static void mlx5e_ptp_close_queues(struct mlx5e_ptp *c)
765 {
766 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
767 mlx5e_close_rq(&c->rq);
768 mlx5e_close_cq(&c->rq.cq);
769 }
770 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
771 mlx5e_ptp_close_txqsqs(c);
772 mlx5e_ptp_close_tx_cqs(c);
773 }
774 }
775
776 static int mlx5e_ptp_set_state(struct mlx5e_ptp *c, struct mlx5e_params *params)
777 {
778 if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_TX_PORT_TS))
779 __set_bit(MLX5E_PTP_STATE_TX, c->state);
780
781 if (params->ptp_rx)
782 __set_bit(MLX5E_PTP_STATE_RX, c->state);
783
784 return bitmap_empty(c->state, MLX5E_PTP_STATE_NUM_STATES) ? -EINVAL : 0;
785 }
786
787 static void mlx5e_ptp_rx_unset_fs(struct mlx5e_flow_steering *fs)
788 {
789 struct mlx5e_ptp_fs *ptp_fs = mlx5e_fs_get_ptp(fs);
790
791 if (!ptp_fs->valid)
792 return;
793
794 mlx5e_fs_tt_redirect_del_rule(ptp_fs->l2_rule);
795 mlx5e_fs_tt_redirect_any_destroy(fs);
796
797 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v6_rule);
798 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v4_rule);
799 mlx5e_fs_tt_redirect_udp_destroy(fs);
800 ptp_fs->valid = false;
801 }
802
803 static int mlx5e_ptp_rx_set_fs(struct mlx5e_priv *priv)
804 {
805 u32 tirn = mlx5e_rx_res_get_tirn_ptp(priv->rx_res);
806 struct mlx5e_flow_steering *fs = priv->fs;
807 struct mlx5_flow_handle *rule;
808 struct mlx5e_ptp_fs *ptp_fs;
809 int err;
810
811 ptp_fs = mlx5e_fs_get_ptp(fs);
812 if (ptp_fs->valid)
813 return 0;
814
815 err = mlx5e_fs_tt_redirect_udp_create(fs);
816 if (err)
817 goto out_free;
818
819 rule = mlx5e_fs_tt_redirect_udp_add_rule(fs, MLX5_TT_IPV4_UDP,
820 tirn, PTP_EV_PORT);
821 if (IS_ERR(rule)) {
822 err = PTR_ERR(rule);
823 goto out_destroy_fs_udp;
824 }
825 ptp_fs->udp_v4_rule = rule;
826
827 rule = mlx5e_fs_tt_redirect_udp_add_rule(fs, MLX5_TT_IPV6_UDP,
828 tirn, PTP_EV_PORT);
829 if (IS_ERR(rule)) {
830 err = PTR_ERR(rule);
831 goto out_destroy_udp_v4_rule;
832 }
833 ptp_fs->udp_v6_rule = rule;
834
835 err = mlx5e_fs_tt_redirect_any_create(fs);
836 if (err)
837 goto out_destroy_udp_v6_rule;
838
839 rule = mlx5e_fs_tt_redirect_any_add_rule(fs, tirn, ETH_P_1588);
840 if (IS_ERR(rule)) {
841 err = PTR_ERR(rule);
842 goto out_destroy_fs_any;
843 }
844 ptp_fs->l2_rule = rule;
845 ptp_fs->valid = true;
846
847 return 0;
848
849 out_destroy_fs_any:
850 mlx5e_fs_tt_redirect_any_destroy(fs);
851 out_destroy_udp_v6_rule:
852 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v6_rule);
853 out_destroy_udp_v4_rule:
854 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v4_rule);
855 out_destroy_fs_udp:
856 mlx5e_fs_tt_redirect_udp_destroy(fs);
857 out_free:
858 return err;
859 }
860
861 int mlx5e_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,
862 u8 lag_port, struct mlx5e_ptp **cp)
863 {
864 struct net_device *netdev = priv->netdev;
865 struct mlx5_core_dev *mdev = priv->mdev;
866 struct mlx5e_ptp_params *cparams;
867 struct mlx5e_ptp *c;
868 int err;
869
870
871 c = kvzalloc_node(sizeof(*c), GFP_KERNEL, dev_to_node(mlx5_core_dma_dev(mdev)));
872 cparams = kvzalloc(sizeof(*cparams), GFP_KERNEL);
873 if (!c || !cparams) {
874 err = -ENOMEM;
875 goto err_free;
876 }
877
878 c->priv = priv;
879 c->mdev = priv->mdev;
880 c->tstamp = &priv->tstamp;
881 c->pdev = mlx5_core_dma_dev(priv->mdev);
882 c->netdev = priv->netdev;
883 c->mkey_be = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey);
884 c->num_tc = mlx5e_get_dcb_num_tc(params);
885 c->stats = &priv->ptp_stats.ch;
886 c->lag_port = lag_port;
887
888 err = mlx5e_ptp_set_state(c, params);
889 if (err)
890 goto err_free;
891
892 netif_napi_add(netdev, &c->napi, mlx5e_ptp_napi_poll);
893
894 mlx5e_ptp_build_params(c, cparams, params);
895
896 err = mlx5e_ptp_open_queues(c, cparams);
897 if (unlikely(err))
898 goto err_napi_del;
899
900 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
901 priv->rx_ptp_opened = true;
902
903 *cp = c;
904
905 kvfree(cparams);
906
907 return 0;
908
909 err_napi_del:
910 netif_napi_del(&c->napi);
911 err_free:
912 kvfree(cparams);
913 kvfree(c);
914 return err;
915 }
916
917 void mlx5e_ptp_close(struct mlx5e_ptp *c)
918 {
919 mlx5e_ptp_close_queues(c);
920 netif_napi_del(&c->napi);
921
922 kvfree(c);
923 }
924
925 void mlx5e_ptp_activate_channel(struct mlx5e_ptp *c)
926 {
927 int tc;
928
929 napi_enable(&c->napi);
930
931 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
932 for (tc = 0; tc < c->num_tc; tc++)
933 mlx5e_activate_txqsq(&c->ptpsq[tc].txqsq);
934 }
935 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
936 mlx5e_ptp_rx_set_fs(c->priv);
937 mlx5e_activate_rq(&c->rq);
938 netif_queue_set_napi(c->netdev, c->rq.ix, NETDEV_QUEUE_TYPE_RX, &c->napi);
939 }
940 mlx5e_trigger_napi_sched(&c->napi);
941 }
942
943 void mlx5e_ptp_deactivate_channel(struct mlx5e_ptp *c)
944 {
945 int tc;
946
947 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
948 netif_queue_set_napi(c->netdev, c->rq.ix, NETDEV_QUEUE_TYPE_RX, NULL);
949 mlx5e_deactivate_rq(&c->rq);
950 }
951
952 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
953 for (tc = 0; tc < c->num_tc; tc++)
954 mlx5e_deactivate_txqsq(&c->ptpsq[tc].txqsq);
955 }
956
957 napi_disable(&c->napi);
958 }
959
960 int mlx5e_ptp_get_rqn(struct mlx5e_ptp *c, u32 *rqn)
961 {
962 if (!c || !test_bit(MLX5E_PTP_STATE_RX, c->state))
963 return -EINVAL;
964
965 *rqn = c->rq.rqn;
966 return 0;
967 }
968
969 int mlx5e_ptp_alloc_rx_fs(struct mlx5e_flow_steering *fs,
970 const struct mlx5e_profile *profile)
971 {
972 struct mlx5e_ptp_fs *ptp_fs;
973
974 if (!mlx5e_profile_feature_cap(profile, PTP_RX))
975 return 0;
976
977 ptp_fs = kzalloc(sizeof(*ptp_fs), GFP_KERNEL);
978 if (!ptp_fs)
979 return -ENOMEM;
980 mlx5e_fs_set_ptp(fs, ptp_fs);
981
982 return 0;
983 }
984
985 void mlx5e_ptp_free_rx_fs(struct mlx5e_flow_steering *fs,
986 const struct mlx5e_profile *profile)
987 {
988 struct mlx5e_ptp_fs *ptp_fs = mlx5e_fs_get_ptp(fs);
989
990 if (!mlx5e_profile_feature_cap(profile, PTP_RX))
991 return;
992
993 mlx5e_ptp_rx_unset_fs(fs);
994 kfree(ptp_fs);
995 }
996
997 int mlx5e_ptp_rx_manage_fs(struct mlx5e_priv *priv, bool set)
998 {
999 struct mlx5e_ptp *c = priv->channels.ptp;
1000
1001 if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
1002 return 0;
1003
1004 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
1005 return 0;
1006
1007 if (set) {
1008 if (!c || !test_bit(MLX5E_PTP_STATE_RX, c->state)) {
1009 netdev_WARN_ONCE(priv->netdev, "Don't try to add PTP RX-FS rules");
1010 return -EINVAL;
1011 }
1012 return mlx5e_ptp_rx_set_fs(priv);
1013 }
1014 /* set == false */
1015 if (c && test_bit(MLX5E_PTP_STATE_RX, c->state)) {
1016 netdev_WARN_ONCE(priv->netdev, "Don't try to remove PTP RX-FS rules");
1017 return -EINVAL;
1018 }
1019 mlx5e_ptp_rx_unset_fs(priv->fs);
1020 return 0;
1021 }